Previous 199869 Revisions Next

r33894 Monday 15th December, 2014 at 14:31:04 UTC by R. Belmont
Merge pull request #82 from wallyweek/cfalco

Bump version in *nix man pages [wallyweek]
[src/emu/cpu/arcompact]arcompactdasm_ops.c
[src/mame/drivers]hikaru.c
[src/osd/sdl]input.c

trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
r242405r242406
5959};
6060
6161
62//#define EXPLICIT_EXTENSIONS
63
64static const char *datasize[0x4] =
65{
66#ifdef EXPLICIT_EXTENSIONS
67   /* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
68#else
69   /* 00 */ "",// Dword (default)
70#endif
71   /* 01 */ ".B", // Byte
72   /* 02 */ ".W", // Word
73   /* 03 */ ".<illegal data size>"
74};
75
76static const char *dataextend[0x2] =
77{
78#ifdef EXPLICIT_EXTENSIONS
79   /* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
80else
81   /* 00 */ "", // Zero Extend
82#endif
83   /* 01 */ ".X" // Sign Extend
84};
85
86static const char *addressmode[0x4] =
87{
88#ifdef EXPLICIT_EXTENSIONS
89   /* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
90#else
91   /* 00 */ "", // No Writeback
92#endif
93   /* 01 */ ".AW", // Writeback pre memory access
94   /* 02 */ ".AB", // Writeback post memory access
95   /* 03 */ ".AS"  // scaled
96};
97
98static const char *cachebit[0x2] =
99{
100#ifdef EXPLICIT_EXTENSIONS
101   /* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
102#else
103   /* 00 */ "", // Data Cache Enabled
104#endif
105   /* 01 */ ".DI" // Direct to Memory (Cache Bypass)
106};
107
108static const char *flagbit[0x2] =
109{
110#ifdef EXPLICIT_EXTENSIONS
111   /* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
112#else
113   /* 00 */ "", // Don't Set Flags
114#endif
115   /* 01 */ ".F" // Set Flags
116};
117
118static const char *delaybit[0x2] =
119{
120   /* 00 */ ".ND", // Don't execute opcode in delay slot
121   /* 01 */ ".D"   // Execute Opcode in delay slot
122};
123
124
125static const char *regnames[0x40] =
126{
127   /* 00 */ "r0",
128   /* 01 */ "r1",
129   /* 02 */ "r2",
130   /* 03 */ "r3",
131   /* 04 */ "r4",
132   /* 05 */ "r5",
133   /* 06 */ "r6",
134   /* 07 */ "r7",
135   /* 08 */ "r8",
136   /* 09 */ "r9",
137   /* 0a */ "r10",
138   /* 0b */ "r11",
139   /* 0c */ "r12",
140   /* 0d */ "r13",
141   /* 0e */ "r14",
142   /* 0f */ "r15",
143
144   /* 10 */ "r16",
145   /* 11 */ "r17",
146   /* 12 */ "r18",
147   /* 13 */ "r19",
148   /* 14 */ "r20",
149   /* 15 */ "r21",
150   /* 16 */ "r22",
151   /* 17 */ "r23",
152   /* 18 */ "r24",
153   /* 19 */ "r25",
154   /* 1a */ "r26(GP)",
155   /* 1b */ "r27(FP)",
156   /* 1c */ "r28(SP)",
157   /* 1d */ "r29(ILINK1)",
158   /* 1e */ "r30(ILINK2)",
159   /* 1f */ "r31(BLINK)",
160
161   /* 20 */ "r32(ext)",
162   /* 21 */ "r33(ext)",
163   /* 22 */ "r34(ext)",
164   /* 23 */ "r35(ext)",
165   /* 24 */ "r36(ext)",
166   /* 25 */ "r37(ext)",
167   /* 26 */ "r38(ext)",
168   /* 27 */ "r39(ext)",
169   /* 28 */ "r40(ext)",
170   /* 29 */ "r41(ext)",
171   /* 2a */ "r42(ext)",
172   /* 2b */ "r43(ext)",
173   /* 2c */ "r44(ext)",
174   /* 2d */ "r45(ext)",
175   /* 2e */ "r46(ext)",
176   /* 2f */ "r47(ext)",
177
178   /* 30 */ "r48(ext)",
179   /* 31 */ "r49(ext)",
180   /* 32 */ "r50(ext)",
181   /* 33 */ "r51(ext)",
182   /* 34 */ "r52(ext)",
183   /* 35 */ "r53(ext)",
184   /* 36 */ "r54(ext)",
185   /* 37 */ "r55(ext)",
186   /* 38 */ "r56(ext)",
187   /* 39 */ "r57(ext)", // MLO  (result registers for optional multply functions)
188   /* 3a */ "r58(ext)", // MMID
189   /* 3b */ "r59(ext)", // MHI
190   /* 3c */ "r60(LP_COUNT)",
191   /* 3d */ "r61(reserved)",
192   /* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
193   /* 3f */ "r63(PCL)"
194};
195
196
197
62198int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
63199{
64200   int size = 4;
r242405r242406
72208   int c = (op & 0x00000fc0) >> 6;
73209   int b = (op & 0x07000000) >> 24;
74210   b |= ((op & 0x00007000) >> 12) << 3;
211   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
75212
76213   op &= ~0x07007fe0;
77214
78215   if ((b != LIMM_REG) && (c != LIMM_REG))
79216   {
80      print("%s (r%d) (r%d) %08x (%08x)", optext, b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
217      print("%s%s (r%d) (r%d) %08x (%08x)", optext, delaybit[n], b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
81218   }
82219   else
83220   {
r242405r242406
87224
88225      if ((b == LIMM_REG) && (c != LIMM_REG))
89226      {
90         print("%s (%08x) (r%d) %08x (%08x)", optext, limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
227         print("%s%s (%08x) (r%d) %08x (%08x)", optext, delaybit[n], limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
91228      }
92229      else if ((c == LIMM_REG) && (b != LIMM_REG))
93230      {
94         print("%s (r%d) (%08x) %08x (%08x)", optext, b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
231         print("%s%s (r%d) (%08x) %08x (%08x)", optext, delaybit[n], b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
95232      }
96233      else
97234      {
98235         // b and c are LIMM? invalid??
99         print("%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
236         print("%s%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, delaybit[n], limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
100237
101238      }
102239   }
r242405r242406
136273   INT32 address = (op & 0x07fe0000) >> 17;
137274   address |= ((op & 0x0000ffc0) >> 6) << 10;
138275   if (address & 0x800000) address = -(address & 0x7fffff);
139
276   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
140277   UINT8 condition = op & 0x0000001f;
141278
142   print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2), op & ~0xffffffdf);
279   output  += sprintf( output, "B%s(%s) %08x", delaybit[n], conditions[condition], pc + (address * 2));
143280   return size;
144281}
145282
r242405r242406
152289   address |= ((op & 0x0000ffc0) >> 6) << 10;
153290   address |= ((op & 0x0000000f) >> 0) << 20;
154291   if (address & 0x800000) address = -(address & 0x7fffff);
292   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
293   int res =  (op & 0x00000010) >> 4; op &= ~0x00000010;
155294
156   print("B %08x (%08x)", pc + (address * 2), op & ~0xffffffcf);
295   output  += sprintf( output, "B%s %08x", delaybit[n], pc + (address * 2) );
296   if (res)  output += sprintf(output, "(reserved bit set)");
297
157298   return size;
158299}
159300
r242405r242406
166307   INT32 address =   (op & 0x07fc0000) >> 17;
167308   address |=        ((op & 0x0000ffc0) >> 6) << 10;
168309   if (address & 0x800000) address = -(address&0x7fffff);   
310   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
169311
170312   UINT8 condition = op & 0x0000001f;
171313
172   print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2), op & ~0xffffffdf );
314   output  += sprintf( output, "BL%s(%s) %08x", delaybit[n], conditions[condition], pc + (address *2) );
173315   return size;
174316}
175317
r242405r242406
182324   address |=        ((op & 0x0000ffc0) >> 6) << 10;
183325   address |=        ((op & 0x0000000f) >> 0) << 20;
184326   if (address & 0x800000) address = -(address&0x7fffff);   
327   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
328   int res =  (op & 0x00000010) >> 4; op &= ~0x00000010;
185329
186   print("BL %08x (%08x)",  pc + (address *2), op & ~0xffffffcf );
330   output  += sprintf( output, "BL%s %08x", delaybit[n], pc + (address *2) );
331   if (res)  output += sprintf(output, "(reserved bit set)");
332
187333   return size;
188334}
189335
r242405r242406
209355int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BBIT1 (b & 1<<u6) != 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
210356
211357
212//#define EXPLICIT_EXTENSIONS
213
214static const char *datasize[0x4] =
215{
216#ifdef EXPLICIT_EXTENSIONS
217   /* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
218#else
219   /* 00 */ "",// Dword (default)
220#endif
221   /* 01 */ ".B", // Byte
222   /* 02 */ ".W", // Word
223   /* 03 */ ".<illegal data size>"
224};
225
226static const char *dataextend[0x2] =
227{
228#ifdef EXPLICIT_EXTENSIONS
229   /* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
230else
231   /* 00 */ "", // Zero Extend
232#endif
233   /* 01 */ ".X" // Sign Extend
234};
235
236static const char *addressmode[0x4] =
237{
238#ifdef EXPLICIT_EXTENSIONS
239   /* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
240#else
241   /* 00 */ "", // No Writeback
242#endif
243   /* 01 */ ".AW", // Writeback pre memory access
244   /* 02 */ ".AB", // Writeback post memory access
245   /* 03 */ ".AS"  // scaled
246};
247
248static const char *cachebit[0x2] =
249{
250#ifdef EXPLICIT_EXTENSIONS
251   /* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
252#else
253   /* 00 */ "", // Data Cache Enabled
254#endif
255   /* 01 */ ".DI" // Direct to Memory (Cache Bypass)
256};
257
258static const char *flagbit[0x2] =
259{
260#ifdef EXPLICIT_EXTENSIONS
261   /* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
262#else
263   /* 00 */ "", // Don't Set Flags
264#endif
265   /* 01 */ ".F" // Set Flags
266};
267
268static const char *regnames[0x40] =
269{
270   /* 00 */ "r0",
271   /* 01 */ "r1",
272   /* 02 */ "r2",
273   /* 03 */ "r3",
274   /* 04 */ "r4",
275   /* 05 */ "r5",
276   /* 06 */ "r6",
277   /* 07 */ "r7",
278   /* 08 */ "r8",
279   /* 09 */ "r9",
280   /* 0a */ "r10",
281   /* 0b */ "r11",
282   /* 0c */ "r12",
283   /* 0d */ "r13",
284   /* 0e */ "r14",
285   /* 0f */ "r15",
286
287   /* 10 */ "r16",
288   /* 11 */ "r17",
289   /* 12 */ "r18",
290   /* 13 */ "r19",
291   /* 14 */ "r20",
292   /* 15 */ "r21",
293   /* 16 */ "r22",
294   /* 17 */ "r23",
295   /* 18 */ "r24",
296   /* 19 */ "r25",
297   /* 1a */ "r26(GP)",
298   /* 1b */ "r27(FP)",
299   /* 1c */ "r28(SP)",
300   /* 1d */ "r29(ILINK1)",
301   /* 1e */ "r30(ILINK2)",
302   /* 1f */ "r31(BLINK)",
303
304   /* 20 */ "r32(ext)",
305   /* 21 */ "r33(ext)",
306   /* 22 */ "r34(ext)",
307   /* 23 */ "r35(ext)",
308   /* 24 */ "r36(ext)",
309   /* 25 */ "r37(ext)",
310   /* 26 */ "r38(ext)",
311   /* 27 */ "r39(ext)",
312   /* 28 */ "r40(ext)",
313   /* 29 */ "r41(ext)",
314   /* 2a */ "r42(ext)",
315   /* 2b */ "r43(ext)",
316   /* 2c */ "r44(ext)",
317   /* 2d */ "r45(ext)",
318   /* 2e */ "r46(ext)",
319   /* 2f */ "r47(ext)",
320
321   /* 30 */ "r48(ext)",
322   /* 31 */ "r49(ext)",
323   /* 32 */ "r50(ext)",
324   /* 33 */ "r51(ext)",
325   /* 34 */ "r52(ext)",
326   /* 35 */ "r53(ext)",
327   /* 36 */ "r54(ext)",
328   /* 37 */ "r55(ext)",
329   /* 38 */ "r56(ext)",
330   /* 39 */ "r57(ext)", // MLO  (result registers for optional multply functions)
331   /* 3a */ "r58(ext)", // MMID
332   /* 3b */ "r59(ext)", // MHI
333   /* 3c */ "r60(LP_COUNT)",
334   /* 3d */ "r61(reserved)",
335   /* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
336   /* 3f */ "r63(PCL)"
337};
338
339
340358int arcompact_handle02_dasm(DASM_OPS_32)
341359{
342360   // bitpos
r242405r242406
716734int arcompact_handle04_2b_dasm(DASM_OPS_32)  { print("SR (%08x)", op); return 4;}
717735
718736
737int arcompact_handle04_2f_helper_dasm(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
738{
739   //           
740   // 0010 0bbb pp10 1111 FBBB CCCC CCII IIII
741   int size = 4;
719742
720int arcompact_handle04_2f_00_dasm(DASM_OPS_32)  { print("ASL (%08x)", op); return 4;} // ASL
721int arcompact_handle04_2f_01_dasm(DASM_OPS_32)  { print("ASR (%08x)", op); return 4;} // ASR
722int arcompact_handle04_2f_02_dasm(DASM_OPS_32)  { print("LSR (%08x)", op); return 4;} // LSR
723int arcompact_handle04_2f_03_dasm(DASM_OPS_32)  { print("ROR (%08x)", op); return 4;} // ROR
724int arcompact_handle04_2f_04_dasm(DASM_OPS_32)  { print("RCC (%08x)", op); return 4;} // RCC
725int arcompact_handle04_2f_05_dasm(DASM_OPS_32)  { print("SEXB (%08x)", op); return 4;} // SEXB
726int arcompact_handle04_2f_06_dasm(DASM_OPS_32)  { print("SEXW (%08x)", op); return 4;} // SEXW
727int arcompact_handle04_2f_07_dasm(DASM_OPS_32)  { print("EXTB (%08x)", op); return 4;} // EXTB
728int arcompact_handle04_2f_08_dasm(DASM_OPS_32)  { print("EXTW (%08x)", op); return 4;} // EXTW
729int arcompact_handle04_2f_09_dasm(DASM_OPS_32)  { print("ABS (%08x)", op); return 4;} // ABS
730int arcompact_handle04_2f_0a_dasm(DASM_OPS_32)  { print("NOT (%08x)", op); return 4;} // NOT
731int arcompact_handle04_2f_0b_dasm(DASM_OPS_32)  { print("RLC (%08x)", op); return 4;} // RLC
732int arcompact_handle04_2f_0c_dasm(DASM_OPS_32)  { print("EX (%08x)", op); return 4;} // EX
743   int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
744   int b = (op & 0x07000000) >> 24; op &= ~0x07000000;
745   int B = (op & 0x00007000) >> 12; op &= ~0x00007000;
746   int breg = b | (B << 3);
747   int F = (op & 0x00008000) >> 15;op &= ~0x00008000;
733748
749   output  += sprintf( output, "%s", optext);
750   output  += sprintf( output, "%s", flagbit[F]);
751//   output  += sprintf( output, " p(%d)", p);
752   
753   
754   output += sprintf(output, " %s, ", regnames[breg]);
734755
756
757   if (p == 0)
758   {
759      int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
760
761      if (C == LIMM_REG)
762      {
763         UINT32 limm;
764         GET_LIMM_32;
765         size = 8;   
766         output  += sprintf( output, "(%08x) ", limm );
767
768      }
769      else
770      {
771         output  += sprintf( output, "C(%s) ", regnames[C]);
772      }
773   }
774   else if (p == 1)
775   {
776      output  += sprintf( output, "<04_2f illegal p=01>");
777   }
778   else if (p == 2)
779   {
780      output  += sprintf( output, "<04_2f illegal p=10>");
781   }
782   else if (p == 3)
783   {
784      output  += sprintf( output, "<04_2f illegal p=11>");
785   }
786
787   return size;
788}
789
790
791int arcompact_handle04_2f_00_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ASL"); } // ASL
792int arcompact_handle04_2f_01_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ASR"); } // ASR
793int arcompact_handle04_2f_02_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "LSR"); } // LSR
794int arcompact_handle04_2f_03_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ROR"); } // ROR
795int arcompact_handle04_2f_04_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "RCC"); } // RCC
796int arcompact_handle04_2f_05_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "SEXB"); } // SEXB
797int arcompact_handle04_2f_06_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "SEXW"); } // SEXW
798int arcompact_handle04_2f_07_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EXTB"); } // EXTB
799int arcompact_handle04_2f_08_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EXTW"); } // EXTW
800int arcompact_handle04_2f_09_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ABS"); } // ABS
801int arcompact_handle04_2f_0a_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "NOT"); } // NOT
802int arcompact_handle04_2f_0b_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "RCL"); } // RLC
803int arcompact_handle04_2f_0c_dasm(DASM_OPS_32)  { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EX"); } // EX
804
805
735806int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32)  { print("SLEEP (%08x)", op); return 4;}
736807int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32)  { print("SWI / TRAP0 (%08x)", op); return 4;}
737808int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32)  { print("SYNC (%08x)", op); return 4;}
trunk/src/mame/drivers/hikaru.c
r242405r242406
664664   ROM_LOAD32_WORD("mpr-23117.ic68s" , 0xf000002, 0x0800000, CRC(9d4d3529) SHA1(66008445629681ebf2f26b3f181d8524a8576d2f))
665665
666666   // current 315-5881 decryption simulation code can't produce valid output data with any of keys
667   ROM_REGION( 4, "rom_key", 0 )
667   ROM_REGION( 4, "rom_key", ROMREGION_ERASE00 )
668668ROM_END
669669
670670ROM_START( braveff )
r242405r242406
709709   ROM_LOAD32_WORD( "mpr-22023.ic60s", 0xb000002, 0x800000, CRC(07f00869) SHA1(92282d09d72d3e65a91128e06bb0d4426bb90be5) )
710710
711711   // 315-5881 not populated
712   ROM_REGION( 4, "rom_key", 0 )
712   ROM_REGION( 4, "rom_key", ROMREGION_ERASE00 )
713713ROM_END
714714
715715ROM_START( sgnascar )
trunk/src/osd/sdl/input.c
r242405r242406
757757
758758      osd_printf_verbose("Joystick: %s\n", devinfo->name.cstr());
759759      osd_printf_verbose("Joystick:   ...  %d axes, %d buttons %d hats %d balls\n", SDL_JoystickNumAxes(joy), SDL_JoystickNumButtons(joy), SDL_JoystickNumHats(joy), SDL_JoystickNumBalls(joy));
760      osd_printf_verbose("Joystick:   ...  Physical id %d mapped to logical id %d\n", physical_stick, stick);
760      osd_printf_verbose("Joystick:   ...  Physical id %d mapped to logical id %d\n", physical_stick, stick + 1);
761761
762762      // loop over all axes
763763      for (axis = 0; axis < SDL_JoystickNumAxes(joy); axis++)

https://github.com/mamedev/mame/commit/8c2024272d02653a434c86067b28a9b61f247e13

Previous 199869 Revisions Next

© 1997-2024 The MAME Team