MAME SVN History

199869 Revisions

r33869 Sunday 14th December, 2014 at 09:43:28 UTC by Jonathan Gevaryahu
(MESS) Victor 9000 Keyboard: Hook the keys to the keyboard matrix. [Lord Nightmare]

[hash]	~~vz_cass.xml~~
[src/emu/cpu/arcompact]	arcompactdasm_ops.c
[src/emu/cpu/e132xs]	e132xs.c e132xs.h
[src/emu/cpu/h8]	h8_intc.c h8_timer16.c
[src/emu/cpu/tms0980]	tms0980.c tms0980.h
[src/emu/imagedev]	floppy.c
[src/mame]	mame.lst
[src/mame/drivers]	5clown.c bwidow.c f-32.c mjkjidai.c peplus.c viper.c wallc.c
[src/mame/includes]	bwidow.h
[src/mame/machine]	atarigen.c
[src/mess]	mess.lst mess.mak
[src/mess/drivers]	bigbord2.c hp16500.c mathmagi.c merlin.c ngen.c pc9801.c simon.c ~~tandy12.c~~ vt240.c vtech1.c
[src/mess/layout]	mathmagi.lay ~~tandy12.lay~~
[src/mess/machine]	victor9kb.c

trunk/hash/vz_cass.xml
r242380	r242381
1		<?xml version="1.0"?>
2		<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3
4		<!--
5
6		List of known tape releases by Dick Smith in Australia:
7
8		X-7274 Attack of the Killer Tomatoes
9		X-7231 Match Box
10		X-7232 Poker
11		X-7233 Hangman
12		X-7234 Slot Machine/Knock Off/Russian Roulette
13		X-7235 Blackjack
14		X-7236 Circus (*)
15		X-7237 Biorhythm/Pair Matching/Calendar
16		X-7238 Horse Race
17		X-7239 Invaders (*)
18		X-7240 Dynasty Derby
19		X-7241 Learjet
20		X-7242 Ghost Hunter (*)
21		X-7243 Hoppy (*)
22		X-7244 Super Snake
23		X-7245 Knights and Dragons
24		X-7247 Star Blaster (*)
25		X-7248 VZ-Asteroids
26		X-7249 Air Traffic Controller
27		X-7250 Lunar Lander
28		X-7251 Statistics 1
29		X-7252 Statistics 2
30		X-7253 Matrix
31		X-7254 Tennis Lesson/Golf Lesson
32		X-7255 Introduction to BASIC
33		X-7256 Elementary Geometry
34		X-7257 Speed Reading
35		X-7258 Typing Teacher
36		X-7259 Mailing List
37		X-7261 Portfolio Management
38		X-7262 Discounted Cash Flow Analysis
39		X-7263 Financial Ratio Analysis
40		X-7264 Tennis (*)
41		X-7265 Checkers
42		X-7266 Planet Patrol (*)
43		X-7268 Ladder Challenge (*)
44		X-7270 Panik (*)
45		X-7271 Othello
46		X-7272 Dracula's Castle
47		X-7273 Backgammon
48		X-7275 VZ Chess (*)
49		X-7276 Music Writer
50		X-7278 Disassembler
51		X-7279 Duel
52		X-7280 Hex Utilities
53		X-7281 Word Processor
54		X-7282 Editor Assembler
55		X-7285 Spell'O'Matic 1 & 2
56		X-7286 Spell'O'Matic 3 & 4
57		X-7287 Flashword 1 & 2
58		X-7288 Flashword 3 & 4
59		X-7289 Metric Spycatcher
60		X-7290 Whizkid Spycatcher
61		X-7330 Sprite Generator
62		X-7331 Formula One
63		X-7332 Galaxon (*)
64		X-7333 Dawn Patrol (*)
65		X-7339 Space RAM
66		X-7342 Crash
67		X-7344 Maze of Argon
68		X-7345 Word Matching
69
70		* = dumped
71
72		Demonstration Tape (included with the VZ200)
73		Demonstration Tape (included with the VZ300)
74
75		-->
76
77		<softwarelist name="vz_cass" description="Dick Smith VZ-200/300 cassettes">
78
79		<software name="chess">
80		<description>Chess</description>
81		<year>198?</year>
82		<publisher>Dick Smith</publisher>
83		<info name="serial" value="X-7275" />
84		<part name="cass1" interface="vtech1_cass">
85		<dataarea name="cass" size="2854400">
86		<rom name="chess.wav" size="2854400" crc="7cc80cf3" sha1="770b09e8755fad97e12f320cd5fea3416669cd36" offset="0" />
87		</dataarea>
88		</part>
89		</software>
90
91		<software name="circus">
92		<description>Circus</description>
93		<year>198?</year>
94		<publisher>Dick Smith</publisher>
95		<info name="serial" value="X-7236" />
96		<part name="cass1" interface="vtech1_cass">
97		<dataarea name="cass" size="1317376">
98		<rom name="circus.wav" size="1317376" crc="ab3ba833" sha1="1b33e2f3f2389f61f2e815be626b5d84083be77e" offset="0" />
99		</dataarea>
100		</part>
101		</software>
102
103		<software name="dawn">
104		<description>Dawn Patrol</description>
105		<year>198?</year>
106		<publisher>Dick Smith</publisher>
107		<info name="serial" value="X-7333" />
108		<part name="cass1" interface="vtech1_cass">
109		<dataarea name="cass" size="3640544">
110		<rom name="dawn.wav" size="3640544" crc="22d096f5" sha1="ac480a16b6d6b8d6f08875e9c6ca13cadc413fa1" offset="0" />
111		</dataarea>
112		</part>
113		</software>
114
115		<!-- Not released by Dick Smith? -->
116		<software name="defpen">
117		<description>Defense Penetrator</description>
118		<year>1982</year>
119		<publisher>Cosmic Software</publisher>
120		<info name="author" value="Tom Thiel" />
121		<part name="cass1" interface="vtech1_cass">
122		<dataarea name="cass" size="1926592">
123		<rom name="defpen.wav" size="1926592" crc="b3dfa117" sha1="b7b53d11483fd78dfc81484e0830e6f6913c6e47" offset="0" />
124		</dataarea>
125		</part>
126		</software>
127
128		<software name="galaxon">
129		<description>Galaxon</description>
130		<year>198?</year>
131		<publisher>Dick Smith</publisher>
132		<info name="serial" value="X-7332" />
133		<part name="cass1" interface="vtech1_cass">
134		<dataarea name="cass" size="1628976">
135		<rom name="galaxon.wav" size="1628976" crc="8909df05" sha1="4ee1ce9aa8538b8aad9d0839fdb1396335074945" offset="0" />
136		</dataarea>
137		</part>
138		</software>
139
140		<software name="ghost">
141		<description>Ghost Hunter</description>
142		<year>198?</year>
143		<publisher>Dick Smith</publisher>
144		<info name="author" value="Dubois and McNamara" />
145		<info name="serial" value="X-7242" />
146		<part name="cass1" interface="vtech1_cass">
147		<dataarea name="cass" size="1732336">
148		<rom name="ghost.wav" size="1732336" crc="b5ed2320" sha1="f58e328e0b20d453a1c0486fd8e10c5f3e7ecfa7" offset="0" />
149		</dataarea>
150		</part>
151		</software>
152
153		<software name="hamsam">
154		<description>Hamburger Sam</description>
155		<year>????</year>
156		<publisher></publisher>
157		<part name="cass1" interface="vtech1_cass">
158		<dataarea name="cass" size="5109472">
159		<rom name="hamsam.wav" size="5109472" crc="7aed86a7" sha1="b5061edb1401cea4aee97d8cd92c582c9c14e66b" offset="0" />
160		</dataarea>
161		</part>
162		</software>
163
164		<software name="hoppy">
165		<description>Hoppy</description>
166		<year>198?</year>
167		<publisher>Dick Smith</publisher>
168		<info name="serial" value="X-7243" />
169		<part name="cass1" interface="vtech1_cass">
170		<dataarea name="cass" size="3172080">
171		<rom name="hoppy.wav" size="3172080" crc="60e7e15a" sha1="1d56a04af700a94d44d6bb0ddfaf89213db39ce8" offset="0" />
172		</dataarea>
173		</part>
174		</software>
175
176		<software name="invaders">
177		<description>Invaders</description>
178		<year>198?</year>
179		<publisher>Dick Smith</publisher>
180		<info name="author" value="Dubois and McNamara" />
181		<info name="serial" value="X-7239" />
182		<part name="cass1" interface="vtech1_cass">
183		<dataarea name="cass" size="1723824">
184		<rom name="invaders.wav" size="1723824" crc="f959681e" sha1="e12bc9384e7fe1efc0ecff6356c3e3ded7ee8373" offset="0" />
185		</dataarea>
186		</part>
187		</software>
188
189		<software name="ladder">
190		<description>Ladder Challenge</description>
191		<year>198?</year>
192		<publisher>Dick Smith</publisher>
193		<info name="serial" value="X-7268" />
194		<part name="cass1" interface="vtech1_cass">
195		<dataarea name="cass" size="1622288">
196		<rom name="ladder.wav" size="1622288" crc="47ab9ccf" sha1="e6d72b7bc26b124c906b9c0e0015137ae8844a4d" offset="0" />
197		</dataarea>
198		</part>
199		</software>
200
201		<software name="missile">
202		<description>Missile</description>
203		<year>????</year>
204		<publisher></publisher>
205		<part name="cass1" interface="vtech1_cass">
206		<dataarea name="cass" size="5109776">
207		<rom name="missile.wav" size="5109776" crc="55a1fda4" sha1="1de495534447cee16d3db22b043d53b6d15f05fe" offset="0" />
208		</dataarea>
209		</part>
210		</software>
211
212		<software name="panik">
213		<description>Panik</description>
214		<year>198?</year>
215		<publisher>Dick Smith</publisher>
216		<info name="serial" value="X-7270" />
217		<part name="cass1" interface="vtech1_cass">
218		<dataarea name="cass" size="1708928">
219		<rom name="panik.wav" size="1708928" crc="8b8c4c5a" sha1="e9e2ae5c406f9ac79b186cb34b2849b9e2a477e3" offset="0" />
220		</dataarea>
221		</part>
222		</software>
223
224		<software name="ppatrol">
225		<description>Planet Patrol</description>
226		<year>198?</year>
227		<publisher>Dick Smith</publisher>
228		<info name="serial" value="X-7266" />
229		<part name="cass1" interface="vtech1_cass">
230		<dataarea name="cass" size="2107776">
231		<rom name="ppatrol.wav" size="2107776" crc="3eb828ed" sha1="b56777b732587856f554d978d844a3815ec50f69" offset="0" />
232		</dataarea>
233		</part>
234		</software>
235
236		<software name="starblas">
237		<description>Star Blaster</description>
238		<year>198?</year>
239		<publisher>Dick Smith</publisher>
240		<info name="serial" value="X-7247" />
241		<info name="usage" value="Needs 16k memory expansion" />
242		<part name="cass1" interface="vtech1_cass">
243		<dataarea name="cass" size="3327120">
244		<rom name="starblas.wav" size="3327120" crc="e6a5b55f" sha1="07715fd8104891d0d4d3b06b5609674ca93af920" offset="0" />
245		</dataarea>
246		</part>
247		</software>
248
249		<software name="tennis">
250		<description>Tennis</description>
251		<year>198?</year>
252		<publisher>Dick Smith</publisher>
253		<info name="serial" value="X-7264" />
254		<part name="cass1" interface="vtech1_cass">
255		<dataarea name="cass" size="2100784">
256		<rom name="tennis.wav" size="2100784" crc="3eb5ed00" sha1="6c2f2d4c9d60b6f2bd977eddd397d6dbdbfc52f1" offset="0" />
257		</dataarea>
258		</part>
259		</software>
260
261		</softwarelist>

trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
r242380	r242381
139	139
140	140	UINT8 condition = op & 0x0000001f;
141	141
142		print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2), op & ~0xffffffdf);
	142	print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2) + 2, op & ~0xffffffdf);
143	143	return size;
144	144	}
145	145
r242380	r242381
153	153	address \|= ((op & 0x0000000f) >> 0) << 20;
154	154	if (address & 0x800000) address = -(address & 0x7fffff);
155	155
156		print("B %08x (%08x)", pc + (address * 2), op & ~0xffffffcf);
	156	print("B %08x (%08x)", pc + (address * 2) + 2, op & ~0xffffffcf);
157	157	return size;
158	158	}
159	159
r242380	r242381
169	169
170	170	UINT8 condition = op & 0x0000001f;
171	171
172		print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2), op & ~0xffffffdf );
	172	print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2) + 2, op & ~0xffffffdf );
173	173	return size;
174	174	}
175	175
r242380	r242381
183	183	address \|= ((op & 0x0000000f) >> 0) << 20;
184	184	if (address & 0x800000) address = -(address&0x7fffff);
185	185
186		print("BL %08x (%08x)", pc + (address *2), op & ~0xffffffcf );
	186	print("BL %08x (%08x)", pc + (address *2) + 2, op & ~0xffffffcf );
187	187	return size;
188	188	}
189	189
r242380	r242381
208	208	int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32) { GET_01_01_01_BRANCH_ADDR; print("BBIT0 (b & 1<<u6) == 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
209	209	int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32) { GET_01_01_01_BRANCH_ADDR; print("BBIT1 (b & 1<<u6) != 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
210	210
211
	211	#if 0
212	212	//#define EXPLICIT_EXTENSIONS
213	213
214	214	static const char *datasize[0x4] =
r242380	r242381
216	216	#ifdef EXPLICIT_EXTENSIONS
217	217	/* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
218	218	#else
219		/* 00 */ "",// Dword (default)
	219	/* 00 */ " ",// Dword (default)
220	220	#endif
221	221	/* 01 */ ".B", // Byte
222	222	/* 02 */ ".W", // Word
r242380	r242381
228	228	#ifdef EXPLICIT_EXTENSIONS
229	229	/* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
230	230	else
231		/* 00 */ "", // Zero Extend
	231	/* 00 */ " ", // Zero Extend
232	232	#endif
233	233	/* 01 */ ".X" // Sign Extend
234	234	};
r242380	r242381
238	238	#ifdef EXPLICIT_EXTENSIONS
239	239	/* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
240	240	#else
241		/* 00 */ "", // No Writeback
	241	/* 00 */ " ", // No Writeback
242	242	#endif
243	243	/* 01 */ ".AW", // Writeback pre memory access
244	244	/* 02 */ ".AB", // Writeback post memory access
r242380	r242381
250	250	#ifdef EXPLICIT_EXTENSIONS
251	251	/* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
252	252	#else
253		/* 00 */ "", // Data Cache Enabled
	253	/* 00 */ " ", // Data Cache Enabled
254	254	#endif
255	255	/* 01 */ ".DI" // Direct to Memory (Cache Bypass)
256	256	};
257	257
258		static const char *flagbit[0x2] =
259		{
260		#ifdef EXPLICIT_EXTENSIONS
261		/* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
262		#else
263		/* 00 */ "", // Don't Set Flags
264		#endif
265		/* 01 */ ".F" // Set Flags
266		};
267
268	258	static const char *regnames[0x40] =
269	259	{
270	260	/* 00 */ "r0",
r242380	r242381
335	325	/* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
336	326	/* 3f */ "r63(PCL)"
337	327	};
	328	#endif
338	329
339
340	330	int arcompact_handle02_dasm(DASM_OPS_32)
341	331	{
342	332	// bitpos
r242380	r242381
344	334	// fedc ba98 7654 3210 fedc ba98 7654 3210
345	335	// fields
346	336	// 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA
347		int size = 4;
348	337
349		int A = (op & 0x0000003f) >> 0; //op &= ~0x0000003f;
350		int X = (op & 0x00000040) >> 6; //op &= ~0x00000040;
351		int Z = (op & 0x00000180) >> 7; //op &= ~0x00000180;
352		int a = (op & 0x00000600) >> 9; //op &= ~0x00000600;
353		int D = (op & 0x00000800) >> 11;// op &= ~0x00000800;
354		int B = (op & 0x00007000) >> 12;// op &= ~0x00007000;
355		int S = (op & 0x00008000) >> 15;// op &= ~0x00008000;
356		int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000;
357		int b = (op & 0x07000000) >> 24;// op &= ~0x07000000;
	338	#if 0
	339	int A = (op & 0x0000003f >> 0); //op &= ~0x0000003f;
	340	int X = (op & 0x00000040 >> 6); //op &= ~0x00000040;
	341	int Z = (op & 0x00000180 >> 7); //op &= ~0x00000180;
	342	int a = (op & 0x00000600 >> 9); //op &= ~0x00000600;
	343	int D = (op & 0x00000800 >> 11);// op &= ~0x00000800;
	344	int B = (op & 0x00007000 >> 12);// op &= ~0x00007000;
	345	int S = (op & 0x00008000 >> 15);// op &= ~0x00008000;
	346	int s = (op & 0x00ff0000 >> 16);// op &= ~0x00ff0000;
	347	int b = (op & 0x07000000 >> 24);// op &= ~0x07000000;
358	348
359	349	int breg = b \| (B << 3);
360	350	int sdat = s \| (S << 8); // todo - signed
	351	#endif
361	352
362		UINT32 limm = 0;
363		if (breg == LIMM_REG)
364		{
365		GET_LIMM_32;
366		size = 8;
367		}
368	353
369	354	output += sprintf( output, "LD");
370		output += sprintf( output, "%s", datasize[Z]);
371		output += sprintf( output, "%s", dataextend[X]);
372		output += sprintf( output, "%s", addressmode[a]);
373		output += sprintf( output, "%s", cachebit[D]);
374		output += sprintf( output, " ");
375		output += sprintf( output, "%s, ", regnames[A]);
376		output += sprintf( output, "[");
377		if (breg == LIMM_REG) output += sprintf( output, "(%08x), ", limm);
378		else output += sprintf( output, "%s, ", regnames[breg]);
379		output += sprintf( output, "%d", sdat);
380		output += sprintf( output, "]");
	355	// output += sprintf( output, "%s", datasize[Z]);
	356	// output += sprintf( output, "%s", dataextend[X]);
	357	// output += sprintf( output, "%s", addressmode[a]);
	358	// output += sprintf( output, "%s", cachebit[D]);
	359	// output += sprintf( output, " ");
	360	// output += sprintf( output, "%s, ", regnames[A]);
	361	// output += sprintf( output, "[");
	362	// output += sprintf( output, "%s(%d %d), ", regnames[breg], B, b);
	363	// output += sprintf( output, "%d", sdat);
	364	// output += sprintf( output, "]");
381	365
382		return ~~size~~;
	366	return 4;
383	367	}
384	368
385	369	int arcompact_handle03_dasm(DASM_OPS_32)
386	370	{
387		int size = 4;
388	371	// bitpos
389		// 1111 1111 1111 1111 0000 0000 0000 0000
390		// fedc ba98 7654 3210 fedc ba98 7654 3210
	372	// 11111 111 11111111 0 000 000000 0 00 00 0
	373	// fedcb a98 76543210 f edc ba9876 5 43 21 0
391	374	// fields
392		// 0001 1bbb ssss ssss SBBB CCCC CCDa aZZR
393		int B = (op & 0x00007000) >> 12;// op &= ~0x00007000;
394		int S = (op & 0x00008000) >> 15;// op &= ~0x00008000;
395		int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000;
396		int b = (op & 0x07000000) >> 24;// op &= ~0x07000000;
	375	// 00011 bbb ssssssss S BBB CCCCCC D aa ZZ R
397	376
398		int breg = b \| (B << 3);
399		int sdat = s \| (S << 8); // todo - signed
	377	print("ST r+o (%08x)", op );
	378	return 4;
	379	}
400	380
401		int R = (op & 0x00000001) >> 0; op &= ~0x00000001;
402		int Z = (op & 0x00000006) >> 1; op &= ~0x00000006;
403		int a = (op & 0x00000018) >> 3; op &= ~0x00000018;
404		int D = (op & 0x00000020) >> 5; op &= ~0x00000020;
405		int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
406
407		UINT32 limm = 0;
408		if (breg == LIMM_REG)
409		{
410		GET_LIMM_32;
411		size = 8;
412		}
	381	int arcompact_handle04_00_dasm(DASM_OPS_32) { print("ADD (%08x)", op); return 4;}
	382	int arcompact_handle04_01_dasm(DASM_OPS_32) { print("ADC (%08x)", op); return 4;}
	383	int arcompact_handle04_02_dasm(DASM_OPS_32) { print("SUB (%08x)", op); return 4;}
	384	int arcompact_handle04_03_dasm(DASM_OPS_32) { print("SBC (%08x)", op); return 4;}
	385	int arcompact_handle04_04_dasm(DASM_OPS_32) { print("AND (%08x)", op); return 4;}
	386	int arcompact_handle04_05_dasm(DASM_OPS_32) { print("OR (%08x)", op); return 4;}
	387	int arcompact_handle04_06_dasm(DASM_OPS_32) { print("BIC (%08x)", op); return 4;}
	388	int arcompact_handle04_07_dasm(DASM_OPS_32) { print("XOR (%08x)", op); return 4;}
	389	int arcompact_handle04_08_dasm(DASM_OPS_32) { print("MAX (%08x)", op); return 4;}
	390	int arcompact_handle04_09_dasm(DASM_OPS_32) { print("MIN (%08x)", op); return 4;}
	391	int arcompact_handle04_0a_dasm(DASM_OPS_32) { print("MOV (%08x)", op); return 4;}
	392	int arcompact_handle04_0b_dasm(DASM_OPS_32) { print("TST (%08x)", op); return 4;}
	393	int arcompact_handle04_0c_dasm(DASM_OPS_32) { print("CMP (%08x)", op); return 4;}
	394	int arcompact_handle04_0d_dasm(DASM_OPS_32) { print("RCMP (%08x)", op); return 4;}
	395	int arcompact_handle04_0e_dasm(DASM_OPS_32) { print("RSUB (%08x)", op); return 4;}
	396	int arcompact_handle04_0f_dasm(DASM_OPS_32) { print("BSET (%08x)", op); return 4;}
	397	int arcompact_handle04_10_dasm(DASM_OPS_32) { print("BCLR (%08x)", op); return 4;}
	398	int arcompact_handle04_11_dasm(DASM_OPS_32) { print("BTST (%08x)", op); return 4;}
	399	int arcompact_handle04_12_dasm(DASM_OPS_32) { print("BXOR (%08x)", op); return 4;}
	400	int arcompact_handle04_13_dasm(DASM_OPS_32) { print("BMSK (%08x)", op); return 4;}
	401	int arcompact_handle04_14_dasm(DASM_OPS_32) { print("ADD1 (%08x)", op); return 4;}
	402	int arcompact_handle04_15_dasm(DASM_OPS_32) { print("ADD2 (%08x)", op); return 4;}
	403	int arcompact_handle04_16_dasm(DASM_OPS_32) { print("ADD3 (%08x)", op); return 4;}
	404	int arcompact_handle04_17_dasm(DASM_OPS_32) { print("SUB1 (%08x)", op); return 4;}
	405	int arcompact_handle04_18_dasm(DASM_OPS_32) { print("SUB2 (%08x)", op); return 4;}
	406	int arcompact_handle04_19_dasm(DASM_OPS_32) { print("SUB3 (%08x)", op); return 4;}
	407	int arcompact_handle04_1a_dasm(DASM_OPS_32) { print("MPY (%08x)", op); return 4;} // *
	408	int arcompact_handle04_1b_dasm(DASM_OPS_32) { print("MPYH (%08x)", op); return 4;} // *
	409	int arcompact_handle04_1c_dasm(DASM_OPS_32) { print("MPYHU (%08x)", op); return 4;} // *
	410	int arcompact_handle04_1d_dasm(DASM_OPS_32) { print("MPYU (%08x)", op); return 4;} // *
413	411
414	412
415		output += sprintf( output, "ST");
416		output += sprintf( output, "%s", datasize[Z]);
417		output += sprintf( output, "%s", addressmode[a]);
418		output += sprintf( output, "%s", cachebit[D]);
419		output += sprintf( output, " ");
420	413
421		output += sprintf( output, "%s, ", regnames[C]);
422		if (breg == LIMM_REG) output += sprintf( output, "(%08x), ", limm);
423		else output += sprintf( output, "%s, ", regnames[breg]);
424		output += sprintf( output, "%d", sdat);
425
426		if (R) output += sprintf( output, "(reserved bit set)");
427
428
429		return size;
430		}
431
432
433		int arcompact_handle04_helper_dasm(char output, offs_t pc, UINT32 op, const UINT8 oprom, const char* optext, int ignore_dst, int b_reserved)
	414	int arcompact_handle04_20_dasm(DASM_OPS_32)
434	415	{
435		// PP
436		// 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA
	416	// todo, other bits (in none long immediate mode at least)
	417
437	418	int size = 4;
	419	int C = (op & 0x00000fc0) >> 6;
	420	UINT8 condition = op & 0x0000001f;
438	421
439		int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
440		int b = (op & 0x07000000) >> 24; op &= ~0x07000000;
441		int B = (op & 0x00007000) >> 12; op &= ~0x00007000;
442		int breg = b \| (B << 3);
443		int F = (op & 0x00008000) >> 15;op &= ~0x00008000;
444
445		output += sprintf( output, "%s", optext);
446		output += sprintf( output, "%s", flagbit[F]);
447		// output += sprintf( output, " p(%d)", p);
	422	op &= ~0x00000fc0;
448	423
449
450		if (!b_reserved)
	424	if (C == LIMM_REG)
451	425	{
452		output += sprintf(output, " %s, ", regnames[breg]);
	426	UINT32 limm;
	427	GET_LIMM_32;
	428	size = 8;
	429
	430	print("J(%s) %08x (%08x)", conditions[condition], limm, op);
453	431	}
454	432	else
455	433	{
456		~~if (breg) out~~p~~ut += sp~~rintf(~~output,~~ "reserved(%s), ", ~~reg~~n~~ame~~s[~~breg~~]);
	434	print("J(%s) (r%d) (%08x)", conditions[condition], C, op);
457	435	}
458	436
459
460		if (p == 0)
461		{
462		// 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA
463
464		int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
465		int A = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
466
467		if (C == LIMM_REG)
468		{
469		UINT32 limm;
470		GET_LIMM_32;
471		size = 8;
472		output += sprintf( output, "(%08x) ", limm );
473		if (!ignore_dst) output += sprintf( output, "DST(%s)", regnames[A]);
474		else
475		{
476		if (A) output += sprintf(output, "unused(%s)", regnames[A]);
477		}
478		}
479		else
480		{
481		output += sprintf( output, "C(%s) ", regnames[C]);
482		if (!ignore_dst) output += sprintf( output, "DST(%s)", regnames[A]);
483		else
484		{
485		if (A) output += sprintf(output, "unused(%s)", regnames[A]);
486		}
487
488		}
489		}
490		else if (p == 1)
491		{
492		// 0010 0bbb 00ii iiii FBBB UUUU UUAA AAAA
493		int U = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
494		int A = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
495
496		output += sprintf( output, "U(%02x) ", U );
497		if (!ignore_dst) output += sprintf( output, "DST(%s)", regnames[A]);
498		else
499		{
500		if (A) output += sprintf(output, "unused(%s)", regnames[A]);
501		}
502		}
503		else if (p == 2)
504		{
505		int S = (op & 0x00000fff) >> 0; op &= ~0x00000fff;
506		output += sprintf( output, "S(%02x)", S);
507
508		}
509		else if (p == 3)
510		{
511		int M = (op & 0x00000020) >> 5; op &= ~0x00000020;
512		int Q = (op & 0x0000001f) >> 0; op &= ~0x0000001f;
513
514		output += sprintf( output, " M(%d)", M);
515		output += sprintf( output, " Cond<%s> ", conditions[Q]);
516
517		if (M == 0)
518		{
519		int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
520		output += sprintf( output, "C(%s)", regnames[C]);
521
522		}
523		else if (M == 1)
524		{
525		int U = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
526		output += sprintf( output, "U(%02x)", U);
527
528		}
529
530		}
531
532	437	return size;
533	438	}
534	439
535		int arcompact_handle04_00_dasm(DASM_OPS_32)
536		{
537		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "ADD", 0,0);
538		}
539	440
540		int arcompact_handle04_01_dasm(DASM_OPS_32)
541		{
542		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "ADC", 0,0);
543		}
544	441
545		int arcompact_handle04_02_dasm(DASM_OPS_32)
546		{
547		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "SUB", 0,0);
548		}
	442	int arcompact_handle04_21_dasm(DASM_OPS_32) { print("Jcc.D (%08x)", op); return 4;}
	443	int arcompact_handle04_22_dasm(DASM_OPS_32) { print("JLcc (%08x)", op); return 4;}
	444	int arcompact_handle04_23_dasm(DASM_OPS_32) { print("JLcc.D (%08x)", op); return 4;}
549	445
550		int arcompact_handle04_03_dasm(DASM_OPS_32)
551		{
552		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "SBC", 0,0);
553		}
554	446
555		int arcompact_handle04_04_dasm(DASM_OPS_32)
556		{
557		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "AND", 0,0);
558		}
559	447
560		int arcompact_handle04_05_dasm(DASM_OPS_32)
561		{
562		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "OR", 0,0);
563		}
564	448
565		int arcompact_handle04_06_dasm(DASM_OPS_32)
566		{
567		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BIC", 0,0);
568		}
569
570		int arcompact_handle04_07_dasm(DASM_OPS_32)
571		{
572		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "XOR", 0,0);
573		}
574
575		int arcompact_handle04_08_dasm(DASM_OPS_32)
576		{
577		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MAX", 0,0);
578		}
579
580		int arcompact_handle04_09_dasm(DASM_OPS_32)
581		{
582		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MIN", 0,0);
583		}
584
585
586		int arcompact_handle04_0a_dasm(DASM_OPS_32)
587		{
588		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MOV", 1,0);
589		}
590
591		int arcompact_handle04_0b_dasm(DASM_OPS_32)
592		{
593		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "TST", 1,0);
594		}
595
596		int arcompact_handle04_0c_dasm(DASM_OPS_32)
597		{
598		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "CMP", 1,0);
599		}
600
601		int arcompact_handle04_0d_dasm(DASM_OPS_32)
602		{
603		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "RCMP", 1,0);
604		}
605
606		int arcompact_handle04_0e_dasm(DASM_OPS_32)
607		{
608		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "RSUB", 0,0);
609		}
610
611		int arcompact_handle04_0f_dasm(DASM_OPS_32)
612		{
613		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BSET", 0,0);
614		}
615
616		int arcompact_handle04_10_dasm(DASM_OPS_32)
617		{
618		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BCLR", 0,0);
619		}
620
621		int arcompact_handle04_11_dasm(DASM_OPS_32)
622		{
623		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BTST", 0,0);
624		}
625
626		int arcompact_handle04_12_dasm(DASM_OPS_32)
627		{
628		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BXOR", 0,0);
629		}
630
631		int arcompact_handle04_13_dasm(DASM_OPS_32)
632		{
633		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "BMSK", 0,0);
634		}
635
636		int arcompact_handle04_14_dasm(DASM_OPS_32)
637		{
638		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "ADD1", 0,0);
639		}
640
641		int arcompact_handle04_15_dasm(DASM_OPS_32)
642		{
643		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "ADD2", 0,0);
644		}
645
646		int arcompact_handle04_16_dasm(DASM_OPS_32)
647		{
648		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "ADD3", 0,0);
649		}
650
651		int arcompact_handle04_17_dasm(DASM_OPS_32)
652		{
653		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "SUB1", 0,0);
654		}
655
656		int arcompact_handle04_18_dasm(DASM_OPS_32)
657		{
658		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "SUB2", 0,0);
659		}
660
661		int arcompact_handle04_19_dasm(DASM_OPS_32)
662		{
663		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "SUB3", 0,0);
664		}
665
666		int arcompact_handle04_1a_dasm(DASM_OPS_32)
667		{
668		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MPY", 0,0);
669		} // *
670
671		int arcompact_handle04_1b_dasm(DASM_OPS_32)
672		{
673		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MPYH", 0,0);
674		} // *
675
676		int arcompact_handle04_1c_dasm(DASM_OPS_32)
677		{
678		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MPYHU", 0,0);
679		} // *
680
681		int arcompact_handle04_1d_dasm(DASM_OPS_32)
682		{
683		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "MPYU", 0,0);
684		} // *
685
686
687
688		int arcompact_handle04_20_dasm(DASM_OPS_32)
689		{
690		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "J", 1,1);
691		}
692
693
694
695		int arcompact_handle04_21_dasm(DASM_OPS_32)
696		{
697		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "J.D", 1,1);
698		}
699
700		int arcompact_handle04_22_dasm(DASM_OPS_32)
701		{
702		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "JL", 1,1);
703		}
704
705		int arcompact_handle04_23_dasm(DASM_OPS_32)
706		{
707		return arcompact_handle04_helper_dasm(output, pc, op, oprom, "JL.D", 1,1);
708		}
709
710
711
712
713	449	int arcompact_handle04_28_dasm(DASM_OPS_32) { print("LPcc (%08x)", op); return 4;}
714	450	int arcompact_handle04_29_dasm(DASM_OPS_32) { print("FLAG (%08x)", op); return 4;}
715	451	int arcompact_handle04_2a_dasm(DASM_OPS_32) { print("LR (%08x)", op); return 4;}
r242380	r242381
742	478
743	479
744	480
745		// format on these is..
746	481
747		// 0010 0bbb aa11 0ZZX DBBB CCCC CCAA AAAA
748		// note, bits 11 0ZZX are part of the sub-opcode # already - this is a special encoding
749		int arcompact_handle04_3x_helper_dasm(char output, offs_t pc, UINT32 op, const UINT8 oprom, int dsize, int extend)
750		{
751		int size = 4;
752		output += sprintf(output, "LD");
753		output += sprintf(output, "%s", datasize[dsize]);
754		output += sprintf(output, "%s", dataextend[extend]);
755	482
756		int mode = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
757		int b = (op & 0x07000000) >> 24; op &= ~0x07000000;
758		int B = (op & 0x00007000) >> 12; op &= ~0x00007000;
759		int breg = b \| (B << 3);
760		int D = (op & 0x00008000) >> 15;op &= ~0x00008000;
761		int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
762		int A = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
	483	int arcompact_handle04_30_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x30) (%08x)", op); return 4;}
	484	int arcompact_handle04_31_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x31) (%08x)", op); return 4;}
	485	int arcompact_handle04_32_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x32) (%08x)", op); return 4;}
	486	int arcompact_handle04_33_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x33) (%08x)", op); return 4;}
	487	int arcompact_handle04_34_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x34) (%08x)", op); return 4;}
	488	int arcompact_handle04_35_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x35) (%08x)", op); return 4;}
	489	int arcompact_handle04_36_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x36) (%08x)", op); return 4;}
	490	int arcompact_handle04_37_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x37) (%08x)", op); return 4;}
763	491
764		output += sprintf(output, "%s", addressmode[mode]);
765		output += sprintf(output, "%s", cachebit[D]);
766	492
767		output += sprintf( output, "DST(%s)", regnames[A]);
768		output += sprintf( output, "SRC1(%s)", regnames[breg]);
769		output += sprintf( output, "SRC2(%s)", regnames[C]);
770	493
771
772	494
773	495
774		return size;
775
776	496
777
778		}
779
780		int arcompact_handle04_30_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,0,0); }
781		// ZZ value of 0x0 with X of 1 is illegal
782		int arcompact_handle04_31_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,0,1); }
783		int arcompact_handle04_32_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,1,0); }
784		int arcompact_handle04_33_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,1,1); }
785		int arcompact_handle04_34_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,2,0); }
786		int arcompact_handle04_35_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,2,1); }
787		// ZZ value of 0x3 is illegal
788		int arcompact_handle04_36_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,3,0); }
789		int arcompact_handle04_37_dasm(DASM_OPS_32) { return arcompact_handle04_3x_helper_dasm(output,pc,op,oprom,3,1); }
790
791
792
793
794
795
796	497	int arcompact_handle05_00_dasm(DASM_OPS_32) { print("ASL a <- b asl c (%08x)", op); return 4;}
797	498	int arcompact_handle05_01_dasm(DASM_OPS_32) { print("LSR a <- b lsr c (%08x)", op); return 4;}
798	499	int arcompact_handle05_02_dasm(DASM_OPS_32) { print("ASR a <- b asr c (%08x)", op); return 4;}

trunk/src/emu/cpu/e132xs/e132xs.c
r242380	r242381
583	583	UINT32 hyperstone_device::compute_tr()
584	584	{
585	585	UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
586		UINT64 clocks_since_base = cycles_since_base >> m_clck_scale;
	586	UINT64 clocks_since_base = cycles_since_base >> m_clock_scale;
587	587	return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
588	588	}
589	589
r242380	r242381
591	591	{
592	592	UINT32 prevtr = compute_tr();
593	593	TPR &= ~0x80000000;
594		m_clck_scale = (TPR >> 26) & m_clock_scale_mask;
595		m_clock_cycles_1 = 1 << m_clck_scale;
596		m_clock_cycles_2 = 2 << m_clck_scale;
597		m_clock_cycles_4 = 4 << m_clck_scale;
598		m_clock_cycles_6 = 6 << m_clck_scale;
	594	m_clock_scale = (TPR >> 26) & m_clock_scale_mask;
	595	m_clock_cycles_1 = 1 << m_clock_scale;
	596	m_clock_cycles_2 = 2 << m_clock_scale;
	597	m_clock_cycles_4 = 4 << m_clock_scale;
	598	m_clock_cycles_6 = 6 << m_clock_scale;
599	599	m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
600	600	m_tr_base_value = prevtr;
601	601	m_tr_base_cycles = total_cycles();
r242380	r242381
604	604	void hyperstone_device::adjust_timer_interrupt()
605	605	{
606	606	UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
607		UINT64 clocks_since_base = cycles_since_base >> m_clck_scale;
608		UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << m_clck_scale);
	607	UINT64 clocks_since_base = cycles_since_base >> m_clock_scale;
	608	UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << m_clock_scale);
609	609
610	610	if (cycles_until_next_clock == 0)
611		cycles_until_next_clock = (UINT64)(1 << m_clck_scale);
	611	cycles_until_next_clock = (UINT64)(1 << m_clock_scale);
612	612
613	613	/* special case: if we have a change pending, set a timer to fire then */
614	614	if (TPR & 0x80000000)
615	615	{
616	616	UINT64 clocks_until_int = m_tr_clocks_per_tick - (clocks_since_base % m_tr_clocks_per_tick);
617		UINT64 cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
	617	UINT64 cycles_until_int = (clocks_until_int << m_clock_scale) + cycles_until_next_clock;
618	618	m_timer->adjust(cycles_to_attotime(cycles_until_int + 1), 1);
619	619	}
620	620
r242380	r242381
631	631	else
632	632	{
633	633	UINT64 clocks_until_int = mulu_32x32(delta, m_tr_clocks_per_tick);
634		UINT64 cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
	634	UINT64 cycles_until_int = (clocks_until_int << m_clock_scale) + cycles_until_next_clock;
635	635	m_timer->adjust(cycles_to_attotime(cycles_until_int));
636	636	}
637	637	}
r242380	r242381
1536	1536	m_op = 0;
1537	1537	m_trap_entry = 0;
1538	1538	m_clock_scale_mask = 0;
1539		m_clck_scale = 0;
	1539	m_clock_scale = 0;
1540	1540	m_clock_cycles_1 = 0;
1541	1541	m_clock_cycles_2 = 0;
1542	1542	m_clock_cycles_4 = 0;
r242380	r242381
1685	1685	save_item(NAME(m_intblock));
1686	1686	save_item(NAME(m_delay.delay_cmd));
1687	1687	save_item(NAME(m_tr_clocks_per_tick));
1688		save_item(NAME(m_tr_base_value));
1689		save_item(NAME(m_tr_base_cycles));
1690		save_item(NAME(m_timer_int_pending));
1691		save_item(NAME(m_clck_scale));
1692		save_item(NAME(m_clock_scale_mask));
1693		save_item(NAME(m_clock_cycles_1));
1694		save_item(NAME(m_clock_cycles_2));
1695		save_item(NAME(m_clock_cycles_4));
1696		save_item(NAME(m_clock_cycles_6));
1697	1688
1698	1689	// set our instruction counter
1699	1690	m_icountptr = &m_icount;
r242380	r242381
2061	2052	}
2062	2053	}
2063	2054
2064		m_icount -= 36 << m_clck_scale;
	2055	m_icount -= 36 << m_clock_scale;
2065	2056	}
2066	2057
2067	2058	void hyperstone_device::hyperstone_divs(struct hyperstone_device::regs_decode *decode)
r242380	r242381
2110	2101	}
2111	2102	}
2112	2103
2113		m_icount -= 36 << m_clck_scale;
	2104	m_icount -= 36 << m_clock_scale;
2114	2105	}
2115	2106
2116	2107	void hyperstone_device::hyperstone_xm(struct hyperstone_device::regs_decode *decode)
r242380	r242381
4118	4109	}
4119	4110
4120	4111	if((SREG >= 0xffff8000 && SREG <= 0x7fff) && (DREG >= 0xffff8000 && DREG <= 0x7fff))
4121		m_icount -= 3 << m_clck_scale;
	4112	m_icount -= 3 << m_clock_scale;
4122	4113	else
4123		m_icount -= 5 << m_clck_scale;
	4114	m_icount -= 5 << m_clock_scale;
4124	4115	}
4125	4116
4126	4117	void hyperstone_device::hyperstone_fadd(struct hyperstone_device::regs_decode *decode)

trunk/src/emu/cpu/e132xs/e132xs.h
r242380	r242381
267	267	UINT32 m_trap_entry; // entry point to get trap address
268	268
269	269	UINT8 m_clock_scale_mask;
270		UINT8 m_clck_scale;
	270	UINT8 m_clock_scale;
271	271	UINT8 m_clock_cycles_1;
272	272	UINT8 m_clock_cycles_2;
273	273	UINT8 m_clock_cycles_4;

trunk/src/emu/cpu/h8/h8_intc.c
r242380	r242381
22	22	void h8_intc_device::device_start()
23	23	{
24	24	memset(pending_irqs, 0, sizeof(pending_irqs));
25		save_item(NAME(pending_irqs));
26		save_item(NAME(irq_type));
27		save_item(NAME(nmi_input));
28		save_item(NAME(irq_input));
29		save_item(NAME(ier));
30		save_item(NAME(isr));
31		save_item(NAME(iscr));
32		save_item(NAME(icr_filter));
33		save_item(NAME(ipr_filter));
34	25	}
35	26
36	27	void h8_intc_device::device_reset()
r242380	r242381
204	195	void h8h_intc_device::device_start()
205	196	{
206	197	h8_intc_device::device_start();
207		save_item(NAME(icr));
208	198	}
209	199
210	200	void h8h_intc_device::device_reset()

trunk/src/emu/cpu/h8/h8_timer16.c
r242380	r242381
162	162	{
163	163	intc = owner()->siblingdevice<h8_intc_device>(intc_tag);
164	164	channel_active = false;
165
166		save_item(NAME(tgr_clearing));
167		save_item(NAME(tcr));
168		save_item(NAME(tier));
169		save_item(NAME(ier));
170		save_item(NAME(isr));
171		save_item(NAME(clock_type));
172		save_item(NAME(clock_divider));
173		save_item(NAME(tcnt));
174		save_item(NAME(tgr));
175		save_item(NAME(last_clock_update));
176		save_item(NAME(event_time));
177		save_item(NAME(phase));
178		save_item(NAME(counter_cycle));
179		save_item(NAME(counter_incrementing));
180		save_item(NAME(channel_active));
181	165	}
182	166
183	167	void h8_timer16_channel_device::device_reset()
r242380	r242381
346	330	sprintf(tm, "%d", i);
347	331	timer_channel[i] = subdevice<h8_timer16_channel_device>(tm);
348	332	}
349
350		save_item(NAME(tstr));
351	333	}
352	334
353	335	void h8_timer16_device::device_reset()

trunk/src/emu/cpu/tms0980/tms0980.c
r242380	r242381
159	159	// - RAM, ROM, and main instructions PLA is exactly the same as TMS0980
160	160	// - 64-term microinstructions PLA between the RAM and ROM, supporting 20 microinstructions plus optional separate lines for custom opcode handling
161	161	// - 48-term output PLA above the RAM (rotate opla 90 degrees)
162		const device_type TMC0270 = &device_creator<tmc0270_cpu_device>; // 40-pin DIP, 16 O pins, 8+ R pins (some R pins are internally hooked up to support more I/O)
	162	const device_type TMC0270 = &device_creator<tmc0270_cpu_device>; // 40-pin DIP, 16 O pins, 8 R pins (the other R pins are internally hooked up to support more I/O)
163	163	// TMC0260 is same? except opla is 32 instead of 48 terms
164	164
165	165
r242380	r242381
250	250
251	251
252	252	tmc0270_cpu_device::tmc0270_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
253		: tms0980_cpu_device(mconfig, TMC0270, "TMC0270", tag, owner, clock, 16, 16, 4, 7, 9, 4, 12, ADDRESS_MAP_NAME(program_11bit_9), 8, ADDRESS_MAP_NAME(data_64x9_as4), "tmc0270", __FILE__)
	253	: tms0980_cpu_device(mconfig, TMC0270, "TMC0270", tag, owner, clock, 16, 8, 4, 7, 9, 4, 12, ADDRESS_MAP_NAME(program_11bit_9), 8, ADDRESS_MAP_NAME(data_64x9_as4), "tmc0270", __FILE__)
254	254	{
255	255	}
256	256
r242380	r242381
396	396	m_cs = 0;
397	397	m_r = 0;
398	398	m_o = 0;
399		m_o_index = 0;
	399	m_o_latch = 0;
	400	m_o_latch_low = 0;
400	401	m_cki_bus = 0;
401	402	m_c4 = 0;
402	403	m_p = 0;
r242380	r242381
421	422	m_micro = 0;
422	423	m_subcycle = 0;
423	424
	425	m_a_prev = m_a;
	426	m_r_prev = m_r;
	427	m_o_latch_prev = m_o_latch;
	428
424	429	// register for savestates
425	430	save_item(NAME(m_pc));
426	431	save_item(NAME(m_sr));
r242380	r242381
434	439	save_item(NAME(m_cs));
435	440	save_item(NAME(m_r));
436	441	save_item(NAME(m_o));
437		save_item(NAME(m_o_index));
	442	save_item(NAME(m_o_latch));
	443	save_item(NAME(m_o_latch_low));
438	444	save_item(NAME(m_cki_bus));
439	445	save_item(NAME(m_c4));
440	446	save_item(NAME(m_p));
r242380	r242381
459	465	save_item(NAME(m_micro));
460	466	save_item(NAME(m_subcycle));
461	467
	468	save_item(NAME(m_a_prev));
	469	save_item(NAME(m_r_prev));
	470	save_item(NAME(m_o_latch_prev));
	471
462	472	// register state for debugger
463	473	state_add(TMS0980_PC, "PC", m_pc ).formatstr("%02X");
464	474	state_add(TMS0980_SR, "SR", m_sr ).formatstr("%01X");
r242380	r242381
475	485	m_icountptr = &m_icount;
476	486	}
477	487
478		void tmc0270_cpu_device::device_start()
479		{
480		// common init
481		tms1xxx_cpu_device::device_start();
482	488
483		// zerofill
484		m_a_prev = 0;
485		m_r_prev = 0;
486	489
487		m_o_latch_low = 0;
488		m_o_latch = 0;
489		m_o_latch_prev = 0;
490
491		// register for savestates
492		save_item(NAME(m_a_prev));
493		save_item(NAME(m_r_prev));
494
495		save_item(NAME(m_o_latch_low));
496		save_item(NAME(m_o_latch));
497		save_item(NAME(m_o_latch_prev));
498		}
499
500
501
502	490	//-------------------------------------------------
503	491	// device_reset - device-specific reset
504	492	//-------------------------------------------------
r242380	r242381
525	513	// clear outputs
526	514	m_r = 0;
527	515	m_write_r(0, m_r & m_r_mask, 0xffff);
	516	m_o_latch_low = 0;
	517	m_o_latch = 0;
528	518	write_o_output(0);
529	519	m_write_r(0, m_r & m_r_mask, 0xffff);
530	520	m_power_off(0);
r242380	r242381
683	673	m_micro_direct[op] = decode_micro(op);
684	674	}
685	675
686		void tmc0270_cpu_device::device_reset()
687		{
688		// common reset
689		tms0980_cpu_device::device_reset();
690	676
691		m_a_prev = m_a;
692		m_r_prev = m_r;
693	677
694		m_o_latch_low = 0;
695		m_o_latch = 0;
696		m_o_latch_prev = 0;
697		}
698
699
700
701	678	//-------------------------------------------------
702	679	// program counter/opcode decode
703	680	//-------------------------------------------------
r242380	r242381
754	731	// RSTR is on the mpla
755	732	if (m_micro & M_RSTR)
756	733	m_fixed \|= F_RSTR;
	734
	735	// TODO: M_UNK1
757	736	}
758	737
759	738
r242380	r242381
762	741	// i/o handling
763	742	//-------------------------------------------------
764	743
765		void tms1xxx_cpu_device::write_o_output(UINT8 index)
	744	void tms1xxx_cpu_device::write_o_output(UINT8 data)
766	745	{
767		m_o_index = index;
768
769	746	// a hardcoded table is supported if the output pla is unknown
770		m_o = (c_output_pla == NULL) ? m_opla->read(index) : c_output_pla[index];
	747	m_o = (c_output_pla == NULL) ? m_opla->read(data) : c_output_pla[data];
771	748	m_write_o(0, m_o & m_o_mask, 0xffff);
772	749	}
773	750
774		void tms0970_cpu_device::write_o_output(UINT8 index)
	751	void tms0970_cpu_device::write_o_output(UINT8 data)
775	752	{
776		m_o_index = index;
777
778		m_o = m_spla->read(index);
	753	m_o = m_spla->read(data);
779	754	m_write_o(0, m_o & m_o_mask, 0xffff);
780	755	}
781	756
r242380	r242381
1028	1003	else
1029	1004	m_o_latch = m_o_latch_low \| (m_a << 4 & 0x30);
1030	1005
1031		// ~~writ~~e ~~to o~~ut~~put is don~~e in dynamic_output
	1006	// handled further in dynamic_output
1032	1007	}
1033	1008
1034		void tmc0270_cpu_device::op_setr()
1035		{
1036		// same as default, but handle write to output in dynamic_output
1037		m_r = m_r \| (1 << m_y);
1038		}
1039	1009
1040		void tmc0270_cpu_device::op_rstr()
1041		{
1042		// same as default, but handle write to output in dynamic_output
1043		m_r = m_r & ~(1 << m_y);
1044		}
1045	1010
1046
1047
1048	1011	//-------------------------------------------------
1049	1012	// execute_run
1050	1013	//-------------------------------------------------
r242380	r242381
1107	1070	}
1108	1071
1109	1072	// execute: k input valid, read ram, clear alu inputs
1110		dynamic_output();
1111	1073	set_cki_bus();
	1074	dynamic_output();
1112	1075	m_ram_in = m_data->read_byte(m_ram_address) & 0xf;
1113	1076	m_dam_in = m_data->read_byte(m_ram_address \| (0x10 << (m_x_bits-1))) & 0xf;
1114	1077	m_ram_out = -1;

trunk/src/emu/cpu/tms0980/tms0980.h
r242380	r242381
61	61	template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_r.set_callback(object); }
62	62	template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_power_off.set_callback(object); }
63	63	static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1xxx_cpu_device &>(device).c_output_pla = output_pla; }
64
65		// driver debugging
66		UINT8 debug_peek_o_index() { return m_o_index; }
67	64
68	65	protected:
69	66	// device-level overrides
r242380	r242381
72	69
73	70	// device_execute_interface overrides
74	71	virtual UINT32 execute_min_cycles() const { return 1; }
75		virtual UINT32 execute_max_cycles() const { return 6; }
	72	virtual UINT32 execute_max_cycles() const { return 1; }
76	73	virtual UINT32 execute_input_lines() const { return 1; }
77	74	virtual void execute_run();
78	75
r242380	r242381
87	84
88	85	void next_pc();
89	86
90		virtual void write_o_output(UINT8 index);
	87	virtual void write_o_output(UINT8 data);
91	88	virtual UINT8 read_k_input();
92	89	virtual void set_cki_bus();
93	90	virtual void dynamic_output() { ; } // not used by default
r242380	r242381
125	122	UINT8 m_pa; // 4-bit page address register
126	123	UINT8 m_pb; // 4-bit page buffer register
127	124	UINT8 m_a; // 4-bit accumulator
	125	UINT8 m_a_prev;
128	126	UINT8 m_x; // 2,3,or 4-bit RAM X register
129	127	UINT8 m_y; // 4-bit RAM Y register
130	128	UINT8 m_ca; // chapter address bit
131	129	UINT8 m_cb; // chapter buffer bit
132	130	UINT8 m_cs; // chapter subroutine bit
133	131	UINT16 m_r;
	132	UINT16 m_r_prev;
134	133	UINT16 m_o;
135		UINT8 m_o_index;
	134	UINT8 m_o_latch; // TMC0270 hold latch
	135	UINT8 m_o_latch_low;
	136	UINT8 m_o_latch_prev;
136	137	UINT8 m_cki_bus;
137	138	UINT8 m_c4;
138	139	UINT8 m_p; // 4-bit adder p(lus)-input
r242380	r242381
251	252	virtual void device_reset();
252	253	virtual machine_config_constructor device_mconfig_additions() const;
253	254
254		virtual void write_o_output(UINT8 index);
	255	virtual void write_o_output(UINT8 data);
255	256
256	257	virtual void op_setr();
257	258	virtual void op_tdo();
r242380	r242381
290	291
291	292	protected:
292	293	// overrides
293		virtual void device_start();
294		virtual void device_reset();
295
296	294	virtual machine_config_constructor device_mconfig_additions() const;
297	295
298		virtual void write_o_output(UINT8 index) { tms1xxx_cpu_device::write_o_output(index); }
	296	virtual void write_o_output(UINT8 data) { tms1xxx_cpu_device::write_o_output(data); }
299	297	virtual UINT8 read_k_input();
300	298	virtual void dynamic_output();
301	299	virtual void read_opcode();
302	300
303		virtual void op_setr();
304		virtual void op_rstr();
	301	virtual void op_setr() { tms1xxx_cpu_device::op_setr(); }
	302	virtual void op_rstr() { tms1xxx_cpu_device::op_rstr(); }
305	303	virtual void op_tdo();
306
307		private:
308		UINT8 m_a_prev;
309		UINT16 m_r_prev;
310
311		UINT8 m_o_latch_low;
312		UINT8 m_o_latch;
313		UINT8 m_o_latch_prev;
314	304	};
315	305
316	306

trunk/src/emu/imagedev/floppy.c
r242380	r242381
295	295	ready_counter = 0;
296	296
297	297	setup_characteristics();
298
299		save_item(NAME(cyl));
300		save_item(NAME(subcyl));
301	298	}
302	299
303	300	void floppy_image_device::device_reset()

trunk/src/mame/drivers/5clown.c
r242380	r242381
456	456	public:
457	457	_5clown_state(const machine_config &mconfig, device_type type, const char *tag)
458	458	: driver_device(mconfig, type, tag),
	459	m_videoram(*this, "videoram"),
	460	m_colorram(*this, "colorram"),
459	461	m_maincpu(*this, "maincpu"),
460	462	m_audiocpu(*this, "audiocpu"),
461	463	m_ay8910(*this, "ay8910"),
462	464	m_gfxdecode(*this, "gfxdecode"),
463		m_palette(*this, "palette"),
464		m_videoram(*this, "videoram"),
465		m_colorram(*this, "colorram")
	465	m_palette(*this, "palette")
466	466	{
467	467	}
468	468
469		required_device<cpu_device> m_maincpu;
470		required_device<cpu_device> m_audiocpu;
471		required_device<ay8910_device> m_ay8910;
472		required_device<gfxdecode_device> m_gfxdecode;
473		required_device<palette_device> m_palette;
474
475		required_shared_ptr<UINT8> m_videoram;
476		required_shared_ptr<UINT8> m_colorram;
477
478	469	UINT8 m_main_latch_d800;
479	470	UINT8 m_snd_latch_0800;
480	471	UINT8 m_snd_latch_0a02;
481	472	UINT8 m_ay8910_addr;
	473	required_shared_ptr<UINT8> m_videoram;
	474	required_shared_ptr<UINT8> m_colorram;
482	475	tilemap_t *m_bg_tilemap;
483	476	int m_mux_data;
484
485	477	DECLARE_WRITE8_MEMBER(fclown_videoram_w);
486	478	DECLARE_WRITE8_MEMBER(fclown_colorram_w);
487	479	DECLARE_WRITE8_MEMBER(cpu_c048_w);
r242380	r242381
498	490	DECLARE_WRITE8_MEMBER(fclown_ay8910_w);
499	491	DECLARE_DRIVER_INIT(fclown);
500	492	TILE_GET_INFO_MEMBER(get_fclown_tile_info);
501		virtual void machine_start();
502	493	virtual void video_start();
503	494	DECLARE_PALETTE_INIT(_5clown);
504	495	UINT32 screen_update_fclown(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	496	required_device<cpu_device> m_maincpu;
	497	required_device<cpu_device> m_audiocpu;
	498	required_device<ay8910_device> m_ay8910;
	499	required_device<gfxdecode_device> m_gfxdecode;
	500	required_device<palette_device> m_palette;
505	501	};
506	502
507		void _5clown_state::machine_start()
508		{
509		m_main_latch_d800 = m_snd_latch_0800 = m_snd_latch_0a02 = m_ay8910_addr = m_mux_data = 0;
510
511		save_item(NAME(m_main_latch_d800));
512		save_item(NAME(m_snd_latch_0800));
513		save_item(NAME(m_snd_latch_0a02));
514		save_item(NAME(m_ay8910_addr));
515		save_item(NAME(m_mux_data));
516		}
517	503
	504
	505
518	506	/*************************
519	507	* Video Hardware *
520	508	*************************/
r242380	r242381
1222	1210	*************************/
1223	1211
1224	1212	/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS... */
1225		GAME( 1993, 5clown, 0, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (English, set 1)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1226		GAME( 1993, 5clowna, 5clown, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (English, set 2)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1227		GAME( 1993, 5clownsp, 5clown, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (Spanish hack)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
	1213	GAME( 1993, 5clown, 0, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (English, set 1)", GAME_IMPERFECT_SOUND )
	1214	GAME( 1993, 5clowna, 5clown, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (English, set 2)", GAME_IMPERFECT_SOUND )
	1215	GAME( 1993, 5clownsp, 5clown, fclown, fclown, _5clown_state, fclown, ROT0, "IGS", "Five Clown (Spanish hack)", GAME_IMPERFECT_SOUND )

trunk/src/mame/drivers/bwidow.c
r242380	r242381
334	334	m_lastdata = data;
335	335	}
336	336
337		WRITE8_MEMBER(bwidow_state::spacduel_coin_counter_w)
338		{
339		if (data == m_lastdata) return;
340		set_led_status(machine(), 0, !BIT(data,5)); // start lamp
341		set_led_status(machine(), 1, !BIT(data,4)); // select lamp
342		coin_lockout_w(machine(), 0, !BIT(data,3));
343		coin_lockout_w(machine(), 1, !BIT(data,3));
344		coin_lockout_w(machine(), 2, !BIT(data,3));
345		coin_counter_w(machine(), 0, BIT(data,0));
346		coin_counter_w(machine(), 1, BIT(data,1));
347		coin_counter_w(machine(), 2, BIT(data,2));
348		m_lastdata = data;
349		}
350
351	337	/*************************************
352	338	*
353	339	* Interrupt ack
r242380	r242381
393	379	AM_RANGE(0x0900, 0x0907) AM_READ(spacduel_IN3_r) /* IN1 */
394	380	AM_RANGE(0x0905, 0x0906) AM_WRITENOP /* ignore? */
395	381	AM_RANGE(0x0a00, 0x0a00) AM_DEVREAD("earom", atari_vg_earom_device, read)
396		AM_RANGE(0x0c00, 0x0c00) AM_WRITE(~~spacduel_~~coin_counter_w) /* coin out */
	382	// AM_RANGE(0x0c00, 0x0c00) AM_WRITE(coin_counter_w) /* coin out */
397	383	AM_RANGE(0x0c80, 0x0c80) AM_DEVWRITE("avg", avg_device, go_w)
398	384	AM_RANGE(0x0d00, 0x0d00) AM_WRITENOP /* watchdog clear */
399	385	AM_RANGE(0x0d80, 0x0d80) AM_DEVWRITE("avg", avg_device, reset_w)
400	386	AM_RANGE(0x0e00, 0x0e00) AM_WRITE(irq_ack_w) /* interrupt acknowledge */
401	387	AM_RANGE(0x0e80, 0x0e80) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
402	388	AM_RANGE(0x0f00, 0x0f3f) AM_DEVWRITE("earom", atari_vg_earom_device, write)
403		AM_RANGE(0x1000, 0x10ff) AM_DEVREADWRITE("pokey1", pokey_device, read, write)
404		AM_RANGE(0x1400, 0x14ff) AM_DEVREADWRITE("pokey2", pokey_device, read, write)
	389	AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey1", pokey_device, read, write)
	390	AM_RANGE(0x1400, 0x140f) AM_DEVREADWRITE("pokey2", pokey_device, read, write)
405	391	AM_RANGE(0x2000, 0x27ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x2000)
406	392	AM_RANGE(0x2800, 0x3fff) AM_ROM
407	393	AM_RANGE(0x4000, 0xffff) AM_ROM
r242380	r242381
950	936	ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
951	937	ROM_END
952	938
953		ROM_START( spacduel1 )
954		ROM_REGION( 0x10000, "maincpu", 0 )
955		/* Vector ROM */
956		ROM_LOAD( "136006-106.r7", 0x2800, 0x0800, CRC(691122fe) SHA1(f53be76a49dba319050ca7767de3441521910e83) )
957		ROM_LOAD( "136006-107.np7", 0x3000, 0x1000, CRC(d8dd0461) SHA1(58060b20b2511d30d2ec06479d21840bdd0b53c6) )
958		/* Program ROM */
959		ROM_LOAD( "136006-101.r1", 0x4000, 0x1000, CRC(cd239e6c) SHA1(b6143d979dd35a46bcb783bb0ac02d4dca30f0c2) )
960		ROM_LOAD( "136006-102.np1", 0x5000, 0x1000, CRC(4c451e8a) SHA1(c05c52bb08acccb60950a15f05c960c3bc163d3e) )
961		ROM_LOAD( "136006-103.m1", 0x6000, 0x1000, CRC(ee72da63) SHA1(d36d62cdf7fe76ee9cdbfc2e76ac5d90f22986ba) )
962		ROM_LOAD( "136006-104.kl1", 0x7000, 0x1000, CRC(e41b38a3) SHA1(9e8773e78d65d74db824cfd7108e7038f26757db) )
963		ROM_LOAD( "136006-105.j1", 0x8000, 0x1000, CRC(5652710f) SHA1(b15891d22a47ac3448d2ced40c04d0ab80606c7d) )
964		ROM_RELOAD( 0x9000, 0x1000 )
965		ROM_RELOAD( 0xa000, 0x1000 )
966		ROM_RELOAD( 0xb000, 0x1000 )
967		ROM_RELOAD( 0xc000, 0x1000 )
968		ROM_RELOAD( 0xd000, 0x1000 )
969		ROM_RELOAD( 0xe000, 0x1000 )
970		ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
971	939
972		/* AVG PROM */
973		ROM_REGION( 0x100, "user1", 0 )
974		ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
975		ROM_END
976	940
977		ROM_START( spacduel0 )
978		ROM_REGION( 0x10000, "maincpu", 0 )
979		/* Vector ROM */
980		ROM_LOAD( "136006-006.r7", 0x2800, 0x0800, CRC(691122fe) SHA1(f53be76a49dba319050ca7767de3441521910e83) )
981		ROM_LOAD( "136006-007.np7", 0x3000, 0x1000, CRC(d8dd0461) SHA1(58060b20b2511d30d2ec06479d21840bdd0b53c6) )
982		/* Program ROM */
983		ROM_LOAD( "136006-001.r1", 0x4000, 0x1000, CRC(8f993ac8) SHA1(38b6d1ee3f19bb77b8aca24fbbae38684f194796) )
984		ROM_LOAD( "136006-002.np1", 0x5000, 0x1000, CRC(32cca051) SHA1(a01982e4362ba3dcdafd02d5403f8a190042e314) )
985		ROM_LOAD( "136006-003.m1", 0x6000, 0x1000, CRC(36624d57) SHA1(e66cbd747c2a298f402b91c2cf042a0697ff8296) )
986		ROM_LOAD( "136006-004.kl1", 0x7000, 0x1000, CRC(b322bf0b) SHA1(d67bf4e1e9b5b14b0455f37f9be11167aa3575c2) )
987		ROM_LOAD( "136006-005.j1", 0x8000, 0x1000, CRC(0edb1242) SHA1(5ec62e48d15c5baf0fb583e014cae2ec4bd5f5e4) )
988		ROM_RELOAD( 0x9000, 0x1000 )
989		ROM_RELOAD( 0xa000, 0x1000 )
990		ROM_RELOAD( 0xb000, 0x1000 )
991		ROM_RELOAD( 0xc000, 0x1000 )
992		ROM_RELOAD( 0xd000, 0x1000 )
993		ROM_RELOAD( 0xe000, 0x1000 )
994		ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
995
996		/* AVG PROM */
997		ROM_REGION( 0x100, "user1", 0 )
998		ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
999		ROM_END
1000
1001
1002	941	/*************************************
1003	942	*
1004	943	* Game drivers
1005	944	*
1006	945	*************************************/
1007	946
1008		GAME( 1980, spacduel, 0, spacduel, spacduel, driver_device, 0, ROT0, "Atari", "Space Duel (version 2)", GAME_SUPPORTS_SAVE )
1009		GAME( 1980, spacduel1,spacduel, spacduel, spacduel, driver_device, 0, ROT0, "Atari", "Space Duel (version 1)", GAME_SUPPORTS_SAVE )
1010		GAME( 1980, spacduel0,spacduel, spacduel, spacduel, driver_device, 0, ROT0, "Atari", "Space Duel (prototype)", GAME_SUPPORTS_SAVE )
	947	GAME( 1980, spacduel, 0, spacduel, spacduel, driver_device, 0, ROT0, "Atari", "Space Duel", GAME_SUPPORTS_SAVE )
1011	948	GAME( 1982, bwidow, 0, bwidow, bwidow, driver_device, 0, ROT0, "Atari", "Black Widow", GAME_SUPPORTS_SAVE )
1012	949	GAME( 1982, gravitar, 0, gravitar, gravitar, driver_device, 0, ROT0, "Atari", "Gravitar (version 3)", GAME_SUPPORTS_SAVE )
1013	950	GAME( 1982, gravitar2,gravitar, gravitar, gravitar, driver_device, 0, ROT0, "Atari", "Gravitar (version 2)", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/f-32.c
r242380	r242381
22	22	public:
23	23	mosaicf2_state(const machine_config &mconfig, device_type type, const char *tag)
24	24	: driver_device(mconfig, type, tag),
25		m_maincpu(*this, "maincpu") ,
	25	m_maincpu(*this, "maincpu") ,
26	26	m_videoram(*this, "videoram"){ }
27	27
28		/* devices */
29		required_device<e132xn_device> m_maincpu;
30
31	28	/* memory pointers */
	29	required_device<e132xn_device> m_maincpu;
32	30	required_shared_ptr<UINT32> m_videoram;
33
34	31	DECLARE_READ32_MEMBER(f32_input_port_1_r);
35	32	UINT32 screen_update_mosaicf2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
36	33	};

trunk/src/mame/drivers/mjkjidai.c
r242380	r242381
282	282	void mjkjidai_state::machine_start()
283	283	{
284	284	membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x8000, 0x4000);
285
286		save_item(NAME(m_adpcm_pos));
287		save_item(NAME(m_adpcm_end));
288		save_item(NAME(m_keyb));
289		save_item(NAME(m_nmi_enable));
290		save_item(NAME(m_display_enable));
291	285	}
292	286
293	287	void mjkjidai_state::machine_reset()
r242380	r242381
367	361	ROM_END
368	362
369	363
370		GAME( 1986, mjkjidai, 0, mjkjidai, mjkjidai, driver_device, 0, ROT0, "Sanritsu", "Mahjong Kyou Jidai (Japan)", GAME_IMPERFECT_GRAPHICS ~~\| GAME_SUPPORTS_SAVE~~ )
	364	GAME( 1986, mjkjidai, 0, mjkjidai, mjkjidai, driver_device, 0, ROT0, "Sanritsu", "Mahjong Kyou Jidai (Japan)", GAME_IMPERFECT_GRAPHICS )

trunk/src/mame/drivers/peplus.c
r242380	r242381
1834	1834	ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
1835	1835	ROM_END
1836	1836
1837		ROM_START( pepp0046b ) /* Normal board : 10's or Better (PP0046) */
	1837	ROM_START( pepp0046b ) /* Normal board : 10's or Better (PP0043) */
1838	1838	/*
1839	1839	PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
1840	1840	----------------------------------------------------------
r242380	r242381
4721	4721	ROM_LOAD( "cap656.u50", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
4722	4722	ROM_END
4723	4723
4724		ROM_START( pemg0183 ) /* Normal board : Montana Choice Multi-Game MG0183 - Requires a Printer (not yet supported) */
4725		/*
4726		MG0183 has 4 poker games:
4727		Jacks or Better
4728		Joker Wild Poker
4729		Four of a Kind Bonus Poker
4730		Deuces Wild Poker
4731
4732		Came out of an IGT machine with belly glass calling it Montana Choice
4733		*/
4734		ROM_REGION( 0x10000, "maincpu", 0 )
4735		ROM_LOAD( "mg0183_756-782.u68", 0x00000, 0x10000, CRC(b89bcf75) SHA1(f436eb604c81ba6f08e1d11029ce8fff4f50dc3e) ) /* Stalls with "PRINTER ERROR" */
4736
4737		ROM_REGION( 0x020000, "gfx1", 0 )
4738		ROM_LOAD( "mro-cg1209.u72", 0x00000, 0x8000, CRC(39b0cc43) SHA1(0a95a7122e64fed7355e762ff2eda2a7246d4693) )
4739		ROM_LOAD( "mgo-cg1209.u73", 0x08000, 0x8000, CRC(5285ffab) SHA1(e959bf2fec46ee62d7a625eb64f74635fd697643) )
4740		ROM_LOAD( "mbo-cg1209.u74", 0x10000, 0x8000, CRC(4604ac16) SHA1(b3a7c6c807eb2be7f451d2fcbb6455a66c155a46) )
4741		ROM_LOAD( "mxo-cg1209.u75", 0x18000, 0x8000, CRC(da344256) SHA1(1320c4a8b48a9e61a4607e0a9d08083fde2bd334) )
4742
4743		ROM_REGION( 0x100, "proms", 0 )
4744		ROM_LOAD( "cap1144.u50", 0x0000, 0x0100, NO_DUMP )
4745		ROM_LOAD( "cap1426.u50", 0x0000, 0x0100, CRC(6c7c3462) SHA1(b5481b548f4db460d27a4bfebb08188f36ca0c11) )
4746
4747		ROM_REGION( 0x1000, "printer", 0 ) /* ROM from the printer driver PCB */
4748		ROM_LOAD( "lp_86.u9", 0x0000, 0x1000, CRC(cdd93c06) SHA1(96f0a6e231f355a0b82bb0e1e698edbd66ff3020) ) /* 2732 EPROM */
4749		ROM_END
4750
4751	4724	ROM_START( pemg0252 ) /* Normal board : Player's Choice Multi-Game MG0252 - Requires a Printer (not yet supported) */
4752	4725	/*
4753	4726	MG0252 has 4 poker games:
r242380	r242381
8060	8033	ROM_LOAD( "capx1321.u43", 0x0000, 0x0200, CRC(4b57569f) SHA1(fa29c0f627e7ce79951ec6dadec114864144f37d) )
8061	8034	ROM_END
8062	8035
8063		ROM_START( pex2478p ) /* Superboard : Joker Poker - French (X002478P+XP000154) */
8064		/*
8065		w/J w/oJ
8066		PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
8067		----------------------------------------------------------------
8068		PI104A 1 1 2 3 5 7 15 50 100 300 400 800
8069		% Range: 92.0-94.0% Optimum: 96.0% Hit Frequency: 44.5%
8070		Programs Available: X002317P, X002478P
8071		*/
8072		ROM_REGION( 0x10000, "maincpu", 0 )
8073		ROM_LOAD( "xp000154.u67", 0x00000, 0x10000, CRC(f5f9ba4d) SHA1(d59f477c0a22065a62ffbe44d802b19078fefbb8) )
8074
8075		ROM_REGION( 0x10000, "user1", 0 )
8076		ROM_LOAD( "x002478p.u66", 0x00000, 0x10000, CRC(c667f425) SHA1(a47432af0915ac5369c0c2470bb8086f7f021058) ) /* Joker Poker - French */
8077
8078		ROM_REGION( 0x020000, "gfx1", 0 )
8079		ROM_LOAD( "mro-cg2452.u77", 0x00000, 0x8000, CRC(188cdf9e) SHA1(b575ee8c140589ed7d3c5c6cd21c2ea4806136c5) )
8080		ROM_LOAD( "mgo-cg2452.u78", 0x08000, 0x8000, CRC(eaae3a1c) SHA1(b46822c59f2176306fc7864f9c560e86d4237747) )
8081		ROM_LOAD( "mbo-cg2452.u79", 0x10000, 0x8000, CRC(38c94e65) SHA1(2bba913ed305062c232e58349c2ffff8b2ded563) )
8082		ROM_LOAD( "mxo-cg2452.u80", 0x18000, 0x8000, CRC(22080393) SHA1(885eecbd4a8255f8ffa01d3ad0f80ad6631c7c9a) )
8083
8084		ROM_REGION( 0x200, "proms", 0 )
8085		ROM_LOAD( "capx2307.u43", 0x0000, 0x0200, CRC(58d81338) SHA1(f0044ebbd0128d6fb74d850528ef02730c180f00) )
8086		ROM_END
8087
8088		ROM_START( pex2479p ) /* Superboard : Joker Poker - French (X002479P+XP000154) */
8089		/*
8090		w/J w/oJ
8091		PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
8092		----------------------------------------------------------------
8093		PI105A 1 1 2 3 4 5 20 40 100 200 400 800
8094		% Range: 91.0-93.0% Optimum: 95.0% Hit Frequency: 44.5%
8095		Programs Available: X002318P, X002479P
8096		*/
8097		ROM_REGION( 0x10000, "maincpu", 0 )
8098		ROM_LOAD( "xp000154.u67", 0x00000, 0x10000, CRC(f5f9ba4d) SHA1(d59f477c0a22065a62ffbe44d802b19078fefbb8) )
8099
8100		ROM_REGION( 0x10000, "user1", 0 )
8101		ROM_LOAD( "x002479p.u66", 0x00000, 0x10000, CRC(e95b3550) SHA1(8bd702fb81cef0b9782a9e6b404917fc302ae1ef) ) /* Joker Poker - French */
8102
8103		ROM_REGION( 0x020000, "gfx1", 0 )
8104		ROM_LOAD( "mro-cg2452.u77", 0x00000, 0x8000, CRC(188cdf9e) SHA1(b575ee8c140589ed7d3c5c6cd21c2ea4806136c5) )
8105		ROM_LOAD( "mgo-cg2452.u78", 0x08000, 0x8000, CRC(eaae3a1c) SHA1(b46822c59f2176306fc7864f9c560e86d4237747) )
8106		ROM_LOAD( "mbo-cg2452.u79", 0x10000, 0x8000, CRC(38c94e65) SHA1(2bba913ed305062c232e58349c2ffff8b2ded563) )
8107		ROM_LOAD( "mxo-cg2452.u80", 0x18000, 0x8000, CRC(22080393) SHA1(885eecbd4a8255f8ffa01d3ad0f80ad6631c7c9a) )
8108
8109		ROM_REGION( 0x200, "proms", 0 )
8110		ROM_LOAD( "capx2307.u43", 0x0000, 0x0200, CRC(58d81338) SHA1(f0044ebbd0128d6fb74d850528ef02730c180f00) )
8111		ROM_END
8112
8113		ROM_START( pex2480p ) /* Superboard : Joker Poker (Aces or Better) - French (X002480P+XP000154) */
8114		/*
8115		w/J w/oJ
8116		PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
8117		----------------------------------------------------------------
8118		PI106B 1 1 2 3 5 6 20 50 100 200 500 1000
8119		% Range: 89.5-91.5% Optimum: 93.5% Hit Frequency: 39.2%
8120		Programs Available: X002320P, X002480P
8121		*/
8122		ROM_REGION( 0x10000, "maincpu", 0 )
8123		ROM_LOAD( "xp000154.u67", 0x00000, 0x10000, CRC(f5f9ba4d) SHA1(d59f477c0a22065a62ffbe44d802b19078fefbb8) )
8124
8125		ROM_REGION( 0x10000, "user1", 0 )
8126		ROM_LOAD( "x002480p.u66", 0x00000, 0x10000, CRC(a1ec5a5f) SHA1(a272f9f3f11756a78247fc5aa58f09ea83604fc0) ) /* Joker Poker - French */
8127
8128		ROM_REGION( 0x020000, "gfx1", 0 )
8129		ROM_LOAD( "mro-cg2452.u77", 0x00000, 0x8000, CRC(188cdf9e) SHA1(b575ee8c140589ed7d3c5c6cd21c2ea4806136c5) )
8130		ROM_LOAD( "mgo-cg2452.u78", 0x08000, 0x8000, CRC(eaae3a1c) SHA1(b46822c59f2176306fc7864f9c560e86d4237747) )
8131		ROM_LOAD( "mbo-cg2452.u79", 0x10000, 0x8000, CRC(38c94e65) SHA1(2bba913ed305062c232e58349c2ffff8b2ded563) )
8132		ROM_LOAD( "mxo-cg2452.u80", 0x18000, 0x8000, CRC(22080393) SHA1(885eecbd4a8255f8ffa01d3ad0f80ad6631c7c9a) )
8133
8134		ROM_REGION( 0x200, "proms", 0 )
8135		ROM_LOAD( "capx2307.u43", 0x0000, 0x0200, CRC(58d81338) SHA1(f0044ebbd0128d6fb74d850528ef02730c180f00) )
8136		ROM_END
8137
8138		ROM_START( pex2485p ) /* Superboard : Standard Draw Poker - French (X002480P+XP000154) */
8139		/*
8140		PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
8141		----------------------------------------------------------
8142		PI103B 1 2 3 4 5 7 22 50 300 1000
8143		% Range: 90.4-92.4% Optimum: 94.4% Hit Frequency: 45.5%
8144		Programs Available: X002485P
8145		*/
8146		ROM_REGION( 0x10000, "maincpu", 0 )
8147		ROM_LOAD( "xp000154.u67", 0x00000, 0x10000, CRC(f5f9ba4d) SHA1(d59f477c0a22065a62ffbe44d802b19078fefbb8) )
8148
8149		ROM_REGION( 0x10000, "user1", 0 )
8150		ROM_LOAD( "x002485p.u66", 0x00000, 0x10000, CRC(2ed40148) SHA1(f3c211955ef159da8ab14cfecbdfa2deaa3110ae) ) /* Standard Draw Poker - French */
8151
8152		ROM_REGION( 0x020000, "gfx1", 0 )
8153		ROM_LOAD( "mro-cg2452.u77", 0x00000, 0x8000, CRC(188cdf9e) SHA1(b575ee8c140589ed7d3c5c6cd21c2ea4806136c5) )
8154		ROM_LOAD( "mgo-cg2452.u78", 0x08000, 0x8000, CRC(eaae3a1c) SHA1(b46822c59f2176306fc7864f9c560e86d4237747) )
8155		ROM_LOAD( "mbo-cg2452.u79", 0x10000, 0x8000, CRC(38c94e65) SHA1(2bba913ed305062c232e58349c2ffff8b2ded563) )
8156		ROM_LOAD( "mxo-cg2452.u80", 0x18000, 0x8000, CRC(22080393) SHA1(885eecbd4a8255f8ffa01d3ad0f80ad6631c7c9a) )
8157
8158		ROM_REGION( 0x200, "proms", 0 )
8159		ROM_LOAD( "capx2307.u43", 0x0000, 0x0200, CRC(58d81338) SHA1(f0044ebbd0128d6fb74d850528ef02730c180f00) )
8160		ROM_END
8161
8162	8036	ROM_START( pekoc766 ) /* Superboard : Standard Draw Poker (PP0766) English / Spanish - Key On Credit */
8163	8037	/*
8164	8038	PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
r242380	r242381
9175	9049	GAMEL(1987, peip0120, peip0031, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (IP0120) Standard Draw Poker - French", 0, layout_pe_poker )
9176	9050
9177	9051	/* Normal board : Multi-Game - Player's Choice - Some sets require a printer (not yet supported) */
9178		GAMEL(1994, pemg0183, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Montana Choice (MG0183) Multi-Game", GAME_NOT_WORKING, layout_pe_poker) /* Needs printer support */
9179	9052	GAMEL(1994, pemg0252, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Choice (MG0252) Multi-Game", GAME_NOT_WORKING, layout_pe_poker) /* Needs printer support */
9180	9053
9181	9054	/* Normal board : Blackjack */
r242380	r242381
9323	9196	GAMEL(1995, pex2421p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002421P+XP000064) Deuces Wild Bonus Poker - French", 0, layout_pe_poker )
9324	9197	GAMEL(1995, pex2440p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002440P+XP000053) Deuces Wild Poker", 0, layout_pe_poker )
9325	9198	GAMEL(1995, pex2461p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002461P+XP000055) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
9326		GAMEL(1995, pex2478p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002478P+XP000154) Joker Poker - French", 0, layout_pe_poker )
9327		GAMEL(1995, pex2479p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002479P+XP000154) Joker Poker - French", 0, layout_pe_poker )
9328		GAMEL(1995, pex2480p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002480P+XP000154) Joker Poker (Aces or Better) - French", 0, layout_pe_poker )
9329		GAMEL(1995, pex2485p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002485P+XP000154) Standard Draw Poker - French", 0, layout_pe_poker )
9330	9199
9331	9200	/* Superboard : Poker (Key On Credit) */
9332	9201	GAMEL(1995, pekoc766, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0766 A5W-A6F) Standard Draw Poker", 0, layout_pe_poker )

trunk/src/mame/drivers/viper.c
r242380	r242381
125	125	the game will complain with error RTC BAD then reset. The data inside the RTC can not be hand created
126	126	(yet) so to revive the PCB the correct RTC data must be re-programmed to a new RTC and replaced
127	127	on the PCB.
128		Regarding the RTC and protection-related checks....
129		"RTC OK" checks 0x0000->0x0945 (i.e. I can clear the contents after 0x0945 and the game will still
130		happily boot). The NVRAM contents are split into chunks, each of which are checksummed. It is a 16-bit checksum,
131		computed by summing two consecutive bytes as a 16-bit integer, where the final sum must add up to 0xFFFF (mod
132		65536). The last two bytes in the chunk are used to make the value 0xFFFF. There doesn't appear to be a
133		complete checksum over all the chunks (I can pick and choose chunks from various NVRAMs, as long as each chunk
134		checksum checks out). The important chunks for booting are the first two.
135		The first chunk goes from 0x0000-0x000F. This seems to be a game/region identifier, and doesn't like its
136		contents changed (I didn't try changing every byte, but several of the bytes would throw RTC errors, even with a
137		fixed checksum). I'd guess that the CF verifies this value, since it's different for every game (i.e. Mocap
138		Boxing NVRAM would have a correct checksum, but shouldn't pass Police 911 checks).
139		The second chunk goes from 0x0010-0x0079. This seems to be a board identifier. This has (optionally)
140		several fields, each of which are 20 bytes long. I'm unsure of the first 6 bytes, the following 6
141		bytes are the DS2430A S/N, and the last 8 bytes are a game/region/dongle identifier. If running
142		without a dongle, only the first 20 byte field is present. With a dongle, a second 20 byte field will
143		be present. Moving this second field into the place of the first field (and fixing the checksum)
144		doesn't work, and the second field will be ignored if the first field is valid for the game (and in
145		which case the dongle will be ignored). For example, Police 911 will boot with a valid first field,
146		with or without the second field, and with or without the dongle plugged in. If you have both fields,
147		and leave the dongle plugged in, you can switch between Police 911 and Police 911/2 by simply swapping
148		CF cards.
149	128	29F002 - Fujitsu 29F002 256k x8 EEPROM stamped '941B01' (PLCC44 @ U25). Earlier revision stamped '941A01'
150	129	CN4/CN5 - RCA-type network connection jacks
151	130	CN7 - 80 pin connector (unused in all games?)

trunk/src/mame/drivers/wallc.c
r242380	r242381
58	58	public:
59	59	wallc_state(const machine_config &mconfig, device_type type, const char *tag)
60	60	: driver_device(mconfig, type, tag),
	61	m_videoram(*this, "videoram"),
61	62	m_maincpu(*this, "maincpu"),
62		m_gfxdecode(*this, "gfxdecode"),
63		m_videoram(*this, "videoram") { }
	63	m_gfxdecode(*this, "gfxdecode") { }
64	64
65		required_device<cpu_device> m_maincpu;
66		required_device<gfxdecode_device> m_gfxdecode;
67
68	65	required_shared_ptr<UINT8> m_videoram;
69
70	66	tilemap_t *m_bg_tilemap;
71
72	67	DECLARE_WRITE8_MEMBER(wallc_videoram_w);
73	68	DECLARE_WRITE8_MEMBER(wallc_coin_counter_w);
74	69	DECLARE_DRIVER_INIT(wallc);
r242380	r242381
78	73	virtual void video_start();
79	74	DECLARE_PALETTE_INIT(wallc);
80	75	UINT32 screen_update_wallc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	76	required_device<cpu_device> m_maincpu;
	77	required_device<gfxdecode_device> m_gfxdecode;
81	78	};
82	79
83	80
r242380	r242381
146	143
147	144	WRITE8_MEMBER(wallc_state::wallc_videoram_w)
148	145	{
149		m_videoram[offset] = data;
	146	UINT8 *videoram = m_videoram;
	147	videoram[offset] = data;
150	148	m_bg_tilemap->mark_tile_dirty(offset);
151	149	}
152	150
153	151	TILE_GET_INFO_MEMBER(wallc_state::get_bg_tile_info)
154	152	{
155		SET_TILE_INFO_MEMBER(0, m_videoram[tile_index] + 0x100, 1, 0);
	153	UINT8 *videoram = m_videoram;
	154	SET_TILE_INFO_MEMBER(0, videoram[tile_index] + 0x100, 1, 0);
156	155	}
157	156
158	157	void wallc_state::video_start()
r242380	r242381
488	487
489	488	}
490	489
491		GAME( 1984, wallc, 0, wallc, wallc, wallc_state, wallc, ROT0, "Midcoin", "Wall Crash (set 1)", GAME_SUPPORTS_SAVE )
492		GAME( 1984, wallca, wallc, wallc, wallc, wallc_state, wallca, ROT0, "Midcoin", "Wall Crash (set 2)", GAME_SUPPORTS_SAVE )
493		GAME( 1984, brkblast,wallc, wallc, wallc, wallc_state, wallca, ROT0, "bootleg (Fadesa)", "Brick Blast (bootleg of Wall Crash)", GAME_SUPPORTS_SAVE ) // Spanish bootleg board, Fadesa stickers / text on various components
	490	GAME( 1984, wallc, 0, wallc, wallc, wallc_state, wallc, ROT0, "Midcoin", "Wall Crash (set 1)", 0 )
	491	GAME( 1984, wallca, wallc, wallc, wallc, wallc_state, wallca, ROT0, "Midcoin", "Wall Crash (set 2)", 0 )
	492	GAME( 1984, brkblast,wallc, wallc, wallc, wallc_state, wallca, ROT0, "bootleg (Fadesa)", "Brick Blast (bootleg of Wall Crash)", 0 ) // Spanish bootleg board, Fadesa stickers / text on various components
494	493
495		GAME( 1984, sidampkr,0, wallc, wallc, wallc_state, sidam, ROT270, "Sidam", "unknown Sidam Poker", GAME_NOT_WORKING ~~\| GAME_SUPPORTS_SAVE~~ )
	494	GAME( 1984, sidampkr,0, wallc, wallc, wallc_state, sidam, ROT270, "Sidam", "unknown Sidam Poker", GAME_NOT_WORKING )

trunk/src/mame/includes/bwidow.h
r242380	r242381
16	16	int m_lastdata;
17	17	DECLARE_READ8_MEMBER(spacduel_IN3_r);
18	18	DECLARE_WRITE8_MEMBER(bwidow_misc_w);
19		DECLARE_WRITE8_MEMBER(spacduel_coin_counter_w);
20	19	DECLARE_WRITE8_MEMBER(irq_ack_w);
21	20	DECLARE_CUSTOM_INPUT_MEMBER(clock_r);
22	21	required_device<cpu_device> m_maincpu;

trunk/src/mame/machine/atarigen.c
r242380	r242381
1195	1195
1196	1196	void atarigen_state::device_post_load()
1197	1197	{
1198		if (m_slapstic_num != 0)
1199		{
1200		if (!m_slapstic_device)
	1198	if (!m_slapstic_device)
1201	1199	fatalerror("Slapstic device is missing?\n");
1202
1203		slapstic_update_bank(m_slapstic_device->slapstic_bank());
1204		}
	1200
	1201	slapstic_update_bank(m_slapstic_device->slapstic_bank());
1205	1202	}
1206	1203
1207	1204

trunk/src/mame/mame.lst
r242380	r242381
6936	6936	tempest1r // 136002 (c) 1980
6937	6937	temptube // (hack)
6938	6938	spacduel // 136006 (c) 1980
6939		spacduel1 // 136006 (c) 1980
6940		spacduel0 // 136006 (c) 1980
6941	6939	gravitar // 136010 (c) 1982
6942	6940	gravitar2 // 136010 (c) 1982
6943	6941	gravitar1 // 136010 (c) 1982
r242380	r242381
11174	11172	peip0116 // (c) 1987 IGT - International Game Technology
11175	11173	peip0118 // (c) 1987 IGT - International Game Technology
11176	11174	peip0120 // (c) 1987 IGT - International Game Technology
11177		pemg0183 // (c) 1994 IGT - International Game Technology
11178	11175	pemg0252 // (c) 1994 IGT - International Game Technology
11179	11176	pebe0014 // (c) 1994 IGT - International Game Technology
11180	11177	peke0017 // (c) 1994 IGT - International Game Technology
r242380	r242381
11314	11311	pex2421p // (c) 1995 IGT - International Game Technology
11315	11312	pex2440p // (c) 1995 IGT - International Game Technology
11316	11313	pex2461p // (c) 1995 IGT - International Game Technology
11317		pex2478p // (c) 1995 IGT - International Game Technology
11318		pex2479p // (c) 1995 IGT - International Game Technology
11319		pex2480p // (c) 1995 IGT - International Game Technology
11320		pex2485p // (c) 1995 IGT - International Game Technology
11321	11314	pekoc766 // (c) 1997 IGT - International Game Technology
11322	11315	pekoc801 // (c) 1997 IGT - International Game Technology
11323	11316	pekoc802 // (c) 1997 IGT - International Game Technology

trunk/src/mess/drivers/bigbord2.c
r242380	r242381
107	107	m_maincpu(*this, Z80_TAG),
108	108	m_6845(*this, "crtc"),
109	109	m_ctca(*this, Z80CTCA_TAG),
110		m_ctcb(*this, Z80CTCB_TAG),
	110	m_ctcb(*this, Z80CTCA_TAG),
111	111	m_dma(*this, Z80DMA_TAG),
112	112	m_fdc(*this, "fdc"),
113	113	m_floppy0(*this, "fdc:0"),

trunk/src/mess/drivers/hp16500.c
r242380	r242381
1		/***************************************************************************
2
3		Hewlett-Packard HP16500b Logic Analyzer
	1	/*
	2	Hewlett-Packard HP16500b Logic Analyzer
4	3
5	4	MC68EC030 @ 25 MHz
6	5
r242380	r242381
16	15	IRQ 5 = 814a
17	16	IRQ 6 = 35c8 (jump 840120)
18	17	IRQ 7 = 35d4 (jump 840120)
	18	*/
19	19
20		****************************************************************************/
21	20
22	21	#include "emu.h"
23	22	#include "cpu/m68000/m68000.h"
24	23
	24
25	25	class hp16500_state : public driver_device
26	26	{
27	27	public:
28	28	hp16500_state(const machine_config &mconfig, device_type type, const char *tag)
29		: driver_device(mconfig, type, tag),
30		m_maincpu(*this, "maincpu"),
31		m_vram(*this, "vram")
32		{ }
	29	: driver_device(mconfig, type, tag) ,
	30	m_maincpu(*this, "maincpu") { }
33	31
34	32	virtual void video_start();
35	33	UINT32 screen_update_hp16500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
36
37	34	required_device<cpu_device> m_maincpu;
38		required_shared_ptr<UINT32> m_vram;
39
40
41		DECLARE_WRITE32_MEMBER(palette_w);
42
43		private:
44		UINT32 m_palette[256], m_colors[3], m_count, m_clutoffs;
45	35	};
46	36
	37
47	38	static ADDRESS_MAP_START(hp16500_map, AS_PROGRAM, 32, hp16500_state)
48	39	AM_RANGE(0x00000000, 0x0001ffff) AM_ROM AM_REGION("bios", 0)
49		AM_RANGE(0x0020f000, 0x0020f003) AM_WRITE(palette_w)
50		AM_RANGE(0x00600000, 0x0063ffff) AM_RAM AM_SHARE("vram")
	40	AM_RANGE(0x00600000, 0x0063ffff) AM_RAM
51	41	AM_RANGE(0x00800000, 0x009fffff) AM_RAM // 284e end of test - d0 = 0 for pass
52	42	ADDRESS_MAP_END
53	43
54	44	void hp16500_state::video_start()
55	45	{
56		m_count = 0;
57		m_clutoffs = 0;
58		memset(m_palette, 0, sizeof(m_palette));
59	46	}
60	47
61		WRITE32_MEMBER(hp16500_state::palette_w)
62		{
63		if (mem_mask == 0xff000000)
64		{
65		m_clutoffs = (data>>24) & 0xff;
66		}
67		else if (mem_mask == 0x00ff0000)
68		{
69		UINT8 tmpcolor = (data>>16) & 0xff;
70
71		if ((tmpcolor & 0xf0) == 0x00)
72		{
73		tmpcolor \|= (tmpcolor << 4);
74		}
75
76		m_colors[m_count++] = tmpcolor;
77
78		if (m_count == 3)
79		{
80		m_palette[m_clutoffs] = rgb_t(m_colors[0], m_colors[1], m_colors[2]);
81		m_clutoffs++;
82		if (m_clutoffs > 255)
83		{
84		m_clutoffs = 0;
85		}
86		m_count = 0;
87		}
88		}
89		}
90
91		// 4 bpp
92		// addr = ((Y * 0xfc0) + 0x360) + (X * 4)
93	48	UINT32 hp16500_state::screen_update_hp16500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
94	49	{
95		UINT32 *scanline;
96		int x, y;
97		UINT32 pixels;
98
99		for (y = 0; y < 400; y++)
100		{
101		scanline = &bitmap.pix32(y);
102
103		for (x = 0; x < 576/8; x++)
104		{
105		pixels = m_vram[(y * (288/4)) + x];
106
107		UINT8 gfx = ((pixels & 0xf0000) >> 12) \| (pixels & 15);
108		*scanline++ = m_palette[BIT(gfx, 7) ? 2 : 0];
109		*scanline++ = m_palette[BIT(gfx, 6) ? 2 : 0];
110		*scanline++ = m_palette[BIT(gfx, 5) ? 2 : 0];
111		*scanline++ = m_palette[BIT(gfx, 4) ? 2 : 0];
112		*scanline++ = m_palette[BIT(gfx, 3) ? 2 : 0];
113		*scanline++ = m_palette[BIT(gfx, 2) ? 2 : 0];
114		*scanline++ = m_palette[BIT(gfx, 1) ? 2 : 0];
115		*scanline++ = m_palette[BIT(gfx, 0) ? 2 : 0];
116		#if 0
117		*scanline++ = m_palette[((pixels&0xf0000000)>>28)];
118		*scanline++ = m_palette[((pixels&0xf000000)>>24)];
119		*scanline++ = m_palette[((pixels&0xf00000)>>20)];
120		*scanline++ = m_palette[((pixels&0xf0000)>>16)];
121		*scanline++ = m_palette[((pixels&0xf000)>>12)];
122		*scanline++ = m_palette[((pixels&0xf00)>>8)];
123		*scanline++ = m_palette[((pixels&0xf0)>>4)];
124		*scanline++ = m_palette[(pixels&0xf)];
125		#endif
126		}
127		}
128
129	50	return 0;
130	51	}
131	52
r242380	r242381
135	56	MCFG_CPU_PROGRAM_MAP(hp16500_map)
136	57
137	58	MCFG_SCREEN_ADD("screen", RASTER)
	59	MCFG_SCREEN_RAW_PARAMS(25175000, 800, 0, 640, 525, 0, 480)
	60	MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
	61	MCFG_SCREEN_SIZE(1024, 768)
	62	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
138	63	MCFG_SCREEN_UPDATE_DRIVER(hp16500_state, screen_update_hp16500)
139		MCFG_SCREEN_SIZE(576,400)
140		MCFG_SCREEN_VISIBLE_AREA(0, 576-1, 0, 400-1)
141		MCFG_SCREEN_REFRESH_RATE(60)
142	64
	65	MCFG_PALETTE_ADD("palette", 256)
	66
	67
143	68	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
144	69	MACHINE_CONFIG_END
145	70

trunk/src/mess/drivers/mathmagi.c
r242380	r242381
3	3	/***************************************************************************
4	4
5	5	APF Mathemagician
6		* TMS1100 MP1030 - MCU
7		* 2 x DS8870N - Hex LED Digit Driver
8		* 2 x DS8861N - MOS-to-LED 5-Segment Driver
	6	* TMS1100 MP1030
9	7
10		This is a tabletop educational calculator. It came with plastic overlays
11		for playing different kind of games. Refer to the manual on how to use it.
12		In short, to start from scratch, press [SEL]. By default the device is in
13		calculator teaching mode. If [SEL] is followed with 1-6 and then [NXT],
14		one of the games is started.
15
16		1) Number Machine
17		2) Countin' On
18		3) Walk The Plank
19		4) Gooey Gumdrop
20		5) Football
21		6) Lunar Lander
22
23
24		TODO:
25		- some of the led symbols are probably wrong, output pla is unknown
26
27	8	***************************************************************************/
28	9
29	10	#include "emu.h"
r242380	r242381
45	26	m_button_matrix(*this, "IN")
46	27	{ }
47	28
48		required_device<tms1xxx_cpu_device> m_maincpu;
49		required_ioport_array<6> m_button_matrix;
	29	required_device<cpu_device> m_maincpu;
	30	optional_ioport_array<11> m_button_matrix;
50	31
51	32	UINT16 m_o;
52	33	UINT16 m_r;
r242380	r242381
67	48
68	49	READ8_MEMBER(mathmagi_state::read_k)
69	50	{
	51	printf("r");
	52
70	53	UINT8 k = 0;
71	54
72	55	// read selected button rows
73		for (int i = 0; i < 6; i++)
74		{
75		const int ki[6] = { 3, 5, 6, 7, 9, 10 };
76		if (m_r >> ki[i] & 1)
	56	for (int i = 0; i < 11; i++)
	57	if (m_r >> i & 1)
77	58	k \|= m_button_matrix[i]->read();
78		}
79	59
80	60	return k;
81	61	}
82	62
83	63	WRITE16_MEMBER(mathmagi_state::write_o)
84	64	{
85		// O1-O7: led segments A-G
86	65	m_o = data;
	66
	67	printf("\n%02X ",m_o);
	68	for (int i=0;i<11;i++) printf("%d",m_r>>(10-i)&1);
87	69	}
88	70
89	71	WRITE16_MEMBER(mathmagi_state::write_r)
90	72	{
91		// R3,R5-R7,R9,R10: input mux
92		// and outputs:
93		for (int i = 0; i < 11; i++)
94		{
95		if (data >> i & 1)
96		{
97		// R8: custom math symbols digit
98		// R9: custom equals digit
99		// R10: lamps
100		if (i >= 8)
101		for (int j = 0; j < 8; j++)
102		output_set_lamp_value(i*10 + j, m_o >> j & 1);
103
104		// R0-R7: 7seg leds
105		else
106		output_set_digit_value(i, m_o >> 1 & 0x7f);
107		}
108		}
109
110	73	m_r = data;
	74
	75	printf("\n%02X ",m_o);
	76	for (int i=0;i<11;i++) printf("%d",m_r>>(10-i)&1);
111	77	}
112	78
113	79
r242380	r242381
128	94	*/
129	95
130	96	static INPUT_PORTS_START( mathmagi )
131		PORT_START("IN.0") // R3
132		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("1")
133		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2")
134		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("3")
135		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_NAME("-")
	97	PORT_START("IN.0") // R0
	98	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1)
	99	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2)
	100	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3)
	101	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4)
136	102
137		PORT_START("IN.1") // R5
138		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("0")
139		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_NAME("_") // blank
140		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_NAME("r")
141		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_NAME("+")
	103	PORT_START("IN.1") // R1
	104	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5)
	105	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6)
	106	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7)
	107	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8)
142	108
143		PORT_START("IN.2") // R6
144		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("4")
145		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("5")
146		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("6")
147		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ASTERISK) PORT_NAME(UTF8_MULTIPLY)
	109	PORT_START("IN.2") // R2
	110	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9)
	111	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0)
	112	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q)
	113	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W)
148	114
149		PORT_START("IN.3") // R7
150		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_NAME("SEL")
151		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_NAME("NXT")
152		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_NAME("?") // check
153		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("=")
	115	PORT_START("IN.3") // R3
	116	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E)
	117	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R)
	118	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T)
	119	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y)
154	120
155		PORT_START("IN.4") // R9
156		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("7")
157		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("8")
158		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("9")
159		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH_PAD) PORT_NAME(UTF8_DIVIDE)
	121	PORT_START("IN.4") // R4
	122	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U)
	123	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I)
	124	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O)
	125	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A)
160	126
161		PORT_START("IN.5") // R10
162		PORT_CONFNAME( 0x01, 0x00, "Players")
163		PORT_CONFSETTING( 0x00, "1" )
164		PORT_CONFSETTING( 0x01, "2" )
165		PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED )
	127	PORT_START("IN.5") // R5
	128	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S)
	129	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D)
	130	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F)
	131	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G)
	132
	133	PORT_START("IN.6") // R6
	134	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H)
	135	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J)
	136	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K)
	137	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L)
	138
	139	PORT_START("IN.7") // R7
	140	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z)
	141	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X)
	142	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C)
	143	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V)
	144
	145	PORT_START("IN.8") // R8
	146	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B)
	147	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N)
	148	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M)
	149	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA)
	150
	151	PORT_START("IN.9") // R9
	152	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD)
	153	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD)
	154	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD)
	155	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD)
	156
	157	PORT_START("IN.10") // R10
	158	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) // 1P/2P switch?
	159	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD)
	160	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD)
	161	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD)
166	162	INPUT_PORTS_END
167	163
168	164
r242380	r242381
182	178	save_item(NAME(m_r));
183	179	}
184	180
185		// LED segments A-G
186		enum
187		{
188		lA = 0x02,
189		lB = 0x04,
190		lC = 0x08,
191		lD = 0x10,
192		lE = 0x20,
193		lF = 0x40,
194		lG = 0x80
195		};
196	181
197	182	static const UINT16 mathmagi_output_pla[0x20] =
198	183	{
199	184	/* O output PLA configuration currently unknown */
200		lA+lB+lC+lD+lE+lF, // 0
201		lB+lC, // 1
202		lA+lB+lG+lE+lD, // 2
203		lA+lB+lG+lC+lD, // 3
204		lF+lB+lG+lC, // 4
205		lA+lF+lG+lC+lD, // 5
206		lA+lF+lG+lC+lD+lE, // 6
207		lA+lB+lC, // 7
208		lA+lB+lC+lD+lE+lF+lG, // 8
209		lA+lB+lG+lF+lC+lD, // 9
210		lA+lB+lG+lE, // question mark
211		lE+lG, // r
212		lD, // underscore?
213		lA+lF+lG+lE+lD, // E
214		lG, // -
215		0, // empty
216		0, // empty
217		lG, // lamp 4 or MATH -
218		lD, // lamp 3
219		lF+lE+lD+lC+lG, // b
220		lB, // lamp 2
221		lB+lG, // MATH +
222		lB+lC, // MATH mul
223		lF+lG+lB+lC+lD, // y
224		lA, // lamp 1
225		lA+lG, // MATH div
226		lA+lD, // EQUALS
227		0, // ?
228		0, // ?
229		lE+lD+lC+lG, // o
230		0, // ?
231		lA+lF+lE+lD+lC // G
	185	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
	186	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
	187	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
	188	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
232	189	};
233	190
234	191
235	192	static MACHINE_CONFIG_START( mathmagi, mathmagi_state )
236	193
237	194	/* basic machine hardware */
238		MCFG_CPU_ADD("maincpu", TMS1100, MASTER_CLOCK)
	195	// MCFG_CPU_ADD("maincpu", TMS1100, MASTER_CLOCK)
	196	MCFG_CPU_ADD("maincpu", TMS1100, 10000) // temp
239	197	MCFG_TMS1XXX_OUTPUT_PLA(mathmagi_output_pla)
240	198	MCFG_TMS1XXX_READ_K_CB(READ8(mathmagi_state, read_k))
241	199	MCFG_TMS1XXX_WRITE_O_CB(WRITE16(mathmagi_state, write_o))
r242380	r242381
267	225	ROM_END
268	226
269	227
270		COMP( 1980, mathmagi, 0, 0, mathmagi, mathmagi, driver_device, 0, "APF Electronics Inc.", "Mathemagician", GAME_SUPPORTS_SAVE \| GAME_NO_SOUND_HW )
	228	COMP( 1980, mathmagi, 0, 0, mathmagi, mathmagi, driver_device, 0, "APF Electronics Inc.", "Mathemagician", GAME_SUPPORTS_SAVE \| GAME_NO_SOUND_HW \| GAME_NOT_WORKING )

trunk/src/mess/drivers/merlin.c
r242380	r242381
34	34	#include "cpu/tms0980/tms0980.h"
35	35	#include "sound/speaker.h"
36	36
37		#include "merlin.lh" ~~// clickable~~
	37	#include "merlin.lh"
38	38
39	39	// master clock is a single stage RC oscillator: R=33K, C=100pf,
40	40	// according to the TMS 1000 series data manual this is around 350kHz

trunk/src/mess/drivers/ngen.c
r242380	r242381
119	119	DECLARE_WRITE8_MEMBER( dma_3_dack_w ){ }
120	120	DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
121	121	DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
122		DECLARE_WRITE8_MEMBER(fdc_control_w);
123	122
124	123	protected:
125	124	virtual void machine_reset();
r242380	r242381
380	379	}
381	380
382	381	// returns X-bus module ID (what is the low byte for?)
383		// For now, we'll hard code a floppy disk module (or try to)
384	382	READ16_MEMBER(ngen_state::port00_r)
385	383	{
386	384	if(m_port00 > 0)
387	385	m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
388	386	if(m_port00 == 0)
389		return 0x0040; // module ID of 0x40 = dual floppy disk module (need hardware manual to find other module IDs)
	387	return 0x4000; // module ID of 0x40 = dual floppy disk module (need hardware manual to find other module IDs)
390	388	else
391	389	return 0x0080; // invalid device?
392	390	}
r242380	r242381
398	396
399	397	WRITE_LINE_MEMBER(ngen_state::fdc_drq_w)
400	398	{
401		~~m_dmac->dreq3_w(state);~~
	399	// TODO
402	400	}
403	401
404		WRITE8_MEMBER(ngen_state::fdc_control_w)
405		{
406		m_fdc->set_floppy(m_fd0->get_device());
407		m_fd0->get_device()->mon_w((~data) & 0x80);
408		m_fdc->dden_w(~data & 0x04);
409		}
410
411	402	WRITE_LINE_MEMBER( ngen_state::dma_hrq_changed )
412	403	{
413	404	m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
r242380	r242381
483	474
484	475	void ngen_state::machine_reset()
485	476	{
486		m_port00 = 0;
487	477	m_control = 0;
488	478	m_viduart->write_dsr(0);
489	479	m_viduart->write_cts(0);
490		m_fd0->get_device()->set_rpm(300);
491	480	}
492	481
493	482	static ADDRESS_MAP_START( ngen_mem, AS_PROGRAM, 16, ngen_state )
r242380	r242381
501	490	static ADDRESS_MAP_START( ngen_io, AS_IO, 16, ngen_state )
502	491	AM_RANGE(0x0000, 0x0001) AM_READWRITE(port00_r,port00_w)
503	492	AM_RANGE(0x0100, 0x0107) AM_DEVREADWRITE8("fdc",wd2797_t,read,write,0x00ff) // a guess for now
504		~~AM_RANGE(~~0x0108, ~~0x0109)~~ ~~AM_WRITE8(~~fdc_control~~_w,0x00ff)~~
	493	// port 0x0108 is used also, maybe for motor control/side select?
505	494	ADDRESS_MAP_END
506	495
507	496	static ADDRESS_MAP_START( ngen386_mem, AS_PROGRAM, 32, ngen_state )
r242380	r242381
528	517	SLOT_INTERFACE_END
529	518
530	519	static SLOT_INTERFACE_START( ngen_floppies )
531		SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
	520	SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
532	521	SLOT_INTERFACE_END
533	522
534	523	static MACHINE_CONFIG_START( ngen, ngen_state )
r242380	r242381
588	577	MCFG_RS232_DCD_HANDLER(DEVWRITELINE("iouart", upd7201_device, dcdb_w))
589	578	MCFG_RS232_RI_HANDLER(DEVWRITELINE("iouart", upd7201_device, rib_w))
590	579
591		// TODO: SCN2652 MPCC ~~(not implemented)~~, used for RS-422 cluster communications?
	580	// TODO: SCN2652 MPCC, used for RS-422 cluster communications?
592	581
593	582	// video board
594	583	MCFG_SCREEN_ADD("screen", RASTER)
r242380	r242381
614	603	MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(ngen_state,timer_clk_out))
615	604
616	605	// floppy disk / hard disk module (WD2797 FDC, WD1010 HDC, plus an 8253 timer for each)
617		MCFG_WD2797x_ADD("fdc", XTAL_20MHz / 20)
	606	MCFG_WD2797x_ADD("fdc", XTAL_20MHz / 10)
618	607	MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(ngen_state,fdc_irq_w))
619		MCFG_WD_FDC_DRQ_CALLBACK(DEVWRITELINE("maincpu",i80186_cpu_device,drq1_w))
620		MCFG_WD_FDC_FORCE_READY
	608	MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(ngen_state,fdc_drq_w))
621	609	MCFG_DEVICE_ADD("fdc_timer", PIT8253, 0)
622	610	// TODO: WD1010 HDC (not implemented)
623	611	MCFG_DEVICE_ADD("hdc_timer", PIT8253, 0)
624		MCFG_FLOPPY_DRIVE_ADD("fdc:0", ngen_floppies, "525qd", floppy_image_device::default_floppy_formats)
	612	MCFG_FLOPPY_DRIVE_ADD("fdc:0", ngen_floppies, "525hd", floppy_image_device::default_floppy_formats)
625	613
626	614	MACHINE_CONFIG_END
627	615

trunk/src/mess/drivers/pc9801.c
r242380	r242381
1376	1376	UINT16 mask = m_egc.regs[4] & mem_mask, out = 0;
1377	1377	bool dir = !(m_egc.regs[6] & 0x1000);
1378	1378	int dst_off = (m_egc.regs[6] >> 4) & 0xf;
1379		offset &= 0x13fff;
	1379	offset &= 0x3fff;
1380	1380
1381	1381	if((((m_egc.regs[2] >> 11) & 3) == 1) \|\| ((((m_egc.regs[2] >> 11) & 3) == 2) && !BIT(m_egc.regs[2], 10)))
1382	1382	{
1383	1383	// mask off the bits past the end of the blit
1384	1384	if(m_egc.count < 16)
1385		mask &= dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1);
	1385	mask &= dir ? ((1 << (m_egc.count + 1)) - 1) : ~((1 << (16 - m_egc.count)) - 1);
1386	1386
1387	1387	// mask off the bits before the start
1388	1388	if(m_egc.first)
1389	1389	{
1390	1390	m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
1391		mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (~~16 -~~ dst_off)) - 1);
	1391	mask &= dir ? ~((1 << (16 - dst_off)) - 1) : ((1 << (dst_off + 1)) - 1);
1392	1392	}
1393	1393	}
1394	1394
r242380	r242381
1455	1455
1456	1456	UINT16 pc9801_state::egc_blit_r(UINT32 offset, UINT16 mem_mask)
1457	1457	{
1458		UINT16 plane_off = offset & 0x13fff;
	1458	UINT16 plane_off = offset & 0x3fff;
1459	1459	if((m_egc.regs[2] & 0x300) == 0x100)
1460	1460	{
1461	1461	m_egc.pat[0] = m_video_ram_2[plane_off + 0x4000];
r242380	r242381
1488	1488	{
1489	1489	int i;
1490	1490
1491		offset &= 0x13fff;
	1491	offset &= 0x3fff;
1492	1492	res = 0;
1493	1493	for(i=0;i<4;i++)
1494	1494	{
r242380	r242381
1514	1514	{
1515	1515	int i;
1516	1516	UINT8 vram = (UINT8 )m_video_ram_2.target();
1517		offset = (offset << 1) & 0x27fff;
	1517	offset = (offset << 1) & 0x7fff;
1518	1518
1519	1519	if(m_grcg.mode & 0x40) // RMW
1520	1520	{

trunk/src/mess/drivers/simon.c
r242380	r242381
21	21	#include "cpu/tms0980/tms0980.h"
22	22	#include "sound/speaker.h"
23	23
24		#include "simon.lh" ~~// clickable~~
	24	#include "simon.lh"
25	25
26	26	// master clock is a single stage RC oscillator: R=33K, C=100pf,
27	27	// according to the TMS 1000 series data manual this is around 350kHz

trunk/src/mess/drivers/tandy12.c
r242380	r242381
1		// license:BSD-3-Clause
2		// copyright-holders:hap
3		/***************************************************************************
4
5		Tandy Radio Shack Tandy-12 - Computerized Arcade
6		* TMS1100 CD7282SL
7
8		This tabletop game looks and plays like "Fabulous Fred" by the Japanese
9		company Mego Corp. in 1980, which in turn is a mix of Merlin and Simon.
10		Unlike Merlin and Simon, these spin-offs were not successful.
11
12		***************************************************************************/
13
14		#include "emu.h"
15		#include "cpu/tms0980/tms0980.h"
16		#include "sound/speaker.h"
17
18		#include "tandy12.lh" // clickable
19
20		// master clock is a single stage RC oscillator: R=39K, C=47pf,
21		// according to the TMS 1000 series data manual this is around 400kHz
22		#define MASTER_CLOCK (400000)
23
24
25		class tandy12_state : public driver_device
26		{
27		public:
28		tandy12_state(const machine_config &mconfig, device_type type, const char *tag)
29		: driver_device(mconfig, type, tag),
30		m_maincpu(*this, "maincpu"),
31		m_speaker(*this, "speaker")
32		{ }
33
34		required_device<tms1xxx_cpu_device> m_maincpu;
35		required_device<speaker_sound_device> m_speaker;
36
37		UINT16 m_o;
38		UINT16 m_r;
39
40		DECLARE_READ8_MEMBER(read_k);
41		DECLARE_WRITE16_MEMBER(write_o);
42		DECLARE_WRITE16_MEMBER(write_r);
43
44		virtual void machine_start();
45		};
46
47
48		/***************************************************************************
49
50		I/O
51
52		***************************************************************************/
53
54		READ8_MEMBER(tandy12_state::read_k)
55		{
56		return 0;
57		}
58
59		WRITE16_MEMBER(tandy12_state::write_o)
60		{
61		m_o = data;
62		}
63
64		WRITE16_MEMBER(tandy12_state::write_r)
65		{
66		// R10: speaker out
67		m_speaker->level_w(data >> 10 & 1);
68
69		m_r = data;
70		}
71
72
73
74		/***************************************************************************
75
76		Inputs
77
78		***************************************************************************/
79
80		static INPUT_PORTS_START( tandy12 )
81		INPUT_PORTS_END
82
83
84
85		/***************************************************************************
86
87		Machine Config
88
89		***************************************************************************/
90
91		void tandy12_state::machine_start()
92		{
93		m_o = 0;
94		m_r = 0;
95
96		save_item(NAME(m_o));
97		save_item(NAME(m_r));
98		}
99
100
101		static const UINT16 tandy12_output_pla[0x20] =
102		{
103		/* O output PLA configuration currently unknown */
104		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
105		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
106		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
107		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
108		};
109
110
111		static MACHINE_CONFIG_START( tandy12, tandy12_state )
112
113		/* basic machine hardware */
114		MCFG_CPU_ADD("maincpu", TMS1100, MASTER_CLOCK)
115		MCFG_TMS1XXX_OUTPUT_PLA(tandy12_output_pla)
116		MCFG_TMS1XXX_READ_K_CB(READ8(tandy12_state, read_k))
117		MCFG_TMS1XXX_WRITE_O_CB(WRITE16(tandy12_state, write_o))
118		MCFG_TMS1XXX_WRITE_R_CB(WRITE16(tandy12_state, write_r))
119
120		MCFG_DEFAULT_LAYOUT(layout_tandy12)
121
122		/* no video! */
123
124		/* sound hardware */
125		MCFG_SPEAKER_STANDARD_MONO("mono")
126		MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
127		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
128		MACHINE_CONFIG_END
129
130
131
132		/***************************************************************************
133
134		Game driver(s)
135
136		***************************************************************************/
137
138		ROM_START( tandy12 )
139		ROM_REGION( 0x800, "maincpu", 0 )
140		ROM_LOAD( "cd7282sl", 0x0000, 0x800, CRC(a10013dd) SHA1(42ebd3de3449f371b99937f9df39c240d15ac686) )
141
142		ROM_REGION( 867, "maincpu:mpla", 0 )
143		ROM_LOAD( "tms1100_default_mpla.pla", 0, 867, BAD_DUMP CRC(62445fc9) SHA1(d6297f2a4bc7a870b76cc498d19dbb0ce7d69fec) ) // not verified
144		ROM_REGION( 365, "maincpu:opla", 0 )
145		ROM_LOAD( "tms1100_tandy12_opla.pla", 0, 365, NO_DUMP )
146		ROM_END
147
148
149		CONS( 1981, tandy12, 0, 0, tandy12, tandy12, driver_device, 0, "Tandy Radio Shack", "Tandy-12 - Computerized Arcade", GAME_SUPPORTS_SAVE \| GAME_NOT_WORKING )

trunk/src/mess/drivers/vt240.c
r242380	r242381
18	18	****************************************************************************/
19	19
20	20	#include "emu.h"
21
22		#include "bus/rs232/rs232.h"
23	21	#include "cpu/i8085/i8085.h"
24	22	#include "cpu/t11/t11.h"
25		#include "machine/clock.h"
26		#include "machine/dec_lk201.h"
27		#include "machine/i8251.h"
28		#include "machine/mc68681.h"
29		#include "machine/ms7004.h"
30	23	#include "machine/ram.h"
31	24	#include "video/upd7220.h"
32	25
33		#define VERBOSE_DBG 1 /* general debug messages */
34	26
35		#define DBG_LOG(N,M,A) \
36		do { \
37		if(VERBOSE_DBG>=N) \
38		{ \
39		logerror("%11.6f at %s: ",machine().time().as_double(),machine().describe_context()); \
40		logerror A; \
41		} \
42		} while (0)
43
44	27	class vt240_state : public driver_device
45	28	{
46	29	public:
47	30	vt240_state(const machine_config &mconfig, device_type type, const char *tag)
48	31	: driver_device(mconfig, type, tag),
49	32	m_maincpu(*this, "maincpu"),
50		m_i8251(*this, "i8251"),
51		m_duart(*this, "duart"),
52	33	m_hgdc(*this, "upd7220"),
53	34	m_video_ram(*this, "video_ram"){ }
54	35
55	36	required_device<cpu_device> m_maincpu;
56
57		required_device<i8251_device> m_i8251;
58		DECLARE_WRITE_LINE_MEMBER(write_keyboard_clock);
59
60		required_device<mc68681_device> m_duart;
61
62	37	required_device<upd7220_device> m_hgdc;
63	38	DECLARE_READ8_MEMBER( test_r );
64	39	DECLARE_READ8_MEMBER( pcg_r );
r242380	r242381
69	44	//UINT8 *m_char_rom;
70	45
71	46	required_shared_ptr<UINT16> m_video_ram;
72
73	47	DECLARE_DRIVER_INIT(vt240);
74	48	virtual void machine_reset();
75	49	INTERRUPT_GEN_MEMBER(vt240_irq);
76	50	UPD7220_DRAW_TEXT_LINE_MEMBER( hgdc_draw_text );
77	51	};
78	52
79		WRITE_LINE_MEMBER(vt240_state::write_keyboard_clock)
80		{
81		m_i8251->write_txc(state);
82		m_i8251->write_rxc(state);
83		}
84
85	53	/* TODO */
86	54	UPD7220_DRAW_TEXT_LINE_MEMBER( vt240_state::hgdc_draw_text )
87	55	{
r242380	r242381
133	101	}
134	102
135	103
136		// PDF page 78 (4-25)
137		static ADDRESS_MAP_START( vt240_mem, AS_PROGRAM, 16, vt240_state )
	104	static ADDRESS_MAP_START(vt240_mem, AS_PROGRAM, 8, vt240_state)
138	105	ADDRESS_MAP_UNMAP_HIGH
139		AM_RANGE (0000000, 0077777) AM_ROM
140		// 0170xxx MEM MAP/8085 decoder
141		AM_RANGE (0171000, 0171003) AM_DEVREADWRITE8("i8251", i8251_device, data_r, data_w, 0x00ff)
142		AM_RANGE (0171004, 0171007) AM_DEVREADWRITE8("i8251", i8251_device, status_r, control_w, 0x00ff)
143		AM_RANGE (0172000, 0172077) AM_DEVREADWRITE8("duart", mc68681_device, read, write, 0xff)
144		// 0173000 Video logic
145		// 0174000 Video logic
146		// 017500x Video logic
147		// 0176xxx NVR
148		// 017700x System comm logic
149		ADDRESS_MAP_END
150
151		// PDF page 134 (6-9)
152		#if 0
153		static ADDRESS_MAP_START(vt240_char_mem, AS_PROGRAM, 8, vt240_state)
154		ADDRESS_MAP_UNMAP_HIGH
155		AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("charcpu", 0)
156		AM_RANGE(0x4000, 0x5fff) AM_ROM AM_REGION("charcpu", 0x8000)
	106	AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("ipl", 0)
	107	AM_RANGE(0x4000, 0x5fff) AM_ROM AM_REGION("ipl", 0x8000)
157	108	AM_RANGE(0x8000, 0x87ff) AM_RAM
158	109	ADDRESS_MAP_END
159	110
160		static ADDRESS_MAP_START(vt240_~~char_~~io, AS_IO, 8, vt240_state)
	111	static ADDRESS_MAP_START(vt240_io, AS_IO, 8, vt240_state)
161	112	ADDRESS_MAP_UNMAP_HIGH
162	113	ADDRESS_MAP_GLOBAL_MASK(0xff)
163	114	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("upd7220", upd7220_device, read, write)
164	115	AM_RANGE(0x20, 0x20) AM_READ(test_r)
165	116	//AM_RANGE(0x30, 0x30) AM_READWRITE(pcg_r,pcg_w) // 0x30 PCG
166	117	ADDRESS_MAP_END
167		#endif
168	118
	119
169	120	static ADDRESS_MAP_START( upd7220_map, AS_0, 16, vt240_state)
170	121	AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
171	122	ADDRESS_MAP_END
r242380	r242381
184	135	//device.execute().set_input_line(I8085_RST65_LINE, ASSERT_LINE);
185	136	}
186	137
187		static const gfx_layout vt240_chars_8x10 =
	138	static const gfx_layout vt240_chars_8x8 =
188	139	{
189	140	8,10,
190	141	RGN_FRAC(1,1),
r242380	r242381
192	143	{ 0 },
193	144	{ STEP8(0,1) },
194	145	{ 08, 18, 28, 38, 48, 58, 68, 78, 88, 98 },
195		8*10
	146	8*16
196	147	};
197	148
198	149	static GFXDECODE_START( vt240 )
199		GFXDECODE_ENTRY( "~~charc~~pu", 0x~~338*1~~0-2, vt240_chars_8x10, 0, 8 )
	150	GFXDECODE_ENTRY( "ipl", 0x0000, vt240_chars_8x8, 0, 8 )
200	151	GFXDECODE_END
201	152
202		static MACHINE_CONFIG_FRAGMENT( vt240_motherboard )
203		MCFG_CPU_ADD("maincpu", T11, XTAL_7_3728MHz) // confirm
	153	static MACHINE_CONFIG_START( vt240, vt240_state )
	154	/* basic machine hardware */
	155	MCFG_CPU_ADD("maincpu", I8085A, XTAL_16MHz / 4)
204	156	MCFG_CPU_PROGRAM_MAP(vt240_mem)
205		MCFG_T11_INITIAL_MODE(5 << 13)
206
207		/*
208		MCFG_CPU_ADD("charcpu", I8085A, XTAL_16MHz / 4)
209		MCFG_CPU_PROGRAM_MAP(vt240_char_mem)
210		MCFG_CPU_IO_MAP(vt240_char_io)
	157	MCFG_CPU_IO_MAP(vt240_io)
211	158	MCFG_CPU_VBLANK_INT_DRIVER("screen", vt240_state, vt240_irq)
212		*/
213	159
	160
	161	/* video hardware */
214	162	MCFG_SCREEN_ADD("screen", RASTER)
215	163	MCFG_SCREEN_REFRESH_RATE(50)
216	164	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
217	165	MCFG_SCREEN_SIZE(640, 480)
218	166	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
219		// MCFG_VIDEO_START_OVERRIDE(vt240_state,vt240)
	167	// MCFG_VIDEO_START_OVERRIDE(vt240_state,vt240)
220	168	MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
221	169	MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
222	170	MCFG_GFXDECODE_ADD("gfxdecode", "palette", vt240)
r242380	r242381
224	172	MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_4MHz / 4)
225	173	MCFG_DEVICE_ADDRESS_MAP(AS_0, upd7220_map)
226	174	MCFG_UPD7220_DRAW_TEXT_CALLBACK_OWNER(vt240_state, hgdc_draw_text)
227
228		MCFG_MC68681_ADD("duart", XTAL_3_6864MHz) /* 2681 duart (not 68681!) */
229		// MCFG_MC68681_IRQ_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_irq_handler))
230		MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
231		// MCFG_MC68681_B_TX_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_txa))
232		// MCFG_MC68681_INPORT_CALLBACK(READ8(dectalk_state, dectalk_duart_input))
233		// MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(dectalk_state, dectalk_duart_output))
234		// MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
235		// MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
236
237		MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "null_modem")
238		MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_a_w))
239		// MCFG_RS232_DSR_HANDLER(DEVWRITELINE("duart", mc68681_device, ipX_w))
240	175	MACHINE_CONFIG_END
241	176
242		static MACHINE_CONFIG_START( mc7105, vt240_state )
243		MCFG_FRAGMENT_ADD(vt240_motherboard)
244
245		// serial connection to MS7004 keyboard
246		MCFG_DEVICE_ADD("i8251", I8251, 0)
247		// MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir1_w))
248
249		MCFG_DEVICE_ADD("ms7004", MS7004, 0)
250		MCFG_MS7004_TX_HANDLER(DEVWRITELINE("i8251", i8251_device, write_rxd))
251
252		// baud rate is supposed to be 4800 but keyboard is slightly faster
253		MCFG_DEVICE_ADD("keyboard_clock", CLOCK, 4960*16)
254		MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(vt240_state, write_keyboard_clock))
255		MACHINE_CONFIG_END
256
257	177	/* ROM definition */
258	178	ROM_START( mc7105 )
259		ROM_REGION( 0x10000, "~~charc~~pu", ROMREGION_ERASEFF )
	179	ROM_REGION( 0x10000, "ipl", ROMREGION_ERASEFF )
260	180	ROM_LOAD( "027.bin", 0x8000, 0x8000, CRC(a159b412) SHA1(956097ccc2652d494258b3682498cfd3096d7d4f))
261	181	ROM_LOAD( "028.bin", 0x0000, 0x8000, CRC(b253151f) SHA1(22ffeef8eb5df3c38bfe91266f26d1e7822cdb53))
262	182
263		ROM_REGION( 0x20000, "~~main~~cpu", ROMREGION_ERASEFF )
	183	ROM_REGION( 0x20000, "subcpu", ROMREGION_ERASEFF )
264	184	ROM_LOAD16_BYTE( "029.bin", 0x00000, 0x8000, CRC(4a6db217) SHA1(47637325609ea19ffab61fe31e2700d72fa50729))
265	185	ROM_LOAD16_BYTE( "031.bin", 0x00001, 0x8000, CRC(47129579) SHA1(39de9e2e26f90c5da5e72a09ff361c1a94b9008a))
266	186	ROM_LOAD16_BYTE( "030.bin", 0x10000, 0x8000, CRC(05fd7b75) SHA1(2ad8c14e76accfa1b9b8748c58e9ebbc28844a47))
r242380	r242381
270	190	/* Driver */
271	191	DRIVER_INIT_MEMBER(vt240_state,vt240)
272	192	{
273		UINT8 *ROM = memregion("~~charc~~pu")->base();
	193	UINT8 *ROM = memregion("ipl")->base();
274	194
275	195	/* patch T11 check */
276	196	ROM[0x09d] = 0x00;
277	197	ROM[0x09e] = 0x00;
278	198	ROM[0x09f] = 0x00;
279	199
280		/* ROM checksum */
	200	/* ROM checksum*/
281	201	ROM[0x15c] = 0x00;
282	202	ROM[0x15d] = 0x00;
283	203	ROM[0x15e] = 0x00;
r242380	r242381
286	206	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
287	207	//COMP( 1983, vt240, 0, 0, vt220, vt220, driver_device, 0, "Digital Equipment Corporation", "VT240", GAME_NOT_WORKING \| GAME_NO_SOUND)
288	208	//COMP( 1983, vt241, 0, 0, vt220, vt220, driver_device, 0, "Digital Equipment Corporation", "VT241", GAME_NOT_WORKING \| GAME_NO_SOUND)
289		COMP( 1983, mc7105, 0, 0, ~~mc71~~05, vt240, vt240_state, vt240, "Elektronika", "MC7105", GAME_NOT_WORKING \| GAME_NO_SOUND)
	209	COMP( 1983, mc7105, 0, 0, vt240, vt240, vt240_state, vt240, "Elektronika", "MC7105", GAME_NOT_WORKING \| GAME_NO_SOUND)

trunk/src/mess/drivers/vtech1.c
r242380	r242381
451	451	MCFG_CASSETTE_ADD( "cassette" )
452	452	MCFG_CASSETTE_FORMATS(vtech1_cassette_formats)
453	453	MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY)
454		MCFG_CASSETTE_INTERFACE("vtech1_cass")
455
456		MCFG_SOFTWARE_LIST_ADD("cass_list", "vz_cass")
457	454	MACHINE_CONFIG_END
458	455
459	456	static MACHINE_CONFIG_DERIVED( laser200, laser110 )

trunk/src/mess/layout/mathmagi.lay
r242380	r242381
31	31	<!-- build screen -->
32	32
33	33	<view name="Internal Layout">
34		<bounds left="0" right="100" top="0" bottom="25" />
	34	<bounds left="0" right="100" top="0" bottom="15" />
35	35
36	36	<bezel name="digit0" element="digit">
37		<bounds x="0" y="10" width="10" height="15" />
	37	<bounds x="0" y="0" width="10" height="15" />
38	38	</bezel>
39	39	<bezel name="digit1" element="digit">
40		<bounds x="10" y="10" width="10" height="15" />
	40	<bounds x="10" y="0" width="10" height="15" />
41	41	</bezel>
42	42
43	43	<bezel name="digit2" element="digit">
44		<bounds x="30" y="10" width="10" height="15" />
	44	<bounds x="30" y="0" width="10" height="15" />
45	45	</bezel>
46	46	<bezel name="digit3" element="digit">
47		<bounds x="40" y="10" width="10" height="15" />
	47	<bounds x="40" y="0" width="10" height="15" />
48	48	</bezel>
49	49
50	50	<bezel name="digit4" element="digit">
51		<bounds x="60" y="10" width="10" height="15" />
	51	<bounds x="60" y="0" width="10" height="15" />
52	52	</bezel>
53	53	<bezel name="digit5" element="digit">
54		<bounds x="70" y="10" width="10" height="15" />
	54	<bounds x="70" y="0" width="10" height="15" />
55	55	</bezel>
56	56	<bezel name="digit6" element="digit">
57		<bounds x="80" y="10" width="10" height="15" />
	57	<bounds x="80" y="0" width="10" height="15" />
58	58	</bezel>
59	59	<bezel name="digit7" element="digit">
60		<bounds x="90" y="10" width="10" height="15" />
	60	<bounds x="90" y="0" width="10" height="15" />
61	61	</bezel>
62	62
63		<!-- math symbols custom digit -->
	63	<!-- math symbols custom digit -->
64	64
65		<bezel name="lamp87" element="lamp_dash"><bounds x="21.5" y="17.25" width="7" height="0.5" /></bezel>
	65	<bezel name="lamp65" element="lamp_dash"><bounds x="21.5" y="7.25" width="7" height="0.5" /></bezel>
66	66
67		<bezel name="lamp82" element="lamp_slash"><bounds x="24" y="9.5" width="5" height="7.5" /></bezel>
68		<bezel name="lamp82" element="lamp_slash"><bounds x="21" y="17" width="5" height="7.5" /></bezel>
	67	<bezel name="lamp61" element="lamp_slash"><bounds x="24" y="-0.5" width="5" height="7.5" /></bezel>
	68	<bezel name="lamp64" element="lamp_slash"><bounds x="21" y="7" width="5" height="7.5" /></bezel>
69	69
70		<bezel name="lamp83" element="lamp_backslash"><bounds x="21" y="9.5" width="5" height="7.5" /></bezel>
71		<bezel name="lamp83" element="lamp_backslash"><bounds x="24" y="17" width="5" height="7.5" /></bezel>
	70	<bezel name="lamp66" element="lamp_backslash"><bounds x="21" y="-0.5" width="5" height="7.5" /></bezel>
	71	<bezel name="lamp62" element="lamp_backslash"><bounds x="24" y="7" width="5" height="7.5" /></bezel>
72	72
73		<bezel name="lamp81" element="lamp_dot"><bounds x="24.25" y="12.25" width="1.5" height="1.5" /></bezel>
74		<bezel name="lamp81" element="lamp_dot"><bounds x="24.25" y="21.75" width="1.5" height="1.5" /></bezel>
	73	<bezel name="lamp60" element="lamp_dot"><bounds x="24.25" y="2.25" width="1.5" height="1.5" /></bezel>
	74	<bezel name="lamp63" element="lamp_dot"><bounds x="24.25" y="11.75" width="1.5" height="1.5" /></bezel>
75	75
76		<!-- equals sign custom digit -->
	76	<!-- equals sign custom digit -->
77	77
78		<bezel name="lamp91" element="lamp_dash"><bounds x="51.5" y="14.5" width="7" height="0.5" /></bezel>
79		<bezel name="lamp94" element="lamp_dash"><bounds x="51.5" y="20.0" width="7" height="0.5" /></bezel>
80	78
81		<!-- other lamps -->
82
83		<bezel name="lamp101" element="lamp_dot"><bounds x="1" y="1" width="4" height="4" /></bezel>
84		<bezel name="lamp102" element="lamp_dot"><bounds x="26" y="1" width="4" height="4" /></bezel>
85		<bezel name="lamp104" element="lamp_dot"><bounds x="51" y="1" width="4" height="4" /></bezel>
86		<bezel name="lamp107" element="lamp_dot"><bounds x="76" y="1" width="4" height="4" /></bezel>
87
88
89	79	</view>
90	80	</mamelayout>

trunk/src/mess/layout/tandy12.lay
r242380	r242381
1		<?xml version="1.0"?>
2		<mamelayout version="2">
3
4
5		<!-- define elements -->
6
7
8
9		<!-- build screen -->
10
11		<view name="Internal Layout">
12		<bounds left="0" right="100" top="0" bottom="100" />
13
14
15		</view>
16		</mamelayout>

trunk/src/mess/machine/victor9kb.c
r242380	r242381
383	383	//-------------------------------------------------
384	384
385	385	static ADDRESS_MAP_START( victor9k_keyboard_io, AS_IO, 8, victor_9000_keyboard_t )
	386	// P0 is unconnected on pcb
386	387	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(kb_p1_r, kb_p1_w)
387	388	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_p2_w)
388	389	AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(kb_t1_r)
r242380	r242381
416	417
417	418	INPUT_PORTS_START( victor9k_keyboard )
418	419	PORT_START("Y0")
419		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
420		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
421		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
422		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
423		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
424		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
425		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
426		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	420	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CLR/HOME") PORT_CODE(KEYCODE_HOME) // S12
	421	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xc2\xb1/\xc2\xb0/"UTF8_SMALL_PI) PORT_CODE(KEYCODE_TILDE) // +-, degree, pi // S13
	422	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP" SCRL "UTF8_DOWN) PORT_CODE(KEYCODE_SCRLOCK) // unicode arrows // S33
	423	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("TAB/BACK") PORT_CODE(KEYCODE_TAB) PORT_CHAR(9) // S34
	424	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RVS On-Off/ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(27) // S54
	425	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("LOCK/CAPSLOCK") PORT_CODE(KEYCODE_CAPSLOCK) // S55
	426	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNDL On-Off") PORT_CODE(KEYCODE_PRTSCR) // need better key code // S75
	427	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // S76
427	428
428	429	PORT_START("Y1")
429		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
430		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
431		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
432		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
433		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
434		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
435		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
436		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	430	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("1 ! \|") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_CHAR('\|') // S14
	431	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("2 @ <") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') PORT_CHAR('<') // S15
	432	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // S35
	433	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // S36
	434	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // S56
	435	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // S57
	436	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNUSED S75") // unused // S75
	437	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // S76
437	438
438	439	PORT_START("Y2")
439		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
440		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
441		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
442		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
443		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
444		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
445		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
446		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	440	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("3 # >") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('3') PORT_CHAR('3')// S16
	441	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("4 $ \xc2\xb7") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // centered closed dot U+00B7 // S17
	442	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // S37
	443	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // S38
	444	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // S58
	445	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // S59
	446	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // S79
	447	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // S80
447	448
448	449	PORT_START("Y3")
449		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
450		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
451		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
452		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
453		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
454		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
455		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
456		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	450	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("5 % "UTF8_UP) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // S18
	451	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("6 \xc2\xa2 \xc2\xac") PORT_CODE(KEYCODE_6) PORT_CHAR('6') // cent U+00A2, logic not U+00AC // S19
	452	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // S39
	453	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // S40
	454	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // S60
	455	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // S61
	456	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // S81
	457	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // S82
457	458
458	459	PORT_START("Y4")
459		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
460		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
461		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
462		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
463		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
464		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
465		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
466		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	460	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("7 & ^") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') PORT_CHAR('^') // S20
	461	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("8 * `") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') PORT_CHAR('`') // S21
	462	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // S41
	463	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // S42
	464	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // S62
	465	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // S63
	466	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // S83
	467	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // S84
467	468
468	469	PORT_START("Y5")
469		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
470		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
471		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
472		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
473		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
474		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
475		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
476		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	470	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("9 ( {") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') PORT_CHAR('{') // S22
	471	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("0 ) }") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') PORT_CHAR('}') // S23
	472	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // S43
	473	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // S44
	474	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // S64
	475	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("; :") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') // S65
	476	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') // S85
	477	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') // S86
477	478
478	479	PORT_START("Y6")
479		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
480		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
481		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
482		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
483		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
484		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
485		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
486		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	480	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("- _ ~") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') PORT_CHAR('~') // S24
	481	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("= + \\") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') PORT_CHAR('\\') // S25
	482	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xc2\xbd \xc2\xbc") PORT_CODE(KEYCODE_OPENBRACE) // unicode half fraction U+00BD / quarter fraction U+00BC // S45
	483	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("[ ]") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_CHAR(']') // S46
	484	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("' \"") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('\"') // S66
	485	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNUSED S67") // unused // S67
	486	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') // S87
	487	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // S88
487	488
488	489	PORT_START("Y7")
489		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
490		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
491		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
492		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
493		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
494		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
495		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
496		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	490	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("BACKSPACE") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // S26
	491	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("INS") PORT_CODE(KEYCODE_INSERT) // S27
	492	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNUSED S47") // unused // S47
	493	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ERASE/EOL") PORT_CODE(KEYCODE_END) // should this be mapped to end or del? // S48
	494	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // S68
	495	//PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Word "UTF8_LEFT"/Volume Up \xf0\x9f\x94\x88\xe2\x96\xb4") PORT_CODE(KEYCODE_PGUP) // unicode U+2190/U+1F508 + U+25B4 // S69
	496	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Word "UTF8_LEFT"/Volume Up") PORT_CODE(KEYCODE_PGUP) // unicode U+2190/U+1F508 + U+25B4 // S69
	497	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP"/Brightness Up \xe2\x98\xbc\xe2\x96\xb4") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // U+2191/U+263C + U+25B4 // S89
	498	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN"/Brightness Down \xe2\x98\xbc\xe2\x96\xbe") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // U+2193/U+263C + U+25BE // S90
497	499
498	500	PORT_START("Y8")
499		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
500		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
501		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
502		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
503		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
504		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
505		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
506		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	501	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("DEL") PORT_CODE(KEYCODE_DEL) PORT_CHAR(127) // S28
	502	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad MODE CALC/=") PORT_CODE(KEYCODE_NUMLOCK) // S29
	503	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("REQ/CAN") PORT_CODE(KEYCODE_BACKSLASH) // is this a good key for this? does sysrq make more sense? // S49
	504	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) // S50
	505	//PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Word "UTF8_RIGHT"/Volume Down \xf0\x9f\x94\x88\xe2\x96\xbe") PORT_CODE(KEYCODE_PGDN) // unicode U+2192/U+1F508 + U+25B4 // S70
	506	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Word "UTF8_RIGHT"/Volume Down") PORT_CODE(KEYCODE_PGDN) // unicode U+2192/U+1F508 + U+25B4 // S70
	507	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) // S71
	508	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) // S91
	509	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) // S92
507	510
508	511	PORT_START("Y9")
509		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
510		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
511		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
512		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
513		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
514		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
515		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
516		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	512	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad %") // find a good key for this // S30
	513	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad \xc3\xb7") PORT_CODE(KEYCODE_SLASH_PAD) // unicode division sign U+00F7 // S31
	514	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) // S51
	515	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) // S52
	516	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD) // S72
	517	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) // S73
	518	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) // S93
	519	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad Enter") PORT_CODE(KEYCODE_ENTER_PAD) // S94
517	520
518	521	PORT_START("YA")
519		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
520		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
521		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
522		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
523		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
524		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
525		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
526		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	522	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad \xc3\x97") PORT_CODE(KEYCODE_ASTERISK) // unicode multiply sign U+00D7 // S32
	523	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10 [10]") PORT_CODE(KEYCODE_F10) // S11
	524	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD) // S53
	525	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9 [9]") PORT_CODE(KEYCODE_F9) // S10
	526	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD) // S74
	527	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNUSED S09") // unused // S09
	528	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7 [7]") PORT_CODE(KEYCODE_F7) // S07
	529	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6 [6]") PORT_CODE(KEYCODE_F6) // S06
527	530
528	531	PORT_START("YB")
529		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
530		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
531		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
532		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
533		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
534		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
535		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
536		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	532	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UNUSED S04") // unused // S104
	533	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad .") PORT_CODE(KEYCODE_DEL_PAD) // S103
	534	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 00") // S102
	535	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) // S101
	536	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT"/Contrast Down \xe2\x97\x90\xe2\x96\xbe") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // U+2190/U+25D0 + U+25BE S100
	537	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT"/Contrast Up \xe2\x97\x90\xe2\x96\xb4") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // U+2190/U+25D0 + U+25B4 S99
	538	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("PAUSE/CONT") PORT_CODE(KEYCODE_PAUSE) // S98
	539	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Spacebar") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // S97
537	540
538	541	PORT_START("YC")
539		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
540		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
541		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
542		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
543		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
544		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
545		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
546		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
	542	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5 [5]") PORT_CODE(KEYCODE_F5) // S05
	543	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4 [4]") PORT_CODE(KEYCODE_F4) // S04
	544	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3 [3]") PORT_CODE(KEYCODE_F3) // S03
	545	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2 [2]") PORT_CODE(KEYCODE_F2) // S02
	546	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1 [1]") PORT_CODE(KEYCODE_F1) // S01
	547	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8 [8]") PORT_CODE(KEYCODE_F8) // S11
	548	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("RPT") PORT_CODE(KEYCODE_LCONTROL) // S95
	549	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("ALT") PORT_CODE(KEYCODE_LALT) PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_SHIFT_2) // S96
547	550	INPUT_PORTS_END
548	551
549	552
r242380	r242381
685	688
686	689	*/
687	690
688		// keyboard rows 0-11
	691	// falling (?edge or level?), latch keyboard rows 0-11
689	692	if (!BIT(data, 0))
690	693	{
691	694	m_y = m_p1 & 0x0f;

trunk/src/mess/mess.lst
r242380	r242381
1220	1220	radionic // Radionic
1221	1221	tandy2k
1222	1222	tandy2khd
1223		tandy12
1224	1223
1225	1224	coco // Color Computer
1226	1225	cocoe // Color Computer (Extended BASIC 1.0)

trunk/src/mess/mess.mak
r242380	r242381
1773	1773	$(MESS_DRIVERS)/pasopia7.o \
1774	1774	$(MESS_DRIVERS)/paso1600.o \
1775	1775
1776		$(MESSOBJ)/trainer.a: \
	1776	$(MESSOBJ)/trainer.a: \
1777	1777	$(MESS_DRIVERS)/amico2k.o \
1778	1778	$(MESS_DRIVERS)/babbage.o \
1779	1779	$(MESS_DRIVERS)/bob85.o \
r242380	r242381
1799	1799	$(MESS_MACHINE)/dragon.o \
1800	1800	$(MESS_MACHINE)/dgnalpha.o \
1801	1801	$(MESS_VIDEO)/gime.o \
1802		$(MESS_DRIVERS)/tandy12.o \
1803	1802	$(MESS_DRIVERS)/trs80.o $(MESS_MACHINE)/trs80.o $(MESS_VIDEO)/trs80.o \
1804	1803	$(MESS_DRIVERS)/trs80m2.o $(MESS_MACHINE)/trs80m2kb.o \
1805	1804	$(MESS_DRIVERS)/tandy2k.o $(MESS_MACHINE)/tandy2kb.o \
1806	1805
1807		$(MESSOBJ)/ultratec.a: \
	1806	$(MESSOBJ)/ultratec.a: \
1808	1807	$(MESS_DRIVERS)/minicom.o \
1809	1808
1810	1809	$(MESSOBJ)/unisys.a: \
r242380	r242381
1857	1856	$(MESS_DRIVERS)/bigbord2.o \
1858	1857	$(MESS_DRIVERS)/alto2.o \
1859	1858
1860		$(MESSOBJ)/xussrpc.a: \
	1859	$(MESSOBJ)/xussrpc.a: \
1861	1860	$(MESS_DRIVERS)/ec184x.o \
1862	1861	$(MESS_DRIVERS)/iskr103x.o \
1863	1862	$(MESS_DRIVERS)/mc1502.o \
r242380	r242381
2167	2166	$(MESS_DRIVERS)/svision.o: $(MESS_LAYOUT)/svision.lh
2168	2167	$(MESS_DRIVERS)/svmu.o: $(MESS_LAYOUT)/svmu.lh
2169	2168	$(MESS_DRIVERS)/sym1.o: $(MESS_LAYOUT)/sym1.lh
2170		$(MESS_DRIVERS)/tandy12.o: $(MESS_LAYOUT)/tandy12.lh
2171	2169	$(MESS_DRIVERS)/tavernie.o: $(MESS_LAYOUT)/tavernie.lh
2172	2170	$(MESS_DRIVERS)/tec1.o: $(MESS_LAYOUT)/tec1.lh
2173	2171	$(MESS_DRIVERS)/tecnbras.o: $(MESS_LAYOUT)/tecnbras.lh

https://github.com/mamedev/mame/commit/b7dacdcd7a320b5645b449373cfac781fa54c1b5

199869 Revisions