trunk/src/mess/drivers/excali64.c
| r242353 | r242354 | |
| 9 | 9 | |
| 10 | 10 | Chips: Z80A, 8251, 8253, 8255, 6845 |
| 11 | 11 | We have Basic 1.1. Other known versions are 1.01, 2.1 |
| 12 | There are 2 versions of the colour prom, which have different palettes. |
| 13 | We have the later version. |
| 12 | 14 | |
| 13 | 15 | Control W then Enter will switch between 40 and 80 characters per line. |
| 14 | 16 | |
| 15 | 17 | ToDo: |
| 16 | | - Some keys can be connected to more than one position in the matrix. Need to |
| 17 | | determine the correct positions. |
| 18 | | - The position of the "Line Insert" key is unknown. |
| 19 | 18 | - Colours are approximate. |
| 20 | 19 | - Disk controller |
| 21 | | - ROM banking |
| 20 | - Graphics commands such as LINE and CIRCLE produce a syntax error. |
| 21 | - Some commands such as HGRCLS are missing from the rom. Perhaps we need a later version? |
| 22 | - SET command produces random graphics instead of the expected lo-res dot. |
| 22 | 23 | - The schematic shows the audio counter connected to 2MHz, but this produces |
| 23 | 24 | sounds that are too high. Connected to 1MHz for now. |
| 24 | 25 | - Serial |
| r242353 | r242354 | |
| 103 | 104 | ADDRESS_MAP_END |
| 104 | 105 | |
| 105 | 106 | |
| 106 | | // Keyboard matrix is not included in schematics, so some guesswork |
| 107 | 107 | static INPUT_PORTS_START( excali64 ) |
| 108 | 108 | PORT_START("KEY.0") /* line 0 */ |
| 109 | 109 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') PORT_CHAR(0x12) |
| r242353 | r242354 | |
| 153 | 153 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("DEL") PORT_CODE(KEYCODE_DEL) PORT_CHAR(0x7f) PORT_CHAR(0x7f) PORT_CHAR(0x1f) |
| 154 | 154 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(0x1b) |
| 155 | 155 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("1 !") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 156 | | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) //1 |
| 156 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("INS") PORT_CODE(KEYCODE_INSERT) |
| 157 | 157 | |
| 158 | 158 | PORT_START("KEY.5") /* line 5 */ |
| 159 | 159 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("[ {") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') PORT_CHAR(0x1b) |
| r242353 | r242354 | |
| 245 | 245 | membank("bankr1")->set_entry(0); |
| 246 | 246 | membank("bankr2")->set_entry(0); |
| 247 | 247 | membank("bankr3")->set_entry(0); |
| 248 | | membank("bankr4")->set_entry(0); |
| 249 | | membank("bankw1")->set_entry(0); |
| 250 | 248 | membank("bankw2")->set_entry(0); |
| 251 | 249 | membank("bankw3")->set_entry(0); |
| 252 | 250 | membank("bankw4")->set_entry(0); |
| r242353 | r242354 | |
| 258 | 256 | membank("bankr1")->set_entry(1); |
| 259 | 257 | membank("bankr2")->set_entry(1); |
| 260 | 258 | membank("bankr3")->set_entry(1); |
| 261 | | membank("bankr4")->set_entry(0); |
| 262 | | membank("bankw1")->set_entry(0); |
| 263 | 259 | membank("bankw2")->set_entry(2); |
| 264 | 260 | membank("bankw3")->set_entry(2); |
| 265 | 261 | membank("bankw4")->set_entry(2); |
| r242353 | r242354 | |
| 270 | 266 | membank("bankr1")->set_entry(1); |
| 271 | 267 | membank("bankr2")->set_entry(1); |
| 272 | 268 | membank("bankr3")->set_entry(1); |
| 273 | | membank("bankr4")->set_entry(0); |
| 274 | | membank("bankw1")->set_entry(0); |
| 275 | 269 | membank("bankw2")->set_entry(2); |
| 276 | 270 | membank("bankw3")->set_entry(2); |
| 277 | 271 | membank("bankw4")->set_entry(0); |
| 278 | 272 | } |
| 273 | |
| 274 | // other half of ROM_1 |
| 275 | if ((data & 0x22) == 0x20) |
| 276 | membank("bankr1")->set_entry(2); |
| 279 | 277 | } |
| 280 | 278 | |
| 281 | 279 | MACHINE_RESET_MEMBER( excali64_state, excali64 ) |
| r242353 | r242354 | |
| 342 | 340 | membank("bankw4")->configure_entry(0, &ram[0x4000]);//boot |
| 343 | 341 | // rom_1 |
| 344 | 342 | membank("bankr1")->configure_entry(1, &main[0x0000]);//boot |
| 343 | membank("bankr1")->configure_entry(2, &main[0x2000]); |
| 345 | 344 | // rom_2 |
| 346 | 345 | membank("bankr2")->configure_entry(1, &main[0x4000]);//boot |
| 347 | 346 | membank("bankr3")->configure_entry(1, &main[0x5000]);//boot |