trunk/src/mess/drivers/bitgraph.c
| r0 | r242350 | |
| 1 | /*************************************************************************** |
| 2 | |
| 3 | BBN BitGraph -- monochrome, raster graphics (768x1024), serial terminal. |
| 4 | |
| 5 | Apparently had at least four hardware revisions, A-D, but which ROM |
| 6 | revisions support which hardware is unclear. A Versabus slot, and |
| 7 | various hardware and software options are mentioned in the docs. Best |
| 8 | guesses follow. |
| 9 | |
| 10 | Onboard hardware (common to all revisions) is |
| 11 | - 32K ROM |
| 12 | - 128K RAM (includes frame buffer) |
| 13 | - 3 serial ports, each driven by 6850 ACIA |
| 14 | - some kind of baud rate generator, possibly COM8016 |
| 15 | - sync serial port, driven by 6854 but apparently never supported by ROM |
| 16 | - 682x PIA |
| 17 | - AY-3-891x PSG |
| 18 | - ER2055 EAROM |
| 19 | - DEC VT100 keyboard interface |
| 20 | |
| 21 | Rev A has additional 4th serial port for mouse (not supported by ROM 1.25). |
| 22 | Rev A has 40 hz realtime clock, the rest use 1040 hz. |
| 23 | Rev A-C use AY-3-8912 (with one external PIO port, to connect the EAROM). |
| 24 | Rev D uses AY-3-8913 (no external ports; EAROM is wired to TBD). |
| 25 | Rev B-D have onboard 8035 to talk to parallel printer and mouse. |
| 26 | Rev B-D have more memory (at least up to 512K). |
| 27 | |
| 28 | ROM 1.25 doesn't support mouse, setup mode, pixel data upload and autowrap. |
| 29 | |
| 30 | Missing/incorrect emulation: |
| 31 | Bidirectional keyboard interface (to drive LEDs and speaker). |
| 32 | 8035. |
| 33 | EAROM. |
| 34 | 1.25 only -- clksync() is dummied out -- causes watchdog resets. |
| 35 | Selectable memory size. |
| 36 | Video enable/reverse video switch. |
| 37 | |
| 38 | ****************************************************************************/ |
| 39 | |
| 40 | #include "emu.h" |
| 41 | |
| 42 | #include "bus/centronics/ctronics.h" |
| 43 | #include "bus/rs232/rs232.h" |
| 44 | #include "cpu/m68000/m68000.h" |
| 45 | #include "cpu/mcs48/mcs48.h" |
| 46 | #include "machine/6821pia.h" |
| 47 | #include "machine/6850acia.h" |
| 48 | #include "machine/clock.h" |
| 49 | #include "machine/com8116.h" |
| 50 | #include "machine/er2055.h" |
| 51 | #include "machine/i8243.h" |
| 52 | #include "machine/mc6854.h" |
| 53 | #include "machine/ram.h" |
| 54 | #include "sound/ay8910.h" |
| 55 | |
| 56 | #include "bitgrpha.lh" |
| 57 | #include "bitgrphb.lh" |
| 58 | |
| 59 | #define M68K_TAG "maincpu" |
| 60 | #define PPU_TAG "ppu" |
| 61 | |
| 62 | #define ACIA0_TAG "acia0" |
| 63 | #define ACIA1_TAG "acia1" |
| 64 | #define ACIA2_TAG "acia2" |
| 65 | #define ACIA3_TAG "acia3" |
| 66 | #define RS232_H_TAG "rs232host" |
| 67 | #define RS232_K_TAG "rs232kbd" |
| 68 | #define RS232_D_TAG "rs232debug" |
| 69 | #define RS232_M_TAG "rs232mouse" |
| 70 | #define COM8116_A_TAG "com8116_a" |
| 71 | #define COM8116_B_TAG "com8116_b" |
| 72 | #define ADLC_TAG "adlc" |
| 73 | #define PIA_TAG "pia" |
| 74 | #define PSG_TAG "psg" |
| 75 | #define EAROM_TAG "earom" |
| 76 | |
| 77 | #define VERBOSE_DBG 1 /* general debug messages */ |
| 78 | |
| 79 | #define DBG_LOG(N,M,A) \ |
| 80 | do { \ |
| 81 | if(VERBOSE_DBG>=N) \ |
| 82 | { \ |
| 83 | if( M ) \ |
| 84 | logerror("%11.6f at %s: %-24s",machine().time().as_double(),machine().describe_context(),(char*)M ); \ |
| 85 | logerror A; \ |
| 86 | } \ |
| 87 | } while (0) |
| 88 | |
| 89 | class bitgraph_state : public driver_device |
| 90 | { |
| 91 | public: |
| 92 | bitgraph_state(const machine_config &mconfig, device_type type, const char *tag) |
| 93 | : driver_device(mconfig, type, tag) |
| 94 | , m_maincpu(*this, M68K_TAG) |
| 95 | , m_ram(*this, RAM_TAG) |
| 96 | , m_acia0(*this, ACIA0_TAG) |
| 97 | , m_acia1(*this, ACIA1_TAG) |
| 98 | , m_acia2(*this, ACIA2_TAG) |
| 99 | , m_acia3(*this, ACIA3_TAG) |
| 100 | , m_adlc(*this, ADLC_TAG) |
| 101 | , m_dbrga(*this, COM8116_A_TAG) |
| 102 | , m_dbrgb(*this, COM8116_B_TAG) |
| 103 | , m_pia(*this, PIA_TAG) |
| 104 | , m_psg(*this, PSG_TAG) |
| 105 | , m_earom(*this, EAROM_TAG) |
| 106 | , m_centronics(*this, "centronics") |
| 107 | , m_screen(*this, "screen") |
| 108 | { } |
| 109 | |
| 110 | DECLARE_READ8_MEMBER( pia_r ); |
| 111 | DECLARE_WRITE8_MEMBER( pia_w ); |
| 112 | DECLARE_READ8_MEMBER( pia_pa_r ); |
| 113 | DECLARE_READ8_MEMBER( pia_pb_r ); |
| 114 | DECLARE_WRITE8_MEMBER( pia_pa_w ); |
| 115 | DECLARE_WRITE8_MEMBER( pia_pb_w ); |
| 116 | DECLARE_READ_LINE_MEMBER( pia_ca1_r ); |
| 117 | DECLARE_READ_LINE_MEMBER( pia_cb1_r ); |
| 118 | DECLARE_WRITE_LINE_MEMBER( pia_ca2_w ); |
| 119 | DECLARE_WRITE_LINE_MEMBER( pia_cb2_w ); |
| 120 | |
| 121 | DECLARE_WRITE16_MEMBER( baud_write ); |
| 122 | DECLARE_WRITE_LINE_MEMBER( com8116_a_fr_w ); |
| 123 | DECLARE_WRITE_LINE_MEMBER( com8116_a_ft_w ); |
| 124 | DECLARE_WRITE_LINE_MEMBER( com8116_b_fr_w ); |
| 125 | DECLARE_WRITE_LINE_MEMBER( com8116_b_ft_w ); |
| 126 | |
| 127 | DECLARE_READ8_MEMBER( adlc_r ); |
| 128 | DECLARE_WRITE8_MEMBER( adlc_w ); |
| 129 | |
| 130 | DECLARE_WRITE8_MEMBER( earom_write ); |
| 131 | DECLARE_WRITE8_MEMBER( misccr_write ); |
| 132 | DECLARE_WRITE_LINE_MEMBER( system_clock_write ); |
| 133 | |
| 134 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 135 | |
| 136 | DECLARE_READ8_MEMBER( ppu_read ); |
| 137 | DECLARE_WRITE8_MEMBER( ppu_write ); |
| 138 | DECLARE_WRITE8_MEMBER( ppu_i8243_w ); |
| 139 | |
| 140 | private: |
| 141 | virtual void machine_start(); |
| 142 | virtual void machine_reset(); |
| 143 | required_device<cpu_device> m_maincpu; |
| 144 | required_device<ram_device> m_ram; |
| 145 | required_device<acia6850_device> m_acia0; |
| 146 | required_device<acia6850_device> m_acia1; |
| 147 | required_device<acia6850_device> m_acia2; |
| 148 | optional_device<acia6850_device> m_acia3; |
| 149 | optional_device<mc6854_device> m_adlc; |
| 150 | required_device<com8116_device> m_dbrga; |
| 151 | required_device<com8116_device> m_dbrgb; |
| 152 | required_device<pia6821_device> m_pia; |
| 153 | required_device<ay8912_device> m_psg; |
| 154 | required_device<er2055_device> m_earom; |
| 155 | optional_device<centronics_device> m_centronics; |
| 156 | required_device<screen_device> m_screen; |
| 157 | |
| 158 | UINT8 *m_videoram; |
| 159 | UINT8 m_misccr; |
| 160 | UINT8 m_pia_a; |
| 161 | UINT8 m_pia_b; |
| 162 | UINT8 m_ppu[4]; |
| 163 | }; |
| 164 | |
| 165 | static ADDRESS_MAP_START(bitgrapha_mem, AS_PROGRAM, 16, bitgraph_state) |
| 166 | ADDRESS_MAP_UNMAP_HIGH |
| 167 | AM_RANGE(0x000000, 0x007fff) AM_ROM |
| 168 | AM_RANGE(0x010000, 0x010001) AM_DEVREADWRITE8(ACIA0_TAG, acia6850_device, data_r, data_w, 0xff00) // HOST |
| 169 | AM_RANGE(0x010002, 0x010003) AM_DEVREADWRITE8(ACIA0_TAG, acia6850_device, status_r, control_w, 0xff00) |
| 170 | AM_RANGE(0x010008, 0x010009) AM_DEVREADWRITE8(ACIA1_TAG, acia6850_device, data_r, data_w, 0x00ff) // KEYBOARD |
| 171 | AM_RANGE(0x01000a, 0x01000b) AM_DEVREADWRITE8(ACIA1_TAG, acia6850_device, status_r, control_w, 0x00ff) |
| 172 | AM_RANGE(0x010010, 0x010011) AM_DEVREADWRITE8(ACIA2_TAG, acia6850_device, data_r, data_w, 0x00ff) // DEBUGGER |
| 173 | AM_RANGE(0x010012, 0x010013) AM_DEVREADWRITE8(ACIA2_TAG, acia6850_device, status_r, control_w, 0x00ff) |
| 174 | AM_RANGE(0x010018, 0x010019) AM_DEVREADWRITE8(ACIA3_TAG, acia6850_device, data_r, data_w, 0x00ff) // POINTER |
| 175 | AM_RANGE(0x01001a, 0x01001b) AM_DEVREADWRITE8(ACIA3_TAG, acia6850_device, status_r, control_w, 0x00ff) |
| 176 | AM_RANGE(0x010020, 0x010027) AM_READWRITE8(adlc_r, adlc_w, 0xff00) |
| 177 | AM_RANGE(0x010028, 0x01002f) AM_READWRITE8(pia_r, pia_w, 0xff00) // EAROM, PSG |
| 178 | AM_RANGE(0x010030, 0x010031) AM_WRITE(baud_write) |
| 179 | AM_RANGE(0x3e0000, 0x3fffff) AM_RAM |
| 180 | ADDRESS_MAP_END |
| 181 | |
| 182 | static ADDRESS_MAP_START(bitgraphb_mem, AS_PROGRAM, 16, bitgraph_state) |
| 183 | ADDRESS_MAP_UNMAP_HIGH |
| 184 | AM_RANGE(0x000000, 0x007fff) AM_ROM |
| 185 | AM_RANGE(0x010000, 0x010001) AM_DEVREADWRITE8(ACIA0_TAG, acia6850_device, data_r, data_w, 0xff00) // HOST |
| 186 | AM_RANGE(0x010002, 0x010003) AM_DEVREADWRITE8(ACIA0_TAG, acia6850_device, status_r, control_w, 0xff00) |
| 187 | AM_RANGE(0x010008, 0x010009) AM_DEVREADWRITE8(ACIA1_TAG, acia6850_device, data_r, data_w, 0x00ff) // KEYBOARD |
| 188 | AM_RANGE(0x01000a, 0x01000b) AM_DEVREADWRITE8(ACIA1_TAG, acia6850_device, status_r, control_w, 0x00ff) |
| 189 | AM_RANGE(0x010010, 0x010011) AM_DEVREADWRITE8(ACIA2_TAG, acia6850_device, data_r, data_w, 0x00ff) // DEBUGGER |
| 190 | AM_RANGE(0x010012, 0x010013) AM_DEVREADWRITE8(ACIA2_TAG, acia6850_device, status_r, control_w, 0x00ff) |
| 191 | AM_RANGE(0x01001a, 0x01001b) AM_WRITE8(misccr_write, 0x00ff) |
| 192 | AM_RANGE(0x010020, 0x010027) AM_READWRITE8(adlc_r, adlc_w, 0xff00) |
| 193 | AM_RANGE(0x010028, 0x01002f) AM_READWRITE8(pia_r, pia_w, 0xff00) // EAROM, PSG |
| 194 | AM_RANGE(0x010030, 0x010031) AM_WRITE(baud_write) |
| 195 | // AM_RANGE(0x010030, 0x010037) AM_READ8(ppu_read, 0x00ff) |
| 196 | // AM_RANGE(0x010038, 0x01003f) AM_WRITE8(ppu_write, 0x00ff) |
| 197 | AM_RANGE(0x380000, 0x3fffff) AM_RAM |
| 198 | ADDRESS_MAP_END |
| 199 | |
| 200 | static INPUT_PORTS_START(bitgraph) |
| 201 | INPUT_PORTS_END |
| 202 | |
| 203 | READ8_MEMBER(bitgraph_state::pia_r) |
| 204 | { |
| 205 | DBG_LOG(3,"PIA", ("R %d\n", offset)); |
| 206 | return m_pia->read(space, 3-offset); |
| 207 | } |
| 208 | |
| 209 | WRITE8_MEMBER(bitgraph_state::pia_w) |
| 210 | { |
| 211 | DBG_LOG(3,"PIA", ("W %d < %02X\n", offset, data)); |
| 212 | return m_pia->write(space, 3-offset, data); |
| 213 | } |
| 214 | |
| 215 | READ_LINE_MEMBER(bitgraph_state::pia_ca1_r) |
| 216 | { |
| 217 | return m_screen->frame_number() & 1; |
| 218 | } |
| 219 | |
| 220 | WRITE_LINE_MEMBER(bitgraph_state::pia_cb2_w) |
| 221 | { |
| 222 | // XXX shut up verbose log |
| 223 | } |
| 224 | |
| 225 | READ8_MEMBER(bitgraph_state::pia_pa_r) |
| 226 | { |
| 227 | UINT8 data = BIT(m_pia_b, 3) ? m_earom->data() : m_pia_a; |
| 228 | DBG_LOG(2,"PIA", ("A == %02X (%s)\n", data, BIT(m_pia_b, 3) ? "earom" : "pia")); |
| 229 | return data; |
| 230 | } |
| 231 | |
| 232 | WRITE8_MEMBER(bitgraph_state::pia_pa_w) |
| 233 | { |
| 234 | DBG_LOG(2,"PIA", ("A <- %02X\n", data)); |
| 235 | m_pia_a = data; |
| 236 | } |
| 237 | |
| 238 | /* |
| 239 | B0 O: BC1 to noisemaker. |
| 240 | B1 O: BDIR to noisemaker. |
| 241 | B2 O: Clock for EAROM. |
| 242 | B3 O: CS1 for EAROM. |
| 243 | B4 O: Enable HDLC Xmt interrupt. |
| 244 | B5 O: Enable HDLC Rcv interrupt. |
| 245 | B6 O: Clear Clock interrupt. Must write a 0 [clear interrupt], then a 1. |
| 246 | B7 I: EVEN field ?? |
| 247 | */ |
| 248 | READ8_MEMBER(bitgraph_state::pia_pb_r) |
| 249 | { |
| 250 | DBG_LOG(2,"PIA", ("B == %02X\n", m_pia_b)); |
| 251 | return m_pia_b; |
| 252 | } |
| 253 | |
| 254 | WRITE8_MEMBER(bitgraph_state::pia_pb_w) |
| 255 | { |
| 256 | DBG_LOG(2,"PIA", ("B <- %02X\n", data)); |
| 257 | m_pia_b = data; |
| 258 | |
| 259 | switch (m_pia_b & 0x03) { |
| 260 | case 2: m_psg->data_w(space, 0, m_pia_a); break; |
| 261 | case 3: m_psg->address_w(space, 0, m_pia_a); break; |
| 262 | } |
| 263 | |
| 264 | if (BIT(m_pia_b, 3)) { |
| 265 | DBG_LOG(2,"EAROM", ("data <- %02X\n", m_pia_a)); |
| 266 | m_earom->set_data(m_pia_a); |
| 267 | } |
| 268 | // CS1, ~CS2, C1, C2, CK |
| 269 | m_earom->set_control(BIT(m_pia_b, 3), BIT(m_pia_b, 3), BIT(m_pia_a, 6), BIT(m_pia_a, 7), BIT(m_pia_b, 2)); |
| 270 | |
| 271 | if (!BIT(m_pia_b, 6)) { |
| 272 | m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); |
| 273 | } |
| 274 | } |
| 275 | |
| 276 | WRITE8_MEMBER(bitgraph_state::earom_write) |
| 277 | { |
| 278 | DBG_LOG(2,"EAROM", ("addr <- %02X (%02X)\n", data & 0x3f, data)); |
| 279 | m_earom->set_address(data & 0x3f); |
| 280 | } |
| 281 | |
| 282 | // written once and never changed |
| 283 | WRITE8_MEMBER(bitgraph_state::misccr_write) |
| 284 | { |
| 285 | DBG_LOG(1,"MISCCR", ("<- %02X (DTR %d MAP %d)\n", data, BIT(data, 3), (data & 3))); |
| 286 | m_misccr = data; |
| 287 | } |
| 288 | |
| 289 | WRITE_LINE_MEMBER(bitgraph_state::system_clock_write) |
| 290 | { |
| 291 | if (!BIT(m_pia_b, 6)) { |
| 292 | m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); |
| 293 | return; |
| 294 | } |
| 295 | if (state) { |
| 296 | m_maincpu->set_input_line_and_vector(M68K_IRQ_6, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); |
| 297 | } else { |
| 298 | m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); |
| 299 | } |
| 300 | } |
| 301 | |
| 302 | WRITE16_MEMBER(bitgraph_state::baud_write) |
| 303 | { |
| 304 | DBG_LOG(1,"Baud", ("%04X\n", data)); |
| 305 | m_dbrgb->str_w(data & 15); // 2 DBG |
| 306 | m_dbrga->stt_w((data >> 4) & 15); // 1 KBD |
| 307 | m_dbrgb->stt_w((data >> 8) & 15); // 3 PNT |
| 308 | m_dbrga->str_w((data >> 12) & 15); // 0 HOST |
| 309 | } |
| 310 | |
| 311 | WRITE_LINE_MEMBER(bitgraph_state::com8116_a_fr_w) |
| 312 | { |
| 313 | m_acia0->write_txc(state); |
| 314 | m_acia0->write_rxc(state); |
| 315 | } |
| 316 | |
| 317 | WRITE_LINE_MEMBER(bitgraph_state::com8116_a_ft_w) |
| 318 | { |
| 319 | m_acia1->write_txc(state); |
| 320 | m_acia1->write_rxc(state); |
| 321 | } |
| 322 | |
| 323 | WRITE_LINE_MEMBER(bitgraph_state::com8116_b_fr_w) |
| 324 | { |
| 325 | m_acia2->write_txc(state); |
| 326 | m_acia2->write_rxc(state); |
| 327 | } |
| 328 | |
| 329 | WRITE_LINE_MEMBER(bitgraph_state::com8116_b_ft_w) |
| 330 | { |
| 331 | if (m_acia3) { |
| 332 | m_acia3->write_txc(state); |
| 333 | m_acia3->write_rxc(state); |
| 334 | } |
| 335 | } |
| 336 | |
| 337 | READ8_MEMBER(bitgraph_state::adlc_r) |
| 338 | { |
| 339 | DBG_LOG(1,"ADLC", ("R %d\n", offset)); |
| 340 | return m_adlc ? m_adlc->read(space, 3-offset) : 0xff; |
| 341 | } |
| 342 | |
| 343 | WRITE8_MEMBER(bitgraph_state::adlc_w) |
| 344 | { |
| 345 | DBG_LOG(1,"ADLC", ("W %d < %02X\n", offset, data)); |
| 346 | if (m_adlc) return m_adlc->write(space, 3-offset, data); |
| 347 | } |
| 348 | |
| 349 | UINT32 bitgraph_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 350 | { |
| 351 | UINT8 gfx=0; |
| 352 | int x,y; |
| 353 | |
| 354 | for (y = 0; y < 768; y++) |
| 355 | { |
| 356 | UINT16 *p = &bitmap.pix16(y); |
| 357 | |
| 358 | for (x = 0; x < 1024/8; x+=2) |
| 359 | { |
| 360 | gfx = m_videoram[ (x+1) | (y<<7)]; |
| 361 | |
| 362 | *p++ = BIT(gfx, 7); |
| 363 | *p++ = BIT(gfx, 6); |
| 364 | *p++ = BIT(gfx, 5); |
| 365 | *p++ = BIT(gfx, 4); |
| 366 | *p++ = BIT(gfx, 3); |
| 367 | *p++ = BIT(gfx, 2); |
| 368 | *p++ = BIT(gfx, 1); |
| 369 | *p++ = BIT(gfx, 0); |
| 370 | |
| 371 | gfx = m_videoram[ x | (y<<7)]; |
| 372 | |
| 373 | *p++ = BIT(gfx, 7); |
| 374 | *p++ = BIT(gfx, 6); |
| 375 | *p++ = BIT(gfx, 5); |
| 376 | *p++ = BIT(gfx, 4); |
| 377 | *p++ = BIT(gfx, 3); |
| 378 | *p++ = BIT(gfx, 2); |
| 379 | *p++ = BIT(gfx, 1); |
| 380 | *p++ = BIT(gfx, 0); |
| 381 | } |
| 382 | } |
| 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | READ8_MEMBER(bitgraph_state::ppu_read) |
| 387 | { |
| 388 | UINT8 data = m_ppu[offset]; |
| 389 | DBG_LOG(1,"PPU", ("%d == %02X\n", offset, data)); |
| 390 | return data; |
| 391 | } |
| 392 | |
| 393 | WRITE8_MEMBER(bitgraph_state::ppu_write) |
| 394 | { |
| 395 | DBG_LOG(1,"PPU", ("%d <- %02X\n", offset, data)); |
| 396 | m_ppu[offset] = data; |
| 397 | } |
| 398 | |
| 399 | static ADDRESS_MAP_START(ppu_io, AS_IO, 8, bitgraph_state) |
| 400 | // AM_RANGE(0x00, 0x00) AM_READ(ppu_irq) |
| 401 | // AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) |
| 402 | // AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(ppu_t0_r) |
| 403 | AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("i8243", i8243_device, i8243_prog_w) |
| 404 | ADDRESS_MAP_END |
| 405 | |
| 406 | /* |
| 407 | p4 O: Centronics data 3..0 |
| 408 | p5 O: Centronics data 7..4 |
| 409 | p6 O: Centronics control |
| 410 | p7 I: Centronics status |
| 411 | */ |
| 412 | WRITE8_MEMBER(bitgraph_state::ppu_i8243_w) |
| 413 | { |
| 414 | DBG_LOG(1,"PPU", ("8243 %d <- %02X\n", offset + 4, data)); |
| 415 | switch (offset) { |
| 416 | case 0: |
| 417 | m_centronics->write_data0(BIT(data, 0)); |
| 418 | m_centronics->write_data1(BIT(data, 1)); |
| 419 | m_centronics->write_data2(BIT(data, 2)); |
| 420 | m_centronics->write_data3(BIT(data, 3)); |
| 421 | break; |
| 422 | case 1: |
| 423 | m_centronics->write_data4(BIT(data, 0)); |
| 424 | m_centronics->write_data5(BIT(data, 1)); |
| 425 | m_centronics->write_data6(BIT(data, 2)); |
| 426 | m_centronics->write_data7(BIT(data, 3)); |
| 427 | break; |
| 428 | case 2: |
| 429 | m_centronics->write_strobe(BIT(data, 0)); |
| 430 | // 1: Paper instruction |
| 431 | m_centronics->write_init(BIT(data, 2)); |
| 432 | break; |
| 433 | case 3: |
| 434 | m_centronics->write_ack(BIT(data, 0)); |
| 435 | m_centronics->write_busy(BIT(data, 1)); |
| 436 | m_centronics->write_perror(BIT(data, 2)); |
| 437 | m_centronics->write_select(BIT(data, 3)); |
| 438 | break; |
| 439 | } |
| 440 | } |
| 441 | |
| 442 | |
| 443 | void bitgraph_state::machine_start() |
| 444 | { |
| 445 | m_videoram = (UINT8 *)m_maincpu->space(AS_PROGRAM).get_write_ptr(0x3e0000); |
| 446 | } |
| 447 | |
| 448 | void bitgraph_state::machine_reset() |
| 449 | { |
| 450 | m_maincpu->reset(); |
| 451 | m_misccr = 0; |
| 452 | m_pia_a = 0; |
| 453 | m_pia_b = 0; |
| 454 | memset(m_ppu, sizeof(m_ppu), 0); |
| 455 | } |
| 456 | |
| 457 | |
| 458 | static MACHINE_CONFIG_FRAGMENT( bg_motherboard ) |
| 459 | MCFG_SCREEN_ADD("screen", RASTER) |
| 460 | MCFG_SCREEN_REFRESH_RATE(40) |
| 461 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ |
| 462 | MCFG_SCREEN_SIZE(1024, 768) |
| 463 | MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 768-1) |
| 464 | MCFG_SCREEN_UPDATE_DRIVER(bitgraph_state, screen_update) |
| 465 | |
| 466 | MCFG_SCREEN_PALETTE("palette") |
| 467 | MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette") |
| 468 | |
| 469 | MCFG_DEVICE_ADD(ACIA0_TAG, ACIA6850, 0) |
| 470 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE(RS232_H_TAG, rs232_port_device, write_txd)) |
| 471 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE(RS232_H_TAG, rs232_port_device, write_rts)) |
| 472 | MCFG_ACIA6850_IRQ_HANDLER(DEVWRITELINE(M68K_TAG, m68000_device, write_irq1)) |
| 473 | |
| 474 | MCFG_RS232_PORT_ADD(RS232_H_TAG, default_rs232_devices, "null_modem") |
| 475 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA0_TAG, acia6850_device, write_rxd)) |
| 476 | MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA0_TAG, acia6850_device, write_dcd)) |
| 477 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA0_TAG, acia6850_device, write_cts)) |
| 478 | |
| 479 | MCFG_DEVICE_ADD(ACIA1_TAG, ACIA6850, 0) |
| 480 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE(RS232_K_TAG, rs232_port_device, write_txd)) |
| 481 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE(RS232_K_TAG, rs232_port_device, write_rts)) |
| 482 | MCFG_ACIA6850_IRQ_HANDLER(DEVWRITELINE(M68K_TAG, m68000_device, write_irq1)) |
| 483 | |
| 484 | MCFG_RS232_PORT_ADD(RS232_K_TAG, default_rs232_devices, "keyboard") |
| 485 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA1_TAG, acia6850_device, write_rxd)) |
| 486 | MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA1_TAG, acia6850_device, write_dcd)) |
| 487 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA1_TAG, acia6850_device, write_cts)) |
| 488 | |
| 489 | MCFG_DEVICE_ADD(ACIA2_TAG, ACIA6850, 0) |
| 490 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE(RS232_D_TAG, rs232_port_device, write_txd)) |
| 491 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE(RS232_D_TAG, rs232_port_device, write_rts)) |
| 492 | MCFG_ACIA6850_IRQ_HANDLER(DEVWRITELINE(M68K_TAG, m68000_device, write_irq1)) |
| 493 | |
| 494 | MCFG_RS232_PORT_ADD(RS232_D_TAG, default_rs232_devices, NULL) |
| 495 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA2_TAG, acia6850_device, write_rxd)) |
| 496 | MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA2_TAG, acia6850_device, write_dcd)) |
| 497 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA2_TAG, acia6850_device, write_cts)) |
| 498 | |
| 499 | // XXX actual part may be something else |
| 500 | MCFG_DEVICE_ADD(COM8116_A_TAG, COM8116, XTAL_5_0688MHz) |
| 501 | MCFG_COM8116_FR_HANDLER(WRITELINE(bitgraph_state, com8116_a_fr_w)) |
| 502 | MCFG_COM8116_FT_HANDLER(WRITELINE(bitgraph_state, com8116_a_ft_w)) |
| 503 | |
| 504 | MCFG_DEVICE_ADD(COM8116_B_TAG, COM8116, XTAL_5_0688MHz) |
| 505 | MCFG_COM8116_FR_HANDLER(WRITELINE(bitgraph_state, com8116_b_fr_w)) |
| 506 | MCFG_COM8116_FT_HANDLER(WRITELINE(bitgraph_state, com8116_b_ft_w)) |
| 507 | |
| 508 | MCFG_DEVICE_ADD(PIA_TAG, PIA6821, 0) |
| 509 | MCFG_PIA_READCA1_HANDLER(READLINE(bitgraph_state, pia_ca1_r)) |
| 510 | MCFG_PIA_CB2_HANDLER(WRITELINE(bitgraph_state, pia_cb2_w)) |
| 511 | MCFG_PIA_READPA_HANDLER(READ8(bitgraph_state, pia_pa_r)) |
| 512 | MCFG_PIA_WRITEPA_HANDLER(WRITE8(bitgraph_state, pia_pa_w)) |
| 513 | MCFG_PIA_READPB_HANDLER(READ8(bitgraph_state, pia_pb_r)) |
| 514 | MCFG_PIA_WRITEPB_HANDLER(WRITE8(bitgraph_state, pia_pb_w)) |
| 515 | |
| 516 | MCFG_ER2055_ADD(EAROM_TAG) |
| 517 | |
| 518 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 519 | MCFG_SOUND_ADD(PSG_TAG, AY8912, XTAL_1_2944MHz) |
| 520 | MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(bitgraph_state, earom_write)) |
| 521 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) |
| 522 | MACHINE_CONFIG_END |
| 523 | |
| 524 | static MACHINE_CONFIG_FRAGMENT( bg_ppu ) |
| 525 | MCFG_CPU_ADD(PPU_TAG, I8035, XTAL_6_9MHz) |
| 526 | MCFG_CPU_IO_MAP(ppu_io) |
| 527 | |
| 528 | MCFG_I8243_ADD("i8243", NOOP, WRITE8(bitgraph_state, ppu_i8243_w)) |
| 529 | |
| 530 | MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer") |
| 531 | MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit6)) |
| 532 | MCFG_CENTRONICS_BUSY_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit7)) |
| 533 | MCFG_CENTRONICS_FAULT_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit4)) |
| 534 | MCFG_CENTRONICS_PERROR_HANDLER(DEVWRITELINE("cent_status_in", input_buffer_device, write_bit5)) |
| 535 | |
| 536 | MCFG_DEVICE_ADD("cent_status_in", INPUT_BUFFER, 0) |
| 537 | |
| 538 | MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") |
| 539 | MACHINE_CONFIG_END |
| 540 | |
| 541 | static MACHINE_CONFIG_START( bitgrpha, bitgraph_state ) |
| 542 | MCFG_CPU_ADD(M68K_TAG, M68000, XTAL_6_9MHz) |
| 543 | MCFG_CPU_PROGRAM_MAP(bitgrapha_mem) |
| 544 | |
| 545 | MCFG_FRAGMENT_ADD(bg_motherboard) |
| 546 | |
| 547 | MCFG_DEVICE_ADD("system_clock", CLOCK, 40) |
| 548 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(bitgraph_state, system_clock_write)) |
| 549 | |
| 550 | MCFG_DEVICE_ADD(ACIA3_TAG, ACIA6850, 0) |
| 551 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE(RS232_M_TAG, rs232_port_device, write_txd)) |
| 552 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE(RS232_M_TAG, rs232_port_device, write_rts)) |
| 553 | MCFG_ACIA6850_IRQ_HANDLER(DEVWRITELINE(M68K_TAG, m68000_device, write_irq1)) |
| 554 | |
| 555 | MCFG_RS232_PORT_ADD(RS232_M_TAG, default_rs232_devices, NULL) |
| 556 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA3_TAG, acia6850_device, write_rxd)) |
| 557 | MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA3_TAG, acia6850_device, write_dcd)) |
| 558 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA3_TAG, acia6850_device, write_cts)) |
| 559 | |
| 560 | MCFG_DEFAULT_LAYOUT(layout_bitgrpha) |
| 561 | |
| 562 | MCFG_RAM_ADD(RAM_TAG) |
| 563 | MCFG_RAM_DEFAULT_SIZE("128K") |
| 564 | MACHINE_CONFIG_END |
| 565 | |
| 566 | static MACHINE_CONFIG_START( bitgrphb, bitgraph_state ) |
| 567 | MCFG_CPU_ADD(M68K_TAG, M68000, XTAL_6_9MHz) |
| 568 | MCFG_CPU_PROGRAM_MAP(bitgraphb_mem) |
| 569 | |
| 570 | MCFG_FRAGMENT_ADD(bg_motherboard) |
| 571 | // MCFG_FRAGMENT_ADD(bg_ppu) |
| 572 | |
| 573 | MCFG_DEVICE_ADD("system_clock", CLOCK, 1040) |
| 574 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(bitgraph_state, system_clock_write)) |
| 575 | |
| 576 | MCFG_DEFAULT_LAYOUT(layout_bitgrphb) |
| 577 | |
| 578 | MCFG_RAM_ADD(RAM_TAG) |
| 579 | MCFG_RAM_DEFAULT_SIZE("512K") |
| 580 | MACHINE_CONFIG_END |
| 581 | |
| 582 | /* ROM definition */ |
| 583 | ROM_START( bitgrpha ) |
| 584 | ROM_REGION16_BE( 0x8000, M68K_TAG, 0 ) |
| 585 | ROM_LOAD( "bg125.rom", 0x000000, 0x008000, CRC(b86c974e) SHA1(5367db80a856444c2a55de22b69a13f97a62f602)) |
| 586 | ROM_FILL( 0x38e4, 1, 0x4e ) // disable clksync() |
| 587 | ROM_FILL( 0x38e5, 1, 0x75 ) |
| 588 | ROM_END |
| 589 | |
| 590 | ROM_START( bitgrphb ) |
| 591 | ROM_REGION16_BE( 0x8000, M68K_TAG, 0 ) |
| 592 | ROM_DEFAULT_BIOS("2.33A") |
| 593 | |
| 594 | ROM_SYSTEM_BIOS(0, "2.33A", "rev 2.33 Alpha' ROM") |
| 595 | ROMX_LOAD( "bg2.32lo_u10.bin", 0x004001, 0x002000, CRC(6a702a96) SHA1(acdf1ba34038b4ccafb5b8069e70ae57a3b8a7e0), ROM_BIOS(1)|ROM_SKIP(1)) |
| 596 | ROMX_LOAD( "bg2.32hi_u12.bin", 0x004000, 0x002000, CRC(a282a2c8) SHA1(ea7e4d4e197201c8944acef54479d5c2b26d409f), ROM_BIOS(1)|ROM_SKIP(1)) |
| 597 | ROMX_LOAD( "bg2.32lo_u11.bin", 0x000001, 0x002000, CRC(46912afd) SHA1(c1f771adc1ef62b1fb1b904ed1d2a61009e24f55), ROM_BIOS(1)|ROM_SKIP(1)) |
| 598 | ROMX_LOAD( "bg2.32hi_u13.bin", 0x000000, 0x002000, CRC(731df44f) SHA1(8c238b5943b8864e539f92891a0ffa6ddd4fc779), ROM_BIOS(1)|ROM_SKIP(1)) |
| 599 | |
| 600 | ROM_SYSTEM_BIOS(1, "3.0P", "rev 3.0P ROM") |
| 601 | ROMX_LOAD( "bg5173_u10.bin", 0x004001, 0x002000, CRC(40014850) SHA1(ef0b7da58a5183391a3a03947882197f25694518), ROM_BIOS(2)|ROM_SKIP(1)) |
| 602 | ROMX_LOAD( "bg5175_u12.bin", 0x004000, 0x002000, CRC(c2c4cc6c) SHA1(dbbce7cb58b4cef1557a834cbb07b3ace298cb8b), ROM_BIOS(2)|ROM_SKIP(1)) |
| 603 | ROMX_LOAD( "bg5174_u11.bin", 0x000001, 0x002000, CRC(639768b9) SHA1(68f623bcf3bb75390ba2b17efc067cf25f915ec0), ROM_BIOS(2)|ROM_SKIP(1)) |
| 604 | ROMX_LOAD( "bg5176_u13.bin", 0x000000, 0x002000, CRC(984e7e8c) SHA1(dd13cbaff96a8b9936ae8cb07205c6abe8b27b6e), ROM_BIOS(2)|ROM_SKIP(1)) |
| 605 | |
| 606 | ROM_SYSTEM_BIOS(2, "ramtest", "RAM test") |
| 607 | ROMX_LOAD( "ramtest.rom", 0x000000, 0x004000, CRC(fabe3b34) SHA1(4d892a2ed2b7ea12d83843609981be9069611d43), ROM_BIOS(3)) |
| 608 | |
| 609 | ROM_REGION( 0x800, PPU_TAG, 0 ) |
| 610 | ROM_LOAD( "bg_mouse_u9.bin", 0x0000, 0x0800, CRC(fd827ff5) SHA1(6d4a8e9b18c7610c5cfde40464826d144d387601)) |
| 611 | ROM_END |
| 612 | |
| 613 | /* Driver */ |
| 614 | /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ |
| 615 | COMP( 1981, bitgrpha, 0, 0, bitgrpha, bitgraph, driver_device, 0, "BBN", "BitGraph rev A", GAME_IMPERFECT_KEYBOARD) |
| 616 | COMP( 1982, bitgrphb, 0, 0, bitgrphb, bitgraph, driver_device, 0, "BBN", "BitGraph rev B", GAME_NOT_WORKING|GAME_IMPERFECT_KEYBOARD) |
trunk/src/mess/drivers/hp9k_3xx.c
| r242349 | r242350 | |
| 1 | | // license:BSD-3-Clause |
| 2 | | // copyright-holders:R. Belmont |
| 3 | | /*************************************************************************** |
| 4 | | |
| 5 | | hp9k3xx.c: preliminary driver for HP9000 300 Series (aka HP9000/3xx) |
| 6 | | |
| 7 | | Currently supporting: |
| 8 | | |
| 9 | | 320: |
| 10 | | MC68020 CPU @ 16.67 MHz |
| 11 | | HP custom MMU |
| 12 | | MC68881 FPU |
| 13 | | |
| 14 | | 330: |
| 15 | | MC68020 CPU @ 16.67 MHz |
| 16 | | MC68851 MMU |
| 17 | | MC68881 FPU |
| 18 | | |
| 19 | | All models have an MC6840 PIT on IRQ6 clocked at 250 kHz. |
| 20 | | |
| 21 | | TODO: |
| 22 | | BBCADDR 0x420000 |
| 23 | | RTC_DATA: 0x420001 |
| 24 | | RTC_CMD: 0x420003 |
| 25 | | HIL: 0x428000 |
| 26 | | HPIB: 0x478000 |
| 27 | | KBDNMIST: 0x478005 |
| 28 | | DMA: 0x500000 |
| 29 | | FRAMEBUF: 0x560000 |
| 30 | | |
| 31 | | 6840: 0x5F8001/3/5/7/9, IRQ 6 |
| 32 | | |
| 33 | | ****************************************************************************/ |
| 34 | | |
| 35 | | #include "emu.h" |
| 36 | | #include "cpu/m68000/m68000.h" |
| 37 | | #include "machine/6840ptm.h" |
| 38 | | |
| 39 | | #define MAINCPU_TAG "maincpu" |
| 40 | | #define PTM6840_TAG "ptm" |
| 41 | | |
| 42 | | class hp9k3xx_state : public driver_device |
| 43 | | { |
| 44 | | public: |
| 45 | | hp9k3xx_state(const machine_config &mconfig, device_type type, const char *tag) |
| 46 | | : driver_device(mconfig, type, tag), |
| 47 | | m_maincpu(*this, MAINCPU_TAG), |
| 48 | | m_vram(*this, "vram") |
| 49 | | { } |
| 50 | | |
| 51 | | required_device<cpu_device> m_maincpu; |
| 52 | | virtual void machine_reset(); |
| 53 | | |
| 54 | | optional_shared_ptr<UINT32> m_vram; |
| 55 | | |
| 56 | | UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 57 | | UINT32 hp98544_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 58 | | |
| 59 | | DECLARE_READ32_MEMBER(buserror_r); |
| 60 | | DECLARE_WRITE32_MEMBER(buserror_w); |
| 61 | | |
| 62 | | private: |
| 63 | | }; |
| 64 | | |
| 65 | | UINT32 hp9k3xx_state::hp98544_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 66 | | { |
| 67 | | UINT32 *scanline; |
| 68 | | int x, y; |
| 69 | | UINT32 pixels; |
| 70 | | UINT32 m_palette[2] = { 0x00000000, 0xffffffff }; |
| 71 | | |
| 72 | | for (y = 0; y < 768; y++) |
| 73 | | { |
| 74 | | scanline = &bitmap.pix32(y); |
| 75 | | for (x = 0; x < 1024/4; x++) |
| 76 | | { |
| 77 | | pixels = m_vram[(y * 256) + x]; |
| 78 | | |
| 79 | | *scanline++ = m_palette[(pixels>>24) & 1]; |
| 80 | | *scanline++ = m_palette[(pixels>>16) & 1]; |
| 81 | | *scanline++ = m_palette[(pixels>>8) & 1]; |
| 82 | | *scanline++ = m_palette[(pixels & 1)]; |
| 83 | | } |
| 84 | | } |
| 85 | | |
| 86 | | return 0; |
| 87 | | } |
| 88 | | |
| 89 | | // shared mappings for all 9000/3xx systems |
| 90 | | static ADDRESS_MAP_START(hp9k3xx_common, AS_PROGRAM, 32, hp9k3xx_state) |
| 91 | | AM_RANGE(0x00000000, 0x0001ffff) AM_ROM AM_REGION("maincpu",0) AM_WRITENOP // writes to 1fffc are the LED |
| 92 | | |
| 93 | | AM_RANGE(0x00200000, 0x002fffff) AM_RAM AM_SHARE("vram") // 98544 mono framebuffer |
| 94 | | AM_RANGE(0x00560000, 0x00563fff) AM_ROM AM_REGION("graphics", 0x0000) // 98544 mono ROM |
| 95 | | |
| 96 | | AM_RANGE(0x00510000, 0x00510003) AM_READWRITE(buserror_r, buserror_w) // no "Alpha display" |
| 97 | | AM_RANGE(0x00538000, 0x00538003) AM_READWRITE(buserror_r, buserror_w) // no "Graphics" |
| 98 | | AM_RANGE(0x005c0000, 0x005c0003) AM_READWRITE(buserror_r, buserror_w) // no add-on FP coprocessor |
| 99 | | AM_RANGE(0x005f8000, 0x005f800f) AM_DEVREADWRITE8(PTM6840_TAG, ptm6840_device, read, write, 0x00ff00ff) |
| 100 | | ADDRESS_MAP_END |
| 101 | | |
| 102 | | // 9000/320 |
| 103 | | static ADDRESS_MAP_START(hp9k320_map, AS_PROGRAM, 32, hp9k3xx_state) |
| 104 | | AM_RANGE(0xffe00000, 0xffefffff) AM_READWRITE(buserror_r, buserror_w) |
| 105 | | AM_RANGE(0xfff00000, 0xffffffff) AM_RAM |
| 106 | | |
| 107 | | AM_IMPORT_FROM(hp9k3xx_common) |
| 108 | | ADDRESS_MAP_END |
| 109 | | |
| 110 | | |
| 111 | | static ADDRESS_MAP_START(hp9k330_map, AS_PROGRAM, 32, hp9k3xx_state) |
| 112 | | AM_RANGE(0xffb00000, 0xffbfffff) AM_READWRITE(buserror_r, buserror_w) |
| 113 | | AM_RANGE(0xffc00000, 0xffffffff) AM_RAM |
| 114 | | |
| 115 | | AM_IMPORT_FROM(hp9k3xx_common) |
| 116 | | ADDRESS_MAP_END |
| 117 | | |
| 118 | | UINT32 hp9k3xx_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 119 | | { |
| 120 | | return 0; |
| 121 | | } |
| 122 | | |
| 123 | | /* Input ports */ |
| 124 | | static INPUT_PORTS_START( hp9k330 ) |
| 125 | | INPUT_PORTS_END |
| 126 | | |
| 127 | | |
| 128 | | void hp9k3xx_state::machine_reset() |
| 129 | | { |
| 130 | | } |
| 131 | | |
| 132 | | READ32_MEMBER(hp9k3xx_state::buserror_r) |
| 133 | | { |
| 134 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); |
| 135 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); |
| 136 | | return 0; |
| 137 | | } |
| 138 | | |
| 139 | | WRITE32_MEMBER(hp9k3xx_state::buserror_w) |
| 140 | | { |
| 141 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); |
| 142 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); |
| 143 | | } |
| 144 | | |
| 145 | | static MACHINE_CONFIG_START( hp9k320, hp9k3xx_state ) |
| 146 | | /* basic machine hardware */ |
| 147 | | MCFG_CPU_ADD(MAINCPU_TAG, M68020, 16670000) |
| 148 | | MCFG_CPU_PROGRAM_MAP(hp9k320_map) |
| 149 | | |
| 150 | | MCFG_DEVICE_ADD(PTM6840_TAG, PTM6840, 0) |
| 151 | | MCFG_PTM6840_INTERNAL_CLOCK(250000.0f) // from oscillator module next to the 6840 |
| 152 | | MCFG_PTM6840_EXTERNAL_CLOCKS(250000.0f, 250000.0f, 250000.0f) |
| 153 | | |
| 154 | | MCFG_SCREEN_ADD( "screen", RASTER) |
| 155 | | MCFG_SCREEN_UPDATE_DRIVER(hp9k3xx_state, hp98544_update) |
| 156 | | MCFG_SCREEN_SIZE(1024,768) |
| 157 | | MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 768-1) |
| 158 | | MCFG_SCREEN_REFRESH_RATE(70) |
| 159 | | MACHINE_CONFIG_END |
| 160 | | |
| 161 | | static MACHINE_CONFIG_START( hp9k330, hp9k3xx_state ) |
| 162 | | /* basic machine hardware */ |
| 163 | | MCFG_CPU_ADD(MAINCPU_TAG, M68020PMMU, 16670000) |
| 164 | | MCFG_CPU_PROGRAM_MAP(hp9k330_map) |
| 165 | | |
| 166 | | MCFG_DEVICE_ADD(PTM6840_TAG, PTM6840, 0) |
| 167 | | MCFG_PTM6840_INTERNAL_CLOCK(250000.0f) // from oscillator module next to the 6840 |
| 168 | | MCFG_PTM6840_EXTERNAL_CLOCKS(250000.0f, 250000.0f, 250000.0f) |
| 169 | | |
| 170 | | MCFG_SCREEN_ADD( "screen", RASTER) |
| 171 | | MCFG_SCREEN_UPDATE_DRIVER(hp9k3xx_state, hp98544_update) |
| 172 | | MCFG_SCREEN_SIZE(1024,768) |
| 173 | | MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 768-1) |
| 174 | | MCFG_SCREEN_REFRESH_RATE(70) |
| 175 | | MACHINE_CONFIG_END |
| 176 | | |
| 177 | | ROM_START( hp9k320 ) |
| 178 | | ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) |
| 179 | | ROM_LOAD16_BYTE( "5061-6538.bin", 0x000001, 0x004000, CRC(d6aafeb1) SHA1(88c6b0b2f504303cbbac0c496c26b85458ac5d63) ) |
| 180 | | ROM_LOAD16_BYTE( "5061-6539.bin", 0x000000, 0x004000, CRC(a7ff104c) SHA1(c640fe68314654716bd41b04c6a7f4e560036c7e) ) |
| 181 | | ROM_LOAD16_BYTE( "5061-6540.bin", 0x008001, 0x004000, CRC(4f6796d6) SHA1(fd254897ac1afb8628f40ea93213f60a082c8d36) ) |
| 182 | | ROM_LOAD16_BYTE( "5061-6541.bin", 0x008000, 0x004000, CRC(39d32998) SHA1(6de1bda75187b0878c03c074942b807cf2924f0e) ) |
| 183 | | |
| 184 | | ROM_REGION( 0x4000, "graphics", ROMREGION_ERASEFF | ROMREGION_BE | ROMREGION_32BIT ) |
| 185 | | ROM_LOAD16_BYTE( "98544_1818-1999.bin", 0x000001, 0x002000, CRC(8c7d6480) SHA1(d2bcfd39452c38bc652df39f84c7041cfdf6bd51) ) |
| 186 | | ROM_END |
| 187 | | |
| 188 | | ROM_START( hp9k330 ) |
| 189 | | ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) |
| 190 | | ROM_LOAD16_BYTE( "1818-4416.bin", 0x000000, 0x010000, CRC(cd71e85e) SHA1(3e83a80682f733417fdc3720410e45a2cfdcf869) ) |
| 191 | | ROM_LOAD16_BYTE( "1818-4417.bin", 0x000001, 0x010000, CRC(374d49db) SHA1(a12cbf6c151e2f421da4571000b5dffa3ef403b3) ) |
| 192 | | |
| 193 | | ROM_REGION( 0x4000, "graphics", ROMREGION_ERASEFF | ROMREGION_BE | ROMREGION_32BIT ) |
| 194 | | ROM_LOAD16_BYTE( "98544_1818-1999.bin", 0x000001, 0x002000, CRC(8c7d6480) SHA1(d2bcfd39452c38bc652df39f84c7041cfdf6bd51) ) |
| 195 | | ROM_END |
| 196 | | |
| 197 | | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */ |
| 198 | | COMP( 1985, hp9k320, 0, 0, hp9k320, hp9k330, driver_device, 0, "Hewlett-Packard", "HP9000/320", GAME_NOT_WORKING | GAME_NO_SOUND) |
| 199 | | COMP( 1987, hp9k330, 0, 0, hp9k330, hp9k330, driver_device, 0, "Hewlett-Packard", "HP9000/330", GAME_NOT_WORKING | GAME_NO_SOUND) |