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r33830 Thursday 11th December, 2014 at 17:53:32 UTC by Sergey Svishchev
various whitespace and comments fixes (nw)
[hash]gamate.xml vsmile_cart.xml
[src/emu/bus/ieee488]c2040fdc.c c8050fdc.c c8050fdc.h
[src/emu/bus/isa]cga.c num9rev.c
[src/emu/bus/pc_kbd]ec1841.c ec1841.h
[src/emu/bus/wangpc]tig.c
[src/emu/cpu]cpu.mak
[src/emu/cpu/arcompact]arcompactdasm.c arcompactdasm_dispatch.c arcompactdasm_dispatch.h arcompactdasm_ops.c arcompactdasm_ops.h
[src/emu/machine]machine.mak r10696.c r10696.h
[src/emu/video]upd7220.c upd7220.h
[src/lib]lib.mak
[src/lib/formats]d64_dsk.h d80_dsk.c dcp_dsk.c dcp_dsk.h dip_dsk.c dip_dsk.h fdd_dsk.c fdd_dsk.h nfd_dsk.c nfd_dsk.h pc98_dsk.c
[src/mame]mame.mak
[src/mame/drivers]gts1.c viper.c
[src/mame/layout]gts1.lay
[src/mess/drivers]a5105.c apc.c asst128.c compis.c dmv.c ec184x.c excali64.c if800.c iskr103x.c leapster.c mc1502.c mz3500.c mz6500.c pc9801.c qx10.c vt240.c
[src/mess/includes]compis.h genpc.h mc1502.h mikromik.h victor9k.h
[src/mess/machine]victor9kb.c victor9kb.h
[src/mess/video]mikromik.c

trunk/hash/gamate.xml
r242341r242342
33
44<!--
55Undumped carts, based on Wikipedia list
6C1010 - Bump N' Run (Unreleased?)
6C1010 - Bump N' Run
77C1016 - Volcano Panic
8C1020 - Bad Bud Chou Chu's Adventure (Unreleased?)
9C1025 - Jackpot (Unreleased?)
10C1030 - Beach Volleyball (Unreleased?)
8C1020 - Bad Bud Chou Chu's Adventure
9C1025 - Jackpot
10C1030 - Beach Volleyball
1111C1033 - Fist of Thunder
12C1034 - Superboy (Unreleased?)
12C1034 - Superboy
1313C1036 - Jewelriss
14C1038 - Mars Voyage (Unreleased?)
15C1039 - Column #5 (Unreleased?)
16C1040 - ??
14C1038 - Mars Voyage
15C1039 - Fortress of Fierceness
16C1040 - Incantational Couple
1717C1041 - Mighty Boxer
1818C1042 - Flying Goblin
1919C1045 - World Cup Soccer
r242341r242342
2121C1047 - Fortune 'n Luck
2222C1048 - Baseball (or Super Baseball)
2323C1049 - Punk Boy
24C1050 - Fortress of Fierceness
25C1051 - Incantational Couple
26C1052 - Famous 7
24C1050 - Fortress of Fierceness II
25C1051 - ??
26C1052 - Famous
2727C1053 - Metamorphosiser
2828C1055 - ??
2929C1056 - GP Race
trunk/hash/vsmile_cart.xml
r242341r242342
714714      </part>
715715   </software>
716716
717   <software name="redhood" supported="no">
718      <description>Entdecke die Welt von Rotkäppchen (Ger)</description>
719      <year>200?</year>
720      <publisher>VTech</publisher>
721      <part name="cart" interface="vsmile_cart">
722         <dataarea name="rom" size="8388608">
723            <rom name="52-92024.bin" size="8388608" crc="cdeb71f9" sha1="21d2ecf5bc22fa94a1015de6f670415b6d42a3b1" offset="0" />
724         </dataarea>
725      </part>
726   </software>
727
728717   <software name="alphaprk" supported="no">
729718      <description>Alphabet Park Adventure (USA)</description>
730719      <year>200?</year>
r242341r242342
769758      </part>
770759   </software>
771760
772   <software name="barney" supported="no">
773      <description>Barney - Erlebnis-Reise (Ger)</description>
774      <year>200?</year>
775      <publisher>VTech</publisher>
776      <part name="cart" interface="vsmile_cart">
777         <dataarea name="rom" size="8388608">
778            <rom name="52-92384.bin" size="8388608" crc="a73855fa" sha1="dcc61ecf05bb41779a78196145136c1e9cbfa415" offset="0" />
779         </dataarea>
780      </part>
781   </software>
782
783761<!-- loads if mapped as Batman TV -->
784762   <software name="bobbday" supported="no">
785763      <description>Bob the Builder - Bob's Busy Day (USA)</description>
r242341r242342
926904      </part>
927905   </software>
928906
929   <software name="elmo" supported="no">
930      <description>Elmos großes Abenteuer (Ger)</description>
931      <year>200?</year>
932      <publisher>VTech</publisher>
933      <part name="cart" interface="vsmile_cart">
934         <dataarea name="rom" size="8388608">
935            <rom name="52-92264.bin" size="8388608" crc="906b6496" sha1="8932008fef144d2ad3d056fd24f64264825af8ce" offset="0" />
936         </dataarea>
937      </part>
938   </software>
939
940907   <software name="footschl" supported="no">
941908      <description>Fußball Schule (Ger)</description>
942909      <year>200?</year>
r242341r242342
11021069      </part>
11031070   </software>
11041071
1105   <software name="scoobydog" cloneof="scoobydo" supported="no">
1106      <description>Scooby-Doo! - Im Lernpark (Ger)</description>
1107      <year>200?</year>
1108      <publisher>VTech</publisher>
1109      <part name="cart" interface="vsmile_cart">
1110         <dataarea name="rom" size="8388608">
1111            <rom name="52-92164.bin" size="8388608" crc="97576369" sha1="81d84286a09068d54a4d1051040187a1b89c9d42" offset="0" />
1112         </dataarea>
1113      </part>
1114   </software>
1115
11161072   <software name="scoobydodk" cloneof="scoobydo" supported="no">
11171073      <description>Scooby-Doo! - Sjov i forlystelsesparken (Den)</description>
11181074      <year>200?</year>
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11351091      </part>
11361092   </software>
11371093
1138   <software name="erniebrt" supported="no">
1139      <description>Sesamestrasse - Ernies + Berts Fantastisches Abenteuer (Ger)</description>
1140      <year>2006?</year>
1141      <publisher>VTech</publisher>
1142      <part name="cart" interface="vsmile_cart">
1143         <dataarea name="rom" size="8388608">
1144            <rom name="52-92464.bin" size="8388608" crc="064c620c" sha1="d44e8a5507f18e544de707cae4b9a7d309c56fdf" offset="0" />
1145         </dataarea>
1146      </part>
1147   </software>
1148
11491094   <software name="shrek3" supported="no">
11501095      <description>Shrek The Third - Arthur's School Day Adventure (USA)</description>
11511096      <year>200?</year>
r242341r242342
11681113      </part>
11691114   </software>
11701115
1171   <software name="spidermn" supported="no">
1172      <description>Spider-Man &amp; Freunde - Wettkampf im Space-Labor (Ger)</description>
1173      <year>200?</year>
1174      <publisher>VTech</publisher>
1175      <part name="cart" interface="vsmile_cart">
1176         <dataarea name="rom" size="8388608">
1177            <rom name="52-92524.bin" size="8388608" crc="eb9e2303" sha1="07ee3fba4e850487c365fd883ac1fb53a25d0028" offset="0" />
1178         </dataarea>
1179      </part>
1180   </software>
1181
11821116   <software name="spongeb" supported="no">
11831117      <description>Spongebob Squarepants - A Day in the Life of a Sponge (USA)</description>
11841118      <year>200?</year>
trunk/src/emu/bus/ieee488/c2040fdc.c
r242341r242342
427427
428428   UINT8 data = (BIT(e, 6) << 7) | (BIT(i, 7) << 6) | (e & 0x33) | (BIT(e, 2) << 3) | (i & 0x04);
429429
430   if (LOG) logerror("%s %s VIA reads data %02x (%03x)\n", machine().time().as_string(), machine().describe_context(), data, checkpoint_live.shift_reg);
430   if (LOG) logerror("%s VIA reads data %02x (%03x)\n", machine().time().as_string(), data, checkpoint_live.shift_reg);
431431
432432   return data;
433433}
r242341r242342
439439      live_sync();
440440      m_pi = cur_live.pi = data;
441441      checkpoint();
442      if (LOG) logerror("%s %s PI %02x\n", machine().time().as_string(), machine().describe_context(), data);
442      if (LOG) logerror("%s PI %02x\n", machine().time().as_string(), data);
443443      live_run();
444444   }
445445}
r242341r242342
451451      live_sync();
452452      m_drv_sel = cur_live.drv_sel = state;
453453      checkpoint();
454      if (LOG) logerror("%s %s DRV SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
454      if (LOG) logerror("%s DRV SEL %u\n", machine().time().as_string(), state);
455455      live_run();
456456   }
457457}
r242341r242342
463463      live_sync();
464464      m_mode_sel = cur_live.mode_sel = state;
465465      checkpoint();
466      if (LOG) logerror("%s %s MODE SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
466      if (LOG) logerror("%s MODE SEL %u\n", machine().time().as_string(), state);
467467      live_run();
468468   }
469469}
r242341r242342
475475      live_sync();
476476      m_rw_sel = cur_live.rw_sel = state;
477477      checkpoint();
478      if (LOG) logerror("%s %s RW SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
478      if (LOG) logerror("%s RW SEL %u\n", machine().time().as_string(), state);
479479      if (m_rw_sel) {
480480         stop_writing(machine().time());
481481      } else {
r242341r242342
491491   {
492492      live_sync();
493493      m_mtr0 = state;
494      if (LOG) logerror("%s %s MTR0 %u\n", machine().time().as_string(), machine().describe_context(), state);
494      if (LOG) logerror("%s MTR0 %u\n", machine().time().as_string(), state);
495495      m_floppy0->mon_w(state);
496496      checkpoint();
497497
r242341r242342
513513   {
514514      live_sync();
515515      m_mtr1 = state;
516      if (LOG) logerror("%s %s MTR1 %u\n", machine().time().as_string(), machine().describe_context(), state);
516      if (LOG) logerror("%s MTR1 %u\n", machine().time().as_string(), state);
517517      if (m_floppy1) m_floppy1->mon_w(state);
518518      checkpoint();
519519
r242341r242342
587587   {
588588      live_sync();
589589      m_ds = cur_live.ds = ds;
590      if (LOG) logerror("%s %s DS %u\n", machine().time().as_string(), machine().describe_context(), ds);
591590      checkpoint();
592591      live_run();
593592   }
trunk/src/emu/bus/ieee488/c8050fdc.c
r242341r242342
1717//  MACROS / CONSTANTS
1818//**************************************************************************
1919
20#define LOG 1
20#define LOG 0
2121
22#define GCR_DECODE(_e, _i) \
23    ((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
2422
25#define GCR_ENCODE(_e, _i) \
26    ((_e & 0xc0) << 2 | (_i & 0x80) | (_e & 0x3c) << 1 | (_i & 0x04) | (_e & 0x03))
2723
28
29
3024//**************************************************************************
3125//  DEVICE DEFINITIONS
3226//**************************************************************************
r242341r242342
7872   m_ds(0),
7973   m_drv_sel(0),
8074   m_mode_sel(0),
81   m_rw_sel(0)
75   m_rw_sel(0),
76   m_period(attotime::from_hz(clock))
8277{
8378   cur_live.tm = attotime::never;
8479   cur_live.state = IDLE;
r242341r242342
174169   if (m_stp0 != stp)
175170   {
176171      live_sync();
177      stp_w(m_floppy0, m_mtr0, m_stp0, stp);
172      this->stp_w(m_floppy0, m_mtr0, m_stp0, stp);
178173      checkpoint();
179174      live_run();
180175   }
r242341r242342
185180   if (m_stp1 != stp)
186181   {
187182      live_sync();
188      if (m_floppy1) stp_w(m_floppy1, m_mtr1, m_stp1, stp);
183      if (m_floppy1) this->stp_w(m_floppy1, m_mtr1, m_stp1, stp);
189184      checkpoint();
190185      live_run();
191186   }
r242341r242342
197192   {
198193      live_sync();
199194      m_ds = cur_live.ds = ds;
200      pll_reset(cur_live.tm, attotime::from_hz(clock() / (16 - m_ds)));
201195      checkpoint();
202196      live_run();
203197   }
r242341r242342
226220   cur_live.rw_sel = m_rw_sel;
227221   cur_live.pi = m_pi;
228222
229   pll_reset(cur_live.tm, attotime::from_hz(clock() / (16 - m_ds)));
223   pll_reset(cur_live.tm, attotime::from_double(0));
230224   checkpoint_live = cur_live;
231225   pll_save_checkpoint();
232226
r242341r242342
287281   pll_retrieve_checkpoint();
288282}
289283
290void c8050_fdc_t::live_delay(int state)
291{
292   cur_live.next_state = state;
293   if(cur_live.tm != machine().time())
294      t_gen->adjust(cur_live.tm - machine().time());
295   else
296      live_sync();
297}
298
299284void c8050_fdc_t::live_sync()
300285{
301286   if(!cur_live.tm.is_never()) {
r242341r242342
337322   cur_live.error = 1;
338323}
339324
325
340326void c8050_fdc_t::live_run(const attotime &limit)
341327{
342328   if(cur_live.state == IDLE || cur_live.next_state != -1)
r242341r242342
354340         if(bit < 0)
355341            return;
356342
357         cur_live.shift_reg <<= 1;
358         cur_live.shift_reg |= bit;
359         cur_live.shift_reg &= 0x3ff;
360
361         // sync
362         int sync = !((cur_live.shift_reg == 0x3ff) && cur_live.rw_sel);
363
364         // bit counter
365         if (cur_live.rw_sel) {
366            if (!sync) {
367               cur_live.bit_counter = 0;
368            } else if (cur_live.sync) {
369               cur_live.bit_counter++;
370               if (cur_live.bit_counter == 10) {
371                  cur_live.bit_counter = 0;
372               }
373            }
374         } else {
375            cur_live.bit_counter++;
376            if (cur_live.bit_counter == 10) {
377               cur_live.bit_counter = 0;
378            }
379         }
380
381         // GCR decoder
382         if (cur_live.rw_sel) {
383            cur_live.i = cur_live.shift_reg;
384         } else {
385            cur_live.i = ((cur_live.pi & 0xf0) << 1) | (cur_live.mode_sel << 4) | (cur_live.pi & 0x0f);
386         }
387
388         cur_live.e = m_gcr_rom->base()[cur_live.rw_sel << 10 | cur_live.i];
389
390         if (LOG) logerror("%s cyl %u bit %u sync %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.i,cur_live.e);
391
392         // byte ready
393         int ready = !(cur_live.bit_counter == 9);
394
395         // GCR error
396         int error = !(ready || BIT(cur_live.e, 3));
397
398         // write bit
399         if (!cur_live.rw_sel) { // TODO WPS
400            int write_bit = BIT(cur_live.shift_reg_write, 9);
401            if (LOG) logerror("%s writing bit %u sr %03x\n",cur_live.tm.as_string(),write_bit,cur_live.shift_reg_write);
402            pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit);
403         }
404
405         if (!ready) {
406            // load write shift register
407            cur_live.shift_reg_write = GCR_ENCODE(cur_live.e, cur_live.i);
408
409            if (LOG) logerror("%s load write shift register %03x\n",cur_live.tm.as_string(),cur_live.shift_reg_write);
410         } else {
411            // clock write shift register
412            cur_live.shift_reg_write <<= 1;
413            cur_live.shift_reg_write &= 0x3ff;
414         }
415
416         if (ready != cur_live.ready) {
417            if (LOG) logerror("%s READY %u : %02x\n", cur_live.tm.as_string(),ready,GCR_DECODE(cur_live.e, cur_live.i));
418            cur_live.ready = ready;
419            syncpoint = true;
420         }
421
422         if (sync != cur_live.sync) {
423            if (LOG) logerror("%s SYNC %u\n", cur_live.tm.as_string(),sync);
424            cur_live.sync = sync;
425            syncpoint = true;
426         }
427
428         if (error != cur_live.error) {
429            if (LOG) logerror("%s ERROR %u\n", cur_live.tm.as_string(),error);
430            cur_live.error = error;
431            syncpoint = true;
432         }
433
434343         if (syncpoint) {
435344            live_delay(RUNNING_SYNCPOINT);
436345            return;
r242341r242342
458367
459368   UINT8 data = (BIT(e, 6) << 7) | (BIT(i, 7) << 6) | (e & 0x33) | (BIT(e, 2) << 3) | (i & 0x04);
460369
461   if (LOG) logerror("%s %s VIA reads data %02x (%03x)\n", machine().time().as_string(), machine().describe_context(), data, checkpoint_live.shift_reg);
370   if (LOG) logerror("%s VIA reads data %02x (%03x)\n", machine().time().as_string(), data, checkpoint_live.shift_reg);
462371
463372   return data;
464373}
r242341r242342
470379      live_sync();
471380      m_pi = cur_live.pi = data;
472381      checkpoint();
473      if (LOG) logerror("%s %s PI %02x\n", machine().time().as_string(), machine().describe_context(), data);
382      if (LOG) logerror("%s PI %02x\n", machine().time().as_string(), data);
474383      live_run();
475384   }
476385}
r242341r242342
482391      live_sync();
483392      m_drv_sel = cur_live.drv_sel = state;
484393      checkpoint();
485      if (LOG) logerror("%s %s DRV SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
394      if (LOG) logerror("%s DRV SEL %u\n", machine().time().as_string(), state);
486395      live_run();
487396   }
488397}
r242341r242342
494403      live_sync();
495404      m_mode_sel = cur_live.mode_sel = state;
496405      checkpoint();
497      if (LOG) logerror("%s %s MODE SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
406      if (LOG) logerror("%s MODE SEL %u\n", machine().time().as_string(), state);
498407      live_run();
499408   }
500409}
r242341r242342
506415      live_sync();
507416      m_rw_sel = cur_live.rw_sel = state;
508417      checkpoint();
509      if (LOG) logerror("%s %s RW SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
418      if (LOG) logerror("%s RW SEL %u\n", machine().time().as_string(), state);
510419      if (m_rw_sel) {
511420         pll_stop_writing(get_floppy(), machine().time());
512421      } else {
r242341r242342
522431   {
523432      live_sync();
524433      m_mtr0 = state;
525      if (LOG) logerror("%s %s MTR0 %u\n", machine().time().as_string(), machine().describe_context(), state);
434      if (LOG) logerror("%s MTR0 %u\n", machine().time().as_string(), state);
526435      m_floppy0->mon_w(state);
527436      checkpoint();
528437
r242341r242342
544453   {
545454      live_sync();
546455      m_mtr1 = state;
547      if (LOG) logerror("%s %s MTR1 %u\n", machine().time().as_string(), machine().describe_context(), state);
456      if (LOG) logerror("%s MTR1 %u\n", machine().time().as_string(), state);
548457      if (m_floppy1) m_floppy1->mon_w(state);
549458      checkpoint();
550459
r242341r242342
566475   {
567476      live_sync();
568477      m_odd_hd = cur_live.odd_hd = state;
569      if (LOG) logerror("%s %s ODD HD %u\n", machine().time().as_string(), machine().describe_context(), state);
478      if (LOG) logerror("%s ODD HD %u\n", machine().time().as_string(), state);
570479      m_floppy0->ss_w(!state);
571480      if (m_floppy1) m_floppy1->ss_w(!state);
572481      checkpoint();
r242341r242342
577486WRITE_LINE_MEMBER( c8050_fdc_t::pull_sync_w )
578487{
579488   // TODO
580   if (LOG) logerror("%s %s PULL SYNC %u\n", machine().time().as_string(), machine().describe_context(), state);
489   if (LOG) logerror("%s PULL SYNC %u\n", machine().time().as_string(), state);
581490}
trunk/src/emu/bus/ieee488/c8050fdc.h
r242341r242342
6565   DECLARE_WRITE_LINE_MEMBER( pull_sync_w );
6666
6767   DECLARE_READ_LINE_MEMBER( wps_r ) { return checkpoint_live.drv_sel ? m_floppy1->wpt_r() : m_floppy0->wpt_r(); }
68   DECLARE_READ_LINE_MEMBER( sync_r ) { return checkpoint_live.sync; }
6869
6970   void stp0_w(int stp);
7071   void stp1_w(int stp);
r242341r242342
133134   int m_odd_hd;
134135   UINT8 m_pi;
135136
137   attotime m_period;
138
136139   live_info cur_live, checkpoint_live;
137140   fdc_pll_t cur_pll, checkpoint_pll;
138141   emu_timer *t_gen;
trunk/src/emu/bus/isa/cga.c
r242341r242342
513513   const rgb_t *palette = m_palette->palette()->entry_list_raw();
514514   int i;
515515
516   if ( y == 0 ) CGA_LOG(1,"cga_text_inten_update_row",("\n"));
516   if ( y == 0 ) CGA_LOG(1,"cga_text_inten_comp_grey_update_row",("\n"));
517517   for ( i = 0; i < x_count; i++ )
518518   {
519519      UINT16 offset = ( ( ma + i ) << 1 ) & 0x3fff;
r242341r242342
632632   const rgb_t *palette = m_palette->palette()->entry_list_raw();
633633   int i;
634634
635   if ( y == 0 ) CGA_LOG(1,"cga_text_blink_update_row",("\n"));
635   if ( y == 0 ) CGA_LOG(1,"cga_text_blink_update_row_si",("\n"));
636636   for ( i = 0; i < x_count; i++ )
637637   {
638638      UINT16 offset = ( ( ma + i ) << 1 ) & 0x3fff;
trunk/src/emu/bus/isa/num9rev.c
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1111
1212const device_type ISA8_NUM_9_REV = &device_creator<isa8_number_9_rev_device>;
1313
14static ADDRESS_MAP_START( upd7220_map, AS_0, 16, isa8_number_9_rev_device )
14static ADDRESS_MAP_START( upd7220_map, AS_0, 8, isa8_number_9_rev_device )
1515   AM_RANGE(0x00000, 0x3ffff) AM_NOP
1616ADDRESS_MAP_END
1717
r242341r242342
2222   {
2323      rgb_t color(0);
2424      UINT16 overlay;
25      if(((address << 3) + 0xc0016) > (1024*1024))
25      if(((address << 3) + 0xc0008) > (1024*1024))
2626         return;
27      for(int i = 0; i < 16; i++)
27      for(int i = 0; i < 8; i++)
2828      {
2929         UINT32 addr = (address << 3) + i;
3030         overlay = m_ram[addr + 0xc0000] << 1;
r242341r242342
3737   }
3838   else
3939   {
40      if(((address << 3) + 16) > (1024*1024))
40      if(((address << 3) + 8) > (1024*1024))
4141         return;
42      for(int i = 0; i < 16; i++)
43         bitmap.pix32(y, x + i) = pal->entry_color(m_ram[(address << 4) + i]);
42      for(int i = 0; i < 8; i++)
43         bitmap.pix32(y, x + i) = pal->entry_color(m_ram[(address << 3) + i]);
4444   }
4545}
4646
trunk/src/emu/bus/pc_kbd/ec1841.c
r242341r242342
4848
4949ROM_START( ec_1841_keyboard )
5050   ROM_REGION( 0x400, I8048_TAG, 0 )
51   // XXX add P/N etc
5251   ROM_LOAD( "1816be48.bin", 0x000, 0x400, CRC(e9abfe44) SHA1(1db430c72c2d007ea0b8ae2514ff15c96baba308) )
5352ROM_END
5453
trunk/src/emu/bus/pc_kbd/ec1841.h
r242341r242342
1515#include "emu.h"
1616#include "cpu/mcs48/mcs48.h"
1717#include "pc_kbdc.h"
18#include "machine/rescap.h"
1918
2019
2120
r242341r242342
8180// device type definition
8281extern const device_type PC_KBD_EC_1841;
8382
84
85
8683#endif
trunk/src/emu/bus/wangpc/tig.c
r242341r242342
8383//  UPD7220_INTERFACE( hgdc0_intf )
8484//-------------------------------------------------
8585
86static ADDRESS_MAP_START( upd7220_0_map, AS_0, 16, wangpc_tig_device )
86static ADDRESS_MAP_START( upd7220_0_map, AS_0, 8, wangpc_tig_device )
8787   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
8888   AM_RANGE(0x0000, 0x0fff) AM_MIRROR(0x1000) AM_RAM // frame buffer
8989   AM_RANGE(0x4000, 0x7fff) AM_RAM // font memory
r242341r242342
9898//  UPD7220_INTERFACE( hgdc1_intf )
9999//-------------------------------------------------
100100
101static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, wangpc_tig_device )
101static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, wangpc_tig_device )
102102   ADDRESS_MAP_GLOBAL_MASK(0xffff)
103103   AM_RANGE(0x0000, 0xffff) AM_RAM // graphics memory
104104ADDRESS_MAP_END
trunk/src/emu/cpu/arcompact/arcompactdasm.c
r242341r242342
77#include "emu.h"
88#include <stdarg.h>
99
10#include "arcompactdasm_dispatch.h"
11#include "arcompactdasm_ops.h"
10static char *output;
1211
12static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
13{
14   va_list vl;
1315
16   va_start(vl, fmt);
17   vsprintf(output, fmt, vl);
18   va_end(vl);
19}
20
1421/*****************************************************************************/
1522
1623
1724
1825/*****************************************************************************/
1926
27#define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom
28#define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom
29#define DASM_PARAMS output, pc, op, oprom
2030
31#define LIMM_REG 62
32
33#define GET_LIMM_32 \
34   limm = oprom[6] | (oprom[7] << 8); \
35   limm |= (oprom[4] << 16) | (oprom[5] << 24); \
36
37int arcompact_handle04_00_dasm(DASM_OPS_32);
38int arcompact_handle04_01_dasm(DASM_OPS_32);
39int arcompact_handle04_02_dasm(DASM_OPS_32);
40int arcompact_handle04_03_dasm(DASM_OPS_32);
41int arcompact_handle04_04_dasm(DASM_OPS_32);
42int arcompact_handle04_05_dasm(DASM_OPS_32);
43int arcompact_handle04_06_dasm(DASM_OPS_32);
44int arcompact_handle04_07_dasm(DASM_OPS_32);
45int arcompact_handle04_08_dasm(DASM_OPS_32);
46int arcompact_handle04_09_dasm(DASM_OPS_32);
47int arcompact_handle04_0a_dasm(DASM_OPS_32);
48int arcompact_handle04_0b_dasm(DASM_OPS_32);
49int arcompact_handle04_0c_dasm(DASM_OPS_32);
50int arcompact_handle04_0d_dasm(DASM_OPS_32);
51int arcompact_handle04_0e_dasm(DASM_OPS_32);
52int arcompact_handle04_0f_dasm(DASM_OPS_32);
53int arcompact_handle04_10_dasm(DASM_OPS_32);
54int arcompact_handle04_11_dasm(DASM_OPS_32);
55int arcompact_handle04_12_dasm(DASM_OPS_32);
56int arcompact_handle04_13_dasm(DASM_OPS_32);
57int arcompact_handle04_14_dasm(DASM_OPS_32);
58int arcompact_handle04_15_dasm(DASM_OPS_32);
59int arcompact_handle04_16_dasm(DASM_OPS_32);
60int arcompact_handle04_17_dasm(DASM_OPS_32);
61int arcompact_handle04_18_dasm(DASM_OPS_32);
62int arcompact_handle04_19_dasm(DASM_OPS_32);
63int arcompact_handle04_1a_dasm(DASM_OPS_32);
64int arcompact_handle04_1b_dasm(DASM_OPS_32);
65int arcompact_handle04_1c_dasm(DASM_OPS_32);
66int arcompact_handle04_1d_dasm(DASM_OPS_32);
67int arcompact_handle04_1e_dasm(DASM_OPS_32);
68int arcompact_handle04_1f_dasm(DASM_OPS_32);
69int arcompact_handle04_20_dasm(DASM_OPS_32);
70int arcompact_handle04_21_dasm(DASM_OPS_32);
71int arcompact_handle04_22_dasm(DASM_OPS_32);
72int arcompact_handle04_23_dasm(DASM_OPS_32);
73int arcompact_handle04_24_dasm(DASM_OPS_32);
74int arcompact_handle04_25_dasm(DASM_OPS_32);
75int arcompact_handle04_26_dasm(DASM_OPS_32);
76int arcompact_handle04_27_dasm(DASM_OPS_32);
77int arcompact_handle04_28_dasm(DASM_OPS_32);
78int arcompact_handle04_29_dasm(DASM_OPS_32);
79int arcompact_handle04_2a_dasm(DASM_OPS_32);
80int arcompact_handle04_2b_dasm(DASM_OPS_32);
81int arcompact_handle04_2c_dasm(DASM_OPS_32);
82int arcompact_handle04_2d_dasm(DASM_OPS_32);
83int arcompact_handle04_2e_dasm(DASM_OPS_32);
84int arcompact_handle04_2f_dasm(DASM_OPS_32);
85int arcompact_handle04_30_dasm(DASM_OPS_32);
86int arcompact_handle04_31_dasm(DASM_OPS_32);
87int arcompact_handle04_32_dasm(DASM_OPS_32);
88int arcompact_handle04_33_dasm(DASM_OPS_32);
89int arcompact_handle04_34_dasm(DASM_OPS_32);
90int arcompact_handle04_35_dasm(DASM_OPS_32);
91int arcompact_handle04_36_dasm(DASM_OPS_32);
92int arcompact_handle04_37_dasm(DASM_OPS_32);
93int arcompact_handle04_38_dasm(DASM_OPS_32);
94int arcompact_handle04_39_dasm(DASM_OPS_32);
95int arcompact_handle04_3a_dasm(DASM_OPS_32);
96int arcompact_handle04_3b_dasm(DASM_OPS_32);
97int arcompact_handle04_3c_dasm(DASM_OPS_32);
98int arcompact_handle04_3d_dasm(DASM_OPS_32);
99int arcompact_handle04_3e_dasm(DASM_OPS_32);
100int arcompact_handle04_3f_dasm(DASM_OPS_32);
101
102int arcompact_handle04_2f_00_dasm(DASM_OPS_32);
103int arcompact_handle04_2f_01_dasm(DASM_OPS_32);
104int arcompact_handle04_2f_02_dasm(DASM_OPS_32);
105int arcompact_handle04_2f_03_dasm(DASM_OPS_32);
106int arcompact_handle04_2f_04_dasm(DASM_OPS_32);
107int arcompact_handle04_2f_05_dasm(DASM_OPS_32);
108int arcompact_handle04_2f_06_dasm(DASM_OPS_32);
109int arcompact_handle04_2f_07_dasm(DASM_OPS_32);
110int arcompact_handle04_2f_08_dasm(DASM_OPS_32);
111int arcompact_handle04_2f_09_dasm(DASM_OPS_32);
112int arcompact_handle04_2f_0a_dasm(DASM_OPS_32);
113int arcompact_handle04_2f_0b_dasm(DASM_OPS_32);
114int arcompact_handle04_2f_0c_dasm(DASM_OPS_32);
115int arcompact_handle04_2f_0d_dasm(DASM_OPS_32);
116int arcompact_handle04_2f_0e_dasm(DASM_OPS_32);
117int arcompact_handle04_2f_0f_dasm(DASM_OPS_32);
118int arcompact_handle04_2f_10_dasm(DASM_OPS_32);
119int arcompact_handle04_2f_11_dasm(DASM_OPS_32);
120int arcompact_handle04_2f_12_dasm(DASM_OPS_32);
121int arcompact_handle04_2f_13_dasm(DASM_OPS_32);
122int arcompact_handle04_2f_14_dasm(DASM_OPS_32);
123int arcompact_handle04_2f_15_dasm(DASM_OPS_32);
124int arcompact_handle04_2f_16_dasm(DASM_OPS_32);
125int arcompact_handle04_2f_17_dasm(DASM_OPS_32);
126int arcompact_handle04_2f_18_dasm(DASM_OPS_32);
127int arcompact_handle04_2f_19_dasm(DASM_OPS_32);
128int arcompact_handle04_2f_1a_dasm(DASM_OPS_32);
129int arcompact_handle04_2f_1b_dasm(DASM_OPS_32);
130int arcompact_handle04_2f_1c_dasm(DASM_OPS_32);
131int arcompact_handle04_2f_1d_dasm(DASM_OPS_32);
132int arcompact_handle04_2f_1e_dasm(DASM_OPS_32);
133int arcompact_handle04_2f_1f_dasm(DASM_OPS_32);
134int arcompact_handle04_2f_20_dasm(DASM_OPS_32);
135int arcompact_handle04_2f_21_dasm(DASM_OPS_32);
136int arcompact_handle04_2f_22_dasm(DASM_OPS_32);
137int arcompact_handle04_2f_23_dasm(DASM_OPS_32);
138int arcompact_handle04_2f_24_dasm(DASM_OPS_32);
139int arcompact_handle04_2f_25_dasm(DASM_OPS_32);
140int arcompact_handle04_2f_26_dasm(DASM_OPS_32);
141int arcompact_handle04_2f_27_dasm(DASM_OPS_32);
142int arcompact_handle04_2f_28_dasm(DASM_OPS_32);
143int arcompact_handle04_2f_29_dasm(DASM_OPS_32);
144int arcompact_handle04_2f_2a_dasm(DASM_OPS_32);
145int arcompact_handle04_2f_2b_dasm(DASM_OPS_32);
146int arcompact_handle04_2f_2c_dasm(DASM_OPS_32);
147int arcompact_handle04_2f_2d_dasm(DASM_OPS_32);
148int arcompact_handle04_2f_2e_dasm(DASM_OPS_32);
149int arcompact_handle04_2f_2f_dasm(DASM_OPS_32);
150int arcompact_handle04_2f_30_dasm(DASM_OPS_32);
151int arcompact_handle04_2f_31_dasm(DASM_OPS_32);
152int arcompact_handle04_2f_32_dasm(DASM_OPS_32);
153int arcompact_handle04_2f_33_dasm(DASM_OPS_32);
154int arcompact_handle04_2f_34_dasm(DASM_OPS_32);
155int arcompact_handle04_2f_35_dasm(DASM_OPS_32);
156int arcompact_handle04_2f_36_dasm(DASM_OPS_32);
157int arcompact_handle04_2f_37_dasm(DASM_OPS_32);
158int arcompact_handle04_2f_38_dasm(DASM_OPS_32);
159int arcompact_handle04_2f_39_dasm(DASM_OPS_32);
160int arcompact_handle04_2f_3a_dasm(DASM_OPS_32);
161int arcompact_handle04_2f_3b_dasm(DASM_OPS_32);
162int arcompact_handle04_2f_3c_dasm(DASM_OPS_32);
163int arcompact_handle04_2f_3d_dasm(DASM_OPS_32);
164int arcompact_handle04_2f_3e_dasm(DASM_OPS_32);
165int arcompact_handle04_2f_3f_dasm(DASM_OPS_32);
166
167int arcompact_handle04_2f_3f_00_dasm(DASM_OPS_32);
168int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32);
169int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32);
170int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32);
171int arcompact_handle04_2f_3f_04_dasm(DASM_OPS_32);
172int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32);
173int arcompact_handle04_2f_3f_06_dasm(DASM_OPS_32);
174int arcompact_handle04_2f_3f_07_dasm(DASM_OPS_32);
175int arcompact_handle04_2f_3f_08_dasm(DASM_OPS_32);
176int arcompact_handle04_2f_3f_09_dasm(DASM_OPS_32);
177int arcompact_handle04_2f_3f_0a_dasm(DASM_OPS_32);
178int arcompact_handle04_2f_3f_0b_dasm(DASM_OPS_32);
179int arcompact_handle04_2f_3f_0c_dasm(DASM_OPS_32);
180int arcompact_handle04_2f_3f_0d_dasm(DASM_OPS_32);
181int arcompact_handle04_2f_3f_0e_dasm(DASM_OPS_32);
182int arcompact_handle04_2f_3f_0f_dasm(DASM_OPS_32);
183int arcompact_handle04_2f_3f_10_dasm(DASM_OPS_32);
184int arcompact_handle04_2f_3f_11_dasm(DASM_OPS_32);
185int arcompact_handle04_2f_3f_12_dasm(DASM_OPS_32);
186int arcompact_handle04_2f_3f_13_dasm(DASM_OPS_32);
187int arcompact_handle04_2f_3f_14_dasm(DASM_OPS_32);
188int arcompact_handle04_2f_3f_15_dasm(DASM_OPS_32);
189int arcompact_handle04_2f_3f_16_dasm(DASM_OPS_32);
190int arcompact_handle04_2f_3f_17_dasm(DASM_OPS_32);
191int arcompact_handle04_2f_3f_18_dasm(DASM_OPS_32);
192int arcompact_handle04_2f_3f_19_dasm(DASM_OPS_32);
193int arcompact_handle04_2f_3f_1a_dasm(DASM_OPS_32);
194int arcompact_handle04_2f_3f_1b_dasm(DASM_OPS_32);
195int arcompact_handle04_2f_3f_1c_dasm(DASM_OPS_32);
196int arcompact_handle04_2f_3f_1d_dasm(DASM_OPS_32);
197int arcompact_handle04_2f_3f_1e_dasm(DASM_OPS_32);
198int arcompact_handle04_2f_3f_1f_dasm(DASM_OPS_32);
199int arcompact_handle04_2f_3f_20_dasm(DASM_OPS_32);
200int arcompact_handle04_2f_3f_21_dasm(DASM_OPS_32);
201int arcompact_handle04_2f_3f_22_dasm(DASM_OPS_32);
202int arcompact_handle04_2f_3f_23_dasm(DASM_OPS_32);
203int arcompact_handle04_2f_3f_24_dasm(DASM_OPS_32);
204int arcompact_handle04_2f_3f_25_dasm(DASM_OPS_32);
205int arcompact_handle04_2f_3f_26_dasm(DASM_OPS_32);
206int arcompact_handle04_2f_3f_27_dasm(DASM_OPS_32);
207int arcompact_handle04_2f_3f_28_dasm(DASM_OPS_32);
208int arcompact_handle04_2f_3f_29_dasm(DASM_OPS_32);
209int arcompact_handle04_2f_3f_2a_dasm(DASM_OPS_32);
210int arcompact_handle04_2f_3f_2b_dasm(DASM_OPS_32);
211int arcompact_handle04_2f_3f_2c_dasm(DASM_OPS_32);
212int arcompact_handle04_2f_3f_2d_dasm(DASM_OPS_32);
213int arcompact_handle04_2f_3f_2e_dasm(DASM_OPS_32);
214int arcompact_handle04_2f_3f_2f_dasm(DASM_OPS_32);
215int arcompact_handle04_2f_3f_30_dasm(DASM_OPS_32);
216int arcompact_handle04_2f_3f_31_dasm(DASM_OPS_32);
217int arcompact_handle04_2f_3f_32_dasm(DASM_OPS_32);
218int arcompact_handle04_2f_3f_33_dasm(DASM_OPS_32);
219int arcompact_handle04_2f_3f_34_dasm(DASM_OPS_32);
220int arcompact_handle04_2f_3f_35_dasm(DASM_OPS_32);
221int arcompact_handle04_2f_3f_36_dasm(DASM_OPS_32);
222int arcompact_handle04_2f_3f_37_dasm(DASM_OPS_32);
223int arcompact_handle04_2f_3f_38_dasm(DASM_OPS_32);
224int arcompact_handle04_2f_3f_39_dasm(DASM_OPS_32);
225int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32);
226int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32);
227int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32);
228int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32);
229int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
230int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32);
231
232int arcompact_handle05_00_dasm(DASM_OPS_32);
233int arcompact_handle05_01_dasm(DASM_OPS_32);
234int arcompact_handle05_02_dasm(DASM_OPS_32);
235int arcompact_handle05_03_dasm(DASM_OPS_32);
236int arcompact_handle05_04_dasm(DASM_OPS_32);
237int arcompact_handle05_05_dasm(DASM_OPS_32);
238int arcompact_handle05_06_dasm(DASM_OPS_32);
239int arcompact_handle05_07_dasm(DASM_OPS_32);
240int arcompact_handle05_08_dasm(DASM_OPS_32);
241int arcompact_handle05_09_dasm(DASM_OPS_32);
242int arcompact_handle05_0a_dasm(DASM_OPS_32);
243int arcompact_handle05_0b_dasm(DASM_OPS_32);
244int arcompact_handle05_0c_dasm(DASM_OPS_32);
245int arcompact_handle05_0d_dasm(DASM_OPS_32);
246int arcompact_handle05_0e_dasm(DASM_OPS_32);
247int arcompact_handle05_0f_dasm(DASM_OPS_32);
248int arcompact_handle05_10_dasm(DASM_OPS_32);
249int arcompact_handle05_11_dasm(DASM_OPS_32);
250int arcompact_handle05_12_dasm(DASM_OPS_32);
251int arcompact_handle05_13_dasm(DASM_OPS_32);
252int arcompact_handle05_14_dasm(DASM_OPS_32);
253int arcompact_handle05_15_dasm(DASM_OPS_32);
254int arcompact_handle05_16_dasm(DASM_OPS_32);
255int arcompact_handle05_17_dasm(DASM_OPS_32);
256int arcompact_handle05_18_dasm(DASM_OPS_32);
257int arcompact_handle05_19_dasm(DASM_OPS_32);
258int arcompact_handle05_1a_dasm(DASM_OPS_32);
259int arcompact_handle05_1b_dasm(DASM_OPS_32);
260int arcompact_handle05_1c_dasm(DASM_OPS_32);
261int arcompact_handle05_1d_dasm(DASM_OPS_32);
262int arcompact_handle05_1e_dasm(DASM_OPS_32);
263int arcompact_handle05_1f_dasm(DASM_OPS_32);
264int arcompact_handle05_20_dasm(DASM_OPS_32);
265int arcompact_handle05_21_dasm(DASM_OPS_32);
266int arcompact_handle05_22_dasm(DASM_OPS_32);
267int arcompact_handle05_23_dasm(DASM_OPS_32);
268int arcompact_handle05_24_dasm(DASM_OPS_32);
269int arcompact_handle05_25_dasm(DASM_OPS_32);
270int arcompact_handle05_26_dasm(DASM_OPS_32);
271int arcompact_handle05_27_dasm(DASM_OPS_32);
272int arcompact_handle05_28_dasm(DASM_OPS_32);
273int arcompact_handle05_29_dasm(DASM_OPS_32);
274int arcompact_handle05_2a_dasm(DASM_OPS_32);
275int arcompact_handle05_2b_dasm(DASM_OPS_32);
276int arcompact_handle05_2c_dasm(DASM_OPS_32);
277int arcompact_handle05_2d_dasm(DASM_OPS_32);
278int arcompact_handle05_2e_dasm(DASM_OPS_32);
279int arcompact_handle05_2f_dasm(DASM_OPS_32);
280int arcompact_handle05_30_dasm(DASM_OPS_32);
281int arcompact_handle05_31_dasm(DASM_OPS_32);
282int arcompact_handle05_32_dasm(DASM_OPS_32);
283int arcompact_handle05_33_dasm(DASM_OPS_32);
284int arcompact_handle05_34_dasm(DASM_OPS_32);
285int arcompact_handle05_35_dasm(DASM_OPS_32);
286int arcompact_handle05_36_dasm(DASM_OPS_32);
287int arcompact_handle05_37_dasm(DASM_OPS_32);
288int arcompact_handle05_38_dasm(DASM_OPS_32);
289int arcompact_handle05_39_dasm(DASM_OPS_32);
290int arcompact_handle05_3a_dasm(DASM_OPS_32);
291int arcompact_handle05_3b_dasm(DASM_OPS_32);
292int arcompact_handle05_3c_dasm(DASM_OPS_32);
293int arcompact_handle05_3d_dasm(DASM_OPS_32);
294int arcompact_handle05_3e_dasm(DASM_OPS_32);
295int arcompact_handle05_3f_dasm(DASM_OPS_32);
296
297
298int arcompact_handle0c_00_dasm(DASM_OPS_16);
299int arcompact_handle0c_01_dasm(DASM_OPS_16);
300int arcompact_handle0c_02_dasm(DASM_OPS_16);
301int arcompact_handle0c_03_dasm(DASM_OPS_16);
302
303int arcompact_handle0d_00_dasm(DASM_OPS_16);
304int arcompact_handle0d_01_dasm(DASM_OPS_16);
305int arcompact_handle0d_02_dasm(DASM_OPS_16);
306int arcompact_handle0d_03_dasm(DASM_OPS_16);
307
308int arcompact_handle0e_00_dasm(DASM_OPS_16);
309int arcompact_handle0e_01_dasm(DASM_OPS_16);
310int arcompact_handle0e_02_dasm(DASM_OPS_16);
311int arcompact_handle0e_03_dasm(DASM_OPS_16);
312
313int arcompact_handle17_00_dasm(DASM_OPS_16);
314int arcompact_handle17_01_dasm(DASM_OPS_16);
315int arcompact_handle17_02_dasm(DASM_OPS_16);
316int arcompact_handle17_03_dasm(DASM_OPS_16);
317int arcompact_handle17_04_dasm(DASM_OPS_16);
318int arcompact_handle17_05_dasm(DASM_OPS_16);
319int arcompact_handle17_06_dasm(DASM_OPS_16);
320int arcompact_handle17_07_dasm(DASM_OPS_16);
321
322int arcompact_handle18_00_dasm(DASM_OPS_16);
323int arcompact_handle18_01_dasm(DASM_OPS_16);
324int arcompact_handle18_02_dasm(DASM_OPS_16);
325int arcompact_handle18_03_dasm(DASM_OPS_16);
326int arcompact_handle18_04_dasm(DASM_OPS_16);
327
328int arcompact_handle18_05_dasm(DASM_OPS_16);
329int arcompact_handle18_05_00_dasm(DASM_OPS_16);
330int arcompact_handle18_05_01_dasm(DASM_OPS_16);
331int arcompact_handle18_05_02_dasm(DASM_OPS_16);
332int arcompact_handle18_05_03_dasm(DASM_OPS_16);
333int arcompact_handle18_05_04_dasm(DASM_OPS_16);
334int arcompact_handle18_05_05_dasm(DASM_OPS_16);
335int arcompact_handle18_05_06_dasm(DASM_OPS_16);
336int arcompact_handle18_05_07_dasm(DASM_OPS_16);
337
338int arcompact_handle18_06_dasm(DASM_OPS_16);
339int arcompact_handle18_06_00_dasm(DASM_OPS_16);
340int arcompact_handle18_06_01_dasm(DASM_OPS_16);
341int arcompact_handle18_06_02_dasm(DASM_OPS_16);
342int arcompact_handle18_06_03_dasm(DASM_OPS_16);
343int arcompact_handle18_06_04_dasm(DASM_OPS_16);
344int arcompact_handle18_06_05_dasm(DASM_OPS_16);
345int arcompact_handle18_06_06_dasm(DASM_OPS_16);
346int arcompact_handle18_06_07_dasm(DASM_OPS_16);
347int arcompact_handle18_06_08_dasm(DASM_OPS_16);
348int arcompact_handle18_06_09_dasm(DASM_OPS_16);
349int arcompact_handle18_06_0a_dasm(DASM_OPS_16);
350int arcompact_handle18_06_0b_dasm(DASM_OPS_16);
351int arcompact_handle18_06_0c_dasm(DASM_OPS_16);
352int arcompact_handle18_06_0d_dasm(DASM_OPS_16);
353int arcompact_handle18_06_0e_dasm(DASM_OPS_16);
354int arcompact_handle18_06_0f_dasm(DASM_OPS_16);
355int arcompact_handle18_06_10_dasm(DASM_OPS_16);
356int arcompact_handle18_06_11_dasm(DASM_OPS_16);
357int arcompact_handle18_06_12_dasm(DASM_OPS_16);
358int arcompact_handle18_06_13_dasm(DASM_OPS_16);
359int arcompact_handle18_06_14_dasm(DASM_OPS_16);
360int arcompact_handle18_06_15_dasm(DASM_OPS_16);
361int arcompact_handle18_06_16_dasm(DASM_OPS_16);
362int arcompact_handle18_06_17_dasm(DASM_OPS_16);
363int arcompact_handle18_06_18_dasm(DASM_OPS_16);
364int arcompact_handle18_06_19_dasm(DASM_OPS_16);
365int arcompact_handle18_06_1a_dasm(DASM_OPS_16);
366int arcompact_handle18_06_1b_dasm(DASM_OPS_16);
367int arcompact_handle18_06_1c_dasm(DASM_OPS_16);
368int arcompact_handle18_06_1d_dasm(DASM_OPS_16);
369int arcompact_handle18_06_1e_dasm(DASM_OPS_16);
370int arcompact_handle18_06_1f_dasm(DASM_OPS_16);
371
372int arcompact_handle18_07_dasm(DASM_OPS_16);
373int arcompact_handle18_07_00_dasm(DASM_OPS_16);
374int arcompact_handle18_07_01_dasm(DASM_OPS_16);
375int arcompact_handle18_07_02_dasm(DASM_OPS_16);
376int arcompact_handle18_07_03_dasm(DASM_OPS_16);
377int arcompact_handle18_07_04_dasm(DASM_OPS_16);
378int arcompact_handle18_07_05_dasm(DASM_OPS_16);
379int arcompact_handle18_07_06_dasm(DASM_OPS_16);
380int arcompact_handle18_07_07_dasm(DASM_OPS_16);
381int arcompact_handle18_07_08_dasm(DASM_OPS_16);
382int arcompact_handle18_07_09_dasm(DASM_OPS_16);
383int arcompact_handle18_07_0a_dasm(DASM_OPS_16);
384int arcompact_handle18_07_0b_dasm(DASM_OPS_16);
385int arcompact_handle18_07_0c_dasm(DASM_OPS_16);
386int arcompact_handle18_07_0d_dasm(DASM_OPS_16);
387int arcompact_handle18_07_0e_dasm(DASM_OPS_16);
388int arcompact_handle18_07_0f_dasm(DASM_OPS_16);
389int arcompact_handle18_07_10_dasm(DASM_OPS_16);
390int arcompact_handle18_07_11_dasm(DASM_OPS_16);
391int arcompact_handle18_07_12_dasm(DASM_OPS_16);
392int arcompact_handle18_07_13_dasm(DASM_OPS_16);
393int arcompact_handle18_07_14_dasm(DASM_OPS_16);
394int arcompact_handle18_07_15_dasm(DASM_OPS_16);
395int arcompact_handle18_07_16_dasm(DASM_OPS_16);
396int arcompact_handle18_07_17_dasm(DASM_OPS_16);
397int arcompact_handle18_07_18_dasm(DASM_OPS_16);
398int arcompact_handle18_07_19_dasm(DASM_OPS_16);
399int arcompact_handle18_07_1a_dasm(DASM_OPS_16);
400int arcompact_handle18_07_1b_dasm(DASM_OPS_16);
401int arcompact_handle18_07_1c_dasm(DASM_OPS_16);
402int arcompact_handle18_07_1d_dasm(DASM_OPS_16);
403int arcompact_handle18_07_1e_dasm(DASM_OPS_16);
404int arcompact_handle18_07_1f_dasm(DASM_OPS_16);
405
406int arcompact_handle19_00_dasm(DASM_OPS_16);
407int arcompact_handle19_01_dasm(DASM_OPS_16);
408int arcompact_handle19_02_dasm(DASM_OPS_16);
409int arcompact_handle19_03_dasm(DASM_OPS_16);
410
411int arcompact_handle1c_00_dasm(DASM_OPS_16);
412int arcompact_handle1c_01_dasm(DASM_OPS_16);
413
414int arcompact_handle1d_00_dasm(DASM_OPS_16);
415int arcompact_handle1d_01_dasm(DASM_OPS_16);
416
417int arcompact_handle1e_00_dasm(DASM_OPS_16);
418int arcompact_handle1e_01_dasm(DASM_OPS_16);
419int arcompact_handle1e_02_dasm(DASM_OPS_16);
420int arcompact_handle1e_03_dasm(DASM_OPS_16);
421
422int arcompact_handle1e_03_00_dasm(DASM_OPS_16);
423int arcompact_handle1e_03_01_dasm(DASM_OPS_16);
424int arcompact_handle1e_03_02_dasm(DASM_OPS_16);
425int arcompact_handle1e_03_03_dasm(DASM_OPS_16);
426int arcompact_handle1e_03_04_dasm(DASM_OPS_16);
427int arcompact_handle1e_03_05_dasm(DASM_OPS_16);
428int arcompact_handle1e_03_06_dasm(DASM_OPS_16);
429int arcompact_handle1e_03_07_dasm(DASM_OPS_16);
430
431
432
433// condition codes (basic ones are the same as arc
434static const char *conditions[0x20] =
435{
436   /* 00 */ "AL", // (aka RA         - Always)
437   /* 01 */ "EQ", // (aka Z          - Zero
438   /* 02 */ "NE", // (aka NZ         - Non-Zero)
439   /* 03 */ "PL", // (aka P          - Positive)
440   /* 04 */ "MI", // (aka N          - Negative)
441   /* 05 */ "CS", // (aka C,  LO     - Carry set / Lower than) (unsigned)
442   /* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
443   /* 07 */ "VS", // (aka V          - Overflow set)
444   /* 08 */ "VC", // (aka NV         - Overflow clear)
445   /* 09 */ "GT", // (               - Greater than) (signed)
446   /* 0a */ "GE", // (               - Greater than or Equal) (signed)
447   /* 0b */ "LT", // (               - Less than) (signed)
448   /* 0c */ "LE", // (               - Less than or Equal) (signed)
449   /* 0d */ "HI", // (               - Higher than) (unsigned)
450   /* 0e */ "LS", // (               - Lower or Same) (unsigned)
451   /* 0f */ "PNZ",// (               - Positive non-0 value)
452   /* 10 */ "0x10 Reserved", // possible CPU implementation specifics
453   /* 11 */ "0x11 Reserved",
454   /* 12 */ "0x12 Reserved",
455   /* 13 */ "0x13 Reserved",
456   /* 14 */ "0x14 Reserved",
457   /* 15 */ "0x15 Reserved",
458   /* 16 */ "0x16 Reserved",
459   /* 17 */ "0x17 Reserved",
460   /* 18 */ "0x18 Reserved",
461   /* 19 */ "0x19 Reserved",
462   /* 1a */ "0x1a Reserved",
463   /* 1b */ "0x1b Reserved",
464   /* 1c */ "0x1c Reserved",
465   /* 1d */ "0x1d Reserved",
466   /* 1e */ "0x1e Reserved",
467   /* 1f */ "0x1f Reserved"
468};
469
470static const char *table01_01_0x[0x10] =
471{
472   /* 00 */ "BREQ",
473   /* 01 */ "BRNE",
474   /* 02 */ "BRLT",
475   /* 03 */ "BRGE",
476   /* 04 */ "BRLO",
477   /* 05 */ "BRHS",
478   /* 06 */ "<reserved>",
479   /* 07 */ "<reserved>",
480   /* 08 */ "<reserved>",
481   /* 09 */ "<reserved>",
482   /* 0a */ "<reserved>",
483   /* 0b */ "<reserved>",
484   /* 0c */ "<reserved>",
485   /* 0d */ "<reserved>",
486   /* 0e */ "<BBIT0>",
487   /* 0f */ "<BBIT1>"
488};
489
490
491
492
493
494static const char *table0f[0x20] =
495{
496   /* 00 */ "SOPs", // Sub Operation (another table..) ( table0f_00 )
497   /* 01 */ "0x01 <illegal>",
498   /* 02 */ "SUB_S",
499   /* 03 */ "0x03 <illegal>",
500   /* 04 */ "AND_S",
501   /* 05 */ "OR_S",
502   /* 06 */ "BIC_S",
503   /* 07 */ "XOR_S",
504   /* 08 */ "0x08 <illegal>",
505   /* 09 */ "0x09 <illegal>",
506   /* 0a */ "0x0a <illegal>",
507   /* 0b */ "TST_S",
508   /* 0c */ "MUL64_S",
509   /* 0d */ "SEXB_S",
510   /* 0e */ "SEXW_S",
511   /* 0f */ "EXTB_S",
512   /* 10 */ "EXTW_S",
513   /* 11 */ "ABS_S",
514   /* 12 */ "NOT_S",
515   /* 13 */ "NEG_S",
516   /* 14 */ "ADD1_S",
517   /* 15 */ "ADD2_S>",
518   /* 16 */ "ADD3_S",
519   /* 17 */ "0x17 <illegal>",
520   /* 18 */ "ASL_S (multiple)",
521   /* 19 */ "LSR_S (multiple)",
522/* 1a */ "ASR_S (multiple)",
523/* 1b */ "ASL_S (single)",
524/* 1c */ "LSR_S (single)",
525/* 1d */ "ASR_S (single)",
526/* 1e */ "TRAP (not a5?)",
527/* 1f */ "BRK_S" // 0x7fff only?
528};
529
530static const char *table0f_00[0x8] =
531{
532   /* 00 */ "J_S",
533   /* 01 */ "J_S.D",
534   /* 02 */ "JL_S",
535   /* 03 */ "JL_S.D",
536   /* 04 */ "0x04 <illegal>",
537   /* 05 */ "0x05 <illegal>",
538   /* 06 */ "SUB_S.NE",
539   /* 07 */ "ZOPs", // Sub Operations (yet another table..) ( table0f_00_07 )
540};
541
542static const char *table0f_00_07[0x8] =
543{
544   /* 00 */ "NOP_S",
545   /* 01 */ "UNIMP_S", // unimplemented (not a5?)
546   /* 02 */ "0x02 <illegal>",
547   /* 03 */ "0x03 <illegal>",
548   /* 04 */ "JEQ_S [BLINK]",
549   /* 05 */ "JNE_S [BLINK]",
550   /* 06 */ "J_S [BLINK]",
551   /* 07 */ "J_S.D [BLINK]",
552};
553
21554#define ARCOMPACT_OPERATION ((op & 0xf800) >> 11)
22555
23extern char *output;;
24556
557int arcompact_handle00_dasm(DASM_OPS_32)
558{
559   if (op & 0x00010000)
560   { // Branch Unconditionally Far
561      // 00000 ssssssssss 1  SSSSSSSSSS N R TTTT
562      INT32 address = (op & 0x07fe0000) >> 17;
563      address |= ((op & 0x0000ffc0) >> 6) << 10;
564      address |= ((op & 0x0000000f) >> 0) << 20;
565      if (address & 0x800000) address = -(address & 0x7fffff);
566
567      print("B %08x (%08x)", pc + (address * 2) + 2, op & ~0xffffffcf);
568   }
569   else
570   { // Branch Conditionally
571      // 00000 ssssssssss 0 SSSSSSSSSS N QQQQQ
572      INT32 address = (op & 0x07fe0000) >> 17;
573      address |= ((op & 0x0000ffc0) >> 6) << 10;
574      if (address & 0x800000) address = -(address & 0x7fffff);
575
576      UINT8 condition = op & 0x0000001f;
577
578      print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2) + 2, op & ~0xffffffdf);
579   }
580   return 4;
581}
582
583int arcompact_handle01_dasm(DASM_OPS_32)
584{
585   int size = 4;
586
587   if (op & 0x00010000)
588   {
589      if (op & 0x00000010)
590      { // Branch on Compare / Bit Test - Register-Immediate
591         // 00001 bbb sssssss 1 S BBB UUUUUU N 1 iiii
592         UINT8 subinstr = op & 0x0000000f;
593         INT32 address = (op & 0x00fe0000) >> 17;
594         address |= ((op & 0x00008000) >> 15) << 7;
595         if (address & 0x80) address = -(address & 0x7f);
596
597
598         print("%s (reg-imm) %08x (%08x)", table01_01_0x[subinstr], pc + (address * 2) + 4, op & ~0xf8fe800f);
599
600
601      }
602      else
603      {
604         // Branch on Compare / Bit Test - Register-Register
605         // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii
606         UINT8 subinstr = op & 0x0000000f;
607         INT32 address = (op & 0x00fe0000) >> 17;
608         address |= ((op & 0x00008000) >> 15) << 7;
609         if (address & 0x80) address = -(address & 0x7f);
610
611         int c = (op & 0x00000fc0)>> 6;
612         int b = (op & 0x07000000) >> 24;
613         b |=   ((op & 0x00007000) >> 12) << 3;
614
615         op &= ~0x07007fe0;
616
617         if ((b != LIMM_REG) && (c != LIMM_REG))
618         {
619            print("%s (reg-reg) (r%d) (r%d) %08x (%08x)", table01_01_0x[subinstr], b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
620         }
621         else
622         {
623            UINT32 limm;
624            GET_LIMM_32;
625            size = 8;
626
627            if ((b == LIMM_REG) && (c != LIMM_REG))
628            {
629               print("%s (reg-reg) (%08x) (r%d) %08x (%08x)", table01_01_0x[subinstr], limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
630            }
631            else if ((c == LIMM_REG) && (b != LIMM_REG))
632            {
633               print("%s (reg-reg) (r%d) (%08x) %08x (%08x)", table01_01_0x[subinstr], b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
634            }
635            else
636            {
637               // b and c are LIMM? invalid??
638               print("%s (reg-reg) (%08x) (%08x) (illegal?) %08x (%08x)", table01_01_0x[subinstr], limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
639
640            }
641         }
642
643      }
644
645   }
646   else
647   {
648      if (op & 0x00020000)
649      { // Branch and Link Unconditionally Far
650         // 00001 sssssssss 10  SSSSSSSSSS N R TTTT
651         INT32 address =   (op & 0x07fc0000) >> 17;
652         address |=        ((op & 0x0000ffc0) >> 6) << 10;
653         address |=        ((op & 0x0000000f) >> 0) << 20;
654         if (address & 0x800000) address = -(address&0x7fffff);   
655
656         print("BL %08x (%08x)",  pc + (address *2) + 2, op & ~0xffffffcf );
657      }
658      else
659      { // Branch and Link Conditionally
660         // 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
661         INT32 address =   (op & 0x07fc0000) >> 17;
662         address |=        ((op & 0x0000ffc0) >> 6) << 10;
663         if (address & 0x800000) address = -(address&0x7fffff);   
664
665         UINT8 condition = op & 0x0000001f;
666
667         print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2) + 2, op & ~0xffffffdf );
668
669      }
670
671   }
672   return size;
673}
674
675int arcompact_handle02_dasm(DASM_OPS_32)
676{
677   // bitpos
678   // 11111 111 11111111 0 000 0 00 00 0 000000
679   // fedcb a98 76543210 f edc b a9 87 6 543210
680   // fields
681   // 00010 bbb ssssssss S BBB D aa ZZ X AAAAAA
682#if 0   
683   int A = (op & 0x0000003f >> 0);  op &= ~0x0000003f;
684   int X = (op & 0x00000040 >> 6);  op &= ~0x00000040;
685   int Z = (op & 0x00000180 >> 7);  op &= ~0x00000180;
686   int a = (op & 0x00000600 >> 9);  op &= ~0x00000600;
687   int D = (op & 0x00000800 >> 11); op &= ~0x00000800;
688   int B = (op & 0x00007000 >> 12); op &= ~0x00007000;
689   int S = (op & 0x00008000 >> 15); op &= ~0x00008000;
690   int s = (op & 0x00ff0000 >> 16); op &= ~0x00ff0000;
691   int b = (op & 0x07000000 >> 24); op &= ~0x07000000;
692#endif
693
694   print("LD r+o (%08x)", op );
695   return 4;
696}
697
698int arcompact_handle03_dasm(DASM_OPS_32)
699{
700   // bitpos
701   // 11111 111 11111111 0 000 000000 0 00 00 0
702   // fedcb a98 76543210 f edc ba9876 5 43 21 0
703   // fields
704   // 00011 bbb ssssssss S BBB CCCCCC D aa ZZ R
705
706   print("ST r+o (%08x)", op );
707   return 4;
708}
709
710int arcompact_handle04_dasm(DASM_OPS_32)
711{
712   int size = 4;
713   // General Operations
714
715   // bitpos
716   // 11111 111 11 111111 0 000 000000 0 00000
717   // fedcb a98 76 543210 f edc ba9876 5 43210
718   //
719   // 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA   General Operations *UN*Conditional Register to Register
720   // 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA   General Operations *UN*Conditional Register (Unsigned 6-bit IMM)
721   // 00100 bbb 10 iiiiii F BBB ssssss S SSSSS   General Operations *UN*Conditional Register (Signed 12-bit IMM)
722   
723   // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ   General Operations Conditional Register
724   // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ   General Operations Conditional Register (Unsigned 6-bit IMM)
725   UINT8 subinstr = (op & 0x003f0000) >> 16;
726   op &= ~0x003f0000;
727
728   switch (subinstr)
729   {
730      case 0x00: size = arcompact_handle04_00_dasm(DASM_PARAMS); break; // ADD
731      case 0x01: size = arcompact_handle04_01_dasm(DASM_PARAMS); break; // ADC
732      case 0x02: size = arcompact_handle04_02_dasm(DASM_PARAMS); break; // SUB
733      case 0x03: size = arcompact_handle04_03_dasm(DASM_PARAMS); break; // SBC
734      case 0x04: size = arcompact_handle04_04_dasm(DASM_PARAMS); break; // AND
735      case 0x05: size = arcompact_handle04_05_dasm(DASM_PARAMS); break; // OR
736      case 0x06: size = arcompact_handle04_06_dasm(DASM_PARAMS); break; // BIC
737      case 0x07: size = arcompact_handle04_07_dasm(DASM_PARAMS); break; // XOR
738      case 0x08: size = arcompact_handle04_08_dasm(DASM_PARAMS); break; // MAX
739      case 0x09: size = arcompact_handle04_09_dasm(DASM_PARAMS); break; // MIN
740      case 0x0a: size = arcompact_handle04_0a_dasm(DASM_PARAMS); break; // MOV
741      case 0x0b: size = arcompact_handle04_0b_dasm(DASM_PARAMS); break; // TST
742      case 0x0c: size = arcompact_handle04_0c_dasm(DASM_PARAMS); break; // CMP
743      case 0x0d: size = arcompact_handle04_0d_dasm(DASM_PARAMS); break; // RCMP
744      case 0x0e: size = arcompact_handle04_0e_dasm(DASM_PARAMS); break; // RSUB
745      case 0x0f: size = arcompact_handle04_0f_dasm(DASM_PARAMS); break; // BSET
746      case 0x10: size = arcompact_handle04_10_dasm(DASM_PARAMS); break; // BCLR
747      case 0x11: size = arcompact_handle04_11_dasm(DASM_PARAMS); break; // BTST
748      case 0x12: size = arcompact_handle04_12_dasm(DASM_PARAMS); break; // BXOR
749      case 0x13: size = arcompact_handle04_13_dasm(DASM_PARAMS); break; // BMSK
750      case 0x14: size = arcompact_handle04_14_dasm(DASM_PARAMS); break; // ADD1
751      case 0x15: size = arcompact_handle04_15_dasm(DASM_PARAMS); break; // ADD2
752      case 0x16: size = arcompact_handle04_16_dasm(DASM_PARAMS); break; // ADD3
753      case 0x17: size = arcompact_handle04_17_dasm(DASM_PARAMS); break; // SUB1
754      case 0x18: size = arcompact_handle04_18_dasm(DASM_PARAMS); break; // SUB2
755      case 0x19: size = arcompact_handle04_19_dasm(DASM_PARAMS); break; // SUB3
756      case 0x1a: size = arcompact_handle04_1a_dasm(DASM_PARAMS); break; // MPY *
757      case 0x1b: size = arcompact_handle04_1b_dasm(DASM_PARAMS); break; // MPYH *
758      case 0x1c: size = arcompact_handle04_1c_dasm(DASM_PARAMS); break; // MPYHU *
759      case 0x1d: size = arcompact_handle04_1d_dasm(DASM_PARAMS); break; // MPYU *
760      case 0x1e: size = arcompact_handle04_1e_dasm(DASM_PARAMS); break; // illegal
761      case 0x1f: size = arcompact_handle04_1f_dasm(DASM_PARAMS); break; // illegal
762      case 0x20: size = arcompact_handle04_20_dasm(DASM_PARAMS); break; // Jcc
763      case 0x21: size = arcompact_handle04_21_dasm(DASM_PARAMS); break; // Jcc.D
764      case 0x22: size = arcompact_handle04_22_dasm(DASM_PARAMS); break; // JLcc
765      case 0x23: size = arcompact_handle04_23_dasm(DASM_PARAMS); break; // JLcc.D
766      case 0x24: size = arcompact_handle04_24_dasm(DASM_PARAMS); break; // illegal
767      case 0x25: size = arcompact_handle04_25_dasm(DASM_PARAMS); break; // illegal
768      case 0x26: size = arcompact_handle04_26_dasm(DASM_PARAMS); break; // illegal
769      case 0x27: size = arcompact_handle04_27_dasm(DASM_PARAMS); break; // illegal
770      case 0x28: size = arcompact_handle04_28_dasm(DASM_PARAMS); break; // LPcc
771      case 0x29: size = arcompact_handle04_29_dasm(DASM_PARAMS); break; // FLAG
772      case 0x2a: size = arcompact_handle04_2a_dasm(DASM_PARAMS); break; // LR
773      case 0x2b: size = arcompact_handle04_2b_dasm(DASM_PARAMS); break; // SR
774      case 0x2c: size = arcompact_handle04_2c_dasm(DASM_PARAMS); break; // illegal
775      case 0x2d: size = arcompact_handle04_2d_dasm(DASM_PARAMS); break; // illegal
776      case 0x2e: size = arcompact_handle04_2e_dasm(DASM_PARAMS); break; // illegal
777      case 0x2f: size = arcompact_handle04_2f_dasm(DASM_PARAMS); break; // Sub Opcode
778      case 0x30: size = arcompact_handle04_30_dasm(DASM_PARAMS); break; // LD r-r
779      case 0x31: size = arcompact_handle04_31_dasm(DASM_PARAMS); break; // LD r-r
780      case 0x32: size = arcompact_handle04_32_dasm(DASM_PARAMS); break; // LD r-r
781      case 0x33: size = arcompact_handle04_33_dasm(DASM_PARAMS); break; // LD r-r
782      case 0x34: size = arcompact_handle04_34_dasm(DASM_PARAMS); break; // LD r-r
783      case 0x35: size = arcompact_handle04_35_dasm(DASM_PARAMS); break; // LD r-r
784      case 0x36: size = arcompact_handle04_36_dasm(DASM_PARAMS); break; // LD r-r
785      case 0x37: size = arcompact_handle04_37_dasm(DASM_PARAMS); break; // LD r-r
786      case 0x38: size = arcompact_handle04_38_dasm(DASM_PARAMS); break; // illegal
787      case 0x39: size = arcompact_handle04_39_dasm(DASM_PARAMS); break; // illegal
788      case 0x3a: size = arcompact_handle04_3a_dasm(DASM_PARAMS); break; // illegal
789      case 0x3b: size = arcompact_handle04_3b_dasm(DASM_PARAMS); break; // illegal
790      case 0x3c: size = arcompact_handle04_3c_dasm(DASM_PARAMS); break; // illegal
791      case 0x3d: size = arcompact_handle04_3d_dasm(DASM_PARAMS); break; // illegal
792      case 0x3e: size = arcompact_handle04_3e_dasm(DASM_PARAMS); break; // illegal
793      case 0x3f: size = arcompact_handle04_3f_dasm(DASM_PARAMS); break; // illegal
794   }
795
796   return size;
797}
798
799int arcompact_handle04_00_dasm(DASM_OPS_32)  { print("ADD (%08x)", op); return 4;}
800int arcompact_handle04_01_dasm(DASM_OPS_32)  { print("ADC (%08x)", op); return 4;}
801int arcompact_handle04_02_dasm(DASM_OPS_32)  { print("SUB (%08x)", op); return 4;}
802int arcompact_handle04_03_dasm(DASM_OPS_32)  { print("SBC (%08x)", op); return 4;}
803int arcompact_handle04_04_dasm(DASM_OPS_32)  { print("AND (%08x)", op); return 4;}
804int arcompact_handle04_05_dasm(DASM_OPS_32)  { print("OR (%08x)", op); return 4;}
805int arcompact_handle04_06_dasm(DASM_OPS_32)  { print("BIC (%08x)", op); return 4;}
806int arcompact_handle04_07_dasm(DASM_OPS_32)  { print("XOR (%08x)", op); return 4;}
807int arcompact_handle04_08_dasm(DASM_OPS_32)  { print("MAX (%08x)", op); return 4;}
808int arcompact_handle04_09_dasm(DASM_OPS_32)  { print("MIN (%08x)", op); return 4;}
809int arcompact_handle04_0a_dasm(DASM_OPS_32)  { print("MOV (%08x)", op); return 4;}
810int arcompact_handle04_0b_dasm(DASM_OPS_32)  { print("TST (%08x)", op); return 4;}
811int arcompact_handle04_0c_dasm(DASM_OPS_32)  { print("CMP (%08x)", op); return 4;}
812int arcompact_handle04_0d_dasm(DASM_OPS_32)  { print("RCMP (%08x)", op); return 4;}
813int arcompact_handle04_0e_dasm(DASM_OPS_32)  { print("RSUB (%08x)", op); return 4;}
814int arcompact_handle04_0f_dasm(DASM_OPS_32)  { print("BSET (%08x)", op); return 4;}
815int arcompact_handle04_10_dasm(DASM_OPS_32)  { print("BCLR (%08x)", op); return 4;}
816int arcompact_handle04_11_dasm(DASM_OPS_32)  { print("BTST (%08x)", op); return 4;}
817int arcompact_handle04_12_dasm(DASM_OPS_32)  { print("BXOR (%08x)", op); return 4;}
818int arcompact_handle04_13_dasm(DASM_OPS_32)  { print("BMSK (%08x)", op); return 4;}
819int arcompact_handle04_14_dasm(DASM_OPS_32)  { print("ADD1 (%08x)", op); return 4;}
820int arcompact_handle04_15_dasm(DASM_OPS_32)  { print("ADD2 (%08x)", op); return 4;}
821int arcompact_handle04_16_dasm(DASM_OPS_32)  { print("ADD3 (%08x)", op); return 4;}
822int arcompact_handle04_17_dasm(DASM_OPS_32)  { print("SUB1 (%08x)", op); return 4;}
823int arcompact_handle04_18_dasm(DASM_OPS_32)  { print("SUB2 (%08x)", op); return 4;}
824int arcompact_handle04_19_dasm(DASM_OPS_32)  { print("SUB3 (%08x)", op); return 4;}
825int arcompact_handle04_1a_dasm(DASM_OPS_32)  { print("MPY (%08x)", op); return 4;} // *
826int arcompact_handle04_1b_dasm(DASM_OPS_32)  { print("MPYH (%08x)", op); return 4;} // *
827int arcompact_handle04_1c_dasm(DASM_OPS_32)  { print("MPYHU (%08x)", op); return 4;} // *
828int arcompact_handle04_1d_dasm(DASM_OPS_32)  { print("MPYU (%08x)", op); return 4;} // *
829int arcompact_handle04_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_1e> (%08x)", op); return 4;}
830int arcompact_handle04_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_1f> (%08x)", op); return 4;}
831
832
833
834int arcompact_handle04_20_dasm(DASM_OPS_32)
835{
836   // todo, other bits (in none long immediate mode at least)
837
838   int size = 4;
839   int C = (op & 0x00000fc0) >> 6;
840   UINT8 condition = op & 0x0000001f;
841
842   op &= ~0x00000fc0;
843   
844   if (C == LIMM_REG)
845   {
846      UINT32 limm;
847      GET_LIMM_32;
848      size = 8;
849     
850      print("J(%s) %08x (%08x)", conditions[condition], limm, op);
851   }
852   else
853   {
854      print("J(%s) (r%d) (%08x)", conditions[condition], C, op);
855   }
856
857   return size;
858}
859
860
861
862int arcompact_handle04_21_dasm(DASM_OPS_32)  { print("Jcc.D (%08x)", op); return 4;}
863int arcompact_handle04_22_dasm(DASM_OPS_32)  { print("JLcc (%08x)", op); return 4;}
864int arcompact_handle04_23_dasm(DASM_OPS_32)  { print("JLcc.D (%08x)", op); return 4;}
865int arcompact_handle04_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_24> (%08x)", op); return 4;}
866int arcompact_handle04_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_25> (%08x)", op); return 4;}
867int arcompact_handle04_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_26> (%08x)", op); return 4;}
868int arcompact_handle04_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_27> (%08x)", op); return 4;}
869int arcompact_handle04_28_dasm(DASM_OPS_32)  { print("LPcc (%08x)", op); return 4;}
870int arcompact_handle04_29_dasm(DASM_OPS_32)  { print("FLAG (%08x)", op); return 4;}
871int arcompact_handle04_2a_dasm(DASM_OPS_32)  { print("LR (%08x)", op); return 4;}
872int arcompact_handle04_2b_dasm(DASM_OPS_32)  { print("SR (%08x)", op); return 4;}
873int arcompact_handle04_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2c> (%08x)", op); return 4;}
874int arcompact_handle04_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2d> (%08x)", op); return 4;}
875int arcompact_handle04_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2e> (%08x)", op); return 4;}
876
877int arcompact_handle04_2f_dasm(DASM_OPS_32)
878{
879   int size = 4;
880   UINT8 subinstr2 = (op & 0x0000003f) >> 0;
881   op &= ~0x0000003f;
882
883   switch (subinstr2)
884   {
885      case 0x00: size = arcompact_handle04_2f_00_dasm(DASM_PARAMS); break; // ASL
886      case 0x01: size = arcompact_handle04_2f_01_dasm(DASM_PARAMS); break; // ASR
887      case 0x02: size = arcompact_handle04_2f_02_dasm(DASM_PARAMS); break; // LSR
888      case 0x03: size = arcompact_handle04_2f_03_dasm(DASM_PARAMS); break; // ROR
889      case 0x04: size = arcompact_handle04_2f_04_dasm(DASM_PARAMS); break; // RCC
890      case 0x05: size = arcompact_handle04_2f_05_dasm(DASM_PARAMS); break; // SEXB
891      case 0x06: size = arcompact_handle04_2f_06_dasm(DASM_PARAMS); break; // SEXW
892      case 0x07: size = arcompact_handle04_2f_07_dasm(DASM_PARAMS); break; // EXTB
893      case 0x08: size = arcompact_handle04_2f_08_dasm(DASM_PARAMS); break; // EXTW
894      case 0x09: size = arcompact_handle04_2f_09_dasm(DASM_PARAMS); break; // ABS
895      case 0x0a: size = arcompact_handle04_2f_0a_dasm(DASM_PARAMS); break; // NOT
896      case 0x0b: size = arcompact_handle04_2f_0b_dasm(DASM_PARAMS); break; // RLC
897      case 0x0c: size = arcompact_handle04_2f_0c_dasm(DASM_PARAMS); break; // EX
898      case 0x0d: size = arcompact_handle04_2f_0d_dasm(DASM_PARAMS); break; // illegal
899      case 0x0e: size = arcompact_handle04_2f_0e_dasm(DASM_PARAMS); break; // illegal
900      case 0x0f: size = arcompact_handle04_2f_0f_dasm(DASM_PARAMS); break; // illegal
901      case 0x10: size = arcompact_handle04_2f_10_dasm(DASM_PARAMS); break; // illegal
902      case 0x11: size = arcompact_handle04_2f_11_dasm(DASM_PARAMS); break; // illegal
903      case 0x12: size = arcompact_handle04_2f_12_dasm(DASM_PARAMS); break; // illegal
904      case 0x13: size = arcompact_handle04_2f_13_dasm(DASM_PARAMS); break; // illegal
905      case 0x14: size = arcompact_handle04_2f_14_dasm(DASM_PARAMS); break; // illegal
906      case 0x15: size = arcompact_handle04_2f_15_dasm(DASM_PARAMS); break; // illegal
907      case 0x16: size = arcompact_handle04_2f_16_dasm(DASM_PARAMS); break; // illegal
908      case 0x17: size = arcompact_handle04_2f_17_dasm(DASM_PARAMS); break; // illegal
909      case 0x18: size = arcompact_handle04_2f_18_dasm(DASM_PARAMS); break; // illegal
910      case 0x19: size = arcompact_handle04_2f_19_dasm(DASM_PARAMS); break; // illegal
911      case 0x1a: size = arcompact_handle04_2f_1a_dasm(DASM_PARAMS); break; // illegal
912      case 0x1b: size = arcompact_handle04_2f_1b_dasm(DASM_PARAMS); break; // illegal
913      case 0x1c: size = arcompact_handle04_2f_1c_dasm(DASM_PARAMS); break; // illegal
914      case 0x1d: size = arcompact_handle04_2f_1d_dasm(DASM_PARAMS); break; // illegal
915      case 0x1e: size = arcompact_handle04_2f_1e_dasm(DASM_PARAMS); break; // illegal
916      case 0x1f: size = arcompact_handle04_2f_1f_dasm(DASM_PARAMS); break; // illegal
917      case 0x20: size = arcompact_handle04_2f_20_dasm(DASM_PARAMS); break; // illegal
918      case 0x21: size = arcompact_handle04_2f_21_dasm(DASM_PARAMS); break; // illegal
919      case 0x22: size = arcompact_handle04_2f_22_dasm(DASM_PARAMS); break; // illegal
920      case 0x23: size = arcompact_handle04_2f_23_dasm(DASM_PARAMS); break; // illegal
921      case 0x24: size = arcompact_handle04_2f_24_dasm(DASM_PARAMS); break; // illegal
922      case 0x25: size = arcompact_handle04_2f_25_dasm(DASM_PARAMS); break; // illegal
923      case 0x26: size = arcompact_handle04_2f_26_dasm(DASM_PARAMS); break; // illegal
924      case 0x27: size = arcompact_handle04_2f_27_dasm(DASM_PARAMS); break; // illegal
925      case 0x28: size = arcompact_handle04_2f_28_dasm(DASM_PARAMS); break; // illegal
926      case 0x29: size = arcompact_handle04_2f_29_dasm(DASM_PARAMS); break; // illegal
927      case 0x2a: size = arcompact_handle04_2f_2a_dasm(DASM_PARAMS); break; // illegal
928      case 0x2b: size = arcompact_handle04_2f_2b_dasm(DASM_PARAMS); break; // illegal
929      case 0x2c: size = arcompact_handle04_2f_2c_dasm(DASM_PARAMS); break; // illegal
930      case 0x2d: size = arcompact_handle04_2f_2d_dasm(DASM_PARAMS); break; // illegal
931      case 0x2e: size = arcompact_handle04_2f_2e_dasm(DASM_PARAMS); break; // illegal
932      case 0x2f: size = arcompact_handle04_2f_2f_dasm(DASM_PARAMS); break; // illegal
933      case 0x30: size = arcompact_handle04_2f_30_dasm(DASM_PARAMS); break; // illegal
934      case 0x31: size = arcompact_handle04_2f_31_dasm(DASM_PARAMS); break; // illegal
935      case 0x32: size = arcompact_handle04_2f_32_dasm(DASM_PARAMS); break; // illegal
936      case 0x33: size = arcompact_handle04_2f_33_dasm(DASM_PARAMS); break; // illegal
937      case 0x34: size = arcompact_handle04_2f_34_dasm(DASM_PARAMS); break; // illegal
938      case 0x35: size = arcompact_handle04_2f_35_dasm(DASM_PARAMS); break; // illegal
939      case 0x36: size = arcompact_handle04_2f_36_dasm(DASM_PARAMS); break; // illegal
940      case 0x37: size = arcompact_handle04_2f_37_dasm(DASM_PARAMS); break; // illegal
941      case 0x38: size = arcompact_handle04_2f_38_dasm(DASM_PARAMS); break; // illegal
942      case 0x39: size = arcompact_handle04_2f_39_dasm(DASM_PARAMS); break; // illegal
943      case 0x3a: size = arcompact_handle04_2f_3a_dasm(DASM_PARAMS); break; // illegal
944      case 0x3b: size = arcompact_handle04_2f_3b_dasm(DASM_PARAMS); break; // illegal
945      case 0x3c: size = arcompact_handle04_2f_3c_dasm(DASM_PARAMS); break; // illegal
946      case 0x3d: size = arcompact_handle04_2f_3d_dasm(DASM_PARAMS); break; // illegal
947      case 0x3e: size = arcompact_handle04_2f_3e_dasm(DASM_PARAMS); break; // illegal
948      case 0x3f: size = arcompact_handle04_2f_3f_dasm(DASM_PARAMS); break; // ZOPs (Zero Operand Opcodes)
949   }
950
951   return size;
952}
953
954
955int arcompact_handle04_2f_00_dasm(DASM_OPS_32)  { print("ASL (%08x)", op); return 4;} // ASL
956int arcompact_handle04_2f_01_dasm(DASM_OPS_32)  { print("ASR (%08x)", op); return 4;} // ASR
957int arcompact_handle04_2f_02_dasm(DASM_OPS_32)  { print("LSR (%08x)", op); return 4;} // LSR
958int arcompact_handle04_2f_03_dasm(DASM_OPS_32)  { print("ROR (%08x)", op); return 4;} // ROR
959int arcompact_handle04_2f_04_dasm(DASM_OPS_32)  { print("RCC (%08x)", op); return 4;} // RCC
960int arcompact_handle04_2f_05_dasm(DASM_OPS_32)  { print("SEXB (%08x)", op); return 4;} // SEXB
961int arcompact_handle04_2f_06_dasm(DASM_OPS_32)  { print("SEXW (%08x)", op); return 4;} // SEXW
962int arcompact_handle04_2f_07_dasm(DASM_OPS_32)  { print("EXTB (%08x)", op); return 4;} // EXTB
963int arcompact_handle04_2f_08_dasm(DASM_OPS_32)  { print("EXTW (%08x)", op); return 4;} // EXTW
964int arcompact_handle04_2f_09_dasm(DASM_OPS_32)  { print("ABS (%08x)", op); return 4;} // ABS
965int arcompact_handle04_2f_0a_dasm(DASM_OPS_32)  { print("NOT (%08x)", op); return 4;} // NOT
966int arcompact_handle04_2f_0b_dasm(DASM_OPS_32)  { print("RLC (%08x)", op); return 4;} // RLC
967int arcompact_handle04_2f_0c_dasm(DASM_OPS_32)  { print("EX (%08x)", op); return 4;} // EX
968int arcompact_handle04_2f_0d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0d> (%08x)", op); return 4;}
969int arcompact_handle04_2f_0e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0e> (%08x)", op); return 4;}
970int arcompact_handle04_2f_0f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0f> (%08x)", op); return 4;}
971int arcompact_handle04_2f_10_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_10> (%08x)", op); return 4;}
972int arcompact_handle04_2f_11_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_11> (%08x)", op); return 4;}
973int arcompact_handle04_2f_12_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_12> (%08x)", op); return 4;}
974int arcompact_handle04_2f_13_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_13> (%08x)", op); return 4;}
975int arcompact_handle04_2f_14_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_14> (%08x)", op); return 4;}
976int arcompact_handle04_2f_15_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_15> (%08x)", op); return 4;}
977int arcompact_handle04_2f_16_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_16> (%08x)", op); return 4;}
978int arcompact_handle04_2f_17_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_17> (%08x)", op); return 4;}
979int arcompact_handle04_2f_18_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_18> (%08x)", op); return 4;}
980int arcompact_handle04_2f_19_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_19> (%08x)", op); return 4;}
981int arcompact_handle04_2f_1a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1a> (%08x)", op); return 4;}
982int arcompact_handle04_2f_1b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1b> (%08x)", op); return 4;}
983int arcompact_handle04_2f_1c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1c> (%08x)", op); return 4;}
984int arcompact_handle04_2f_1d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1d> (%08x)", op); return 4;}
985int arcompact_handle04_2f_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1e> (%08x)", op); return 4;}
986int arcompact_handle04_2f_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1f> (%08x)", op); return 4;}
987int arcompact_handle04_2f_20_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_20> (%08x)", op); return 4;}
988int arcompact_handle04_2f_21_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_21> (%08x)", op); return 4;}
989int arcompact_handle04_2f_22_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_22> (%08x)", op); return 4;}
990int arcompact_handle04_2f_23_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_23> (%08x)", op); return 4;}
991int arcompact_handle04_2f_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_24> (%08x)", op); return 4;}
992int arcompact_handle04_2f_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_25> (%08x)", op); return 4;}
993int arcompact_handle04_2f_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_26> (%08x)", op); return 4;}
994int arcompact_handle04_2f_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_27> (%08x)", op); return 4;}
995int arcompact_handle04_2f_28_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_28> (%08x)", op); return 4;}
996int arcompact_handle04_2f_29_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_29> (%08x)", op); return 4;}
997int arcompact_handle04_2f_2a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2a> (%08x)", op); return 4;}
998int arcompact_handle04_2f_2b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2b> (%08x)", op); return 4;}
999int arcompact_handle04_2f_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2c> (%08x)", op); return 4;}
1000int arcompact_handle04_2f_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2d> (%08x)", op); return 4;}
1001int arcompact_handle04_2f_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2e> (%08x)", op); return 4;}
1002int arcompact_handle04_2f_2f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2f> (%08x)", op); return 4;}
1003int arcompact_handle04_2f_30_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_30> (%08x)", op); return 4;}
1004int arcompact_handle04_2f_31_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_31> (%08x)", op); return 4;}
1005int arcompact_handle04_2f_32_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_32> (%08x)", op); return 4;}
1006int arcompact_handle04_2f_33_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_33> (%08x)", op); return 4;}
1007int arcompact_handle04_2f_34_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_34> (%08x)", op); return 4;}
1008int arcompact_handle04_2f_35_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_35> (%08x)", op); return 4;}
1009int arcompact_handle04_2f_36_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_36> (%08x)", op); return 4;}
1010int arcompact_handle04_2f_37_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_37> (%08x)", op); return 4;}
1011int arcompact_handle04_2f_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_38> (%08x)", op); return 4;}
1012int arcompact_handle04_2f_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_39> (%08x)", op); return 4;}
1013int arcompact_handle04_2f_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3a> (%08x)", op); return 4;}
1014int arcompact_handle04_2f_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3b> (%08x)", op); return 4;}
1015int arcompact_handle04_2f_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3c> (%08x)", op); return 4;}
1016int arcompact_handle04_2f_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3d> (%08x)", op); return 4;}
1017int arcompact_handle04_2f_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3e> (%08x)", op); return 4;}
1018
1019int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
1020{
1021   int size = 4;
1022   UINT8 subinstr3 = (op & 0x07000000) >> 24;
1023   subinstr3 |= ((op & 0x00007000) >> 12) << 3;
1024
1025   op &= ~0x07007000;
1026
1027   switch (subinstr3)
1028   {
1029      case 0x00: size = arcompact_handle04_2f_3f_00_dasm(DASM_PARAMS); break; // illegal
1030      case 0x01: size = arcompact_handle04_2f_3f_01_dasm(DASM_PARAMS); break; // SLEEP
1031      case 0x02: size = arcompact_handle04_2f_3f_02_dasm(DASM_PARAMS); break; // SWI / TRAP9
1032      case 0x03: size = arcompact_handle04_2f_3f_03_dasm(DASM_PARAMS); break; // SYNC
1033      case 0x04: size = arcompact_handle04_2f_3f_04_dasm(DASM_PARAMS); break; // RTIE
1034      case 0x05: size = arcompact_handle04_2f_3f_05_dasm(DASM_PARAMS); break; // BRK
1035      case 0x06: size = arcompact_handle04_2f_3f_06_dasm(DASM_PARAMS); break; // illegal
1036      case 0x07: size = arcompact_handle04_2f_3f_07_dasm(DASM_PARAMS); break; // illegal
1037      case 0x08: size = arcompact_handle04_2f_3f_08_dasm(DASM_PARAMS); break; // illegal
1038      case 0x09: size = arcompact_handle04_2f_3f_09_dasm(DASM_PARAMS); break; // illegal
1039      case 0x0a: size = arcompact_handle04_2f_3f_0a_dasm(DASM_PARAMS); break; // illegal
1040      case 0x0b: size = arcompact_handle04_2f_3f_0b_dasm(DASM_PARAMS); break; // illegal
1041      case 0x0c: size = arcompact_handle04_2f_3f_0c_dasm(DASM_PARAMS); break; // illegal
1042      case 0x0d: size = arcompact_handle04_2f_3f_0d_dasm(DASM_PARAMS); break; // illegal
1043      case 0x0e: size = arcompact_handle04_2f_3f_0e_dasm(DASM_PARAMS); break; // illegal
1044      case 0x0f: size = arcompact_handle04_2f_3f_0f_dasm(DASM_PARAMS); break; // illegal
1045      case 0x10: size = arcompact_handle04_2f_3f_10_dasm(DASM_PARAMS); break; // illegal
1046      case 0x11: size = arcompact_handle04_2f_3f_11_dasm(DASM_PARAMS); break; // illegal
1047      case 0x12: size = arcompact_handle04_2f_3f_12_dasm(DASM_PARAMS); break; // illegal
1048      case 0x13: size = arcompact_handle04_2f_3f_13_dasm(DASM_PARAMS); break; // illegal
1049      case 0x14: size = arcompact_handle04_2f_3f_14_dasm(DASM_PARAMS); break; // illegal
1050      case 0x15: size = arcompact_handle04_2f_3f_15_dasm(DASM_PARAMS); break; // illegal
1051      case 0x16: size = arcompact_handle04_2f_3f_16_dasm(DASM_PARAMS); break; // illegal
1052      case 0x17: size = arcompact_handle04_2f_3f_17_dasm(DASM_PARAMS); break; // illegal
1053      case 0x18: size = arcompact_handle04_2f_3f_18_dasm(DASM_PARAMS); break; // illegal
1054      case 0x19: size = arcompact_handle04_2f_3f_19_dasm(DASM_PARAMS); break; // illegal
1055      case 0x1a: size = arcompact_handle04_2f_3f_1a_dasm(DASM_PARAMS); break; // illegal
1056      case 0x1b: size = arcompact_handle04_2f_3f_1b_dasm(DASM_PARAMS); break; // illegal
1057      case 0x1c: size = arcompact_handle04_2f_3f_1c_dasm(DASM_PARAMS); break; // illegal
1058      case 0x1d: size = arcompact_handle04_2f_3f_1d_dasm(DASM_PARAMS); break; // illegal
1059      case 0x1e: size = arcompact_handle04_2f_3f_1e_dasm(DASM_PARAMS); break; // illegal
1060      case 0x1f: size = arcompact_handle04_2f_3f_1f_dasm(DASM_PARAMS); break; // illegal
1061      case 0x20: size = arcompact_handle04_2f_3f_20_dasm(DASM_PARAMS); break; // illegal
1062      case 0x21: size = arcompact_handle04_2f_3f_21_dasm(DASM_PARAMS); break; // illegal
1063      case 0x22: size = arcompact_handle04_2f_3f_22_dasm(DASM_PARAMS); break; // illegal
1064      case 0x23: size = arcompact_handle04_2f_3f_23_dasm(DASM_PARAMS); break; // illegal
1065      case 0x24: size = arcompact_handle04_2f_3f_24_dasm(DASM_PARAMS); break; // illegal
1066      case 0x25: size = arcompact_handle04_2f_3f_25_dasm(DASM_PARAMS); break; // illegal
1067      case 0x26: size = arcompact_handle04_2f_3f_26_dasm(DASM_PARAMS); break; // illegal
1068      case 0x27: size = arcompact_handle04_2f_3f_27_dasm(DASM_PARAMS); break; // illegal
1069      case 0x28: size = arcompact_handle04_2f_3f_28_dasm(DASM_PARAMS); break; // illegal
1070      case 0x29: size = arcompact_handle04_2f_3f_29_dasm(DASM_PARAMS); break; // illegal
1071      case 0x2a: size = arcompact_handle04_2f_3f_2a_dasm(DASM_PARAMS); break; // illegal
1072      case 0x2b: size = arcompact_handle04_2f_3f_2b_dasm(DASM_PARAMS); break; // illegal
1073      case 0x2c: size = arcompact_handle04_2f_3f_2c_dasm(DASM_PARAMS); break; // illegal
1074      case 0x2d: size = arcompact_handle04_2f_3f_2d_dasm(DASM_PARAMS); break; // illegal
1075      case 0x2e: size = arcompact_handle04_2f_3f_2e_dasm(DASM_PARAMS); break; // illegal
1076      case 0x2f: size = arcompact_handle04_2f_3f_2f_dasm(DASM_PARAMS); break; // illegal
1077      case 0x30: size = arcompact_handle04_2f_3f_30_dasm(DASM_PARAMS); break; // illegal
1078      case 0x31: size = arcompact_handle04_2f_3f_31_dasm(DASM_PARAMS); break; // illegal
1079      case 0x32: size = arcompact_handle04_2f_3f_32_dasm(DASM_PARAMS); break; // illegal
1080      case 0x33: size = arcompact_handle04_2f_3f_33_dasm(DASM_PARAMS); break; // illegal
1081      case 0x34: size = arcompact_handle04_2f_3f_34_dasm(DASM_PARAMS); break; // illegal
1082      case 0x35: size = arcompact_handle04_2f_3f_35_dasm(DASM_PARAMS); break; // illegal
1083      case 0x36: size = arcompact_handle04_2f_3f_36_dasm(DASM_PARAMS); break; // illegal
1084      case 0x37: size = arcompact_handle04_2f_3f_37_dasm(DASM_PARAMS); break; // illegal
1085      case 0x38: size = arcompact_handle04_2f_3f_38_dasm(DASM_PARAMS); break; // illegal
1086      case 0x39: size = arcompact_handle04_2f_3f_39_dasm(DASM_PARAMS); break; // illegal
1087      case 0x3a: size = arcompact_handle04_2f_3f_3a_dasm(DASM_PARAMS); break; // illegal
1088      case 0x3b: size = arcompact_handle04_2f_3f_3b_dasm(DASM_PARAMS); break; // illegal
1089      case 0x3c: size = arcompact_handle04_2f_3f_3c_dasm(DASM_PARAMS); break; // illegal
1090      case 0x3d: size = arcompact_handle04_2f_3f_3d_dasm(DASM_PARAMS); break; // illegal
1091      case 0x3e: size = arcompact_handle04_2f_3f_3e_dasm(DASM_PARAMS); break; // illegal
1092      case 0x3f: size = arcompact_handle04_2f_3f_3f_dasm(DASM_PARAMS); break; // illegal
1093   }
1094
1095   return size;
1096}
1097
1098int arcompact_handle04_2f_3f_00_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_00> (%08x)", op); return 4;}
1099int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32)  { print("SLEEP (%08x)", op); return 4;}
1100int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32)  { print("SWI / TRAP0 (%08x)", op); return 4;}
1101int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32)  { print("SYNC (%08x)", op); return 4;}
1102int arcompact_handle04_2f_3f_04_dasm(DASM_OPS_32)  { print("RTIE (%08x)", op); return 4;}
1103int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32)  { print("BRK (%08x)", op); return 4;}
1104int arcompact_handle04_2f_3f_06_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_06> (%08x)", op); return 4;}
1105int arcompact_handle04_2f_3f_07_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_07> (%08x)", op); return 4;}
1106int arcompact_handle04_2f_3f_08_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_08> (%08x)", op); return 4;}
1107int arcompact_handle04_2f_3f_09_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_09> (%08x)", op); return 4;}
1108int arcompact_handle04_2f_3f_0a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0a> (%08x)", op); return 4;}
1109int arcompact_handle04_2f_3f_0b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0b> (%08x)", op); return 4;}
1110int arcompact_handle04_2f_3f_0c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0c> (%08x)", op); return 4;}
1111int arcompact_handle04_2f_3f_0d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0d> (%08x)", op); return 4;}
1112int arcompact_handle04_2f_3f_0e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0e> (%08x)", op); return 4;}
1113int arcompact_handle04_2f_3f_0f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0f> (%08x)", op); return 4;}
1114int arcompact_handle04_2f_3f_10_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_10> (%08x)", op); return 4;}
1115int arcompact_handle04_2f_3f_11_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_11> (%08x)", op); return 4;}
1116int arcompact_handle04_2f_3f_12_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_12> (%08x)", op); return 4;}
1117int arcompact_handle04_2f_3f_13_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_13> (%08x)", op); return 4;}
1118int arcompact_handle04_2f_3f_14_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_14> (%08x)", op); return 4;}
1119int arcompact_handle04_2f_3f_15_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_15> (%08x)", op); return 4;}
1120int arcompact_handle04_2f_3f_16_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_16> (%08x)", op); return 4;}
1121int arcompact_handle04_2f_3f_17_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_17> (%08x)", op); return 4;}
1122int arcompact_handle04_2f_3f_18_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_18> (%08x)", op); return 4;}
1123int arcompact_handle04_2f_3f_19_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_19> (%08x)", op); return 4;}
1124int arcompact_handle04_2f_3f_1a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1a> (%08x)", op); return 4;}
1125int arcompact_handle04_2f_3f_1b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1b> (%08x)", op); return 4;}
1126int arcompact_handle04_2f_3f_1c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1c> (%08x)", op); return 4;}
1127int arcompact_handle04_2f_3f_1d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1d> (%08x)", op); return 4;}
1128int arcompact_handle04_2f_3f_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1e> (%08x)", op); return 4;}
1129int arcompact_handle04_2f_3f_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1f> (%08x)", op); return 4;}
1130int arcompact_handle04_2f_3f_20_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_20> (%08x)", op); return 4;}
1131int arcompact_handle04_2f_3f_21_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_21> (%08x)", op); return 4;}
1132int arcompact_handle04_2f_3f_22_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_22> (%08x)", op); return 4;}
1133int arcompact_handle04_2f_3f_23_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_23> (%08x)", op); return 4;}
1134int arcompact_handle04_2f_3f_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_24> (%08x)", op); return 4;}
1135int arcompact_handle04_2f_3f_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_25> (%08x)", op); return 4;}
1136int arcompact_handle04_2f_3f_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_26> (%08x)", op); return 4;}
1137int arcompact_handle04_2f_3f_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_27> (%08x)", op); return 4;}
1138int arcompact_handle04_2f_3f_28_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_28> (%08x)", op); return 4;}
1139int arcompact_handle04_2f_3f_29_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_29> (%08x)", op); return 4;}
1140int arcompact_handle04_2f_3f_2a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2a> (%08x)", op); return 4;}
1141int arcompact_handle04_2f_3f_2b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2b> (%08x)", op); return 4;}
1142int arcompact_handle04_2f_3f_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2c> (%08x)", op); return 4;}
1143int arcompact_handle04_2f_3f_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2d> (%08x)", op); return 4;}
1144int arcompact_handle04_2f_3f_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2e> (%08x)", op); return 4;}
1145int arcompact_handle04_2f_3f_2f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2f> (%08x)", op); return 4;}
1146int arcompact_handle04_2f_3f_30_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_30> (%08x)", op); return 4;}
1147int arcompact_handle04_2f_3f_31_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_31> (%08x)", op); return 4;}
1148int arcompact_handle04_2f_3f_32_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_32> (%08x)", op); return 4;}
1149int arcompact_handle04_2f_3f_33_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_33> (%08x)", op); return 4;}
1150int arcompact_handle04_2f_3f_34_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_34> (%08x)", op); return 4;}
1151int arcompact_handle04_2f_3f_35_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_35> (%08x)", op); return 4;}
1152int arcompact_handle04_2f_3f_36_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_36> (%08x)", op); return 4;}
1153int arcompact_handle04_2f_3f_37_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_37> (%08x)", op); return 4;}
1154int arcompact_handle04_2f_3f_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_38> (%08x)", op); return 4;}
1155int arcompact_handle04_2f_3f_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_39> (%08x)", op); return 4;}
1156int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3a> (%08x)", op); return 4;}
1157int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3b> (%08x)", op); return 4;}
1158int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3c> (%08x)", op); return 4;}
1159int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3d> (%08x)", op); return 4;}
1160int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3e> (%08x)", op); return 4;}
1161int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3f> (%08x)", op); return 4;}
1162
1163
1164
1165
1166
1167
1168
1169
1170int arcompact_handle04_30_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x30) (%08x)", op); return 4;}
1171int arcompact_handle04_31_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x31) (%08x)", op); return 4;}
1172int arcompact_handle04_32_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x32) (%08x)", op); return 4;}
1173int arcompact_handle04_33_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x33) (%08x)", op); return 4;}
1174int arcompact_handle04_34_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x34) (%08x)", op); return 4;}
1175int arcompact_handle04_35_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x35) (%08x)", op); return 4;}
1176int arcompact_handle04_36_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x36) (%08x)", op); return 4;}
1177int arcompact_handle04_37_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x37) (%08x)", op); return 4;}
1178int arcompact_handle04_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_38> (%08x)", op); return 4;}
1179int arcompact_handle04_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_39> (%08x)", op); return 4;}
1180int arcompact_handle04_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_3a> (%08x)", op); return 4;}
1181int arcompact_handle04_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_3b> (%08x)", op); return 4;}
1182int arcompact_handle04_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_3c> (%08x)", op); return 4;}
1183int arcompact_handle04_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_3d> (%08x)", op); return 4;}
1184int arcompact_handle04_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_3e> (%08x)", op); return 4;}
1185int arcompact_handle04_3f_dasm(DASM_OPS_32)  { print("<illegal 0x04_3f> (%08x)", op); return 4;}
1186
1187
1188
1189
1190
1191// this is an Extension ALU group, maybe optional on some CPUs?
1192int arcompact_handle05_dasm(DASM_OPS_32)
1193{
1194   int size = 4;
1195   UINT8 subinstr = (op & 0x003f0000) >> 16;
1196   op &= ~0x003f0000;
1197
1198   switch (subinstr)
1199   {
1200      case 0x00: size = arcompact_handle05_00_dasm(DASM_PARAMS); break; // ASL
1201      case 0x01: size = arcompact_handle05_01_dasm(DASM_PARAMS); break; // LSR
1202      case 0x02: size = arcompact_handle05_02_dasm(DASM_PARAMS); break; // ASR
1203      case 0x03: size = arcompact_handle05_03_dasm(DASM_PARAMS); break; // ROR
1204      case 0x04: size = arcompact_handle05_04_dasm(DASM_PARAMS); break; // MUL64
1205      case 0x05: size = arcompact_handle05_05_dasm(DASM_PARAMS); break; // MULU64
1206      case 0x06: size = arcompact_handle05_06_dasm(DASM_PARAMS); break; // ADDS
1207      case 0x07: size = arcompact_handle05_07_dasm(DASM_PARAMS); break; // SUBS
1208      case 0x08: size = arcompact_handle05_08_dasm(DASM_PARAMS); break; // DIVAW
1209      case 0x09: size = arcompact_handle05_09_dasm(DASM_PARAMS); break; // illegal
1210      case 0x0a: size = arcompact_handle05_0a_dasm(DASM_PARAMS); break; // ASLS
1211      case 0x0b: size = arcompact_handle05_0b_dasm(DASM_PARAMS); break; // ASRS
1212      case 0x0c: size = arcompact_handle05_0c_dasm(DASM_PARAMS); break; // illegal
1213      case 0x0d: size = arcompact_handle05_0d_dasm(DASM_PARAMS); break; // illegal
1214      case 0x0e: size = arcompact_handle05_0e_dasm(DASM_PARAMS); break; // illegal
1215      case 0x0f: size = arcompact_handle05_0f_dasm(DASM_PARAMS); break; // illegal
1216      case 0x10: size = arcompact_handle05_10_dasm(DASM_PARAMS); break; // illegal
1217      case 0x11: size = arcompact_handle05_11_dasm(DASM_PARAMS); break; // illegal
1218      case 0x12: size = arcompact_handle05_12_dasm(DASM_PARAMS); break; // illegal
1219      case 0x13: size = arcompact_handle05_13_dasm(DASM_PARAMS); break; // illegal
1220      case 0x14: size = arcompact_handle05_14_dasm(DASM_PARAMS); break; // illegal
1221      case 0x15: size = arcompact_handle05_15_dasm(DASM_PARAMS); break; // illegal
1222      case 0x16: size = arcompact_handle05_16_dasm(DASM_PARAMS); break; // illegal
1223      case 0x17: size = arcompact_handle05_17_dasm(DASM_PARAMS); break; // illegal
1224      case 0x18: size = arcompact_handle05_18_dasm(DASM_PARAMS); break; // illegal
1225      case 0x19: size = arcompact_handle05_19_dasm(DASM_PARAMS); break; // illegal
1226      case 0x1a: size = arcompact_handle05_1a_dasm(DASM_PARAMS); break; // illegal
1227      case 0x1b: size = arcompact_handle05_1b_dasm(DASM_PARAMS); break; // illegal
1228      case 0x1c: size = arcompact_handle05_1c_dasm(DASM_PARAMS); break; // illegal
1229      case 0x1d: size = arcompact_handle05_1d_dasm(DASM_PARAMS); break; // illegal
1230      case 0x1e: size = arcompact_handle05_1e_dasm(DASM_PARAMS); break; // illegal
1231      case 0x1f: size = arcompact_handle05_1f_dasm(DASM_PARAMS); break; // illegal
1232      case 0x20: size = arcompact_handle05_20_dasm(DASM_PARAMS); break; // illegal
1233      case 0x21: size = arcompact_handle05_21_dasm(DASM_PARAMS); break; // illegal
1234      case 0x22: size = arcompact_handle05_22_dasm(DASM_PARAMS); break; // illegal
1235      case 0x23: size = arcompact_handle05_23_dasm(DASM_PARAMS); break; // illegal
1236      case 0x24: size = arcompact_handle05_24_dasm(DASM_PARAMS); break; // illegal
1237      case 0x25: size = arcompact_handle05_25_dasm(DASM_PARAMS); break; // illegal
1238      case 0x26: size = arcompact_handle05_26_dasm(DASM_PARAMS); break; // illegal
1239      case 0x27: size = arcompact_handle05_27_dasm(DASM_PARAMS); break; // illegal
1240      case 0x28: size = arcompact_handle05_28_dasm(DASM_PARAMS); break; // ADDSDW
1241      case 0x29: size = arcompact_handle05_29_dasm(DASM_PARAMS); break; // SUBSDW
1242      case 0x2a: size = arcompact_handle05_2a_dasm(DASM_PARAMS); break; // illegal
1243      case 0x2b: size = arcompact_handle05_2b_dasm(DASM_PARAMS); break; // illegal
1244      case 0x2c: size = arcompact_handle05_2c_dasm(DASM_PARAMS); break; // illegal
1245      case 0x2d: size = arcompact_handle05_2d_dasm(DASM_PARAMS); break; // illegal
1246      case 0x2e: size = arcompact_handle05_2e_dasm(DASM_PARAMS); break; // illegal
1247      case 0x2f: size = arcompact_handle05_2f_dasm(DASM_PARAMS); break; // SOPs
1248      case 0x30: size = arcompact_handle05_30_dasm(DASM_PARAMS); break; // illegal
1249      case 0x31: size = arcompact_handle05_31_dasm(DASM_PARAMS); break; // illegal
1250      case 0x32: size = arcompact_handle05_32_dasm(DASM_PARAMS); break; // illegal
1251      case 0x33: size = arcompact_handle05_33_dasm(DASM_PARAMS); break; // illegal
1252      case 0x34: size = arcompact_handle05_34_dasm(DASM_PARAMS); break; // illegal
1253      case 0x35: size = arcompact_handle05_35_dasm(DASM_PARAMS); break; // illegal
1254      case 0x36: size = arcompact_handle05_36_dasm(DASM_PARAMS); break; // illegal
1255      case 0x37: size = arcompact_handle05_37_dasm(DASM_PARAMS); break; // illegal
1256      case 0x38: size = arcompact_handle05_38_dasm(DASM_PARAMS); break; // illegal
1257      case 0x39: size = arcompact_handle05_39_dasm(DASM_PARAMS); break; // illegal
1258      case 0x3a: size = arcompact_handle05_3a_dasm(DASM_PARAMS); break; // illegal
1259      case 0x3b: size = arcompact_handle05_3b_dasm(DASM_PARAMS); break; // illegal
1260      case 0x3c: size = arcompact_handle05_3c_dasm(DASM_PARAMS); break; // illegal
1261      case 0x3d: size = arcompact_handle05_3d_dasm(DASM_PARAMS); break; // illegal
1262      case 0x3e: size = arcompact_handle05_3e_dasm(DASM_PARAMS); break; // illegal
1263      case 0x3f: size = arcompact_handle05_3f_dasm(DASM_PARAMS); break; // illegal
1264   }
1265
1266   return size;
1267}
1268
1269int arcompact_handle05_00_dasm(DASM_OPS_32)  { print("ASL a <- b asl c (%08x)", op); return 4;}
1270int arcompact_handle05_01_dasm(DASM_OPS_32)  { print("LSR a <- b lsr c (%08x)", op); return 4;}
1271int arcompact_handle05_02_dasm(DASM_OPS_32)  { print("ASR a <- b asr c (%08x)", op); return 4;}
1272int arcompact_handle05_03_dasm(DASM_OPS_32)  { print("ROR a <- b ror c (%08x)", op); return 4;}
1273int arcompact_handle05_04_dasm(DASM_OPS_32)  { print("MUL64 mulres <- b * c (%08x)", op); return 4;}
1274int arcompact_handle05_05_dasm(DASM_OPS_32)  { print("MULU64 mulres <- b * c (%08x)", op); return 4;}
1275int arcompact_handle05_06_dasm(DASM_OPS_32)  { print("ADDS a <- sat32 (b + c) (%08x)", op); return 4;}
1276int arcompact_handle05_07_dasm(DASM_OPS_32)  { print("SUBS a <- sat32 (b + c) (%08x)", op); return 4;}
1277int arcompact_handle05_08_dasm(DASM_OPS_32)  { print("DIVAW (%08x)", op); return 4;}
1278int arcompact_handle05_09_dasm(DASM_OPS_32)  { print("<illegal 0x05_09> (%08x)", op); return 4;}
1279int arcompact_handle05_0a_dasm(DASM_OPS_32)  { print("ASLS a <- sat32 (b << c) (%08x)", op); return 4;}
1280int arcompact_handle05_0b_dasm(DASM_OPS_32)  { print("ASRS a ,- sat32 (b >> c) (%08x)", op); return 4;}
1281int arcompact_handle05_0c_dasm(DASM_OPS_32)  { print("<illegal 0x05_0c> (%08x)", op); return 4;}
1282int arcompact_handle05_0d_dasm(DASM_OPS_32)  { print("<illegal 0x05_0d> (%08x)", op); return 4;}
1283int arcompact_handle05_0e_dasm(DASM_OPS_32)  { print("<illegal 0x05_0e> (%08x)", op); return 4;}
1284int arcompact_handle05_0f_dasm(DASM_OPS_32)  { print("<illegal 0x05_0f> (%08x)", op); return 4;}
1285int arcompact_handle05_10_dasm(DASM_OPS_32)  { print("<illegal 0x05_10> (%08x)", op); return 4;}
1286int arcompact_handle05_11_dasm(DASM_OPS_32)  { print("<illegal 0x05_11> (%08x)", op); return 4;}
1287int arcompact_handle05_12_dasm(DASM_OPS_32)  { print("<illegal 0x05_12> (%08x)", op); return 4;}
1288int arcompact_handle05_13_dasm(DASM_OPS_32)  { print("<illegal 0x05_13> (%08x)", op); return 4;}
1289int arcompact_handle05_14_dasm(DASM_OPS_32)  { print("<illegal 0x05_14> (%08x)", op); return 4;}
1290int arcompact_handle05_15_dasm(DASM_OPS_32)  { print("<illegal 0x05_15> (%08x)", op); return 4;}
1291int arcompact_handle05_16_dasm(DASM_OPS_32)  { print("<illegal 0x05_16> (%08x)", op); return 4;}
1292int arcompact_handle05_17_dasm(DASM_OPS_32)  { print("<illegal 0x05_17> (%08x)", op); return 4;}
1293int arcompact_handle05_18_dasm(DASM_OPS_32)  { print("<illegal 0x05_18> (%08x)", op); return 4;}
1294int arcompact_handle05_19_dasm(DASM_OPS_32)  { print("<illegal 0x05_19> (%08x)", op); return 4;}
1295int arcompact_handle05_1a_dasm(DASM_OPS_32)  { print("<illegal 0x05_1a> (%08x)", op); return 4;}
1296int arcompact_handle05_1b_dasm(DASM_OPS_32)  { print("<illegal 0x05_1b> (%08x)", op); return 4;}
1297int arcompact_handle05_1c_dasm(DASM_OPS_32)  { print("<illegal 0x05_1c> (%08x)", op); return 4;}
1298int arcompact_handle05_1d_dasm(DASM_OPS_32)  { print("<illegal 0x05_1d> (%08x)", op); return 4;}
1299int arcompact_handle05_1e_dasm(DASM_OPS_32)  { print("<illegal 0x05_1e> (%08x)", op); return 4;}
1300int arcompact_handle05_1f_dasm(DASM_OPS_32)  { print("<illegal 0x05_1f> (%08x)", op); return 4;}
1301int arcompact_handle05_20_dasm(DASM_OPS_32)  { print("<illegal 0x05_20> (%08x)", op); return 4;}
1302int arcompact_handle05_21_dasm(DASM_OPS_32)  { print("<illegal 0x05_21> (%08x)", op); return 4;}
1303int arcompact_handle05_22_dasm(DASM_OPS_32)  { print("<illegal 0x05_22> (%08x)", op); return 4;}
1304int arcompact_handle05_23_dasm(DASM_OPS_32)  { print("<illegal 0x05_23> (%08x)", op); return 4;}
1305int arcompact_handle05_24_dasm(DASM_OPS_32)  { print("<illegal 0x05_24> (%08x)", op); return 4;}
1306int arcompact_handle05_25_dasm(DASM_OPS_32)  { print("<illegal 0x05_25> (%08x)", op); return 4;}
1307int arcompact_handle05_26_dasm(DASM_OPS_32)  { print("<illegal 0x05_26> (%08x)", op); return 4;}
1308int arcompact_handle05_27_dasm(DASM_OPS_32)  { print("<illegal 0x05_27> (%08x)", op); return 4;}
1309int arcompact_handle05_28_dasm(DASM_OPS_32)  { print("ADDSDW (%08x)", op); return 4;}
1310int arcompact_handle05_29_dasm(DASM_OPS_32)  { print("SUBSDW (%08x)", op); return 4;}
1311int arcompact_handle05_2a_dasm(DASM_OPS_32)  { print("<illegal 0x05_2a> (%08x)", op); return 4;}
1312int arcompact_handle05_2b_dasm(DASM_OPS_32)  { print("<illegal 0x05_2b> (%08x)", op); return 4;}
1313int arcompact_handle05_2c_dasm(DASM_OPS_32)  { print("<illegal 0x05_2c> (%08x)", op); return 4;}
1314int arcompact_handle05_2d_dasm(DASM_OPS_32)  { print("<illegal 0x05_2d> (%08x)", op); return 4;}
1315int arcompact_handle05_2e_dasm(DASM_OPS_32)  { print("<illegal 0x05_2e> (%08x)", op); return 4;}
1316int arcompact_handle05_2f_dasm(DASM_OPS_32)  { print("SOP (another table) (%08x)", op); return 4;}
1317int arcompact_handle05_30_dasm(DASM_OPS_32)  { print("<illegal 0x05_30> (%08x)", op); return 4;}
1318int arcompact_handle05_31_dasm(DASM_OPS_32)  { print("<illegal 0x05_31> (%08x)", op); return 4;}
1319int arcompact_handle05_32_dasm(DASM_OPS_32)  { print("<illegal 0x05_32> (%08x)", op); return 4;}
1320int arcompact_handle05_33_dasm(DASM_OPS_32)  { print("<illegal 0x05_33> (%08x)", op); return 4;}
1321int arcompact_handle05_34_dasm(DASM_OPS_32)  { print("<illegal 0x05_34> (%08x)", op); return 4;}
1322int arcompact_handle05_35_dasm(DASM_OPS_32)  { print("<illegal 0x05_35> (%08x)", op); return 4;}
1323int arcompact_handle05_36_dasm(DASM_OPS_32)  { print("<illegal 0x05_36> (%08x)", op); return 4;}
1324int arcompact_handle05_37_dasm(DASM_OPS_32)  { print("<illegal 0x05_37> (%08x)", op); return 4;}
1325int arcompact_handle05_38_dasm(DASM_OPS_32)  { print("<illegal 0x05_38> (%08x)", op); return 4;}
1326int arcompact_handle05_39_dasm(DASM_OPS_32)  { print("<illegal 0x05_39> (%08x)", op); return 4;}
1327int arcompact_handle05_3a_dasm(DASM_OPS_32)  { print("<illegal 0x05_3a> (%08x)", op); return 4;}
1328int arcompact_handle05_3b_dasm(DASM_OPS_32)  { print("<illegal 0x05_3b> (%08x)", op); return 4;}
1329int arcompact_handle05_3c_dasm(DASM_OPS_32)  { print("<illegal 0x05_3c> (%08x)", op); return 4;}
1330int arcompact_handle05_3d_dasm(DASM_OPS_32)  { print("<illegal 0x05_3d> (%08x)", op); return 4;}
1331int arcompact_handle05_3e_dasm(DASM_OPS_32)  { print("<illegal 0x05_3e> (%08x)", op); return 4;}
1332int arcompact_handle05_3f_dasm(DASM_OPS_32)  { print("<illegal 0x05_3f> (%08x)", op); return 4;}
1333
1334
1335
1336int arcompact_handle06_dasm(DASM_OPS_32)
1337{
1338   print("op a,b,c (06 ARC ext) (%08x)", op );
1339   return 4;
1340}
1341
1342int arcompact_handle07_dasm(DASM_OPS_32)
1343{
1344   print("op a,b,c (07 User ext) (%08x)", op );
1345   return 4;
1346}
1347
1348int arcompact_handle08_dasm(DASM_OPS_32)
1349{
1350   print("op a,b,c (08 User ext) (%08x)", op );
1351   return 4;
1352}
1353
1354int arcompact_handle09_dasm(DASM_OPS_32)
1355{
1356   print("op a,b,c (09 Market ext) (%08x)", op );
1357   return 4;
1358}
1359
1360int arcompact_handle0a_dasm(DASM_OPS_32)
1361{
1362   print("op a,b,c (0a Market ext) (%08x)",  op );
1363   return 4;
1364}
1365
1366int arcompact_handle0b_dasm(DASM_OPS_32)
1367{
1368   print("op a,b,c (0b Market ext) (%08x)",  op );
1369   return 4;
1370}
1371
1372
1373
1374
1375int arcompact_handle0c_dasm(DASM_OPS_16)
1376{
1377   int size = 2;
1378   UINT8 subinstr = (op & 0x0018) >> 3;
1379   op &= ~0x0018;
1380
1381   switch (subinstr)
1382   {
1383      case 0x00: size = arcompact_handle0c_00_dasm(DASM_PARAMS); break; // LD_S
1384      case 0x01: size = arcompact_handle0c_01_dasm(DASM_PARAMS); break; // LDB_S
1385      case 0x02: size = arcompact_handle0c_02_dasm(DASM_PARAMS); break; // LDW_S
1386      case 0x03: size = arcompact_handle0c_03_dasm(DASM_PARAMS); break; // ADD_S
1387   }
1388   return size;
1389}
1390
1391
1392int arcompact_handle0c_00_dasm(DASM_OPS_16)
1393{
1394   int size = 2;
1395   print("LD_S a <- m[b + c].long (%04x)", op);
1396   return size;
1397}
1398
1399int arcompact_handle0c_01_dasm(DASM_OPS_16)
1400{
1401   int size = 2;
1402   print("LDB_S a <- m[b + c].byte (%04x)", op);
1403   return size;
1404}
1405
1406int arcompact_handle0c_02_dasm(DASM_OPS_16)
1407{
1408   int size = 2;
1409   print("LDW_S a <- m[b + c].word (%04x)", op);
1410   return size;
1411}
1412
1413int arcompact_handle0c_03_dasm(DASM_OPS_16)
1414{
1415   int size = 2;
1416   print("ADD_S a <- b + c (%04x)", op);
1417   return size;
1418}
1419
1420
1421int arcompact_handle0d_dasm(DASM_OPS_16)
1422{
1423   int size = 2;
1424   UINT8 subinstr = (op & 0x0018) >> 3;
1425   op &= ~0x0018;
1426
1427   switch (subinstr)
1428   {
1429      case 0x00: size = arcompact_handle0d_00_dasm(DASM_PARAMS); break; // ADD_S
1430      case 0x01: size = arcompact_handle0d_01_dasm(DASM_PARAMS); break; // SUB_S
1431      case 0x02: size = arcompact_handle0d_02_dasm(DASM_PARAMS); break; // ASL_S
1432      case 0x03: size = arcompact_handle0d_03_dasm(DASM_PARAMS); break; // ASR_S
1433   }
1434   return size;
1435}
1436
1437int arcompact_handle0d_00_dasm(DASM_OPS_16)
1438{
1439   int size = 2;
1440   print("ADD_S c <- b + u3 (%04x)", op);
1441   return size;
1442}
1443
1444int arcompact_handle0d_01_dasm(DASM_OPS_16)
1445{
1446   int size = 2;
1447   print("SUB_S c <- b - u3 (%04x)", op);
1448   return size;
1449}
1450
1451int arcompact_handle0d_02_dasm(DASM_OPS_16)
1452{
1453   int size = 2;
1454   print("ASL_S c <- b asl u3 (%04x)", op);
1455   return size;
1456}
1457
1458int arcompact_handle0d_03_dasm(DASM_OPS_16)
1459{
1460   int size = 2;
1461   print("ASL_S c <- b asr u3 (%04x)", op);
1462   return size;
1463}
1464
1465
1466int arcompact_handle0e_dasm(DASM_OPS_16)
1467{
1468   int size = 2;
1469   UINT8 subinstr = (op & 0x0018) >> 3;
1470   op &= ~0x0018;
1471
1472   switch (subinstr)
1473   {
1474      case 0x00: size = arcompact_handle0e_00_dasm(DASM_PARAMS); break; // ADD_S
1475      case 0x01: size = arcompact_handle0e_01_dasm(DASM_PARAMS); break; // MOV_S
1476      case 0x02: size = arcompact_handle0e_02_dasm(DASM_PARAMS); break; // CMP_S
1477      case 0x03: size = arcompact_handle0e_03_dasm(DASM_PARAMS); break; // MOV_S
1478   }
1479   return size;
1480}
1481
1482
1483
1484
1485#define GROUP_0e_GET_h \
1486   h =  ((op & 0x0007) << 3); \
1487    h |= ((op & 0x00e0) >> 5); \
1488
1489// this is as messed up as the rest of the 16-bit alignment in LE mode...
1490
1491#define GET_LIMM \
1492   limm = oprom[4] | (oprom[5] << 8); \
1493   limm |= (oprom[2] << 16) | (oprom[3] << 24); \
1494
1495
1496int arcompact_handle0e_00_dasm(DASM_OPS_16)
1497{
1498   int h;
1499   int size = 2;
1500
1501   GROUP_0e_GET_h;
1502
1503   if (h == LIMM_REG)
1504   {
1505      UINT32 limm;
1506      GET_LIMM;
1507      size = 6;
1508      print("ADD_S b <- b + (%08x) (%04x)", limm, op);
1509   }
1510   else
1511   {
1512
1513      print("ADD_S b <- b + (r%d) (%04x)", h, op);
1514   }
1515
1516   return size;
1517}
1518
1519int arcompact_handle0e_01_dasm(DASM_OPS_16)
1520{
1521   int h;
1522   int size = 2;
1523   GROUP_0e_GET_h;
1524
1525   if (h == LIMM_REG)
1526   {
1527      UINT32 limm;
1528      GET_LIMM;
1529      size = 6;
1530      print("MOV_S b <- (%08x)  (%04x)", limm, op);
1531   }
1532   else
1533   {
1534      print("MOV_S b <- (r%d)  (%04x)", h, op);
1535   }
1536   return size;
1537}
1538
1539int arcompact_handle0e_02_dasm(DASM_OPS_16)
1540{
1541   int h;
1542   int size = 2;
1543   GROUP_0e_GET_h;
1544
1545   if (h == LIMM_REG)
1546   {
1547      UINT32 limm;
1548      GET_LIMM;
1549      size = 6;
1550      print("CMP_S b - (%08x) (%04x)", limm, op);
1551   }
1552   else
1553   {
1554      print("CMP_S b - (r%d) (%04x)", h, op);
1555   }
1556   return size;
1557}
1558
1559int arcompact_handle0e_03_dasm(DASM_OPS_16)
1560{
1561   int h;
1562   int size = 2;
1563   GROUP_0e_GET_h;
1564
1565   if (h == LIMM_REG)
1566   {
1567      UINT32 limm;
1568      GET_LIMM;
1569      size = 6;
1570      print("MOV_S (%08x) <- b (%04x)", limm, op);
1571   }
1572   else
1573   {
1574      print("MOV_S (r%d) <- b (%04x)", h, op);
1575   }
1576
1577   return size;
1578}
1579
1580
1581
1582int arcompact_handle0f_dasm(DASM_OPS_16)
1583{
1584   // General Register Instructions (16-bit)
1585   // 01111 bbb ccc iiiii
1586   UINT8 subinstr = (op & 0x01f) >> 0;
1587   //print("%s (%04x)", table0f[subinstr], op & ~0xf81f);
1588     
1589   switch (subinstr)
1590   {
1591   
1592      default:
1593         print("%s (%04x)", table0f[subinstr], op & ~0xf81f);
1594         break;
1595
1596      case 0x00:
1597      {
1598         // General Operations w/ Register
1599         // 01111 bbb iii 00000
1600         UINT8 subinstr2 = (op & 0x00e0) >> 5;
1601
1602         switch (subinstr2)
1603         {
1604            default:
1605               print("%s (%04x)", table0f_00[subinstr2], op & ~0xf8ff);
1606               return 2;
1607
1608            case 0x7:
1609            {
1610               // General Operations w/o Register
1611               // 01111 iii 111 00000
1612               UINT8 subinstr3 = (op & 0x0700) >> 8;
1613
1614               print("%s (%04x)", table0f_00_07[subinstr3], op & ~0xffff);
1615
1616               return 2;
1617            }
1618         }
1619      }
1620   }
1621   
1622   return 2;
1623}
1624
1625int arcompact_handle10_dasm(DASM_OPS_16)
1626{
1627   print("LD_S (%04x)",  op);
1628   return 2;
1629}
1630
1631int arcompact_handle11_dasm(DASM_OPS_16)
1632{
1633   print("LDB_S (%04x)", op);
1634   return 2;
1635}
1636
1637int arcompact_handle12_dasm(DASM_OPS_16)
1638{
1639   print("LDW_S (%04x)", op);
1640   return 2;
1641}
1642
1643int arcompact_handle13_dasm(DASM_OPS_16)
1644{
1645   print("LSW_S.X (%04x)", op);
1646   return 2;
1647}
1648
1649int arcompact_handle14_dasm(DASM_OPS_16)
1650{
1651   print("ST_S (%04x)", op);
1652   return 2;
1653}
1654
1655int arcompact_handle15_dasm(DASM_OPS_16)
1656{
1657   print("STB_S (%04x)", op);
1658   return 2;
1659}
1660
1661int arcompact_handle16_dasm(DASM_OPS_16)
1662{
1663   print("STW_S (%04x)",  op);
1664   return 2;
1665}
1666
1667int arcompact_handle17_dasm(DASM_OPS_16)
1668{
1669   int size = 2;
1670   UINT8 subinstr = (op & 0x00e0) >> 5;
1671   op &= ~0x00e0;
1672
1673   switch (subinstr)
1674   {
1675      case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
1676      case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
1677      case 0x02: size = arcompact_handle17_02_dasm(DASM_PARAMS); break; // ASR_S
1678      case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
1679      case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
1680      case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
1681      case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
1682      case 0x07: size = arcompact_handle17_07_dasm(DASM_PARAMS); break; // BTST_S
1683   }
1684
1685   return size;
1686}
1687
1688int arcompact_handle17_00_dasm(DASM_OPS_16)
1689{
1690   int size = 2;
1691   print("ASL_S b <- b asl u5 (%04x)",  op);
1692   return size;
1693}
1694
1695int arcompact_handle17_01_dasm(DASM_OPS_16)
1696{
1697   int size = 2;
1698   print("LSR_S b <- b lsr u5 (%04x)",  op);
1699   return size;
1700}
1701
1702int arcompact_handle17_02_dasm(DASM_OPS_16)
1703{
1704   int size = 2;
1705   print("ASR_S b <- b asr u5 (%04x)",  op);
1706   return size;
1707}
1708
1709int arcompact_handle17_03_dasm(DASM_OPS_16)
1710{
1711   int size = 2;
1712   print("SUB_S b <- b - u5 (%04x)",  op);
1713   return size;
1714}
1715
1716int arcompact_handle17_04_dasm(DASM_OPS_16)
1717{
1718   int size = 2;
1719   print("BSET_S b <- b | (1 << u5) (%04x)",  op);
1720   return size;
1721}
1722
1723int arcompact_handle17_05_dasm(DASM_OPS_16)
1724{
1725   int size = 2;
1726   print("BCLR_S b <- b & !(1 << u5) (%04x)",  op);
1727   return size;
1728}
1729
1730int arcompact_handle17_06_dasm(DASM_OPS_16)
1731{
1732   int size = 2;
1733   print("BMSK_S (%04x)",  op);
1734   return size;
1735}
1736
1737int arcompact_handle17_07_dasm(DASM_OPS_16)
1738{
1739   int size = 2;
1740   print("BTST_S (%04x)",  op);
1741   return size;
1742}
1743
1744int arcompact_handle18_dasm(DASM_OPS_16)
1745{
1746   int size = 2;
1747   // Stack Pointer Based Instructions (16-bit)
1748   // 11000 bbb iii uuuuu
1749   UINT8 subinstr = (op & 0x00e0) >> 5;
1750   op &= ~0x00e0;
1751
1752   switch (subinstr)
1753   {
1754      case 0x00: size = arcompact_handle18_00_dasm(DASM_PARAMS); break; // LD_S (SP)
1755      case 0x01: size = arcompact_handle18_01_dasm(DASM_PARAMS); break; // LDB_S (SP)
1756      case 0x02: size = arcompact_handle18_02_dasm(DASM_PARAMS); break; // ST_S (SP)
1757      case 0x03: size = arcompact_handle18_03_dasm(DASM_PARAMS); break; // STB_S (SP)
1758      case 0x04: size = arcompact_handle18_04_dasm(DASM_PARAMS); break; // ADD_S (SP)
1759      case 0x05: size = arcompact_handle18_05_dasm(DASM_PARAMS); break; // subtable 18_05
1760      case 0x06: size = arcompact_handle18_06_dasm(DASM_PARAMS); break; // subtable 18_06
1761      case 0x07: size = arcompact_handle18_07_dasm(DASM_PARAMS); break; // subtable 18_07
1762   }
1763
1764   return size;
1765}
1766
1767// op bits remaining for 0x18_xx subgroups 0x071f
1768
1769int arcompact_handle18_00_dasm(DASM_OPS_16)
1770{
1771   print("LD_S (SP) (%04x)",  op);
1772   return 2;
1773}
1774
1775int arcompact_handle18_01_dasm(DASM_OPS_16)
1776{
1777   print("LDB_S (SP) (%04x)",  op);
1778   return 2;
1779}
1780
1781int arcompact_handle18_02_dasm(DASM_OPS_16)
1782{
1783   print("ST_S (SP) (%04x)",  op);
1784   return 2;
1785}
1786
1787int arcompact_handle18_03_dasm(DASM_OPS_16)
1788{
1789   print("STB_S (SP) (%04x)",  op);
1790   return 2;
1791}
1792
1793int arcompact_handle18_04_dasm(DASM_OPS_16)
1794{
1795   print("ADD_S (SP) (%04x)",  op);
1796   return 2;
1797}
1798
1799
1800
1801
1802
1803int arcompact_handle18_05_dasm(DASM_OPS_16)
1804{
1805   int size = 2;
1806   UINT8 subinstr2 = (op & 0x0700) >> 8;
1807   op &= ~0x001f;
1808
1809   switch (subinstr2)
1810   {
1811      case 0x00: size = arcompact_handle18_05_00_dasm(DASM_PARAMS); break; // ADD_S (SP)
1812      case 0x01: size = arcompact_handle18_05_01_dasm(DASM_PARAMS); break; // SUB_S (SP)
1813      case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
1814      case 0x03: size = arcompact_handle18_05_03_dasm(DASM_PARAMS); break; // <illegal 0x18_05_03>
1815      case 0x04: size = arcompact_handle18_05_04_dasm(DASM_PARAMS); break; // <illegal 0x18_05_04>
1816      case 0x05: size = arcompact_handle18_05_05_dasm(DASM_PARAMS); break; // <illegal 0x18_05_05>
1817      case 0x06: size = arcompact_handle18_05_06_dasm(DASM_PARAMS); break; // <illegal 0x18_05_06>
1818      case 0x07: size = arcompact_handle18_05_07_dasm(DASM_PARAMS); break; // <illegal 0x18_05_07>
1819   }
1820
1821   return size;
1822}
1823// op bits remaining for 0x18_05_xx subgroups 0x001f
1824int arcompact_handle18_05_00_dasm(DASM_OPS_16)
1825{
1826   int u = op & 0x001f;
1827   op &= ~0x001f; // all bits now used
1828
1829   print("ADD_S %02x (SP)", u);
1830   return 2;
1831
1832}
1833
1834int arcompact_handle18_05_01_dasm(DASM_OPS_16)
1835{
1836   int u = op & 0x001f;
1837   op &= ~0x001f; // all bits now used
1838
1839   print("SUB_S %02x (SP)", u);
1840   return 2;
1841}
1842
1843
1844int arcompact_handle18_05_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_02> (%04x)", op); return 2;}
1845int arcompact_handle18_05_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_03> (%04x)", op); return 2;}
1846int arcompact_handle18_05_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_04> (%04x)", op); return 2;}
1847int arcompact_handle18_05_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_05> (%04x)", op); return 2;}
1848int arcompact_handle18_05_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_06> (%04x)", op); return 2;}
1849int arcompact_handle18_05_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_07> (%04x)", op); return 2;}
1850
1851
1852int arcompact_handle18_06_dasm(DASM_OPS_16)
1853{
1854   int size = 2;
1855   UINT8 subinstr2 = (op & 0x001f) >> 0;
1856   op &= ~0x001f;
1857
1858   switch (subinstr2)
1859   {
1860      case 0x00: size = arcompact_handle18_06_00_dasm(DASM_PARAMS); break; // <illegal 0x18_06_00>
1861      case 0x01: size = arcompact_handle18_06_01_dasm(DASM_PARAMS); break; // POP_S b
1862      case 0x02: size = arcompact_handle18_06_02_dasm(DASM_PARAMS); break; // <illegal 0x18_06_02>
1863      case 0x03: size = arcompact_handle18_06_03_dasm(DASM_PARAMS); break; // <illegal 0x18_06_03>
1864      case 0x04: size = arcompact_handle18_06_04_dasm(DASM_PARAMS); break; // <illegal 0x18_06_04>
1865      case 0x05: size = arcompact_handle18_06_05_dasm(DASM_PARAMS); break; // <illegal 0x18_06_05>
1866      case 0x06: size = arcompact_handle18_06_06_dasm(DASM_PARAMS); break; // <illegal 0x18_06_06>
1867      case 0x07: size = arcompact_handle18_06_07_dasm(DASM_PARAMS); break; // <illegal 0x18_06_07>
1868      case 0x08: size = arcompact_handle18_06_08_dasm(DASM_PARAMS); break; // <illegal 0x18_06_08>
1869      case 0x09: size = arcompact_handle18_06_09_dasm(DASM_PARAMS); break; // <illegal 0x18_06_09>
1870      case 0x0a: size = arcompact_handle18_06_0a_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0a>
1871      case 0x0b: size = arcompact_handle18_06_0b_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0b>
1872      case 0x0c: size = arcompact_handle18_06_0c_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0c>
1873      case 0x0d: size = arcompact_handle18_06_0d_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0d>
1874      case 0x0e: size = arcompact_handle18_06_0e_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0e>
1875      case 0x0f: size = arcompact_handle18_06_0f_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0f>
1876      case 0x10: size = arcompact_handle18_06_10_dasm(DASM_PARAMS); break; // <illegal 0x18_06_10>
1877      case 0x11: size = arcompact_handle18_06_11_dasm(DASM_PARAMS); break; // POP_S blink
1878      case 0x12: size = arcompact_handle18_06_12_dasm(DASM_PARAMS); break; // <illegal 0x18_06_12>
1879      case 0x13: size = arcompact_handle18_06_13_dasm(DASM_PARAMS); break; // <illegal 0x18_06_13>
1880      case 0x14: size = arcompact_handle18_06_14_dasm(DASM_PARAMS); break; // <illegal 0x18_06_14>
1881      case 0x15: size = arcompact_handle18_06_15_dasm(DASM_PARAMS); break; // <illegal 0x18_06_15>
1882      case 0x16: size = arcompact_handle18_06_16_dasm(DASM_PARAMS); break; // <illegal 0x18_06_16>
1883      case 0x17: size = arcompact_handle18_06_17_dasm(DASM_PARAMS); break; // <illegal 0x18_06_17>
1884      case 0x18: size = arcompact_handle18_06_18_dasm(DASM_PARAMS); break; // <illegal 0x18_06_18>
1885      case 0x19: size = arcompact_handle18_06_19_dasm(DASM_PARAMS); break; // <illegal 0x18_06_19>
1886      case 0x1a: size = arcompact_handle18_06_1a_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1a>
1887      case 0x1b: size = arcompact_handle18_06_1b_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1b>
1888      case 0x1c: size = arcompact_handle18_06_1c_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1c>
1889      case 0x1d: size = arcompact_handle18_06_1d_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1d>
1890      case 0x1e: size = arcompact_handle18_06_1e_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1e>
1891      case 0x1f: size = arcompact_handle18_06_1f_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1f>
1892   }
1893
1894   return size;
1895}
1896
1897
1898// op bits remaining for 0x18_06_xx subgroups 0x0700
1899int arcompact_handle18_06_00_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_00> (%04x)",  op); return 2;}
1900
1901int arcompact_handle18_06_01_dasm(DASM_OPS_16)
1902{
1903   int b = (op & 0x0700) >> 8;
1904   op &= ~0x0700; // all bits now used
1905
1906   print("POP_S [%02x]", b);
1907
1908   return 2;
1909}
1910
1911int arcompact_handle18_06_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_02> (%04x)", op); return 2;}
1912int arcompact_handle18_06_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_03> (%04x)", op); return 2;}
1913int arcompact_handle18_06_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_04> (%04x)", op); return 2;}
1914int arcompact_handle18_06_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_05> (%04x)", op); return 2;}
1915int arcompact_handle18_06_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_06> (%04x)", op); return 2;}
1916int arcompact_handle18_06_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_07> (%04x)", op); return 2;}
1917int arcompact_handle18_06_08_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_08> (%04x)", op); return 2;}
1918int arcompact_handle18_06_09_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_09> (%04x)", op); return 2;}
1919int arcompact_handle18_06_0a_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0a> (%04x)", op); return 2;}
1920int arcompact_handle18_06_0b_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0b> (%04x)", op); return 2;}
1921int arcompact_handle18_06_0c_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0c> (%04x)", op); return 2;}
1922int arcompact_handle18_06_0d_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0d> (%04x)", op); return 2;}
1923int arcompact_handle18_06_0e_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0e> (%04x)", op); return 2;}
1924int arcompact_handle18_06_0f_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0f> (%04x)", op); return 2;}
1925int arcompact_handle18_06_10_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_10> (%04x)", op); return 2;}
1926
1927int arcompact_handle18_06_11_dasm(DASM_OPS_16)
1928{
1929   int res = (op & 0x0700) >> 8;
1930   op &= ~0x0700; // all bits now used
1931
1932   if (res)
1933      print("POP_S [BLINK] (Reserved Bits set %04x)", op);
1934   else
1935      print("POP_S [BLINK]");
1936
1937   return 2;
1938}
1939
1940int arcompact_handle18_06_12_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_12> (%04x)",  op); return 2;}
1941int arcompact_handle18_06_13_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_13> (%04x)",  op); return 2;}
1942int arcompact_handle18_06_14_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_14> (%04x)",  op); return 2;}
1943int arcompact_handle18_06_15_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_15> (%04x)",  op); return 2;}
1944int arcompact_handle18_06_16_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_16> (%04x)",  op); return 2;}
1945int arcompact_handle18_06_17_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_17> (%04x)",  op); return 2;}
1946int arcompact_handle18_06_18_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_18> (%04x)",  op); return 2;}
1947int arcompact_handle18_06_19_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_19> (%04x)",  op); return 2;}
1948int arcompact_handle18_06_1a_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1a> (%04x)",  op); return 2;}
1949int arcompact_handle18_06_1b_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1b> (%04x)",  op); return 2;}
1950int arcompact_handle18_06_1c_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1c> (%04x)",  op); return 2;}
1951int arcompact_handle18_06_1d_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1d> (%04x)",  op); return 2;}
1952int arcompact_handle18_06_1e_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1e> (%04x)",  op); return 2;}
1953int arcompact_handle18_06_1f_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1f> (%04x)",  op); return 2;}
1954
1955
1956
1957
1958int arcompact_handle18_07_dasm(DASM_OPS_16)
1959{
1960   int size = 2;
1961   UINT8 subinstr2 = (op & 0x001f) >> 0;
1962   op &= ~0x001f;
1963
1964   switch (subinstr2)
1965   {
1966      case 0x00: size = arcompact_handle18_07_00_dasm(DASM_PARAMS); break; // <illegal 0x18_07_00>
1967      case 0x01: size = arcompact_handle18_07_01_dasm(DASM_PARAMS); break; // PUSH_S b
1968      case 0x02: size = arcompact_handle18_07_02_dasm(DASM_PARAMS); break; // <illegal 0x18_07_02>
1969      case 0x03: size = arcompact_handle18_07_03_dasm(DASM_PARAMS); break; // <illegal 0x18_07_03>
1970      case 0x04: size = arcompact_handle18_07_04_dasm(DASM_PARAMS); break; // <illegal 0x18_07_04>
1971      case 0x05: size = arcompact_handle18_07_05_dasm(DASM_PARAMS); break; // <illegal 0x18_07_05>
1972      case 0x06: size = arcompact_handle18_07_06_dasm(DASM_PARAMS); break; // <illegal 0x18_07_06>
1973      case 0x07: size = arcompact_handle18_07_07_dasm(DASM_PARAMS); break; // <illegal 0x18_07_07>
1974      case 0x08: size = arcompact_handle18_07_08_dasm(DASM_PARAMS); break; // <illegal 0x18_07_08>
1975      case 0x09: size = arcompact_handle18_07_09_dasm(DASM_PARAMS); break; // <illegal 0x18_07_09>
1976      case 0x0a: size = arcompact_handle18_07_0a_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0a>
1977      case 0x0b: size = arcompact_handle18_07_0b_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0b>
1978      case 0x0c: size = arcompact_handle18_07_0c_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0c>
1979      case 0x0d: size = arcompact_handle18_07_0d_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0d>
1980      case 0x0e: size = arcompact_handle18_07_0e_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0e>
1981      case 0x0f: size = arcompact_handle18_07_0f_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0f>
1982      case 0x10: size = arcompact_handle18_07_10_dasm(DASM_PARAMS); break; // <illegal 0x18_07_10>
1983      case 0x11: size = arcompact_handle18_07_11_dasm(DASM_PARAMS); break; // PUSH_S blink
1984      case 0x12: size = arcompact_handle18_07_12_dasm(DASM_PARAMS); break; // <illegal 0x18_07_12>
1985      case 0x13: size = arcompact_handle18_07_13_dasm(DASM_PARAMS); break; // <illegal 0x18_07_13>
1986      case 0x14: size = arcompact_handle18_07_14_dasm(DASM_PARAMS); break; // <illegal 0x18_07_14>
1987      case 0x15: size = arcompact_handle18_07_15_dasm(DASM_PARAMS); break; // <illegal 0x18_07_15>
1988      case 0x16: size = arcompact_handle18_07_16_dasm(DASM_PARAMS); break; // <illegal 0x18_07_16>
1989      case 0x17: size = arcompact_handle18_07_17_dasm(DASM_PARAMS); break; // <illegal 0x18_07_17>
1990      case 0x18: size = arcompact_handle18_07_18_dasm(DASM_PARAMS); break; // <illegal 0x18_07_18>
1991      case 0x19: size = arcompact_handle18_07_19_dasm(DASM_PARAMS); break; // <illegal 0x18_07_19>
1992      case 0x1a: size = arcompact_handle18_07_1a_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1a>
1993      case 0x1b: size = arcompact_handle18_07_1b_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1b>
1994      case 0x1c: size = arcompact_handle18_07_1c_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1c>
1995      case 0x1d: size = arcompact_handle18_07_1d_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1d>
1996      case 0x1e: size = arcompact_handle18_07_1e_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1e>
1997      case 0x1f: size = arcompact_handle18_07_1f_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1f>
1998   }
1999
2000   return size;
2001}
2002
2003
2004// op bits remaining for 0x18_07_xx subgroups 0x0700
2005int arcompact_handle18_07_00_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_00> (%04x)",  op); return 2;}
2006
2007int arcompact_handle18_07_01_dasm(DASM_OPS_16)
2008{
2009   int b = (op & 0x0700) >> 8;
2010   op &= ~0x0700; // all bits now used
2011
2012   print("PUSH_S [%02x]", b);
2013
2014   return 2;
2015}
2016
2017int arcompact_handle18_07_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_02> (%04x)", op); return 2;}
2018int arcompact_handle18_07_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_03> (%04x)", op); return 2;}
2019int arcompact_handle18_07_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_04> (%04x)", op); return 2;}
2020int arcompact_handle18_07_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_05> (%04x)", op); return 2;}
2021int arcompact_handle18_07_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_06> (%04x)", op); return 2;}
2022int arcompact_handle18_07_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_07> (%04x)", op); return 2;}
2023int arcompact_handle18_07_08_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_08> (%04x)", op); return 2;}
2024int arcompact_handle18_07_09_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_09> (%04x)", op); return 2;}
2025int arcompact_handle18_07_0a_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0a> (%04x)", op); return 2;}
2026int arcompact_handle18_07_0b_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0b> (%04x)", op); return 2;}
2027int arcompact_handle18_07_0c_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0c> (%04x)", op); return 2;}
2028int arcompact_handle18_07_0d_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0d> (%04x)", op); return 2;}
2029int arcompact_handle18_07_0e_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0e> (%04x)", op); return 2;}
2030int arcompact_handle18_07_0f_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0f> (%04x)", op); return 2;}
2031int arcompact_handle18_07_10_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_10> (%04x)", op); return 2;}
2032
2033int arcompact_handle18_07_11_dasm(DASM_OPS_16)
2034{
2035   int res = (op & 0x0700) >> 8;
2036   op &= ~0x0700; // all bits now used
2037
2038   if (res)
2039      print("PUSH_S [BLINK] (Reserved Bits set %04x)", op);
2040   else
2041      print("PUSH_S [BLINK]");
2042
2043   return 2;
2044}
2045
2046int arcompact_handle18_07_12_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_12> (%04x)",  op); return 2;}
2047int arcompact_handle18_07_13_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_13> (%04x)",  op); return 2;}
2048int arcompact_handle18_07_14_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_14> (%04x)",  op); return 2;}
2049int arcompact_handle18_07_15_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_15> (%04x)",  op); return 2;}
2050int arcompact_handle18_07_16_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_16> (%04x)",  op); return 2;}
2051int arcompact_handle18_07_17_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_17> (%04x)",  op); return 2;}
2052int arcompact_handle18_07_18_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_18> (%04x)",  op); return 2;}
2053int arcompact_handle18_07_19_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_19> (%04x)",  op); return 2;}
2054int arcompact_handle18_07_1a_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1a> (%04x)",  op); return 2;}
2055int arcompact_handle18_07_1b_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1b> (%04x)",  op); return 2;}
2056int arcompact_handle18_07_1c_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1c> (%04x)",  op); return 2;}
2057int arcompact_handle18_07_1d_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1d> (%04x)",  op); return 2;}
2058int arcompact_handle18_07_1e_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1e> (%04x)",  op); return 2;}
2059int arcompact_handle18_07_1f_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1f> (%04x)",  op); return 2;}
2060
2061
2062int arcompact_handle19_dasm(DASM_OPS_16)
2063{
2064   int size = 2;
2065   UINT8 subinstr = (op & 0x0600) >> 9;
2066   op &= ~0x0600;
2067
2068   switch (subinstr)
2069   {
2070      case 0x00: size = arcompact_handle19_00_dasm(DASM_PARAMS); break; // LD_S (GP)
2071      case 0x01: size = arcompact_handle19_01_dasm(DASM_PARAMS); break; // LDB_S (GP)
2072      case 0x02: size = arcompact_handle19_02_dasm(DASM_PARAMS); break; // LDW_S (GP)
2073      case 0x03: size = arcompact_handle19_03_dasm(DASM_PARAMS); break; // ADD_S (GP)
2074   }
2075   return size;
2076}
2077
2078int arcompact_handle19_00_dasm(DASM_OPS_16)  { print("LD_S r0 <- m[GP + s11].long (%04x)",  op); return 2;}
2079int arcompact_handle19_01_dasm(DASM_OPS_16)  { print("LDB_S r0 <- m[GP + s9].byte (%04x)",  op); return 2;}
2080int arcompact_handle19_02_dasm(DASM_OPS_16)  { print("LDW_S r0 <- m[GP + s10].word (%04x)",  op); return 2;}
2081int arcompact_handle19_03_dasm(DASM_OPS_16)  { print("ADD_S r0 <- GP + s11 (%04x)",  op); return 2;}
2082
2083
2084
2085int arcompact_handle1a_dasm(DASM_OPS_16)
2086{
2087   print("PCL Instr (%04x)", op);
2088   return 2;
2089}
2090
2091int arcompact_handle1b_dasm(DASM_OPS_16)
2092{
2093   print("MOV_S (%04x)", op);
2094   return 2;
2095}
2096
2097int arcompact_handle1c_dasm(DASM_OPS_16)
2098{
2099   int size = 2;
2100   UINT8 subinstr = (op & 0x0080) >> 7;
2101   op &= ~0x0080;
2102
2103   switch (subinstr)
2104   {
2105      case 0x00: size = arcompact_handle1c_00_dasm(DASM_PARAMS); break; // ADD_S
2106      case 0x01: size = arcompact_handle1c_01_dasm(DASM_PARAMS); break; // CMP_S
2107   }
2108   return size;
2109}
2110
2111int arcompact_handle1c_00_dasm(DASM_OPS_16)  { print("ADD_S b <- b + u7 (%04x)",  op); return 2;}
2112int arcompact_handle1c_01_dasm(DASM_OPS_16)  { print("CMP_S b - u7 (%04x)",  op); return 2;}
2113
2114
2115int arcompact_handle1d_dasm(DASM_OPS_16)
2116{
2117   int size = 2;
2118   UINT8 subinstr = (op & 0x0080) >> 7;
2119   op &= ~0x0080;
2120
2121   switch (subinstr)
2122   {
2123      case 0x00: size = arcompact_handle1d_00_dasm(DASM_PARAMS); break; // BREQ_S
2124      case 0x01: size = arcompact_handle1d_01_dasm(DASM_PARAMS); break; // BRNE_S
2125   }
2126   return size;
2127}
2128
2129int arcompact_handle1d_00_dasm(DASM_OPS_16)  { print("BREQ_S (%04x)",  op); return 2;}
2130int arcompact_handle1d_01_dasm(DASM_OPS_16)  { print("BRNE_S (%04x)",  op); return 2;}
2131
2132
2133int arcompact_handle1e_dasm(DASM_OPS_16)
2134{
2135   int size = 2;
2136   UINT8 subinstr = (op & 0x0600) >> 9;
2137   op &= ~0x0600;
2138
2139   switch (subinstr)
2140   {
2141      case 0x00: size = arcompact_handle1e_00_dasm(DASM_PARAMS); break; // B_S
2142      case 0x01: size = arcompact_handle1e_01_dasm(DASM_PARAMS); break; // BEQ_S
2143      case 0x02: size = arcompact_handle1e_02_dasm(DASM_PARAMS); break; // BNE_S
2144      case 0x03: size = arcompact_handle1e_03_dasm(DASM_PARAMS); break; // Bcc_S
2145   }
2146   return size;
2147}
2148
2149int arcompact_handle1e_00_dasm(DASM_OPS_16)  { print("B_S (%04x)",  op); return 2;}
2150int arcompact_handle1e_01_dasm(DASM_OPS_16)  { print("BEQ_S (%04x)",  op); return 2;}
2151int arcompact_handle1e_02_dasm(DASM_OPS_16)  { print("BNE_S (%04x)",  op); return 2;}
2152
2153
2154int arcompact_handle1e_03_dasm(DASM_OPS_16)
2155{
2156   
2157   int size = 2;
2158   UINT8 subinstr2 = (op & 0x01c0) >> 6;
2159   op &= ~0x01c0;
2160
2161   switch (subinstr2)
2162   {
2163      case 0x00: size = arcompact_handle1e_03_00_dasm(DASM_PARAMS); break; // BGT_S
2164      case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
2165      case 0x02: size = arcompact_handle1e_03_02_dasm(DASM_PARAMS); break; // BLT_S
2166      case 0x03: size = arcompact_handle1e_03_03_dasm(DASM_PARAMS); break; // BLE_S
2167      case 0x04: size = arcompact_handle1e_03_04_dasm(DASM_PARAMS); break; // BHI_S
2168      case 0x05: size = arcompact_handle1e_03_05_dasm(DASM_PARAMS); break; // BHS_S
2169      case 0x06: size = arcompact_handle1e_03_06_dasm(DASM_PARAMS); break; // BLO_S
2170      case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
2171   }
2172   return size;
2173
2174}
2175
2176int arcompact_handle1e_03_00_dasm(DASM_OPS_16)  { print("BGT_S (%04x)",  op); return 2;}
2177int arcompact_handle1e_03_01_dasm(DASM_OPS_16)  { print("BGE_S (%04x)",  op); return 2;}
2178int arcompact_handle1e_03_02_dasm(DASM_OPS_16)  { print("BLT_S (%04x)",  op); return 2;}
2179int arcompact_handle1e_03_03_dasm(DASM_OPS_16)  { print("BLE_S (%04x)",  op); return 2;}
2180int arcompact_handle1e_03_04_dasm(DASM_OPS_16)  { print("BHI_S (%04x)",  op); return 2;}
2181int arcompact_handle1e_03_05_dasm(DASM_OPS_16)  { print("BHS_S (%04x)",  op); return 2;}
2182int arcompact_handle1e_03_06_dasm(DASM_OPS_16)  { print("BLO_S (%04x)",  op); return 2;}
2183int arcompact_handle1e_03_07_dasm(DASM_OPS_16)  { print("BLS_S (%04x)",  op); return 2;}
2184
2185
2186
2187int arcompact_handle1f_dasm(DASM_OPS_16)
2188{
2189   print("BL_S (%04x)", op);
2190   return 2;
2191}
2192
252193CPU_DISASSEMBLE(arcompact)
262194{
272195   int size = 2;
trunk/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
r242341r242342
1/*********************************\
2
3 ARCompact disassembler
4
5\*********************************/
6
7#include "emu.h"
8#include <stdarg.h>
9
10#include "arcompactdasm_dispatch.h"
11#include "arcompactdasm_ops.h"
12
13int arcompact_handle00_dasm(DASM_OPS_32)
14{
15   int size = 4;
16   UINT8 subinstr = (op & 0x00010000) >> 16;
17   op &= ~0x00010000;
18
19   switch (subinstr)
20   {
21      case 0x00: size = arcompact_handle00_00_dasm(DASM_PARAMS); break; // Branch Conditionally
22      case 0x01: size = arcompact_handle00_01_dasm(DASM_PARAMS); break; // Branch Unconditionally Far
23   }
24
25   return size;
26}
27
28int arcompact_handle01_dasm(DASM_OPS_32)
29{
30   int size = 4;
31   UINT8 subinstr = (op & 0x00010000) >> 16;
32   op &= ~0x00010000;
33
34   switch (subinstr)
35   {
36      case 0x00: size = arcompact_handle01_00_dasm(DASM_PARAMS); break; // Branh & Link
37      case 0x01: size = arcompact_handle01_01_dasm(DASM_PARAMS); break; // Branch on Compare
38   }
39
40   return size;
41}
42
43int arcompact_handle01_00_dasm(DASM_OPS_32)
44{
45   int size = 4;
46   UINT8 subinstr2 = (op & 0x00020000) >> 17;
47   op &= ~0x00020000;
48
49   switch (subinstr2)
50   {
51      case 0x00: size = arcompact_handle01_00_00dasm(DASM_PARAMS); break; // Branch and Link Conditionally
52      case 0x01: size = arcompact_handle01_00_01dasm(DASM_PARAMS); break; // Branch and Link Unconditional Far
53   }
54
55   return size;
56}
57
58int arcompact_handle01_01_dasm(DASM_OPS_32)
59{
60   int size = 4;
61
62   UINT8 subinstr2 = (op & 0x00000010) >> 4;
63   op &= ~0x00000010;
64
65   switch (subinstr2)
66   {
67      case 0x00: size = arcompact_handle01_01_00_dasm(DASM_PARAMS); break; // Branch on Compare Register-Register
68      case 0x01: size = arcompact_handle01_01_01_dasm(DASM_PARAMS); break; // Branch on Compare/Bit Test Register-Immediate
69   }
70
71   return size;
72}
73
74int arcompact_handle01_01_00_dasm(DASM_OPS_32)
75{
76   int size = 4;
77   UINT8 subinstr3 = (op & 0x0000000f) >> 0;
78   op &= ~0x0000000f;
79
80   switch (subinstr3)
81   {
82      case 0x00: size = arcompact_handle01_01_00_00_dasm(DASM_PARAMS); break; // BREQ (reg-reg)
83      case 0x01: size = arcompact_handle01_01_00_01_dasm(DASM_PARAMS); break; // BRNE (reg-reg)
84      case 0x02: size = arcompact_handle01_01_00_02_dasm(DASM_PARAMS); break; // BRLT (reg-reg)
85      case 0x03: size = arcompact_handle01_01_00_03_dasm(DASM_PARAMS); break; // BRGE (reg-reg)
86      case 0x04: size = arcompact_handle01_01_00_04_dasm(DASM_PARAMS); break; // BRLO (reg-reg)
87      case 0x05: size = arcompact_handle01_01_00_05_dasm(DASM_PARAMS); break; // BRHS (reg-reg)
88      case 0x06: size = arcompact_handle01_01_00_06_dasm(DASM_PARAMS); break; // reserved
89      case 0x07: size = arcompact_handle01_01_00_07_dasm(DASM_PARAMS); break; // reserved
90      case 0x08: size = arcompact_handle01_01_00_08_dasm(DASM_PARAMS); break; // reserved
91      case 0x09: size = arcompact_handle01_01_00_09_dasm(DASM_PARAMS); break; // reserved
92      case 0x0a: size = arcompact_handle01_01_00_0a_dasm(DASM_PARAMS); break; // reserved
93      case 0x0b: size = arcompact_handle01_01_00_0b_dasm(DASM_PARAMS); break; // reserved
94      case 0x0c: size = arcompact_handle01_01_00_0c_dasm(DASM_PARAMS); break; // reserved
95      case 0x0d: size = arcompact_handle01_01_00_0d_dasm(DASM_PARAMS); break; // reserved
96      case 0x0e: size = arcompact_handle01_01_00_0e_dasm(DASM_PARAMS); break; // BBIT0 (reg-reg)
97      case 0x0f: size = arcompact_handle01_01_00_0f_dasm(DASM_PARAMS); break; // BBIT1 (reg-reg)
98   }
99
100   return size;
101}
102
103int arcompact_handle01_01_01_dasm(DASM_OPS_32) //  Branch on Compare/Bit Test Register-Immediate
104{
105   int size = 4;
106   UINT8 subinstr3 = (op & 0x0000000f) >> 0;
107   op &= ~0x0000000f;
108
109   switch (subinstr3)
110   {
111      case 0x00: size = arcompact_handle01_01_01_00_dasm(DASM_PARAMS); break; // BREQ (reg-imm)
112      case 0x01: size = arcompact_handle01_01_01_01_dasm(DASM_PARAMS); break; // BRNE (reg-imm)
113      case 0x02: size = arcompact_handle01_01_01_02_dasm(DASM_PARAMS); break; // BRLT (reg-imm)
114      case 0x03: size = arcompact_handle01_01_01_03_dasm(DASM_PARAMS); break; // BRGE (reg-imm)
115      case 0x04: size = arcompact_handle01_01_01_04_dasm(DASM_PARAMS); break; // BRLO (reg-imm)
116      case 0x05: size = arcompact_handle01_01_01_05_dasm(DASM_PARAMS); break; // BRHS (reg-imm)
117      case 0x06: size = arcompact_handle01_01_01_06_dasm(DASM_PARAMS); break; // reserved
118      case 0x07: size = arcompact_handle01_01_01_07_dasm(DASM_PARAMS); break; // reserved
119      case 0x08: size = arcompact_handle01_01_01_08_dasm(DASM_PARAMS); break; // reserved
120      case 0x09: size = arcompact_handle01_01_01_09_dasm(DASM_PARAMS); break; // reserved
121      case 0x0a: size = arcompact_handle01_01_01_0a_dasm(DASM_PARAMS); break; // reserved
122      case 0x0b: size = arcompact_handle01_01_01_0b_dasm(DASM_PARAMS); break; // reserved
123      case 0x0c: size = arcompact_handle01_01_01_0c_dasm(DASM_PARAMS); break; // reserved
124      case 0x0d: size = arcompact_handle01_01_01_0d_dasm(DASM_PARAMS); break; // reserved
125      case 0x0e: size = arcompact_handle01_01_01_0e_dasm(DASM_PARAMS); break; // BBIT0 (reg-imm)
126      case 0x0f: size = arcompact_handle01_01_01_0f_dasm(DASM_PARAMS); break; // BBIT1 (reg-imm)
127   }
128
129   return size;
130}
131
132int arcompact_handle04_dasm(DASM_OPS_32)
133{
134   int size = 4;
135   // General Operations
136
137   // bitpos
138   // 11111 111 11 111111 0 000 000000 0 00000
139   // fedcb a98 76 543210 f edc ba9876 5 43210
140   //
141   // 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA   General Operations *UN*Conditional Register to Register
142   // 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA   General Operations *UN*Conditional Register (Unsigned 6-bit IMM)
143   // 00100 bbb 10 iiiiii F BBB ssssss S SSSSS   General Operations *UN*Conditional Register (Signed 12-bit IMM)
144   
145   // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ   General Operations Conditional Register
146   // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ   General Operations Conditional Register (Unsigned 6-bit IMM)
147   UINT8 subinstr = (op & 0x003f0000) >> 16;
148   op &= ~0x003f0000;
149
150   switch (subinstr)
151   {
152      case 0x00: size = arcompact_handle04_00_dasm(DASM_PARAMS); break; // ADD
153      case 0x01: size = arcompact_handle04_01_dasm(DASM_PARAMS); break; // ADC
154      case 0x02: size = arcompact_handle04_02_dasm(DASM_PARAMS); break; // SUB
155      case 0x03: size = arcompact_handle04_03_dasm(DASM_PARAMS); break; // SBC
156      case 0x04: size = arcompact_handle04_04_dasm(DASM_PARAMS); break; // AND
157      case 0x05: size = arcompact_handle04_05_dasm(DASM_PARAMS); break; // OR
158      case 0x06: size = arcompact_handle04_06_dasm(DASM_PARAMS); break; // BIC
159      case 0x07: size = arcompact_handle04_07_dasm(DASM_PARAMS); break; // XOR
160      case 0x08: size = arcompact_handle04_08_dasm(DASM_PARAMS); break; // MAX
161      case 0x09: size = arcompact_handle04_09_dasm(DASM_PARAMS); break; // MIN
162      case 0x0a: size = arcompact_handle04_0a_dasm(DASM_PARAMS); break; // MOV
163      case 0x0b: size = arcompact_handle04_0b_dasm(DASM_PARAMS); break; // TST
164      case 0x0c: size = arcompact_handle04_0c_dasm(DASM_PARAMS); break; // CMP
165      case 0x0d: size = arcompact_handle04_0d_dasm(DASM_PARAMS); break; // RCMP
166      case 0x0e: size = arcompact_handle04_0e_dasm(DASM_PARAMS); break; // RSUB
167      case 0x0f: size = arcompact_handle04_0f_dasm(DASM_PARAMS); break; // BSET
168      case 0x10: size = arcompact_handle04_10_dasm(DASM_PARAMS); break; // BCLR
169      case 0x11: size = arcompact_handle04_11_dasm(DASM_PARAMS); break; // BTST
170      case 0x12: size = arcompact_handle04_12_dasm(DASM_PARAMS); break; // BXOR
171      case 0x13: size = arcompact_handle04_13_dasm(DASM_PARAMS); break; // BMSK
172      case 0x14: size = arcompact_handle04_14_dasm(DASM_PARAMS); break; // ADD1
173      case 0x15: size = arcompact_handle04_15_dasm(DASM_PARAMS); break; // ADD2
174      case 0x16: size = arcompact_handle04_16_dasm(DASM_PARAMS); break; // ADD3
175      case 0x17: size = arcompact_handle04_17_dasm(DASM_PARAMS); break; // SUB1
176      case 0x18: size = arcompact_handle04_18_dasm(DASM_PARAMS); break; // SUB2
177      case 0x19: size = arcompact_handle04_19_dasm(DASM_PARAMS); break; // SUB3
178      case 0x1a: size = arcompact_handle04_1a_dasm(DASM_PARAMS); break; // MPY *
179      case 0x1b: size = arcompact_handle04_1b_dasm(DASM_PARAMS); break; // MPYH *
180      case 0x1c: size = arcompact_handle04_1c_dasm(DASM_PARAMS); break; // MPYHU *
181      case 0x1d: size = arcompact_handle04_1d_dasm(DASM_PARAMS); break; // MPYU *
182      case 0x1e: size = arcompact_handle04_1e_dasm(DASM_PARAMS); break; // illegal
183      case 0x1f: size = arcompact_handle04_1f_dasm(DASM_PARAMS); break; // illegal
184      case 0x20: size = arcompact_handle04_20_dasm(DASM_PARAMS); break; // Jcc
185      case 0x21: size = arcompact_handle04_21_dasm(DASM_PARAMS); break; // Jcc.D
186      case 0x22: size = arcompact_handle04_22_dasm(DASM_PARAMS); break; // JLcc
187      case 0x23: size = arcompact_handle04_23_dasm(DASM_PARAMS); break; // JLcc.D
188      case 0x24: size = arcompact_handle04_24_dasm(DASM_PARAMS); break; // illegal
189      case 0x25: size = arcompact_handle04_25_dasm(DASM_PARAMS); break; // illegal
190      case 0x26: size = arcompact_handle04_26_dasm(DASM_PARAMS); break; // illegal
191      case 0x27: size = arcompact_handle04_27_dasm(DASM_PARAMS); break; // illegal
192      case 0x28: size = arcompact_handle04_28_dasm(DASM_PARAMS); break; // LPcc
193      case 0x29: size = arcompact_handle04_29_dasm(DASM_PARAMS); break; // FLAG
194      case 0x2a: size = arcompact_handle04_2a_dasm(DASM_PARAMS); break; // LR
195      case 0x2b: size = arcompact_handle04_2b_dasm(DASM_PARAMS); break; // SR
196      case 0x2c: size = arcompact_handle04_2c_dasm(DASM_PARAMS); break; // illegal
197      case 0x2d: size = arcompact_handle04_2d_dasm(DASM_PARAMS); break; // illegal
198      case 0x2e: size = arcompact_handle04_2e_dasm(DASM_PARAMS); break; // illegal
199      case 0x2f: size = arcompact_handle04_2f_dasm(DASM_PARAMS); break; // Sub Opcode
200      case 0x30: size = arcompact_handle04_30_dasm(DASM_PARAMS); break; // LD r-r
201      case 0x31: size = arcompact_handle04_31_dasm(DASM_PARAMS); break; // LD r-r
202      case 0x32: size = arcompact_handle04_32_dasm(DASM_PARAMS); break; // LD r-r
203      case 0x33: size = arcompact_handle04_33_dasm(DASM_PARAMS); break; // LD r-r
204      case 0x34: size = arcompact_handle04_34_dasm(DASM_PARAMS); break; // LD r-r
205      case 0x35: size = arcompact_handle04_35_dasm(DASM_PARAMS); break; // LD r-r
206      case 0x36: size = arcompact_handle04_36_dasm(DASM_PARAMS); break; // LD r-r
207      case 0x37: size = arcompact_handle04_37_dasm(DASM_PARAMS); break; // LD r-r
208      case 0x38: size = arcompact_handle04_38_dasm(DASM_PARAMS); break; // illegal
209      case 0x39: size = arcompact_handle04_39_dasm(DASM_PARAMS); break; // illegal
210      case 0x3a: size = arcompact_handle04_3a_dasm(DASM_PARAMS); break; // illegal
211      case 0x3b: size = arcompact_handle04_3b_dasm(DASM_PARAMS); break; // illegal
212      case 0x3c: size = arcompact_handle04_3c_dasm(DASM_PARAMS); break; // illegal
213      case 0x3d: size = arcompact_handle04_3d_dasm(DASM_PARAMS); break; // illegal
214      case 0x3e: size = arcompact_handle04_3e_dasm(DASM_PARAMS); break; // illegal
215      case 0x3f: size = arcompact_handle04_3f_dasm(DASM_PARAMS); break; // illegal
216   }
217
218   return size;
219}
220
221int arcompact_handle04_2f_dasm(DASM_OPS_32)
222{
223   int size = 4;
224   UINT8 subinstr2 = (op & 0x0000003f) >> 0;
225   op &= ~0x0000003f;
226
227   switch (subinstr2)
228   {
229      case 0x00: size = arcompact_handle04_2f_00_dasm(DASM_PARAMS); break; // ASL
230      case 0x01: size = arcompact_handle04_2f_01_dasm(DASM_PARAMS); break; // ASR
231      case 0x02: size = arcompact_handle04_2f_02_dasm(DASM_PARAMS); break; // LSR
232      case 0x03: size = arcompact_handle04_2f_03_dasm(DASM_PARAMS); break; // ROR
233      case 0x04: size = arcompact_handle04_2f_04_dasm(DASM_PARAMS); break; // RCC
234      case 0x05: size = arcompact_handle04_2f_05_dasm(DASM_PARAMS); break; // SEXB
235      case 0x06: size = arcompact_handle04_2f_06_dasm(DASM_PARAMS); break; // SEXW
236      case 0x07: size = arcompact_handle04_2f_07_dasm(DASM_PARAMS); break; // EXTB
237      case 0x08: size = arcompact_handle04_2f_08_dasm(DASM_PARAMS); break; // EXTW
238      case 0x09: size = arcompact_handle04_2f_09_dasm(DASM_PARAMS); break; // ABS
239      case 0x0a: size = arcompact_handle04_2f_0a_dasm(DASM_PARAMS); break; // NOT
240      case 0x0b: size = arcompact_handle04_2f_0b_dasm(DASM_PARAMS); break; // RLC
241      case 0x0c: size = arcompact_handle04_2f_0c_dasm(DASM_PARAMS); break; // EX
242      case 0x0d: size = arcompact_handle04_2f_0d_dasm(DASM_PARAMS); break; // illegal
243      case 0x0e: size = arcompact_handle04_2f_0e_dasm(DASM_PARAMS); break; // illegal
244      case 0x0f: size = arcompact_handle04_2f_0f_dasm(DASM_PARAMS); break; // illegal
245      case 0x10: size = arcompact_handle04_2f_10_dasm(DASM_PARAMS); break; // illegal
246      case 0x11: size = arcompact_handle04_2f_11_dasm(DASM_PARAMS); break; // illegal
247      case 0x12: size = arcompact_handle04_2f_12_dasm(DASM_PARAMS); break; // illegal
248      case 0x13: size = arcompact_handle04_2f_13_dasm(DASM_PARAMS); break; // illegal
249      case 0x14: size = arcompact_handle04_2f_14_dasm(DASM_PARAMS); break; // illegal
250      case 0x15: size = arcompact_handle04_2f_15_dasm(DASM_PARAMS); break; // illegal
251      case 0x16: size = arcompact_handle04_2f_16_dasm(DASM_PARAMS); break; // illegal
252      case 0x17: size = arcompact_handle04_2f_17_dasm(DASM_PARAMS); break; // illegal
253      case 0x18: size = arcompact_handle04_2f_18_dasm(DASM_PARAMS); break; // illegal
254      case 0x19: size = arcompact_handle04_2f_19_dasm(DASM_PARAMS); break; // illegal
255      case 0x1a: size = arcompact_handle04_2f_1a_dasm(DASM_PARAMS); break; // illegal
256      case 0x1b: size = arcompact_handle04_2f_1b_dasm(DASM_PARAMS); break; // illegal
257      case 0x1c: size = arcompact_handle04_2f_1c_dasm(DASM_PARAMS); break; // illegal
258      case 0x1d: size = arcompact_handle04_2f_1d_dasm(DASM_PARAMS); break; // illegal
259      case 0x1e: size = arcompact_handle04_2f_1e_dasm(DASM_PARAMS); break; // illegal
260      case 0x1f: size = arcompact_handle04_2f_1f_dasm(DASM_PARAMS); break; // illegal
261      case 0x20: size = arcompact_handle04_2f_20_dasm(DASM_PARAMS); break; // illegal
262      case 0x21: size = arcompact_handle04_2f_21_dasm(DASM_PARAMS); break; // illegal
263      case 0x22: size = arcompact_handle04_2f_22_dasm(DASM_PARAMS); break; // illegal
264      case 0x23: size = arcompact_handle04_2f_23_dasm(DASM_PARAMS); break; // illegal
265      case 0x24: size = arcompact_handle04_2f_24_dasm(DASM_PARAMS); break; // illegal
266      case 0x25: size = arcompact_handle04_2f_25_dasm(DASM_PARAMS); break; // illegal
267      case 0x26: size = arcompact_handle04_2f_26_dasm(DASM_PARAMS); break; // illegal
268      case 0x27: size = arcompact_handle04_2f_27_dasm(DASM_PARAMS); break; // illegal
269      case 0x28: size = arcompact_handle04_2f_28_dasm(DASM_PARAMS); break; // illegal
270      case 0x29: size = arcompact_handle04_2f_29_dasm(DASM_PARAMS); break; // illegal
271      case 0x2a: size = arcompact_handle04_2f_2a_dasm(DASM_PARAMS); break; // illegal
272      case 0x2b: size = arcompact_handle04_2f_2b_dasm(DASM_PARAMS); break; // illegal
273      case 0x2c: size = arcompact_handle04_2f_2c_dasm(DASM_PARAMS); break; // illegal
274      case 0x2d: size = arcompact_handle04_2f_2d_dasm(DASM_PARAMS); break; // illegal
275      case 0x2e: size = arcompact_handle04_2f_2e_dasm(DASM_PARAMS); break; // illegal
276      case 0x2f: size = arcompact_handle04_2f_2f_dasm(DASM_PARAMS); break; // illegal
277      case 0x30: size = arcompact_handle04_2f_30_dasm(DASM_PARAMS); break; // illegal
278      case 0x31: size = arcompact_handle04_2f_31_dasm(DASM_PARAMS); break; // illegal
279      case 0x32: size = arcompact_handle04_2f_32_dasm(DASM_PARAMS); break; // illegal
280      case 0x33: size = arcompact_handle04_2f_33_dasm(DASM_PARAMS); break; // illegal
281      case 0x34: size = arcompact_handle04_2f_34_dasm(DASM_PARAMS); break; // illegal
282      case 0x35: size = arcompact_handle04_2f_35_dasm(DASM_PARAMS); break; // illegal
283      case 0x36: size = arcompact_handle04_2f_36_dasm(DASM_PARAMS); break; // illegal
284      case 0x37: size = arcompact_handle04_2f_37_dasm(DASM_PARAMS); break; // illegal
285      case 0x38: size = arcompact_handle04_2f_38_dasm(DASM_PARAMS); break; // illegal
286      case 0x39: size = arcompact_handle04_2f_39_dasm(DASM_PARAMS); break; // illegal
287      case 0x3a: size = arcompact_handle04_2f_3a_dasm(DASM_PARAMS); break; // illegal
288      case 0x3b: size = arcompact_handle04_2f_3b_dasm(DASM_PARAMS); break; // illegal
289      case 0x3c: size = arcompact_handle04_2f_3c_dasm(DASM_PARAMS); break; // illegal
290      case 0x3d: size = arcompact_handle04_2f_3d_dasm(DASM_PARAMS); break; // illegal
291      case 0x3e: size = arcompact_handle04_2f_3e_dasm(DASM_PARAMS); break; // illegal
292      case 0x3f: size = arcompact_handle04_2f_3f_dasm(DASM_PARAMS); break; // ZOPs (Zero Operand Opcodes)
293   }
294
295   return size;
296}
297
298int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
299{
300   int size = 4;
301   UINT8 subinstr3 = (op & 0x07000000) >> 24;
302   subinstr3 |= ((op & 0x00007000) >> 12) << 3;
303
304   op &= ~0x07007000;
305
306   switch (subinstr3)
307   {
308      case 0x00: size = arcompact_handle04_2f_3f_00_dasm(DASM_PARAMS); break; // illegal
309      case 0x01: size = arcompact_handle04_2f_3f_01_dasm(DASM_PARAMS); break; // SLEEP
310      case 0x02: size = arcompact_handle04_2f_3f_02_dasm(DASM_PARAMS); break; // SWI / TRAP9
311      case 0x03: size = arcompact_handle04_2f_3f_03_dasm(DASM_PARAMS); break; // SYNC
312      case 0x04: size = arcompact_handle04_2f_3f_04_dasm(DASM_PARAMS); break; // RTIE
313      case 0x05: size = arcompact_handle04_2f_3f_05_dasm(DASM_PARAMS); break; // BRK
314      case 0x06: size = arcompact_handle04_2f_3f_06_dasm(DASM_PARAMS); break; // illegal
315      case 0x07: size = arcompact_handle04_2f_3f_07_dasm(DASM_PARAMS); break; // illegal
316      case 0x08: size = arcompact_handle04_2f_3f_08_dasm(DASM_PARAMS); break; // illegal
317      case 0x09: size = arcompact_handle04_2f_3f_09_dasm(DASM_PARAMS); break; // illegal
318      case 0x0a: size = arcompact_handle04_2f_3f_0a_dasm(DASM_PARAMS); break; // illegal
319      case 0x0b: size = arcompact_handle04_2f_3f_0b_dasm(DASM_PARAMS); break; // illegal
320      case 0x0c: size = arcompact_handle04_2f_3f_0c_dasm(DASM_PARAMS); break; // illegal
321      case 0x0d: size = arcompact_handle04_2f_3f_0d_dasm(DASM_PARAMS); break; // illegal
322      case 0x0e: size = arcompact_handle04_2f_3f_0e_dasm(DASM_PARAMS); break; // illegal
323      case 0x0f: size = arcompact_handle04_2f_3f_0f_dasm(DASM_PARAMS); break; // illegal
324      case 0x10: size = arcompact_handle04_2f_3f_10_dasm(DASM_PARAMS); break; // illegal
325      case 0x11: size = arcompact_handle04_2f_3f_11_dasm(DASM_PARAMS); break; // illegal
326      case 0x12: size = arcompact_handle04_2f_3f_12_dasm(DASM_PARAMS); break; // illegal
327      case 0x13: size = arcompact_handle04_2f_3f_13_dasm(DASM_PARAMS); break; // illegal
328      case 0x14: size = arcompact_handle04_2f_3f_14_dasm(DASM_PARAMS); break; // illegal
329      case 0x15: size = arcompact_handle04_2f_3f_15_dasm(DASM_PARAMS); break; // illegal
330      case 0x16: size = arcompact_handle04_2f_3f_16_dasm(DASM_PARAMS); break; // illegal
331      case 0x17: size = arcompact_handle04_2f_3f_17_dasm(DASM_PARAMS); break; // illegal
332      case 0x18: size = arcompact_handle04_2f_3f_18_dasm(DASM_PARAMS); break; // illegal
333      case 0x19: size = arcompact_handle04_2f_3f_19_dasm(DASM_PARAMS); break; // illegal
334      case 0x1a: size = arcompact_handle04_2f_3f_1a_dasm(DASM_PARAMS); break; // illegal
335      case 0x1b: size = arcompact_handle04_2f_3f_1b_dasm(DASM_PARAMS); break; // illegal
336      case 0x1c: size = arcompact_handle04_2f_3f_1c_dasm(DASM_PARAMS); break; // illegal
337      case 0x1d: size = arcompact_handle04_2f_3f_1d_dasm(DASM_PARAMS); break; // illegal
338      case 0x1e: size = arcompact_handle04_2f_3f_1e_dasm(DASM_PARAMS); break; // illegal
339      case 0x1f: size = arcompact_handle04_2f_3f_1f_dasm(DASM_PARAMS); break; // illegal
340      case 0x20: size = arcompact_handle04_2f_3f_20_dasm(DASM_PARAMS); break; // illegal
341      case 0x21: size = arcompact_handle04_2f_3f_21_dasm(DASM_PARAMS); break; // illegal
342      case 0x22: size = arcompact_handle04_2f_3f_22_dasm(DASM_PARAMS); break; // illegal
343      case 0x23: size = arcompact_handle04_2f_3f_23_dasm(DASM_PARAMS); break; // illegal
344      case 0x24: size = arcompact_handle04_2f_3f_24_dasm(DASM_PARAMS); break; // illegal
345      case 0x25: size = arcompact_handle04_2f_3f_25_dasm(DASM_PARAMS); break; // illegal
346      case 0x26: size = arcompact_handle04_2f_3f_26_dasm(DASM_PARAMS); break; // illegal
347      case 0x27: size = arcompact_handle04_2f_3f_27_dasm(DASM_PARAMS); break; // illegal
348      case 0x28: size = arcompact_handle04_2f_3f_28_dasm(DASM_PARAMS); break; // illegal
349      case 0x29: size = arcompact_handle04_2f_3f_29_dasm(DASM_PARAMS); break; // illegal
350      case 0x2a: size = arcompact_handle04_2f_3f_2a_dasm(DASM_PARAMS); break; // illegal
351      case 0x2b: size = arcompact_handle04_2f_3f_2b_dasm(DASM_PARAMS); break; // illegal
352      case 0x2c: size = arcompact_handle04_2f_3f_2c_dasm(DASM_PARAMS); break; // illegal
353      case 0x2d: size = arcompact_handle04_2f_3f_2d_dasm(DASM_PARAMS); break; // illegal
354      case 0x2e: size = arcompact_handle04_2f_3f_2e_dasm(DASM_PARAMS); break; // illegal
355      case 0x2f: size = arcompact_handle04_2f_3f_2f_dasm(DASM_PARAMS); break; // illegal
356      case 0x30: size = arcompact_handle04_2f_3f_30_dasm(DASM_PARAMS); break; // illegal
357      case 0x31: size = arcompact_handle04_2f_3f_31_dasm(DASM_PARAMS); break; // illegal
358      case 0x32: size = arcompact_handle04_2f_3f_32_dasm(DASM_PARAMS); break; // illegal
359      case 0x33: size = arcompact_handle04_2f_3f_33_dasm(DASM_PARAMS); break; // illegal
360      case 0x34: size = arcompact_handle04_2f_3f_34_dasm(DASM_PARAMS); break; // illegal
361      case 0x35: size = arcompact_handle04_2f_3f_35_dasm(DASM_PARAMS); break; // illegal
362      case 0x36: size = arcompact_handle04_2f_3f_36_dasm(DASM_PARAMS); break; // illegal
363      case 0x37: size = arcompact_handle04_2f_3f_37_dasm(DASM_PARAMS); break; // illegal
364      case 0x38: size = arcompact_handle04_2f_3f_38_dasm(DASM_PARAMS); break; // illegal
365      case 0x39: size = arcompact_handle04_2f_3f_39_dasm(DASM_PARAMS); break; // illegal
366      case 0x3a: size = arcompact_handle04_2f_3f_3a_dasm(DASM_PARAMS); break; // illegal
367      case 0x3b: size = arcompact_handle04_2f_3f_3b_dasm(DASM_PARAMS); break; // illegal
368      case 0x3c: size = arcompact_handle04_2f_3f_3c_dasm(DASM_PARAMS); break; // illegal
369      case 0x3d: size = arcompact_handle04_2f_3f_3d_dasm(DASM_PARAMS); break; // illegal
370      case 0x3e: size = arcompact_handle04_2f_3f_3e_dasm(DASM_PARAMS); break; // illegal
371      case 0x3f: size = arcompact_handle04_2f_3f_3f_dasm(DASM_PARAMS); break; // illegal
372   }
373
374   return size;
375}
376
377// this is an Extension ALU group, maybe optional on some CPUs?
378int arcompact_handle05_dasm(DASM_OPS_32)
379{
380   int size = 4;
381   UINT8 subinstr = (op & 0x003f0000) >> 16;
382   op &= ~0x003f0000;
383
384   switch (subinstr)
385   {
386      case 0x00: size = arcompact_handle05_00_dasm(DASM_PARAMS); break; // ASL
387      case 0x01: size = arcompact_handle05_01_dasm(DASM_PARAMS); break; // LSR
388      case 0x02: size = arcompact_handle05_02_dasm(DASM_PARAMS); break; // ASR
389      case 0x03: size = arcompact_handle05_03_dasm(DASM_PARAMS); break; // ROR
390      case 0x04: size = arcompact_handle05_04_dasm(DASM_PARAMS); break; // MUL64
391      case 0x05: size = arcompact_handle05_05_dasm(DASM_PARAMS); break; // MULU64
392      case 0x06: size = arcompact_handle05_06_dasm(DASM_PARAMS); break; // ADDS
393      case 0x07: size = arcompact_handle05_07_dasm(DASM_PARAMS); break; // SUBS
394      case 0x08: size = arcompact_handle05_08_dasm(DASM_PARAMS); break; // DIVAW
395      case 0x09: size = arcompact_handle05_09_dasm(DASM_PARAMS); break; // illegal
396      case 0x0a: size = arcompact_handle05_0a_dasm(DASM_PARAMS); break; // ASLS
397      case 0x0b: size = arcompact_handle05_0b_dasm(DASM_PARAMS); break; // ASRS
398      case 0x0c: size = arcompact_handle05_0c_dasm(DASM_PARAMS); break; // illegal
399      case 0x0d: size = arcompact_handle05_0d_dasm(DASM_PARAMS); break; // illegal
400      case 0x0e: size = arcompact_handle05_0e_dasm(DASM_PARAMS); break; // illegal
401      case 0x0f: size = arcompact_handle05_0f_dasm(DASM_PARAMS); break; // illegal
402      case 0x10: size = arcompact_handle05_10_dasm(DASM_PARAMS); break; // illegal
403      case 0x11: size = arcompact_handle05_11_dasm(DASM_PARAMS); break; // illegal
404      case 0x12: size = arcompact_handle05_12_dasm(DASM_PARAMS); break; // illegal
405      case 0x13: size = arcompact_handle05_13_dasm(DASM_PARAMS); break; // illegal
406      case 0x14: size = arcompact_handle05_14_dasm(DASM_PARAMS); break; // illegal
407      case 0x15: size = arcompact_handle05_15_dasm(DASM_PARAMS); break; // illegal
408      case 0x16: size = arcompact_handle05_16_dasm(DASM_PARAMS); break; // illegal
409      case 0x17: size = arcompact_handle05_17_dasm(DASM_PARAMS); break; // illegal
410      case 0x18: size = arcompact_handle05_18_dasm(DASM_PARAMS); break; // illegal
411      case 0x19: size = arcompact_handle05_19_dasm(DASM_PARAMS); break; // illegal
412      case 0x1a: size = arcompact_handle05_1a_dasm(DASM_PARAMS); break; // illegal
413      case 0x1b: size = arcompact_handle05_1b_dasm(DASM_PARAMS); break; // illegal
414      case 0x1c: size = arcompact_handle05_1c_dasm(DASM_PARAMS); break; // illegal
415      case 0x1d: size = arcompact_handle05_1d_dasm(DASM_PARAMS); break; // illegal
416      case 0x1e: size = arcompact_handle05_1e_dasm(DASM_PARAMS); break; // illegal
417      case 0x1f: size = arcompact_handle05_1f_dasm(DASM_PARAMS); break; // illegal
418      case 0x20: size = arcompact_handle05_20_dasm(DASM_PARAMS); break; // illegal
419      case 0x21: size = arcompact_handle05_21_dasm(DASM_PARAMS); break; // illegal
420      case 0x22: size = arcompact_handle05_22_dasm(DASM_PARAMS); break; // illegal
421      case 0x23: size = arcompact_handle05_23_dasm(DASM_PARAMS); break; // illegal
422      case 0x24: size = arcompact_handle05_24_dasm(DASM_PARAMS); break; // illegal
423      case 0x25: size = arcompact_handle05_25_dasm(DASM_PARAMS); break; // illegal
424      case 0x26: size = arcompact_handle05_26_dasm(DASM_PARAMS); break; // illegal
425      case 0x27: size = arcompact_handle05_27_dasm(DASM_PARAMS); break; // illegal
426      case 0x28: size = arcompact_handle05_28_dasm(DASM_PARAMS); break; // ADDSDW
427      case 0x29: size = arcompact_handle05_29_dasm(DASM_PARAMS); break; // SUBSDW
428      case 0x2a: size = arcompact_handle05_2a_dasm(DASM_PARAMS); break; // illegal
429      case 0x2b: size = arcompact_handle05_2b_dasm(DASM_PARAMS); break; // illegal
430      case 0x2c: size = arcompact_handle05_2c_dasm(DASM_PARAMS); break; // illegal
431      case 0x2d: size = arcompact_handle05_2d_dasm(DASM_PARAMS); break; // illegal
432      case 0x2e: size = arcompact_handle05_2e_dasm(DASM_PARAMS); break; // illegal
433      case 0x2f: size = arcompact_handle05_2f_dasm(DASM_PARAMS); break; // SOPs
434      case 0x30: size = arcompact_handle05_30_dasm(DASM_PARAMS); break; // illegal
435      case 0x31: size = arcompact_handle05_31_dasm(DASM_PARAMS); break; // illegal
436      case 0x32: size = arcompact_handle05_32_dasm(DASM_PARAMS); break; // illegal
437      case 0x33: size = arcompact_handle05_33_dasm(DASM_PARAMS); break; // illegal
438      case 0x34: size = arcompact_handle05_34_dasm(DASM_PARAMS); break; // illegal
439      case 0x35: size = arcompact_handle05_35_dasm(DASM_PARAMS); break; // illegal
440      case 0x36: size = arcompact_handle05_36_dasm(DASM_PARAMS); break; // illegal
441      case 0x37: size = arcompact_handle05_37_dasm(DASM_PARAMS); break; // illegal
442      case 0x38: size = arcompact_handle05_38_dasm(DASM_PARAMS); break; // illegal
443      case 0x39: size = arcompact_handle05_39_dasm(DASM_PARAMS); break; // illegal
444      case 0x3a: size = arcompact_handle05_3a_dasm(DASM_PARAMS); break; // illegal
445      case 0x3b: size = arcompact_handle05_3b_dasm(DASM_PARAMS); break; // illegal
446      case 0x3c: size = arcompact_handle05_3c_dasm(DASM_PARAMS); break; // illegal
447      case 0x3d: size = arcompact_handle05_3d_dasm(DASM_PARAMS); break; // illegal
448      case 0x3e: size = arcompact_handle05_3e_dasm(DASM_PARAMS); break; // illegal
449      case 0x3f: size = arcompact_handle05_3f_dasm(DASM_PARAMS); break; // illegal
450   }
451
452   return size;
453}
454
455int arcompact_handle0c_dasm(DASM_OPS_16)
456{
457   int size = 2;
458   UINT8 subinstr = (op & 0x0018) >> 3;
459   op &= ~0x0018;
460
461   switch (subinstr)
462   {
463      case 0x00: size = arcompact_handle0c_00_dasm(DASM_PARAMS); break; // LD_S
464      case 0x01: size = arcompact_handle0c_01_dasm(DASM_PARAMS); break; // LDB_S
465      case 0x02: size = arcompact_handle0c_02_dasm(DASM_PARAMS); break; // LDW_S
466      case 0x03: size = arcompact_handle0c_03_dasm(DASM_PARAMS); break; // ADD_S
467   }
468   return size;
469}
470
471int arcompact_handle0d_dasm(DASM_OPS_16)
472{
473   int size = 2;
474   UINT8 subinstr = (op & 0x0018) >> 3;
475   op &= ~0x0018;
476
477   switch (subinstr)
478   {
479      case 0x00: size = arcompact_handle0d_00_dasm(DASM_PARAMS); break; // ADD_S
480      case 0x01: size = arcompact_handle0d_01_dasm(DASM_PARAMS); break; // SUB_S
481      case 0x02: size = arcompact_handle0d_02_dasm(DASM_PARAMS); break; // ASL_S
482      case 0x03: size = arcompact_handle0d_03_dasm(DASM_PARAMS); break; // ASR_S
483   }
484   return size;
485}
486
487int arcompact_handle0e_dasm(DASM_OPS_16)
488{
489   int size = 2;
490   UINT8 subinstr = (op & 0x0018) >> 3;
491   op &= ~0x0018;
492
493   switch (subinstr)
494   {
495      case 0x00: size = arcompact_handle0e_00_dasm(DASM_PARAMS); break; // ADD_S
496      case 0x01: size = arcompact_handle0e_01_dasm(DASM_PARAMS); break; // MOV_S
497      case 0x02: size = arcompact_handle0e_02_dasm(DASM_PARAMS); break; // CMP_S
498      case 0x03: size = arcompact_handle0e_03_dasm(DASM_PARAMS); break; // MOV_S
499   }
500   return size;
501}
502
503int arcompact_handle0f_dasm(DASM_OPS_16)
504{
505   int size = 2;
506   // General Register Instructions (16-bit)
507   // 01111 bbb ccc iiiii
508   UINT8 subinstr = (op & 0x01f) >> 0;
509   op &= ~0x001f;
510
511   switch (subinstr)
512   {
513      case 0x00: size = arcompact_handle0f_00_dasm(DASM_PARAMS); break; // SOPs
514      case 0x01: size = arcompact_handle0f_01_dasm(DASM_PARAMS); break; // 0x01 <illegal>
515      case 0x02: size = arcompact_handle0f_02_dasm(DASM_PARAMS); break; // SUB_S
516      case 0x03: size = arcompact_handle0f_03_dasm(DASM_PARAMS); break; // 0x03 <illegal>
517      case 0x04: size = arcompact_handle0f_04_dasm(DASM_PARAMS); break; // AND_S
518      case 0x05: size = arcompact_handle0f_05_dasm(DASM_PARAMS); break; // OR_S
519      case 0x06: size = arcompact_handle0f_06_dasm(DASM_PARAMS); break; // BIC_S
520      case 0x07: size = arcompact_handle0f_07_dasm(DASM_PARAMS); break; // XOR_S
521      case 0x08: size = arcompact_handle0f_08_dasm(DASM_PARAMS); break; // 0x08 <illegal>
522      case 0x09: size = arcompact_handle0f_09_dasm(DASM_PARAMS); break; // 0x09 <illegal>
523      case 0x0a: size = arcompact_handle0f_0a_dasm(DASM_PARAMS); break; // 0x0a <illegal>
524      case 0x0b: size = arcompact_handle0f_0b_dasm(DASM_PARAMS); break; // TST_S
525      case 0x0c: size = arcompact_handle0f_0c_dasm(DASM_PARAMS); break; // MUL64_S
526      case 0x0d: size = arcompact_handle0f_0d_dasm(DASM_PARAMS); break; // SEXB_S
527      case 0x0e: size = arcompact_handle0f_0e_dasm(DASM_PARAMS); break; // SEXW_S
528      case 0x0f: size = arcompact_handle0f_0f_dasm(DASM_PARAMS); break; // EXTB_S
529      case 0x10: size = arcompact_handle0f_10_dasm(DASM_PARAMS); break; // EXTW_S
530      case 0x11: size = arcompact_handle0f_11_dasm(DASM_PARAMS); break; // ABS_S
531      case 0x12: size = arcompact_handle0f_12_dasm(DASM_PARAMS); break; // NOT_S
532      case 0x13: size = arcompact_handle0f_13_dasm(DASM_PARAMS); break; // NEG_S
533      case 0x14: size = arcompact_handle0f_14_dasm(DASM_PARAMS); break; // ADD1_S
534      case 0x15: size = arcompact_handle0f_15_dasm(DASM_PARAMS); break; // ADD2_S
535      case 0x16: size = arcompact_handle0f_16_dasm(DASM_PARAMS); break; // ADD3_S
536      case 0x17: size = arcompact_handle0f_17_dasm(DASM_PARAMS); break; // 0x17 <illegal>
537      case 0x18: size = arcompact_handle0f_18_dasm(DASM_PARAMS); break; // ASL_S (multiple)
538      case 0x19: size = arcompact_handle0f_19_dasm(DASM_PARAMS); break; // LSR_S (multiple)
539      case 0x1a: size = arcompact_handle0f_1a_dasm(DASM_PARAMS); break; // ASR_S (multiple)
540      case 0x1b: size = arcompact_handle0f_1b_dasm(DASM_PARAMS); break; // ASL_S (single)
541      case 0x1c: size = arcompact_handle0f_1c_dasm(DASM_PARAMS); break; // LSR_S (single)
542      case 0x1d: size = arcompact_handle0f_1d_dasm(DASM_PARAMS); break; // ASR_S (single)
543      case 0x1e: size = arcompact_handle0f_1e_dasm(DASM_PARAMS); break; // TRAP (not a5?)
544      case 0x1f: size = arcompact_handle0f_1f_dasm(DASM_PARAMS); break; // BRK_S ( 0x7fff only? )
545
546   }
547   return size;
548}
549
550int arcompact_handle0f_00_dasm(DASM_OPS_16)
551{
552   int size = 2;
553   UINT8 subinstr = (op & 0x00e0) >> 5;
554   op &= ~0x00e0;
555
556   switch (subinstr)
557   {
558      case 0x00: size = arcompact_handle0f_00_00_dasm(DASM_PARAMS); break; // J_S
559      case 0x01: size = arcompact_handle0f_00_01_dasm(DASM_PARAMS); break; // J_S.D
560      case 0x02: size = arcompact_handle0f_00_02_dasm(DASM_PARAMS); break; // JL_S
561      case 0x03: size = arcompact_handle0f_00_03_dasm(DASM_PARAMS); break; // JL_S.D
562      case 0x04: size = arcompact_handle0f_00_04_dasm(DASM_PARAMS); break; // 0x04 <illegal>
563      case 0x05: size = arcompact_handle0f_00_05_dasm(DASM_PARAMS); break; // 0x05 <illegal>
564      case 0x06: size = arcompact_handle0f_00_06_dasm(DASM_PARAMS); break; // SUB_S.NE
565      case 0x07: size = arcompact_handle0f_00_07_dasm(DASM_PARAMS); break; // ZOPs
566
567   }
568
569   return size;
570}
571
572int arcompact_handle0f_00_07_dasm(DASM_OPS_16)
573{
574   int size = 2;
575   // General Operations w/o Register
576   // 01111 iii 111 00000
577   UINT8 subinstr3 = (op & 0x0700) >> 8;
578   op &= ~0x0700;
579
580   switch (subinstr3)
581   {
582      case 0x00: size = arcompact_handle0f_00_07_00_dasm(DASM_PARAMS); break; // NOP_S
583      case 0x01: size = arcompact_handle0f_00_07_01_dasm(DASM_PARAMS); break; // UNIMP_S
584      case 0x02: size = arcompact_handle0f_00_07_02_dasm(DASM_PARAMS); break; // 0x02 <illegal>
585      case 0x03: size = arcompact_handle0f_00_07_03_dasm(DASM_PARAMS); break; // 0x03 <illegal>
586      case 0x04: size = arcompact_handle0f_00_07_04_dasm(DASM_PARAMS); break; // JEQ_S [BLINK]
587      case 0x05: size = arcompact_handle0f_00_07_05_dasm(DASM_PARAMS); break; // JNE_S [BLINK]
588      case 0x06: size = arcompact_handle0f_00_07_06_dasm(DASM_PARAMS); break; // J_S [BLINK]
589      case 0x07: size = arcompact_handle0f_00_07_07_dasm(DASM_PARAMS); break; // J_S.D [BLINK]
590
591   }
592   return size;
593}
594
595int arcompact_handle17_dasm(DASM_OPS_16)
596{
597   int size = 2;
598   UINT8 subinstr = (op & 0x00e0) >> 5;
599   op &= ~0x00e0;
600
601   switch (subinstr)
602   {
603      case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
604      case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
605      case 0x02: size = arcompact_handle17_02_dasm(DASM_PARAMS); break; // ASR_S
606      case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
607      case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
608      case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
609      case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
610      case 0x07: size = arcompact_handle17_07_dasm(DASM_PARAMS); break; // BTST_S
611   }
612
613   return size;
614}
615
616int arcompact_handle18_dasm(DASM_OPS_16)
617{
618   int size = 2;
619   // Stack Pointer Based Instructions (16-bit)
620   // 11000 bbb iii uuuuu
621   UINT8 subinstr = (op & 0x00e0) >> 5;
622   op &= ~0x00e0;
623
624   switch (subinstr)
625   {
626      case 0x00: size = arcompact_handle18_00_dasm(DASM_PARAMS); break; // LD_S (SP)
627      case 0x01: size = arcompact_handle18_01_dasm(DASM_PARAMS); break; // LDB_S (SP)
628      case 0x02: size = arcompact_handle18_02_dasm(DASM_PARAMS); break; // ST_S (SP)
629      case 0x03: size = arcompact_handle18_03_dasm(DASM_PARAMS); break; // STB_S (SP)
630      case 0x04: size = arcompact_handle18_04_dasm(DASM_PARAMS); break; // ADD_S (SP)
631      case 0x05: size = arcompact_handle18_05_dasm(DASM_PARAMS); break; // subtable 18_05
632      case 0x06: size = arcompact_handle18_06_dasm(DASM_PARAMS); break; // subtable 18_06
633      case 0x07: size = arcompact_handle18_07_dasm(DASM_PARAMS); break; // subtable 18_07
634   }
635
636   return size;
637}
638
639int arcompact_handle18_05_dasm(DASM_OPS_16)
640{
641   int size = 2;
642   UINT8 subinstr2 = (op & 0x0700) >> 8;
643   op &= ~0x001f;
644
645   switch (subinstr2)
646   {
647      case 0x00: size = arcompact_handle18_05_00_dasm(DASM_PARAMS); break; // ADD_S (SP)
648      case 0x01: size = arcompact_handle18_05_01_dasm(DASM_PARAMS); break; // SUB_S (SP)
649      case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
650      case 0x03: size = arcompact_handle18_05_03_dasm(DASM_PARAMS); break; // <illegal 0x18_05_03>
651      case 0x04: size = arcompact_handle18_05_04_dasm(DASM_PARAMS); break; // <illegal 0x18_05_04>
652      case 0x05: size = arcompact_handle18_05_05_dasm(DASM_PARAMS); break; // <illegal 0x18_05_05>
653      case 0x06: size = arcompact_handle18_05_06_dasm(DASM_PARAMS); break; // <illegal 0x18_05_06>
654      case 0x07: size = arcompact_handle18_05_07_dasm(DASM_PARAMS); break; // <illegal 0x18_05_07>
655   }
656
657   return size;
658}
659
660int arcompact_handle18_06_dasm(DASM_OPS_16)
661{
662   int size = 2;
663   UINT8 subinstr2 = (op & 0x001f) >> 0;
664   op &= ~0x001f;
665
666   switch (subinstr2)
667   {
668      case 0x00: size = arcompact_handle18_06_00_dasm(DASM_PARAMS); break; // <illegal 0x18_06_00>
669      case 0x01: size = arcompact_handle18_06_01_dasm(DASM_PARAMS); break; // POP_S b
670      case 0x02: size = arcompact_handle18_06_02_dasm(DASM_PARAMS); break; // <illegal 0x18_06_02>
671      case 0x03: size = arcompact_handle18_06_03_dasm(DASM_PARAMS); break; // <illegal 0x18_06_03>
672      case 0x04: size = arcompact_handle18_06_04_dasm(DASM_PARAMS); break; // <illegal 0x18_06_04>
673      case 0x05: size = arcompact_handle18_06_05_dasm(DASM_PARAMS); break; // <illegal 0x18_06_05>
674      case 0x06: size = arcompact_handle18_06_06_dasm(DASM_PARAMS); break; // <illegal 0x18_06_06>
675      case 0x07: size = arcompact_handle18_06_07_dasm(DASM_PARAMS); break; // <illegal 0x18_06_07>
676      case 0x08: size = arcompact_handle18_06_08_dasm(DASM_PARAMS); break; // <illegal 0x18_06_08>
677      case 0x09: size = arcompact_handle18_06_09_dasm(DASM_PARAMS); break; // <illegal 0x18_06_09>
678      case 0x0a: size = arcompact_handle18_06_0a_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0a>
679      case 0x0b: size = arcompact_handle18_06_0b_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0b>
680      case 0x0c: size = arcompact_handle18_06_0c_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0c>
681      case 0x0d: size = arcompact_handle18_06_0d_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0d>
682      case 0x0e: size = arcompact_handle18_06_0e_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0e>
683      case 0x0f: size = arcompact_handle18_06_0f_dasm(DASM_PARAMS); break; // <illegal 0x18_06_0f>
684      case 0x10: size = arcompact_handle18_06_10_dasm(DASM_PARAMS); break; // <illegal 0x18_06_10>
685      case 0x11: size = arcompact_handle18_06_11_dasm(DASM_PARAMS); break; // POP_S blink
686      case 0x12: size = arcompact_handle18_06_12_dasm(DASM_PARAMS); break; // <illegal 0x18_06_12>
687      case 0x13: size = arcompact_handle18_06_13_dasm(DASM_PARAMS); break; // <illegal 0x18_06_13>
688      case 0x14: size = arcompact_handle18_06_14_dasm(DASM_PARAMS); break; // <illegal 0x18_06_14>
689      case 0x15: size = arcompact_handle18_06_15_dasm(DASM_PARAMS); break; // <illegal 0x18_06_15>
690      case 0x16: size = arcompact_handle18_06_16_dasm(DASM_PARAMS); break; // <illegal 0x18_06_16>
691      case 0x17: size = arcompact_handle18_06_17_dasm(DASM_PARAMS); break; // <illegal 0x18_06_17>
692      case 0x18: size = arcompact_handle18_06_18_dasm(DASM_PARAMS); break; // <illegal 0x18_06_18>
693      case 0x19: size = arcompact_handle18_06_19_dasm(DASM_PARAMS); break; // <illegal 0x18_06_19>
694      case 0x1a: size = arcompact_handle18_06_1a_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1a>
695      case 0x1b: size = arcompact_handle18_06_1b_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1b>
696      case 0x1c: size = arcompact_handle18_06_1c_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1c>
697      case 0x1d: size = arcompact_handle18_06_1d_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1d>
698      case 0x1e: size = arcompact_handle18_06_1e_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1e>
699      case 0x1f: size = arcompact_handle18_06_1f_dasm(DASM_PARAMS); break; // <illegal 0x18_06_1f>
700   }
701
702   return size;
703}
704
705int arcompact_handle18_07_dasm(DASM_OPS_16)
706{
707   int size = 2;
708   UINT8 subinstr2 = (op & 0x001f) >> 0;
709   op &= ~0x001f;
710
711   switch (subinstr2)
712   {
713      case 0x00: size = arcompact_handle18_07_00_dasm(DASM_PARAMS); break; // <illegal 0x18_07_00>
714      case 0x01: size = arcompact_handle18_07_01_dasm(DASM_PARAMS); break; // PUSH_S b
715      case 0x02: size = arcompact_handle18_07_02_dasm(DASM_PARAMS); break; // <illegal 0x18_07_02>
716      case 0x03: size = arcompact_handle18_07_03_dasm(DASM_PARAMS); break; // <illegal 0x18_07_03>
717      case 0x04: size = arcompact_handle18_07_04_dasm(DASM_PARAMS); break; // <illegal 0x18_07_04>
718      case 0x05: size = arcompact_handle18_07_05_dasm(DASM_PARAMS); break; // <illegal 0x18_07_05>
719      case 0x06: size = arcompact_handle18_07_06_dasm(DASM_PARAMS); break; // <illegal 0x18_07_06>
720      case 0x07: size = arcompact_handle18_07_07_dasm(DASM_PARAMS); break; // <illegal 0x18_07_07>
721      case 0x08: size = arcompact_handle18_07_08_dasm(DASM_PARAMS); break; // <illegal 0x18_07_08>
722      case 0x09: size = arcompact_handle18_07_09_dasm(DASM_PARAMS); break; // <illegal 0x18_07_09>
723      case 0x0a: size = arcompact_handle18_07_0a_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0a>
724      case 0x0b: size = arcompact_handle18_07_0b_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0b>
725      case 0x0c: size = arcompact_handle18_07_0c_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0c>
726      case 0x0d: size = arcompact_handle18_07_0d_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0d>
727      case 0x0e: size = arcompact_handle18_07_0e_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0e>
728      case 0x0f: size = arcompact_handle18_07_0f_dasm(DASM_PARAMS); break; // <illegal 0x18_07_0f>
729      case 0x10: size = arcompact_handle18_07_10_dasm(DASM_PARAMS); break; // <illegal 0x18_07_10>
730      case 0x11: size = arcompact_handle18_07_11_dasm(DASM_PARAMS); break; // PUSH_S blink
731      case 0x12: size = arcompact_handle18_07_12_dasm(DASM_PARAMS); break; // <illegal 0x18_07_12>
732      case 0x13: size = arcompact_handle18_07_13_dasm(DASM_PARAMS); break; // <illegal 0x18_07_13>
733      case 0x14: size = arcompact_handle18_07_14_dasm(DASM_PARAMS); break; // <illegal 0x18_07_14>
734      case 0x15: size = arcompact_handle18_07_15_dasm(DASM_PARAMS); break; // <illegal 0x18_07_15>
735      case 0x16: size = arcompact_handle18_07_16_dasm(DASM_PARAMS); break; // <illegal 0x18_07_16>
736      case 0x17: size = arcompact_handle18_07_17_dasm(DASM_PARAMS); break; // <illegal 0x18_07_17>
737      case 0x18: size = arcompact_handle18_07_18_dasm(DASM_PARAMS); break; // <illegal 0x18_07_18>
738      case 0x19: size = arcompact_handle18_07_19_dasm(DASM_PARAMS); break; // <illegal 0x18_07_19>
739      case 0x1a: size = arcompact_handle18_07_1a_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1a>
740      case 0x1b: size = arcompact_handle18_07_1b_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1b>
741      case 0x1c: size = arcompact_handle18_07_1c_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1c>
742      case 0x1d: size = arcompact_handle18_07_1d_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1d>
743      case 0x1e: size = arcompact_handle18_07_1e_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1e>
744      case 0x1f: size = arcompact_handle18_07_1f_dasm(DASM_PARAMS); break; // <illegal 0x18_07_1f>
745   }
746
747   return size;
748}
749
750int arcompact_handle19_dasm(DASM_OPS_16)
751{
752   int size = 2;
753   UINT8 subinstr = (op & 0x0600) >> 9;
754   op &= ~0x0600;
755
756   switch (subinstr)
757   {
758      case 0x00: size = arcompact_handle19_00_dasm(DASM_PARAMS); break; // LD_S (GP)
759      case 0x01: size = arcompact_handle19_01_dasm(DASM_PARAMS); break; // LDB_S (GP)
760      case 0x02: size = arcompact_handle19_02_dasm(DASM_PARAMS); break; // LDW_S (GP)
761      case 0x03: size = arcompact_handle19_03_dasm(DASM_PARAMS); break; // ADD_S (GP)
762   }
763   return size;
764}
765
766int arcompact_handle1c_dasm(DASM_OPS_16)
767{
768   int size = 2;
769   UINT8 subinstr = (op & 0x0080) >> 7;
770   op &= ~0x0080;
771
772   switch (subinstr)
773   {
774      case 0x00: size = arcompact_handle1c_00_dasm(DASM_PARAMS); break; // ADD_S
775      case 0x01: size = arcompact_handle1c_01_dasm(DASM_PARAMS); break; // CMP_S
776   }
777   return size;
778}
779
780int arcompact_handle1d_dasm(DASM_OPS_16)
781{
782   int size = 2;
783   UINT8 subinstr = (op & 0x0080) >> 7;
784   op &= ~0x0080;
785
786   switch (subinstr)
787   {
788      case 0x00: size = arcompact_handle1d_00_dasm(DASM_PARAMS); break; // BREQ_S
789      case 0x01: size = arcompact_handle1d_01_dasm(DASM_PARAMS); break; // BRNE_S
790   }
791   return size;
792}
793
794int arcompact_handle1e_dasm(DASM_OPS_16)
795{
796   int size = 2;
797   UINT8 subinstr = (op & 0x0600) >> 9;
798   op &= ~0x0600;
799
800   switch (subinstr)
801   {
802      case 0x00: size = arcompact_handle1e_00_dasm(DASM_PARAMS); break; // B_S
803      case 0x01: size = arcompact_handle1e_01_dasm(DASM_PARAMS); break; // BEQ_S
804      case 0x02: size = arcompact_handle1e_02_dasm(DASM_PARAMS); break; // BNE_S
805      case 0x03: size = arcompact_handle1e_03_dasm(DASM_PARAMS); break; // Bcc_S
806   }
807   return size;
808}
809
810int arcompact_handle1e_03_dasm(DASM_OPS_16)
811{
812   
813   int size = 2;
814   UINT8 subinstr2 = (op & 0x01c0) >> 6;
815   op &= ~0x01c0;
816
817   switch (subinstr2)
818   {
819      case 0x00: size = arcompact_handle1e_03_00_dasm(DASM_PARAMS); break; // BGT_S
820      case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
821      case 0x02: size = arcompact_handle1e_03_02_dasm(DASM_PARAMS); break; // BLT_S
822      case 0x03: size = arcompact_handle1e_03_03_dasm(DASM_PARAMS); break; // BLE_S
823      case 0x04: size = arcompact_handle1e_03_04_dasm(DASM_PARAMS); break; // BHI_S
824      case 0x05: size = arcompact_handle1e_03_05_dasm(DASM_PARAMS); break; // BHS_S
825      case 0x06: size = arcompact_handle1e_03_06_dasm(DASM_PARAMS); break; // BLO_S
826      case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
827   }
828   return size;
829
830}
trunk/src/emu/cpu/arcompact/arcompactdasm_dispatch.h
r242341r242342
1/*********************************\
2
3 ARCompact disassembler
4
5\*********************************/
6
7#define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom
8#define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom
9#define DASM_PARAMS output, pc, op, oprom
10
11#define LIMM_REG 62
12
13#define GET_LIMM_32 \
14   limm = oprom[6] | (oprom[7] << 8); \
15   limm |= (oprom[4] << 16) | (oprom[5] << 24); \
16
17
18
19int arcompact_handle00_dasm(DASM_OPS_32);
20int arcompact_handle01_dasm(DASM_OPS_32);
21int arcompact_handle01_00_dasm(DASM_OPS_32);
22int arcompact_handle01_01_dasm(DASM_OPS_32);
23int arcompact_handle01_01_00_dasm(DASM_OPS_32);
24int arcompact_handle01_01_01_dasm(DASM_OPS_32);
25int arcompact_handle04_dasm(DASM_OPS_32);
26int arcompact_handle04_2f_dasm(DASM_OPS_32);
27int arcompact_handle04_2f_3f_dasm(DASM_OPS_32);
28int arcompact_handle05_dasm(DASM_OPS_32);
29
30int arcompact_handle0c_dasm(DASM_OPS_16);
31int arcompact_handle0d_dasm(DASM_OPS_16);
32int arcompact_handle0e_dasm(DASM_OPS_16);
33int arcompact_handle0f_dasm(DASM_OPS_16);
34int arcompact_handle0f_00_dasm(DASM_OPS_16);
35int arcompact_handle0f_00_07_dasm(DASM_OPS_16);
36int arcompact_handle17_dasm(DASM_OPS_16);
37int arcompact_handle18_dasm(DASM_OPS_16);
38int arcompact_handle18_05_dasm(DASM_OPS_16);
39int arcompact_handle18_06_dasm(DASM_OPS_16);
40int arcompact_handle18_07_dasm(DASM_OPS_16);
41int arcompact_handle19_dasm(DASM_OPS_16);
42int arcompact_handle1c_dasm(DASM_OPS_16);
43int arcompact_handle1d_dasm(DASM_OPS_16);
44int arcompact_handle1e_dasm(DASM_OPS_16);
45int arcompact_handle1e_03_dasm(DASM_OPS_16);
trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
r242341r242342
1/*********************************\
2
3 ARCompact disassembler
4
5\*********************************/
6
7#include "emu.h"
8#include <stdarg.h>
9
10#include "arcompactdasm_ops.h"
11
12char *output;
13
14static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
15{
16   va_list vl;
17
18   va_start(vl, fmt);
19   vsprintf(output, fmt, vl);
20   va_end(vl);
21}
22
23
24// condition codes (basic ones are the same as arc
25static const char *conditions[0x20] =
26{
27   /* 00 */ "AL", // (aka RA         - Always)
28   /* 01 */ "EQ", // (aka Z          - Zero
29   /* 02 */ "NE", // (aka NZ         - Non-Zero)
30   /* 03 */ "PL", // (aka P          - Positive)
31   /* 04 */ "MI", // (aka N          - Negative)
32   /* 05 */ "CS", // (aka C,  LO     - Carry set / Lower than) (unsigned)
33   /* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
34   /* 07 */ "VS", // (aka V          - Overflow set)
35   /* 08 */ "VC", // (aka NV         - Overflow clear)
36   /* 09 */ "GT", // (               - Greater than) (signed)
37   /* 0a */ "GE", // (               - Greater than or Equal) (signed)
38   /* 0b */ "LT", // (               - Less than) (signed)
39   /* 0c */ "LE", // (               - Less than or Equal) (signed)
40   /* 0d */ "HI", // (               - Higher than) (unsigned)
41   /* 0e */ "LS", // (               - Lower or Same) (unsigned)
42   /* 0f */ "PNZ",// (               - Positive non-0 value)
43   /* 10 */ "0x10 Reserved", // possible CPU implementation specifics
44   /* 11 */ "0x11 Reserved",
45   /* 12 */ "0x12 Reserved",
46   /* 13 */ "0x13 Reserved",
47   /* 14 */ "0x14 Reserved",
48   /* 15 */ "0x15 Reserved",
49   /* 16 */ "0x16 Reserved",
50   /* 17 */ "0x17 Reserved",
51   /* 18 */ "0x18 Reserved",
52   /* 19 */ "0x19 Reserved",
53   /* 1a */ "0x1a Reserved",
54   /* 1b */ "0x1b Reserved",
55   /* 1c */ "0x1c Reserved",
56   /* 1d */ "0x1d Reserved",
57   /* 1e */ "0x1e Reserved",
58   /* 1f */ "0x1f Reserved"
59};
60
61
62int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
63{
64   int size = 4;
65
66   // Branch on Compare / Bit Test - Register-Register
67   // 00001 bbb sssssss 1 S BBB CCCCCC N 0 iiii
68   INT32 address = (op & 0x00fe0000) >> 17;
69   address |= ((op & 0x00008000) >> 15) << 7;
70   if (address & 0x80) address = -(address & 0x7f);
71
72   int c = (op & 0x00000fc0) >> 6;
73   int b = (op & 0x07000000) >> 24;
74   b |= ((op & 0x00007000) >> 12) << 3;
75
76   op &= ~0x07007fe0;
77
78   if ((b != LIMM_REG) && (c != LIMM_REG))
79   {
80      print("%s (r%d) (r%d) %08x (%08x)", optext, b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
81   }
82   else
83   {
84      UINT32 limm;
85      GET_LIMM_32;
86      size = 8;
87
88      if ((b == LIMM_REG) && (c != LIMM_REG))
89      {
90         print("%s (%08x) (r%d) %08x (%08x)", optext, limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
91      }
92      else if ((c == LIMM_REG) && (b != LIMM_REG))
93      {
94         print("%s (r%d) (%08x) %08x (%08x)", optext, b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
95      }
96      else
97      {
98         // b and c are LIMM? invalid??
99         print("%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
100
101      }
102   }
103
104   return size;
105}
106
107#define GET_01_01_01_BRANCH_ADDR \
108   INT32 address = (op & 0x00fe0000) >> 17; \
109   address |= ((op & 0x00008000) >> 15) << 7; \
110   if (address & 0x80) address = -(address & 0x7f); \
111   op &= ~ 0x00fe800f;
112
113
114#define GROUP_0e_GET_h \
115   h =  ((op & 0x0007) << 3); \
116    h |= ((op & 0x00e0) >> 5); \
117
118// this is as messed up as the rest of the 16-bit alignment in LE mode...
119
120#define GET_LIMM \
121   limm = oprom[4] | (oprom[5] << 8); \
122   limm |= (oprom[2] << 16) | (oprom[3] << 24); \
123
124
125/************************************************************************************************************************************
126*                                                                                                                                   *
127* individual opcode handlers (disassembly)                                                                                          *
128*                                                                                                                                   *
129************************************************************************************************************************************/
130
131int arcompact_handle00_00_dasm(DASM_OPS_32)
132{
133   int size = 4;
134   // Branch Conditionally
135   // 00000 ssssssssss 0 SSSSSSSSSS N QQQQQ
136   INT32 address = (op & 0x07fe0000) >> 17;
137   address |= ((op & 0x0000ffc0) >> 6) << 10;
138   if (address & 0x800000) address = -(address & 0x7fffff);
139
140   UINT8 condition = op & 0x0000001f;
141
142   print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2) + 2, op & ~0xffffffdf);
143   return size;
144}
145
146int arcompact_handle00_01_dasm(DASM_OPS_32)
147{
148   int size = 4;
149   // Branch Unconditionally Far
150   // 00000 ssssssssss 1  SSSSSSSSSS N R TTTT
151   INT32 address = (op & 0x07fe0000) >> 17;
152   address |= ((op & 0x0000ffc0) >> 6) << 10;
153   address |= ((op & 0x0000000f) >> 0) << 20;
154   if (address & 0x800000) address = -(address & 0x7fffff);
155
156   print("B %08x (%08x)", pc + (address * 2) + 2, op & ~0xffffffcf);
157   return size;
158}
159
160int arcompact_handle01_00_00dasm(DASM_OPS_32)
161{
162   int size = 4;
163
164   // Branch and Link Conditionally
165   // 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
166   INT32 address =   (op & 0x07fc0000) >> 17;
167   address |=        ((op & 0x0000ffc0) >> 6) << 10;
168   if (address & 0x800000) address = -(address&0x7fffff);   
169
170   UINT8 condition = op & 0x0000001f;
171
172   print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2) + 2, op & ~0xffffffdf );
173   return size;
174}
175
176int arcompact_handle01_00_01dasm(DASM_OPS_32)
177{
178   int size = 4;
179   // Branch and Link Unconditionally Far
180   // 00001 sssssssss 10  SSSSSSSSSS N R TTTT
181   INT32 address =   (op & 0x07fc0000) >> 17;
182   address |=        ((op & 0x0000ffc0) >> 6) << 10;
183   address |=        ((op & 0x0000000f) >> 0) << 20;
184   if (address & 0x800000) address = -(address&0x7fffff);   
185
186   print("BL %08x (%08x)",  pc + (address *2) + 2, op & ~0xffffffcf );
187   return size;
188}
189
190int arcompact_handle01_01_00_00_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BREQ b - c"); }
191int arcompact_handle01_01_00_01_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRNE b - c"); }
192int arcompact_handle01_01_00_02_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLT b - c"); }
193int arcompact_handle01_01_00_03_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRGE b - c"); }
194int arcompact_handle01_01_00_04_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRLO b - c"); }
195int arcompact_handle01_01_00_05_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BRHS b - c"); }
196int arcompact_handle01_01_00_0e_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT0 (b & 1<<c) == 0");  }
197int arcompact_handle01_01_00_0f_dasm(DASM_OPS_32)  { return arcompact_01_01_00_helper( output, pc, op, oprom, "BBIT1 (b & 1<<c) != 0");  }
198
199
200int arcompact_handle01_01_01_00_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BREQ b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
201int arcompact_handle01_01_01_01_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRNE b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
202int arcompact_handle01_01_01_02_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRLT b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
203int arcompact_handle01_01_01_03_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRGE b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
204int arcompact_handle01_01_01_04_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRLO b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
205int arcompact_handle01_01_01_05_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BRHS b - u6 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
206
207
208int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BBIT0 (b & 1<<u6) == 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
209int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32)  { GET_01_01_01_BRANCH_ADDR;  print("BBIT1 (b & 1<<u6) != 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
210
211#if 0
212//#define EXPLICIT_EXTENSIONS
213
214static const char *datasize[0x4] =
215{
216#ifdef EXPLICIT_EXTENSIONS
217   /* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
218#else
219   /* 00 */ " ",// Dword (default)
220#endif
221   /* 01 */ ".B", // Byte
222   /* 02 */ ".W", // Word
223   /* 03 */ ".<illegal data size>"
224};
225
226static const char *dataextend[0x2] =
227{
228#ifdef EXPLICIT_EXTENSIONS
229   /* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
230else
231   /* 00 */ " ", // Zero Extend
232#endif
233   /* 01 */ ".X" // Sign Extend
234};
235
236static const char *addressmode[0x4] =
237{
238#ifdef EXPLICIT_EXTENSIONS
239   /* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
240#else
241   /* 00 */ " ", // No Writeback
242#endif
243   /* 01 */ ".AW", // Writeback pre memory access
244   /* 02 */ ".AB", // Writeback post memory access
245   /* 03 */ ".AS"  // scaled
246};
247
248static const char *cachebit[0x2] =
249{
250#ifdef EXPLICIT_EXTENSIONS
251   /* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
252#else
253   /* 00 */ " ", // Data Cache Enabled
254#endif
255   /* 01 */ ".DI" // Direct to Memory (Cache Bypass)
256};
257
258static const char *regnames[0x40] =
259{
260   /* 00 */ "r0",
261   /* 01 */ "r1",
262   /* 02 */ "r2",
263   /* 03 */ "r3",
264   /* 04 */ "r4",
265   /* 05 */ "r5",
266   /* 06 */ "r6",
267   /* 07 */ "r7",
268   /* 08 */ "r8",
269   /* 09 */ "r9",
270   /* 0a */ "r10",
271   /* 0b */ "r11",
272   /* 0c */ "r12",
273   /* 0d */ "r13",
274   /* 0e */ "r14",
275   /* 0f */ "r15",
276
277   /* 10 */ "r16",
278   /* 11 */ "r17",
279   /* 12 */ "r18",
280   /* 13 */ "r19",
281   /* 14 */ "r20",
282   /* 15 */ "r21",
283   /* 16 */ "r22",
284   /* 17 */ "r23",
285   /* 18 */ "r24",
286   /* 19 */ "r25",
287   /* 1a */ "r26(GP)",
288   /* 1b */ "r27(FP)",
289   /* 1c */ "r28(SP)",
290   /* 1d */ "r29(ILINK1)",
291   /* 1e */ "r30(ILINK2)",
292   /* 1f */ "r31(BLINK)",
293
294   /* 20 */ "r32(ext)",
295   /* 21 */ "r33(ext)",
296   /* 22 */ "r34(ext)",
297   /* 23 */ "r35(ext)",
298   /* 24 */ "r36(ext)",
299   /* 25 */ "r37(ext)",
300   /* 26 */ "r38(ext)",
301   /* 27 */ "r39(ext)",
302   /* 28 */ "r40(ext)",
303   /* 29 */ "r41(ext)",
304   /* 2a */ "r42(ext)",
305   /* 2b */ "r43(ext)",
306   /* 2c */ "r44(ext)",
307   /* 2d */ "r45(ext)",
308   /* 2e */ "r46(ext)",
309   /* 2f */ "r47(ext)",
310
311   /* 30 */ "r48(ext)",
312   /* 31 */ "r49(ext)",
313   /* 32 */ "r50(ext)",
314   /* 33 */ "r51(ext)",
315   /* 34 */ "r52(ext)",
316   /* 35 */ "r53(ext)",
317   /* 36 */ "r54(ext)",
318   /* 37 */ "r55(ext)",
319   /* 38 */ "r56(ext)",
320   /* 39 */ "r57(ext)", // MLO  (result registers for optional multply functions)
321   /* 3a */ "r58(ext)", // MMID
322   /* 3b */ "r59(ext)", // MHI
323   /* 3c */ "r60(LP_COUNT)",
324   /* 3d */ "r61(reserved)",
325   /* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
326   /* 3f */ "r63(PCL)"
327};
328#endif
329
330int arcompact_handle02_dasm(DASM_OPS_32)
331{
332   // bitpos
333   // 1111 1111 1111 1111 0000 0000 0000 0000
334   // fedc ba98 7654 3210 fedc ba98 7654 3210
335   // fields
336   // 0001 0bbb ssss ssss SBBB DaaZ ZXAA AAAA
337
338#if 0
339   int A = (op & 0x0000003f >> 0);  //op &= ~0x0000003f;
340   int X = (op & 0x00000040 >> 6);  //op &= ~0x00000040;
341   int Z = (op & 0x00000180 >> 7);  //op &= ~0x00000180;
342   int a = (op & 0x00000600 >> 9);  //op &= ~0x00000600;
343   int D = (op & 0x00000800 >> 11);// op &= ~0x00000800;
344   int B = (op & 0x00007000 >> 12);// op &= ~0x00007000;
345   int S = (op & 0x00008000 >> 15);// op &= ~0x00008000;
346   int s = (op & 0x00ff0000 >> 16);// op &= ~0x00ff0000;
347   int b = (op & 0x07000000 >> 24);// op &= ~0x07000000;
348
349   int breg = b | (B << 3);
350   int sdat = s | (S << 8); // todo - signed
351#endif
352
353
354   output  += sprintf( output, "LD");
355//   output  += sprintf( output, "%s", datasize[Z]);
356//   output  += sprintf( output, "%s", dataextend[X]);
357//   output  += sprintf( output, "%s", addressmode[a]);
358//   output  += sprintf( output, "%s", cachebit[D]);
359//   output  += sprintf( output, " ");
360//   output  += sprintf( output, "%s, ", regnames[A]);
361//   output  += sprintf( output, "[");
362//   output  += sprintf( output, "%s(%d %d), ", regnames[breg], B, b);
363//   output  += sprintf( output, "%d", sdat);
364//   output  += sprintf( output, "]");
365
366   return 4;
367}
368
369int arcompact_handle03_dasm(DASM_OPS_32)
370{
371   // bitpos
372   // 11111 111 11111111 0 000 000000 0 00 00 0
373   // fedcb a98 76543210 f edc ba9876 5 43 21 0
374   // fields
375   // 00011 bbb ssssssss S BBB CCCCCC D aa ZZ R
376
377   print("ST r+o (%08x)", op );
378   return 4;
379}
380
381int arcompact_handle04_00_dasm(DASM_OPS_32)  { print("ADD (%08x)", op); return 4;}
382int arcompact_handle04_01_dasm(DASM_OPS_32)  { print("ADC (%08x)", op); return 4;}
383int arcompact_handle04_02_dasm(DASM_OPS_32)  { print("SUB (%08x)", op); return 4;}
384int arcompact_handle04_03_dasm(DASM_OPS_32)  { print("SBC (%08x)", op); return 4;}
385int arcompact_handle04_04_dasm(DASM_OPS_32)  { print("AND (%08x)", op); return 4;}
386int arcompact_handle04_05_dasm(DASM_OPS_32)  { print("OR (%08x)", op); return 4;}
387int arcompact_handle04_06_dasm(DASM_OPS_32)  { print("BIC (%08x)", op); return 4;}
388int arcompact_handle04_07_dasm(DASM_OPS_32)  { print("XOR (%08x)", op); return 4;}
389int arcompact_handle04_08_dasm(DASM_OPS_32)  { print("MAX (%08x)", op); return 4;}
390int arcompact_handle04_09_dasm(DASM_OPS_32)  { print("MIN (%08x)", op); return 4;}
391int arcompact_handle04_0a_dasm(DASM_OPS_32)  { print("MOV (%08x)", op); return 4;}
392int arcompact_handle04_0b_dasm(DASM_OPS_32)  { print("TST (%08x)", op); return 4;}
393int arcompact_handle04_0c_dasm(DASM_OPS_32)  { print("CMP (%08x)", op); return 4;}
394int arcompact_handle04_0d_dasm(DASM_OPS_32)  { print("RCMP (%08x)", op); return 4;}
395int arcompact_handle04_0e_dasm(DASM_OPS_32)  { print("RSUB (%08x)", op); return 4;}
396int arcompact_handle04_0f_dasm(DASM_OPS_32)  { print("BSET (%08x)", op); return 4;}
397int arcompact_handle04_10_dasm(DASM_OPS_32)  { print("BCLR (%08x)", op); return 4;}
398int arcompact_handle04_11_dasm(DASM_OPS_32)  { print("BTST (%08x)", op); return 4;}
399int arcompact_handle04_12_dasm(DASM_OPS_32)  { print("BXOR (%08x)", op); return 4;}
400int arcompact_handle04_13_dasm(DASM_OPS_32)  { print("BMSK (%08x)", op); return 4;}
401int arcompact_handle04_14_dasm(DASM_OPS_32)  { print("ADD1 (%08x)", op); return 4;}
402int arcompact_handle04_15_dasm(DASM_OPS_32)  { print("ADD2 (%08x)", op); return 4;}
403int arcompact_handle04_16_dasm(DASM_OPS_32)  { print("ADD3 (%08x)", op); return 4;}
404int arcompact_handle04_17_dasm(DASM_OPS_32)  { print("SUB1 (%08x)", op); return 4;}
405int arcompact_handle04_18_dasm(DASM_OPS_32)  { print("SUB2 (%08x)", op); return 4;}
406int arcompact_handle04_19_dasm(DASM_OPS_32)  { print("SUB3 (%08x)", op); return 4;}
407int arcompact_handle04_1a_dasm(DASM_OPS_32)  { print("MPY (%08x)", op); return 4;} // *
408int arcompact_handle04_1b_dasm(DASM_OPS_32)  { print("MPYH (%08x)", op); return 4;} // *
409int arcompact_handle04_1c_dasm(DASM_OPS_32)  { print("MPYHU (%08x)", op); return 4;} // *
410int arcompact_handle04_1d_dasm(DASM_OPS_32)  { print("MPYU (%08x)", op); return 4;} // *
411
412
413
414int arcompact_handle04_20_dasm(DASM_OPS_32)
415{
416   // todo, other bits (in none long immediate mode at least)
417
418   int size = 4;
419   int C = (op & 0x00000fc0) >> 6;
420   UINT8 condition = op & 0x0000001f;
421
422   op &= ~0x00000fc0;
423   
424   if (C == LIMM_REG)
425   {
426      UINT32 limm;
427      GET_LIMM_32;
428      size = 8;
429     
430      print("J(%s) %08x (%08x)", conditions[condition], limm, op);
431   }
432   else
433   {
434      print("J(%s) (r%d) (%08x)", conditions[condition], C, op);
435   }
436
437   return size;
438}
439
440
441
442int arcompact_handle04_21_dasm(DASM_OPS_32)  { print("Jcc.D (%08x)", op); return 4;}
443int arcompact_handle04_22_dasm(DASM_OPS_32)  { print("JLcc (%08x)", op); return 4;}
444int arcompact_handle04_23_dasm(DASM_OPS_32)  { print("JLcc.D (%08x)", op); return 4;}
445
446
447
448
449int arcompact_handle04_28_dasm(DASM_OPS_32)  { print("LPcc (%08x)", op); return 4;}
450int arcompact_handle04_29_dasm(DASM_OPS_32)  { print("FLAG (%08x)", op); return 4;}
451int arcompact_handle04_2a_dasm(DASM_OPS_32)  { print("LR (%08x)", op); return 4;}
452int arcompact_handle04_2b_dasm(DASM_OPS_32)  { print("SR (%08x)", op); return 4;}
453
454
455
456int arcompact_handle04_2f_00_dasm(DASM_OPS_32)  { print("ASL (%08x)", op); return 4;} // ASL
457int arcompact_handle04_2f_01_dasm(DASM_OPS_32)  { print("ASR (%08x)", op); return 4;} // ASR
458int arcompact_handle04_2f_02_dasm(DASM_OPS_32)  { print("LSR (%08x)", op); return 4;} // LSR
459int arcompact_handle04_2f_03_dasm(DASM_OPS_32)  { print("ROR (%08x)", op); return 4;} // ROR
460int arcompact_handle04_2f_04_dasm(DASM_OPS_32)  { print("RCC (%08x)", op); return 4;} // RCC
461int arcompact_handle04_2f_05_dasm(DASM_OPS_32)  { print("SEXB (%08x)", op); return 4;} // SEXB
462int arcompact_handle04_2f_06_dasm(DASM_OPS_32)  { print("SEXW (%08x)", op); return 4;} // SEXW
463int arcompact_handle04_2f_07_dasm(DASM_OPS_32)  { print("EXTB (%08x)", op); return 4;} // EXTB
464int arcompact_handle04_2f_08_dasm(DASM_OPS_32)  { print("EXTW (%08x)", op); return 4;} // EXTW
465int arcompact_handle04_2f_09_dasm(DASM_OPS_32)  { print("ABS (%08x)", op); return 4;} // ABS
466int arcompact_handle04_2f_0a_dasm(DASM_OPS_32)  { print("NOT (%08x)", op); return 4;} // NOT
467int arcompact_handle04_2f_0b_dasm(DASM_OPS_32)  { print("RLC (%08x)", op); return 4;} // RLC
468int arcompact_handle04_2f_0c_dasm(DASM_OPS_32)  { print("EX (%08x)", op); return 4;} // EX
469
470
471int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32)  { print("SLEEP (%08x)", op); return 4;}
472int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32)  { print("SWI / TRAP0 (%08x)", op); return 4;}
473int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32)  { print("SYNC (%08x)", op); return 4;}
474int arcompact_handle04_2f_3f_04_dasm(DASM_OPS_32)  { print("RTIE (%08x)", op); return 4;}
475int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32)  { print("BRK (%08x)", op); return 4;}
476
477
478
479
480
481
482
483int arcompact_handle04_30_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x30) (%08x)", op); return 4;}
484int arcompact_handle04_31_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x31) (%08x)", op); return 4;}
485int arcompact_handle04_32_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x32) (%08x)", op); return 4;}
486int arcompact_handle04_33_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x33) (%08x)", op); return 4;}
487int arcompact_handle04_34_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x34) (%08x)", op); return 4;}
488int arcompact_handle04_35_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x35) (%08x)", op); return 4;}
489int arcompact_handle04_36_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x36) (%08x)", op); return 4;}
490int arcompact_handle04_37_dasm(DASM_OPS_32)  { print("LD r-r (basecase 0x37) (%08x)", op); return 4;}
491
492
493
494
495
496
497int arcompact_handle05_00_dasm(DASM_OPS_32)  { print("ASL a <- b asl c (%08x)", op); return 4;}
498int arcompact_handle05_01_dasm(DASM_OPS_32)  { print("LSR a <- b lsr c (%08x)", op); return 4;}
499int arcompact_handle05_02_dasm(DASM_OPS_32)  { print("ASR a <- b asr c (%08x)", op); return 4;}
500int arcompact_handle05_03_dasm(DASM_OPS_32)  { print("ROR a <- b ror c (%08x)", op); return 4;}
501int arcompact_handle05_04_dasm(DASM_OPS_32)  { print("MUL64 mulres <- b * c (%08x)", op); return 4;}
502int arcompact_handle05_05_dasm(DASM_OPS_32)  { print("MULU64 mulres <- b * c (%08x)", op); return 4;}
503int arcompact_handle05_06_dasm(DASM_OPS_32)  { print("ADDS a <- sat32 (b + c) (%08x)", op); return 4;}
504int arcompact_handle05_07_dasm(DASM_OPS_32)  { print("SUBS a <- sat32 (b + c) (%08x)", op); return 4;}
505int arcompact_handle05_08_dasm(DASM_OPS_32)  { print("DIVAW (%08x)", op); return 4;}
506
507
508
509int arcompact_handle05_0a_dasm(DASM_OPS_32)  { print("ASLS a <- sat32 (b << c) (%08x)", op); return 4;}
510int arcompact_handle05_0b_dasm(DASM_OPS_32)  { print("ASRS a ,- sat32 (b >> c) (%08x)", op); return 4;}
511
512int arcompact_handle05_28_dasm(DASM_OPS_32)  { print("ADDSDW (%08x)", op); return 4;}
513int arcompact_handle05_29_dasm(DASM_OPS_32)  { print("SUBSDW (%08x)", op); return 4;}
514
515
516int arcompact_handle05_2f_dasm(DASM_OPS_32)  { print("SOP (another table) (%08x)", op); return 4;}
517
518
519
520
521int arcompact_handle06_dasm(DASM_OPS_32)
522{
523   print("op a,b,c (06 ARC ext) (%08x)", op );
524   return 4;
525}
526
527int arcompact_handle07_dasm(DASM_OPS_32)
528{
529   print("op a,b,c (07 User ext) (%08x)", op );
530   return 4;
531}
532
533int arcompact_handle08_dasm(DASM_OPS_32)
534{
535   print("op a,b,c (08 User ext) (%08x)", op );
536   return 4;
537}
538
539int arcompact_handle09_dasm(DASM_OPS_32)
540{
541   print("op a,b,c (09 Market ext) (%08x)", op );
542   return 4;
543}
544
545int arcompact_handle0a_dasm(DASM_OPS_32)
546{
547   print("op a,b,c (0a Market ext) (%08x)",  op );
548   return 4;
549}
550
551int arcompact_handle0b_dasm(DASM_OPS_32)
552{
553   print("op a,b,c (0b Market ext) (%08x)",  op );
554   return 4;
555}
556
557
558
559
560
561
562int arcompact_handle0c_00_dasm(DASM_OPS_16)
563{
564   int size = 2;
565   print("LD_S a <- m[b + c].long (%04x)", op);
566   return size;
567}
568
569int arcompact_handle0c_01_dasm(DASM_OPS_16)
570{
571   int size = 2;
572   print("LDB_S a <- m[b + c].byte (%04x)", op);
573   return size;
574}
575
576int arcompact_handle0c_02_dasm(DASM_OPS_16)
577{
578   int size = 2;
579   print("LDW_S a <- m[b + c].word (%04x)", op);
580   return size;
581}
582
583int arcompact_handle0c_03_dasm(DASM_OPS_16)
584{
585   int size = 2;
586   print("ADD_S a <- b + c (%04x)", op);
587   return size;
588}
589
590
591
592int arcompact_handle0d_00_dasm(DASM_OPS_16)
593{
594   int size = 2;
595   print("ADD_S c <- b + u3 (%04x)", op);
596   return size;
597}
598
599int arcompact_handle0d_01_dasm(DASM_OPS_16)
600{
601   int size = 2;
602   print("SUB_S c <- b - u3 (%04x)", op);
603   return size;
604}
605
606int arcompact_handle0d_02_dasm(DASM_OPS_16)
607{
608   int size = 2;
609   print("ASL_S c <- b asl u3 (%04x)", op);
610   return size;
611}
612
613int arcompact_handle0d_03_dasm(DASM_OPS_16)
614{
615   int size = 2;
616   print("ASL_S c <- b asr u3 (%04x)", op);
617   return size;
618}
619
620
621
622
623
624
625int arcompact_handle0e_00_dasm(DASM_OPS_16)
626{
627   int h;
628   int size = 2;
629
630   GROUP_0e_GET_h;
631
632   if (h == LIMM_REG)
633   {
634      UINT32 limm;
635      GET_LIMM;
636      size = 6;
637      print("ADD_S b <- b + (%08x) (%04x)", limm, op);
638   }
639   else
640   {
641
642      print("ADD_S b <- b + (r%d) (%04x)", h, op);
643   }
644
645   return size;
646}
647
648int arcompact_handle0e_01_dasm(DASM_OPS_16)
649{
650   int h;
651   int size = 2;
652   GROUP_0e_GET_h;
653
654   if (h == LIMM_REG)
655   {
656      UINT32 limm;
657      GET_LIMM;
658      size = 6;
659      print("MOV_S b <- (%08x)  (%04x)", limm, op);
660   }
661   else
662   {
663      print("MOV_S b <- (r%d)  (%04x)", h, op);
664   }
665   return size;
666}
667
668int arcompact_handle0e_02_dasm(DASM_OPS_16)
669{
670   int h;
671   int size = 2;
672   GROUP_0e_GET_h;
673
674   if (h == LIMM_REG)
675   {
676      UINT32 limm;
677      GET_LIMM;
678      size = 6;
679      print("CMP_S b - (%08x) (%04x)", limm, op);
680   }
681   else
682   {
683      print("CMP_S b - (r%d) (%04x)", h, op);
684   }
685   return size;
686}
687
688int arcompact_handle0e_03_dasm(DASM_OPS_16)
689{
690   int h;
691   int size = 2;
692   GROUP_0e_GET_h;
693
694   if (h == LIMM_REG)
695   {
696      UINT32 limm;
697      GET_LIMM;
698      size = 6;
699      print("MOV_S (%08x) <- b (%04x)", limm, op);
700   }
701   else
702   {
703      print("MOV_S (r%d) <- b (%04x)", h, op);
704   }
705
706   return size;
707}
708
709
710
711
712
713int arcompact_handle0f_00_00_dasm(DASM_OPS_16)  { print("J_S pc <- b (%08x)", op); return 2;}
714int arcompact_handle0f_00_01_dasm(DASM_OPS_16)  { print("J_S.D pc <- b (%08x)", op); return 2;}
715int arcompact_handle0f_00_02_dasm(DASM_OPS_16)  { print("JL_S blink <- pc; pc <- b (%08x)", op); return 2;}
716int arcompact_handle0f_00_03_dasm(DASM_OPS_16)  { print("L_S.D blink <- pc; pc <- b( %08x)", op); return 2;}
717int arcompact_handle0f_00_06_dasm(DASM_OPS_16)  { print("SUB_S.NE if (f.Z==0) b <- b - b  (%08x)", op); return 2;}
718
719
720
721
722
723int arcompact_handle0f_00_07_00_dasm(DASM_OPS_16)  { print("NOP_S (%08x)", op); return 2;}
724int arcompact_handle0f_00_07_01_dasm(DASM_OPS_16)  { print("UNIMP_S (%08x)", op); return 2;} // Unimplemented Instruction (how does this differ from illegal ops?)
725
726
727
728int arcompact_handle0f_00_07_04_dasm(DASM_OPS_16)  { print("JEQ_S [blink] (%08x)", op); return 2;}
729int arcompact_handle0f_00_07_05_dasm(DASM_OPS_16)  { print("JNE_S [blink]  (%08x)", op); return 2;}
730int arcompact_handle0f_00_07_06_dasm(DASM_OPS_16)  { print("J_S [blink]  (%08x)", op); return 2;}
731int arcompact_handle0f_00_07_07_dasm(DASM_OPS_16)  { print("J_S.D [blink] (%08x)", op); return 2;}
732
733
734int arcompact_handle0f_02_dasm(DASM_OPS_16)  { print("SUB_S b <- b - c (%08x)", op); return 2;}
735
736
737int arcompact_handle0f_04_dasm(DASM_OPS_16)  { print("AND_S b <- b and c (%08x)", op); return 2;}
738int arcompact_handle0f_05_dasm(DASM_OPS_16)  { print("OR_S b <- b or c (%08x)", op); return 2;}
739int arcompact_handle0f_06_dasm(DASM_OPS_16)  { print("BIC_S b <- b & !c (%08x)", op); return 2;}
740int arcompact_handle0f_07_dasm(DASM_OPS_16)  { print("XOR_S b <- b ^ c (%08x)", op); return 2;}
741
742
743int arcompact_handle0f_0b_dasm(DASM_OPS_16)  { print("TST_S b & c (%08x)", op); return 2;}
744int arcompact_handle0f_0c_dasm(DASM_OPS_16)  { print("MUL64_S mulres <- b * c  (%08x)", op); return 2;}
745int arcompact_handle0f_0d_dasm(DASM_OPS_16)  { print("SEXB_S b <- sexb(c) (%08x)", op); return 2;}
746int arcompact_handle0f_0e_dasm(DASM_OPS_16)  { print("SEXW_S b <- sexw(c) (%08x)", op); return 2;}
747int arcompact_handle0f_0f_dasm(DASM_OPS_16)  { print("EXTB_S b <- extb(c) (%08x)", op); return 2;}
748int arcompact_handle0f_10_dasm(DASM_OPS_16)  { print("EXTW_S b <- extw(c) (%08x)", op); return 2;}
749int arcompact_handle0f_11_dasm(DASM_OPS_16)  { print("ABS_S b <- abs(c)  (%08x)", op); return 2;}
750int arcompact_handle0f_12_dasm(DASM_OPS_16)  { print("NOT_S b <- !(c) (%08x)", op); return 2;}
751int arcompact_handle0f_13_dasm(DASM_OPS_16)  { print("NEG_S b <- neg(c)  (%08x)", op); return 2;}
752int arcompact_handle0f_14_dasm(DASM_OPS_16)  { print("ADD1_S b <- b + (c << 1) (%08x)", op); return 2;}
753int arcompact_handle0f_15_dasm(DASM_OPS_16)  { print("ADD2_S b <- b + (c << 2) (%08x)", op); return 2;}
754int arcompact_handle0f_16_dasm(DASM_OPS_16)  { print("ADD3_S b <- b + (c << 3)  (%08x)", op); return 2;}
755
756
757int arcompact_handle0f_18_dasm(DASM_OPS_16)  { print("ASL_S b <- b asl c (%08x)", op); return 2;}
758int arcompact_handle0f_19_dasm(DASM_OPS_16)  { print("LSR_S b <- b lsr c (%08x)", op); return 2;}
759int arcompact_handle0f_1a_dasm(DASM_OPS_16)  { print("ASR_S b <- b asr c (%08x)", op); return 2;}
760int arcompact_handle0f_1b_dasm(DASM_OPS_16)  { print("ASL_S b <- c + c (%08x)", op); return 2;}
761int arcompact_handle0f_1c_dasm(DASM_OPS_16)  { print("ASR_S b <- c asr 1 (%08x)", op); return 2;}
762int arcompact_handle0f_1d_dasm(DASM_OPS_16)  { print("LSR_S b <- c lsr 1(%08x)", op); return 2;}
763int arcompact_handle0f_1e_dasm(DASM_OPS_16)  { print("TRAP_S (%08x)", op); return 2;}
764int arcompact_handle0f_1f_dasm(DASM_OPS_16)  { print("BRK_S (%08x)", op); return 2;}
765
766
767int arcompact_handle10_dasm(DASM_OPS_16)
768{
769   print("LD_S (%04x)",  op);
770   return 2;
771}
772
773int arcompact_handle11_dasm(DASM_OPS_16)
774{
775   print("LDB_S (%04x)", op);
776   return 2;
777}
778
779int arcompact_handle12_dasm(DASM_OPS_16)
780{
781   print("LDW_S (%04x)", op);
782   return 2;
783}
784
785int arcompact_handle13_dasm(DASM_OPS_16)
786{
787   print("LSW_S.X (%04x)", op);
788   return 2;
789}
790
791int arcompact_handle14_dasm(DASM_OPS_16)
792{
793   print("ST_S (%04x)", op);
794   return 2;
795}
796
797int arcompact_handle15_dasm(DASM_OPS_16)
798{
799   print("STB_S (%04x)", op);
800   return 2;
801}
802
803int arcompact_handle16_dasm(DASM_OPS_16)
804{
805   print("STW_S (%04x)",  op);
806   return 2;
807}
808
809
810int arcompact_handle17_00_dasm(DASM_OPS_16)
811{
812   int size = 2;
813   print("ASL_S b <- b asl u5 (%04x)",  op);
814   return size;
815}
816
817int arcompact_handle17_01_dasm(DASM_OPS_16)
818{
819   int size = 2;
820   print("LSR_S b <- b lsr u5 (%04x)",  op);
821   return size;
822}
823
824int arcompact_handle17_02_dasm(DASM_OPS_16)
825{
826   int size = 2;
827   print("ASR_S b <- b asr u5 (%04x)",  op);
828   return size;
829}
830
831int arcompact_handle17_03_dasm(DASM_OPS_16)
832{
833   int size = 2;
834   print("SUB_S b <- b - u5 (%04x)",  op);
835   return size;
836}
837
838int arcompact_handle17_04_dasm(DASM_OPS_16)
839{
840   int size = 2;
841   print("BSET_S b <- b | (1 << u5) (%04x)",  op);
842   return size;
843}
844
845int arcompact_handle17_05_dasm(DASM_OPS_16)
846{
847   int size = 2;
848   print("BCLR_S b <- b & !(1 << u5) (%04x)",  op);
849   return size;
850}
851
852int arcompact_handle17_06_dasm(DASM_OPS_16)
853{
854   int size = 2;
855   print("BMSK_S (%04x)",  op);
856   return size;
857}
858
859int arcompact_handle17_07_dasm(DASM_OPS_16)
860{
861   int size = 2;
862   print("BTST_S (%04x)",  op);
863   return size;
864}
865
866
867// op bits remaining for 0x18_xx subgroups 0x071f
868
869int arcompact_handle18_00_dasm(DASM_OPS_16)
870{
871   print("LD_S (SP) (%04x)",  op);
872   return 2;
873}
874
875int arcompact_handle18_01_dasm(DASM_OPS_16)
876{
877   print("LDB_S (SP) (%04x)",  op);
878   return 2;
879}
880
881int arcompact_handle18_02_dasm(DASM_OPS_16)
882{
883   print("ST_S (SP) (%04x)",  op);
884   return 2;
885}
886
887int arcompact_handle18_03_dasm(DASM_OPS_16)
888{
889   print("STB_S (SP) (%04x)",  op);
890   return 2;
891}
892
893int arcompact_handle18_04_dasm(DASM_OPS_16)
894{
895   print("ADD_S (SP) (%04x)",  op);
896   return 2;
897}
898
899// op bits remaining for 0x18_05_xx subgroups 0x001f
900int arcompact_handle18_05_00_dasm(DASM_OPS_16)
901{
902   int u = op & 0x001f;
903   op &= ~0x001f; // all bits now used
904
905   print("ADD_S %02x (SP)", u);
906   return 2;
907
908}
909
910int arcompact_handle18_05_01_dasm(DASM_OPS_16)
911{
912   int u = op & 0x001f;
913   op &= ~0x001f; // all bits now used
914
915   print("SUB_S %02x (SP)", u);
916   return 2;
917}
918
919// op bits remaining for 0x18_06_xx subgroups 0x0700
920int arcompact_handle18_06_01_dasm(DASM_OPS_16)
921{
922   int b = (op & 0x0700) >> 8;
923   op &= ~0x0700; // all bits now used
924
925   print("POP_S [%02x]", b);
926
927   return 2;
928}
929
930int arcompact_handle18_06_11_dasm(DASM_OPS_16)
931{
932   int res = (op & 0x0700) >> 8;
933   op &= ~0x0700; // all bits now used
934
935   if (res)
936      print("POP_S [BLINK] (Reserved Bits set %04x)", op);
937   else
938      print("POP_S [BLINK]");
939
940   return 2;
941}
942
943// op bits remaining for 0x18_07_xx subgroups 0x0700
944int arcompact_handle18_07_01_dasm(DASM_OPS_16)
945{
946   int b = (op & 0x0700) >> 8;
947   op &= ~0x0700; // all bits now used
948
949   print("PUSH_S [%02x]", b);
950
951   return 2;
952}
953
954
955int arcompact_handle18_07_11_dasm(DASM_OPS_16)
956{
957   int res = (op & 0x0700) >> 8;
958   op &= ~0x0700; // all bits now used
959
960   if (res)
961      print("PUSH_S [BLINK] (Reserved Bits set %04x)", op);
962   else
963      print("PUSH_S [BLINK]");
964
965   return 2;
966}
967
968int arcompact_handle19_00_dasm(DASM_OPS_16)  { print("LD_S r0 <- m[GP + s11].long (%04x)",  op); return 2;}
969int arcompact_handle19_01_dasm(DASM_OPS_16)  { print("LDB_S r0 <- m[GP + s9].byte (%04x)",  op); return 2;}
970int arcompact_handle19_02_dasm(DASM_OPS_16)  { print("LDW_S r0 <- m[GP + s10].word (%04x)",  op); return 2;}
971int arcompact_handle19_03_dasm(DASM_OPS_16)  { print("ADD_S r0 <- GP + s11 (%04x)",  op); return 2;}
972
973int arcompact_handle1a_dasm(DASM_OPS_16)
974{
975   print("PCL Instr (%04x)", op);
976   return 2;
977}
978
979int arcompact_handle1b_dasm(DASM_OPS_16)
980{
981   print("MOV_S (%04x)", op);
982   return 2;
983}
984
985int arcompact_handle1c_00_dasm(DASM_OPS_16)  { print("ADD_S b <- b + u7 (%04x)",  op); return 2;}
986int arcompact_handle1c_01_dasm(DASM_OPS_16)  { print("CMP_S b - u7 (%04x)",  op); return 2;}
987
988
989int arcompact_handle1d_00_dasm(DASM_OPS_16)  { print("BREQ_S (%04x)",  op); return 2;}
990int arcompact_handle1d_01_dasm(DASM_OPS_16)  { print("BRNE_S (%04x)",  op); return 2;}
991
992
993int arcompact_handle1e_00_dasm(DASM_OPS_16)  { print("B_S (%04x)",  op); return 2;}
994int arcompact_handle1e_01_dasm(DASM_OPS_16)  { print("BEQ_S (%04x)",  op); return 2;}
995int arcompact_handle1e_02_dasm(DASM_OPS_16)  { print("BNE_S (%04x)",  op); return 2;}
996
997int arcompact_handle1e_03_00_dasm(DASM_OPS_16)  { print("BGT_S (%04x)",  op); return 2;}
998int arcompact_handle1e_03_01_dasm(DASM_OPS_16)  { print("BGE_S (%04x)",  op); return 2;}
999int arcompact_handle1e_03_02_dasm(DASM_OPS_16)  { print("BLT_S (%04x)",  op); return 2;}
1000int arcompact_handle1e_03_03_dasm(DASM_OPS_16)  { print("BLE_S (%04x)",  op); return 2;}
1001int arcompact_handle1e_03_04_dasm(DASM_OPS_16)  { print("BHI_S (%04x)",  op); return 2;}
1002int arcompact_handle1e_03_05_dasm(DASM_OPS_16)  { print("BHS_S (%04x)",  op); return 2;}
1003int arcompact_handle1e_03_06_dasm(DASM_OPS_16)  { print("BLO_S (%04x)",  op); return 2;}
1004int arcompact_handle1e_03_07_dasm(DASM_OPS_16)  { print("BLS_S (%04x)",  op); return 2;}
1005
1006int arcompact_handle1f_dasm(DASM_OPS_16)
1007{
1008   print("BL_S (%04x)", op);
1009   return 2;
1010}
1011
1012/************************************************************************************************************************************
1013*                                                                                                                                   *
1014* illegal opcode handlers (disassembly)                                                                                             *
1015*                                                                                                                                   *
1016************************************************************************************************************************************/
1017
1018int arcompact_handle01_01_00_06_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_06> (%08x)", op); return 4; }
1019int arcompact_handle01_01_00_07_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_07> (%08x)", op); return 4; }
1020int arcompact_handle01_01_00_08_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_08> (%08x)", op); return 4; }
1021int arcompact_handle01_01_00_09_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_09> (%08x)", op); return 4; }
1022int arcompact_handle01_01_00_0a_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_0a> (%08x)", op); return 4; }
1023int arcompact_handle01_01_00_0b_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_0b> (%08x)", op); return 4; }
1024int arcompact_handle01_01_00_0c_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_0c> (%08x)", op); return 4; }
1025int arcompact_handle01_01_00_0d_dasm(DASM_OPS_32)  { print("<illegal 01_01_00_0d> (%08x)", op); return 4; }
1026
1027int arcompact_handle01_01_01_06_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_06> (%08x)", op); return 4; }
1028int arcompact_handle01_01_01_07_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_07> (%08x)", op); return 4; }
1029int arcompact_handle01_01_01_08_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_08> (%08x)", op); return 4; }
1030int arcompact_handle01_01_01_09_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_09> (%08x)", op); return 4; }
1031int arcompact_handle01_01_01_0a_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_0a> (%08x)", op); return 4; }
1032int arcompact_handle01_01_01_0b_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_0b> (%08x)", op); return 4; }
1033int arcompact_handle01_01_01_0c_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_0c> (%08x)", op); return 4; }
1034int arcompact_handle01_01_01_0d_dasm(DASM_OPS_32)  { print("<illegal 01_01_01_0d> (%08x)", op); return 4; }
1035
1036
1037int arcompact_handle04_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_1e> (%08x)", op); return 4;}
1038int arcompact_handle04_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_1f> (%08x)", op); return 4;}
1039
1040int arcompact_handle04_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_24> (%08x)", op); return 4;}
1041int arcompact_handle04_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_25> (%08x)", op); return 4;}
1042int arcompact_handle04_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_26> (%08x)", op); return 4;}
1043int arcompact_handle04_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_27> (%08x)", op); return 4;}
1044
1045int arcompact_handle04_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2c> (%08x)", op); return 4;}
1046int arcompact_handle04_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2d> (%08x)", op); return 4;}
1047int arcompact_handle04_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2e> (%08x)", op); return 4;}
1048
1049int arcompact_handle04_2f_0d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0d> (%08x)", op); return 4;}
1050int arcompact_handle04_2f_0e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0e> (%08x)", op); return 4;}
1051int arcompact_handle04_2f_0f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_0f> (%08x)", op); return 4;}
1052int arcompact_handle04_2f_10_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_10> (%08x)", op); return 4;}
1053int arcompact_handle04_2f_11_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_11> (%08x)", op); return 4;}
1054int arcompact_handle04_2f_12_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_12> (%08x)", op); return 4;}
1055int arcompact_handle04_2f_13_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_13> (%08x)", op); return 4;}
1056int arcompact_handle04_2f_14_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_14> (%08x)", op); return 4;}
1057int arcompact_handle04_2f_15_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_15> (%08x)", op); return 4;}
1058int arcompact_handle04_2f_16_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_16> (%08x)", op); return 4;}
1059int arcompact_handle04_2f_17_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_17> (%08x)", op); return 4;}
1060int arcompact_handle04_2f_18_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_18> (%08x)", op); return 4;}
1061int arcompact_handle04_2f_19_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_19> (%08x)", op); return 4;}
1062int arcompact_handle04_2f_1a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1a> (%08x)", op); return 4;}
1063int arcompact_handle04_2f_1b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1b> (%08x)", op); return 4;}
1064int arcompact_handle04_2f_1c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1c> (%08x)", op); return 4;}
1065int arcompact_handle04_2f_1d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1d> (%08x)", op); return 4;}
1066int arcompact_handle04_2f_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1e> (%08x)", op); return 4;}
1067int arcompact_handle04_2f_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_1f> (%08x)", op); return 4;}
1068int arcompact_handle04_2f_20_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_20> (%08x)", op); return 4;}
1069int arcompact_handle04_2f_21_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_21> (%08x)", op); return 4;}
1070int arcompact_handle04_2f_22_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_22> (%08x)", op); return 4;}
1071int arcompact_handle04_2f_23_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_23> (%08x)", op); return 4;}
1072int arcompact_handle04_2f_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_24> (%08x)", op); return 4;}
1073int arcompact_handle04_2f_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_25> (%08x)", op); return 4;}
1074int arcompact_handle04_2f_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_26> (%08x)", op); return 4;}
1075int arcompact_handle04_2f_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_27> (%08x)", op); return 4;}
1076int arcompact_handle04_2f_28_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_28> (%08x)", op); return 4;}
1077int arcompact_handle04_2f_29_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_29> (%08x)", op); return 4;}
1078int arcompact_handle04_2f_2a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2a> (%08x)", op); return 4;}
1079int arcompact_handle04_2f_2b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2b> (%08x)", op); return 4;}
1080int arcompact_handle04_2f_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2c> (%08x)", op); return 4;}
1081int arcompact_handle04_2f_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2d> (%08x)", op); return 4;}
1082int arcompact_handle04_2f_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2e> (%08x)", op); return 4;}
1083int arcompact_handle04_2f_2f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_2f> (%08x)", op); return 4;}
1084int arcompact_handle04_2f_30_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_30> (%08x)", op); return 4;}
1085int arcompact_handle04_2f_31_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_31> (%08x)", op); return 4;}
1086int arcompact_handle04_2f_32_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_32> (%08x)", op); return 4;}
1087int arcompact_handle04_2f_33_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_33> (%08x)", op); return 4;}
1088int arcompact_handle04_2f_34_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_34> (%08x)", op); return 4;}
1089int arcompact_handle04_2f_35_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_35> (%08x)", op); return 4;}
1090int arcompact_handle04_2f_36_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_36> (%08x)", op); return 4;}
1091int arcompact_handle04_2f_37_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_37> (%08x)", op); return 4;}
1092int arcompact_handle04_2f_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_38> (%08x)", op); return 4;}
1093int arcompact_handle04_2f_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_39> (%08x)", op); return 4;}
1094int arcompact_handle04_2f_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3a> (%08x)", op); return 4;}
1095int arcompact_handle04_2f_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3b> (%08x)", op); return 4;}
1096int arcompact_handle04_2f_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3c> (%08x)", op); return 4;}
1097int arcompact_handle04_2f_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3d> (%08x)", op); return 4;}
1098int arcompact_handle04_2f_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3e> (%08x)", op); return 4;}
1099
1100int arcompact_handle04_2f_3f_00_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_00> (%08x)", op); return 4;}
1101int arcompact_handle04_2f_3f_06_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_06> (%08x)", op); return 4;}
1102int arcompact_handle04_2f_3f_07_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_07> (%08x)", op); return 4;}
1103int arcompact_handle04_2f_3f_08_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_08> (%08x)", op); return 4;}
1104int arcompact_handle04_2f_3f_09_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_09> (%08x)", op); return 4;}
1105int arcompact_handle04_2f_3f_0a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0a> (%08x)", op); return 4;}
1106int arcompact_handle04_2f_3f_0b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0b> (%08x)", op); return 4;}
1107int arcompact_handle04_2f_3f_0c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0c> (%08x)", op); return 4;}
1108int arcompact_handle04_2f_3f_0d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0d> (%08x)", op); return 4;}
1109int arcompact_handle04_2f_3f_0e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0e> (%08x)", op); return 4;}
1110int arcompact_handle04_2f_3f_0f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_0f> (%08x)", op); return 4;}
1111int arcompact_handle04_2f_3f_10_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_10> (%08x)", op); return 4;}
1112int arcompact_handle04_2f_3f_11_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_11> (%08x)", op); return 4;}
1113int arcompact_handle04_2f_3f_12_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_12> (%08x)", op); return 4;}
1114int arcompact_handle04_2f_3f_13_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_13> (%08x)", op); return 4;}
1115int arcompact_handle04_2f_3f_14_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_14> (%08x)", op); return 4;}
1116int arcompact_handle04_2f_3f_15_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_15> (%08x)", op); return 4;}
1117int arcompact_handle04_2f_3f_16_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_16> (%08x)", op); return 4;}
1118int arcompact_handle04_2f_3f_17_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_17> (%08x)", op); return 4;}
1119int arcompact_handle04_2f_3f_18_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_18> (%08x)", op); return 4;}
1120int arcompact_handle04_2f_3f_19_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_19> (%08x)", op); return 4;}
1121int arcompact_handle04_2f_3f_1a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1a> (%08x)", op); return 4;}
1122int arcompact_handle04_2f_3f_1b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1b> (%08x)", op); return 4;}
1123int arcompact_handle04_2f_3f_1c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1c> (%08x)", op); return 4;}
1124int arcompact_handle04_2f_3f_1d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1d> (%08x)", op); return 4;}
1125int arcompact_handle04_2f_3f_1e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1e> (%08x)", op); return 4;}
1126int arcompact_handle04_2f_3f_1f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_1f> (%08x)", op); return 4;}
1127int arcompact_handle04_2f_3f_20_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_20> (%08x)", op); return 4;}
1128int arcompact_handle04_2f_3f_21_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_21> (%08x)", op); return 4;}
1129int arcompact_handle04_2f_3f_22_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_22> (%08x)", op); return 4;}
1130int arcompact_handle04_2f_3f_23_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_23> (%08x)", op); return 4;}
1131int arcompact_handle04_2f_3f_24_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_24> (%08x)", op); return 4;}
1132int arcompact_handle04_2f_3f_25_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_25> (%08x)", op); return 4;}
1133int arcompact_handle04_2f_3f_26_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_26> (%08x)", op); return 4;}
1134int arcompact_handle04_2f_3f_27_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_27> (%08x)", op); return 4;}
1135int arcompact_handle04_2f_3f_28_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_28> (%08x)", op); return 4;}
1136int arcompact_handle04_2f_3f_29_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_29> (%08x)", op); return 4;}
1137int arcompact_handle04_2f_3f_2a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2a> (%08x)", op); return 4;}
1138int arcompact_handle04_2f_3f_2b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2b> (%08x)", op); return 4;}
1139int arcompact_handle04_2f_3f_2c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2c> (%08x)", op); return 4;}
1140int arcompact_handle04_2f_3f_2d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2d> (%08x)", op); return 4;}
1141int arcompact_handle04_2f_3f_2e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2e> (%08x)", op); return 4;}
1142int arcompact_handle04_2f_3f_2f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_2f> (%08x)", op); return 4;}
1143int arcompact_handle04_2f_3f_30_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_30> (%08x)", op); return 4;}
1144int arcompact_handle04_2f_3f_31_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_31> (%08x)", op); return 4;}
1145int arcompact_handle04_2f_3f_32_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_32> (%08x)", op); return 4;}
1146int arcompact_handle04_2f_3f_33_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_33> (%08x)", op); return 4;}
1147int arcompact_handle04_2f_3f_34_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_34> (%08x)", op); return 4;}
1148int arcompact_handle04_2f_3f_35_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_35> (%08x)", op); return 4;}
1149int arcompact_handle04_2f_3f_36_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_36> (%08x)", op); return 4;}
1150int arcompact_handle04_2f_3f_37_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_37> (%08x)", op); return 4;}
1151int arcompact_handle04_2f_3f_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_38> (%08x)", op); return 4;}
1152int arcompact_handle04_2f_3f_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_39> (%08x)", op); return 4;}
1153int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3a> (%08x)", op); return 4;}
1154int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3b> (%08x)", op); return 4;}
1155int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3c> (%08x)", op); return 4;}
1156int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3d> (%08x)", op); return 4;}
1157int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3e> (%08x)", op); return 4;}
1158int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32)  { print("<illegal 0x04_2f_3f_3f> (%08x)", op); return 4;}
1159
1160
1161
1162
1163int arcompact_handle04_38_dasm(DASM_OPS_32)  { print("<illegal 0x04_38> (%08x)", op); return 4;}
1164int arcompact_handle04_39_dasm(DASM_OPS_32)  { print("<illegal 0x04_39> (%08x)", op); return 4;}
1165int arcompact_handle04_3a_dasm(DASM_OPS_32)  { print("<illegal 0x04_3a> (%08x)", op); return 4;}
1166int arcompact_handle04_3b_dasm(DASM_OPS_32)  { print("<illegal 0x04_3b> (%08x)", op); return 4;}
1167int arcompact_handle04_3c_dasm(DASM_OPS_32)  { print("<illegal 0x04_3c> (%08x)", op); return 4;}
1168int arcompact_handle04_3d_dasm(DASM_OPS_32)  { print("<illegal 0x04_3d> (%08x)", op); return 4;}
1169int arcompact_handle04_3e_dasm(DASM_OPS_32)  { print("<illegal 0x04_3e> (%08x)", op); return 4;}
1170int arcompact_handle04_3f_dasm(DASM_OPS_32)  { print("<illegal 0x04_3f> (%08x)", op); return 4;}
1171
1172
1173int arcompact_handle05_09_dasm(DASM_OPS_32)  { print("<illegal 0x05_09> (%08x)", op); return 4;}
1174int arcompact_handle05_0c_dasm(DASM_OPS_32)  { print("<illegal 0x05_0c> (%08x)", op); return 4;}
1175int arcompact_handle05_0d_dasm(DASM_OPS_32)  { print("<illegal 0x05_0d> (%08x)", op); return 4;}
1176int arcompact_handle05_0e_dasm(DASM_OPS_32)  { print("<illegal 0x05_0e> (%08x)", op); return 4;}
1177int arcompact_handle05_0f_dasm(DASM_OPS_32)  { print("<illegal 0x05_0f> (%08x)", op); return 4;}
1178int arcompact_handle05_10_dasm(DASM_OPS_32)  { print("<illegal 0x05_10> (%08x)", op); return 4;}
1179int arcompact_handle05_11_dasm(DASM_OPS_32)  { print("<illegal 0x05_11> (%08x)", op); return 4;}
1180int arcompact_handle05_12_dasm(DASM_OPS_32)  { print("<illegal 0x05_12> (%08x)", op); return 4;}
1181int arcompact_handle05_13_dasm(DASM_OPS_32)  { print("<illegal 0x05_13> (%08x)", op); return 4;}
1182int arcompact_handle05_14_dasm(DASM_OPS_32)  { print("<illegal 0x05_14> (%08x)", op); return 4;}
1183int arcompact_handle05_15_dasm(DASM_OPS_32)  { print("<illegal 0x05_15> (%08x)", op); return 4;}
1184int arcompact_handle05_16_dasm(DASM_OPS_32)  { print("<illegal 0x05_16> (%08x)", op); return 4;}
1185int arcompact_handle05_17_dasm(DASM_OPS_32)  { print("<illegal 0x05_17> (%08x)", op); return 4;}
1186int arcompact_handle05_18_dasm(DASM_OPS_32)  { print("<illegal 0x05_18> (%08x)", op); return 4;}
1187int arcompact_handle05_19_dasm(DASM_OPS_32)  { print("<illegal 0x05_19> (%08x)", op); return 4;}
1188int arcompact_handle05_1a_dasm(DASM_OPS_32)  { print("<illegal 0x05_1a> (%08x)", op); return 4;}
1189int arcompact_handle05_1b_dasm(DASM_OPS_32)  { print("<illegal 0x05_1b> (%08x)", op); return 4;}
1190int arcompact_handle05_1c_dasm(DASM_OPS_32)  { print("<illegal 0x05_1c> (%08x)", op); return 4;}
1191int arcompact_handle05_1d_dasm(DASM_OPS_32)  { print("<illegal 0x05_1d> (%08x)", op); return 4;}
1192int arcompact_handle05_1e_dasm(DASM_OPS_32)  { print("<illegal 0x05_1e> (%08x)", op); return 4;}
1193int arcompact_handle05_1f_dasm(DASM_OPS_32)  { print("<illegal 0x05_1f> (%08x)", op); return 4;}
1194int arcompact_handle05_20_dasm(DASM_OPS_32)  { print("<illegal 0x05_20> (%08x)", op); return 4;}
1195int arcompact_handle05_21_dasm(DASM_OPS_32)  { print("<illegal 0x05_21> (%08x)", op); return 4;}
1196int arcompact_handle05_22_dasm(DASM_OPS_32)  { print("<illegal 0x05_22> (%08x)", op); return 4;}
1197int arcompact_handle05_23_dasm(DASM_OPS_32)  { print("<illegal 0x05_23> (%08x)", op); return 4;}
1198int arcompact_handle05_24_dasm(DASM_OPS_32)  { print("<illegal 0x05_24> (%08x)", op); return 4;}
1199int arcompact_handle05_25_dasm(DASM_OPS_32)  { print("<illegal 0x05_25> (%08x)", op); return 4;}
1200int arcompact_handle05_26_dasm(DASM_OPS_32)  { print("<illegal 0x05_26> (%08x)", op); return 4;}
1201int arcompact_handle05_27_dasm(DASM_OPS_32)  { print("<illegal 0x05_27> (%08x)", op); return 4;}
1202
1203int arcompact_handle05_2a_dasm(DASM_OPS_32)  { print("<illegal 0x05_2a> (%08x)", op); return 4;}
1204int arcompact_handle05_2b_dasm(DASM_OPS_32)  { print("<illegal 0x05_2b> (%08x)", op); return 4;}
1205int arcompact_handle05_2c_dasm(DASM_OPS_32)  { print("<illegal 0x05_2c> (%08x)", op); return 4;}
1206int arcompact_handle05_2d_dasm(DASM_OPS_32)  { print("<illegal 0x05_2d> (%08x)", op); return 4;}
1207int arcompact_handle05_2e_dasm(DASM_OPS_32)  { print("<illegal 0x05_2e> (%08x)", op); return 4;}
1208
1209int arcompact_handle05_30_dasm(DASM_OPS_32)  { print("<illegal 0x05_30> (%08x)", op); return 4;}
1210int arcompact_handle05_31_dasm(DASM_OPS_32)  { print("<illegal 0x05_31> (%08x)", op); return 4;}
1211int arcompact_handle05_32_dasm(DASM_OPS_32)  { print("<illegal 0x05_32> (%08x)", op); return 4;}
1212int arcompact_handle05_33_dasm(DASM_OPS_32)  { print("<illegal 0x05_33> (%08x)", op); return 4;}
1213int arcompact_handle05_34_dasm(DASM_OPS_32)  { print("<illegal 0x05_34> (%08x)", op); return 4;}
1214int arcompact_handle05_35_dasm(DASM_OPS_32)  { print("<illegal 0x05_35> (%08x)", op); return 4;}
1215int arcompact_handle05_36_dasm(DASM_OPS_32)  { print("<illegal 0x05_36> (%08x)", op); return 4;}
1216int arcompact_handle05_37_dasm(DASM_OPS_32)  { print("<illegal 0x05_37> (%08x)", op); return 4;}
1217int arcompact_handle05_38_dasm(DASM_OPS_32)  { print("<illegal 0x05_38> (%08x)", op); return 4;}
1218int arcompact_handle05_39_dasm(DASM_OPS_32)  { print("<illegal 0x05_39> (%08x)", op); return 4;}
1219int arcompact_handle05_3a_dasm(DASM_OPS_32)  { print("<illegal 0x05_3a> (%08x)", op); return 4;}
1220int arcompact_handle05_3b_dasm(DASM_OPS_32)  { print("<illegal 0x05_3b> (%08x)", op); return 4;}
1221int arcompact_handle05_3c_dasm(DASM_OPS_32)  { print("<illegal 0x05_3c> (%08x)", op); return 4;}
1222int arcompact_handle05_3d_dasm(DASM_OPS_32)  { print("<illegal 0x05_3d> (%08x)", op); return 4;}
1223int arcompact_handle05_3e_dasm(DASM_OPS_32)  { print("<illegal 0x05_3e> (%08x)", op); return 4;}
1224int arcompact_handle05_3f_dasm(DASM_OPS_32)  { print("<illegal 0x05_3f> (%08x)", op); return 4;}
1225
1226int arcompact_handle0f_00_04_dasm(DASM_OPS_16)  { print("<illegal 0x0f_00_00> (%08x)", op); return 2;}
1227int arcompact_handle0f_00_05_dasm(DASM_OPS_16)  { print("<illegal 0x0f_00_00> (%08x)", op); return 2;}
1228int arcompact_handle0f_00_07_02_dasm(DASM_OPS_16)  { print("<illegal 0x0f_00_07_02> (%08x)", op); return 2;}
1229int arcompact_handle0f_00_07_03_dasm(DASM_OPS_16)  { print("<illegal 0x0f_00_07_03> (%08x)", op); return 2;}
1230int arcompact_handle0f_01_dasm(DASM_OPS_16)  { print("<illegal 0x0f_01> (%08x)", op); return 2;}
1231int arcompact_handle0f_03_dasm(DASM_OPS_16)  { print("<illegal 0x0f_03> (%08x)", op); return 2;}
1232int arcompact_handle0f_08_dasm(DASM_OPS_16)  { print("<illegal 0x0f_08> (%08x)", op); return 2;}
1233int arcompact_handle0f_09_dasm(DASM_OPS_16)  { print("<illegal 0x0f_09> (%08x)", op); return 2;}
1234int arcompact_handle0f_0a_dasm(DASM_OPS_16)  { print("<illegal 0x0f_0a> (%08x)", op); return 2;}
1235int arcompact_handle0f_17_dasm(DASM_OPS_16)  { print("<illegal 0x0f_17> (%08x)", op); return 2;}
1236
1237int arcompact_handle18_05_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_02> (%04x)", op); return 2;}
1238int arcompact_handle18_05_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_03> (%04x)", op); return 2;}
1239int arcompact_handle18_05_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_04> (%04x)", op); return 2;}
1240int arcompact_handle18_05_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_05> (%04x)", op); return 2;}
1241int arcompact_handle18_05_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_06> (%04x)", op); return 2;}
1242int arcompact_handle18_05_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_05_07> (%04x)", op); return 2;}
1243int arcompact_handle18_06_00_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_00> (%04x)",  op); return 2;}
1244int arcompact_handle18_06_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_02> (%04x)", op); return 2;}
1245int arcompact_handle18_06_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_03> (%04x)", op); return 2;}
1246int arcompact_handle18_06_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_04> (%04x)", op); return 2;}
1247int arcompact_handle18_06_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_05> (%04x)", op); return 2;}
1248int arcompact_handle18_06_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_06> (%04x)", op); return 2;}
1249int arcompact_handle18_06_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_07> (%04x)", op); return 2;}
1250int arcompact_handle18_06_08_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_08> (%04x)", op); return 2;}
1251int arcompact_handle18_06_09_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_09> (%04x)", op); return 2;}
1252int arcompact_handle18_06_0a_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0a> (%04x)", op); return 2;}
1253int arcompact_handle18_06_0b_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0b> (%04x)", op); return 2;}
1254int arcompact_handle18_06_0c_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0c> (%04x)", op); return 2;}
1255int arcompact_handle18_06_0d_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0d> (%04x)", op); return 2;}
1256int arcompact_handle18_06_0e_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0e> (%04x)", op); return 2;}
1257int arcompact_handle18_06_0f_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_0f> (%04x)", op); return 2;}
1258int arcompact_handle18_06_10_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_10> (%04x)", op); return 2;}
1259int arcompact_handle18_06_12_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_12> (%04x)",  op); return 2;}
1260int arcompact_handle18_06_13_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_13> (%04x)",  op); return 2;}
1261int arcompact_handle18_06_14_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_14> (%04x)",  op); return 2;}
1262int arcompact_handle18_06_15_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_15> (%04x)",  op); return 2;}
1263int arcompact_handle18_06_16_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_16> (%04x)",  op); return 2;}
1264int arcompact_handle18_06_17_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_17> (%04x)",  op); return 2;}
1265int arcompact_handle18_06_18_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_18> (%04x)",  op); return 2;}
1266int arcompact_handle18_06_19_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_19> (%04x)",  op); return 2;}
1267int arcompact_handle18_06_1a_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1a> (%04x)",  op); return 2;}
1268int arcompact_handle18_06_1b_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1b> (%04x)",  op); return 2;}
1269int arcompact_handle18_06_1c_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1c> (%04x)",  op); return 2;}
1270int arcompact_handle18_06_1d_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1d> (%04x)",  op); return 2;}
1271int arcompact_handle18_06_1e_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1e> (%04x)",  op); return 2;}
1272int arcompact_handle18_06_1f_dasm(DASM_OPS_16)  { print("<illegal 0x18_06_1f> (%04x)",  op); return 2;}
1273int arcompact_handle18_07_00_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_00> (%04x)",  op); return 2;}
1274int arcompact_handle18_07_02_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_02> (%04x)", op); return 2;}
1275int arcompact_handle18_07_03_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_03> (%04x)", op); return 2;}
1276int arcompact_handle18_07_04_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_04> (%04x)", op); return 2;}
1277int arcompact_handle18_07_05_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_05> (%04x)", op); return 2;}
1278int arcompact_handle18_07_06_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_06> (%04x)", op); return 2;}
1279int arcompact_handle18_07_07_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_07> (%04x)", op); return 2;}
1280int arcompact_handle18_07_08_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_08> (%04x)", op); return 2;}
1281int arcompact_handle18_07_09_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_09> (%04x)", op); return 2;}
1282int arcompact_handle18_07_0a_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0a> (%04x)", op); return 2;}
1283int arcompact_handle18_07_0b_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0b> (%04x)", op); return 2;}
1284int arcompact_handle18_07_0c_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0c> (%04x)", op); return 2;}
1285int arcompact_handle18_07_0d_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0d> (%04x)", op); return 2;}
1286int arcompact_handle18_07_0e_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0e> (%04x)", op); return 2;}
1287int arcompact_handle18_07_0f_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_0f> (%04x)", op); return 2;}
1288int arcompact_handle18_07_10_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_10> (%04x)", op); return 2;}
1289int arcompact_handle18_07_12_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_12> (%04x)",  op); return 2;}
1290int arcompact_handle18_07_13_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_13> (%04x)",  op); return 2;}
1291int arcompact_handle18_07_14_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_14> (%04x)",  op); return 2;}
1292int arcompact_handle18_07_15_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_15> (%04x)",  op); return 2;}
1293int arcompact_handle18_07_16_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_16> (%04x)",  op); return 2;}
1294int arcompact_handle18_07_17_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_17> (%04x)",  op); return 2;}
1295int arcompact_handle18_07_18_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_18> (%04x)",  op); return 2;}
1296int arcompact_handle18_07_19_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_19> (%04x)",  op); return 2;}
1297int arcompact_handle18_07_1a_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1a> (%04x)",  op); return 2;}
1298int arcompact_handle18_07_1b_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1b> (%04x)",  op); return 2;}
1299int arcompact_handle18_07_1c_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1c> (%04x)",  op); return 2;}
1300int arcompact_handle18_07_1d_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1d> (%04x)",  op); return 2;}
1301int arcompact_handle18_07_1e_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1e> (%04x)",  op); return 2;}
1302int arcompact_handle18_07_1f_dasm(DASM_OPS_16)  { print("<illegal 0x18_07_1f> (%04x)",  op); return 2;}
1303
trunk/src/emu/cpu/arcompact/arcompactdasm_ops.h
r242341r242342
1
2/************************************************************************************************************************************
3*                                                                                                                                   *
4* individual opcode handlers (disassembly)                                                                                          *
5*                                                                                                                                   *
6************************************************************************************************************************************/
7
8#define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom
9#define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom
10#define DASM_PARAMS output, pc, op, oprom
11
12#define LIMM_REG 62
13
14#define GET_LIMM_32 \
15   limm = oprom[6] | (oprom[7] << 8); \
16   limm |= (oprom[4] << 16) | (oprom[5] << 24); \
17
18
19int arcompact_handle00_00_dasm(DASM_OPS_32);
20int arcompact_handle00_01_dasm(DASM_OPS_32);
21int arcompact_handle01_00_00dasm(DASM_OPS_32);
22int arcompact_handle01_00_01dasm(DASM_OPS_32);
23int arcompact_handle01_01_00_00_dasm(DASM_OPS_32);
24int arcompact_handle01_01_00_01_dasm(DASM_OPS_32);
25int arcompact_handle01_01_00_02_dasm(DASM_OPS_32);
26int arcompact_handle01_01_00_03_dasm(DASM_OPS_32);
27int arcompact_handle01_01_00_04_dasm(DASM_OPS_32);
28int arcompact_handle01_01_00_05_dasm(DASM_OPS_32);
29int arcompact_handle01_01_00_0e_dasm(DASM_OPS_32);
30int arcompact_handle01_01_00_0f_dasm(DASM_OPS_32);
31int arcompact_handle01_01_01_00_dasm(DASM_OPS_32);
32int arcompact_handle01_01_01_01_dasm(DASM_OPS_32);
33int arcompact_handle01_01_01_02_dasm(DASM_OPS_32);
34int arcompact_handle01_01_01_03_dasm(DASM_OPS_32);
35int arcompact_handle01_01_01_04_dasm(DASM_OPS_32);
36int arcompact_handle01_01_01_05_dasm(DASM_OPS_32);
37int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32);
38int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32);
39int arcompact_handle02_dasm(DASM_OPS_32);
40int arcompact_handle03_dasm(DASM_OPS_32);
41int arcompact_handle04_00_dasm(DASM_OPS_32);
42int arcompact_handle04_01_dasm(DASM_OPS_32);
43int arcompact_handle04_02_dasm(DASM_OPS_32);
44int arcompact_handle04_03_dasm(DASM_OPS_32);
45int arcompact_handle04_04_dasm(DASM_OPS_32);
46int arcompact_handle04_05_dasm(DASM_OPS_32);
47int arcompact_handle04_06_dasm(DASM_OPS_32);
48int arcompact_handle04_07_dasm(DASM_OPS_32);
49int arcompact_handle04_08_dasm(DASM_OPS_32);
50int arcompact_handle04_09_dasm(DASM_OPS_32);
51int arcompact_handle04_0a_dasm(DASM_OPS_32);
52int arcompact_handle04_0b_dasm(DASM_OPS_32);
53int arcompact_handle04_0c_dasm(DASM_OPS_32);
54int arcompact_handle04_0d_dasm(DASM_OPS_32);
55int arcompact_handle04_0e_dasm(DASM_OPS_32);
56int arcompact_handle04_0f_dasm(DASM_OPS_32);
57int arcompact_handle04_10_dasm(DASM_OPS_32);
58int arcompact_handle04_11_dasm(DASM_OPS_32);
59int arcompact_handle04_12_dasm(DASM_OPS_32);
60int arcompact_handle04_13_dasm(DASM_OPS_32);
61int arcompact_handle04_14_dasm(DASM_OPS_32);
62int arcompact_handle04_15_dasm(DASM_OPS_32);
63int arcompact_handle04_16_dasm(DASM_OPS_32);
64int arcompact_handle04_17_dasm(DASM_OPS_32);
65int arcompact_handle04_18_dasm(DASM_OPS_32);
66int arcompact_handle04_19_dasm(DASM_OPS_32);
67int arcompact_handle04_1a_dasm(DASM_OPS_32);
68int arcompact_handle04_1b_dasm(DASM_OPS_32);
69int arcompact_handle04_1c_dasm(DASM_OPS_32);
70int arcompact_handle04_1d_dasm(DASM_OPS_32);
71int arcompact_handle04_20_dasm(DASM_OPS_32);
72int arcompact_handle04_21_dasm(DASM_OPS_32);
73int arcompact_handle04_22_dasm(DASM_OPS_32);
74int arcompact_handle04_23_dasm(DASM_OPS_32);
75int arcompact_handle04_28_dasm(DASM_OPS_32);
76int arcompact_handle04_29_dasm(DASM_OPS_32);
77int arcompact_handle04_2a_dasm(DASM_OPS_32);
78int arcompact_handle04_2b_dasm(DASM_OPS_32);
79int arcompact_handle04_2f_00_dasm(DASM_OPS_32);
80int arcompact_handle04_2f_01_dasm(DASM_OPS_32);
81int arcompact_handle04_2f_02_dasm(DASM_OPS_32);
82int arcompact_handle04_2f_03_dasm(DASM_OPS_32);
83int arcompact_handle04_2f_04_dasm(DASM_OPS_32);
84int arcompact_handle04_2f_05_dasm(DASM_OPS_32);
85int arcompact_handle04_2f_06_dasm(DASM_OPS_32);
86int arcompact_handle04_2f_07_dasm(DASM_OPS_32);
87int arcompact_handle04_2f_08_dasm(DASM_OPS_32);
88int arcompact_handle04_2f_09_dasm(DASM_OPS_32);
89int arcompact_handle04_2f_0a_dasm(DASM_OPS_32);
90int arcompact_handle04_2f_0b_dasm(DASM_OPS_32);
91int arcompact_handle04_2f_0c_dasm(DASM_OPS_32);
92int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32);
93int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32);
94int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32);
95int arcompact_handle04_2f_3f_04_dasm(DASM_OPS_32);
96int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32);
97int arcompact_handle04_30_dasm(DASM_OPS_32);
98int arcompact_handle04_31_dasm(DASM_OPS_32);
99int arcompact_handle04_32_dasm(DASM_OPS_32);
100int arcompact_handle04_33_dasm(DASM_OPS_32);
101int arcompact_handle04_34_dasm(DASM_OPS_32);
102int arcompact_handle04_35_dasm(DASM_OPS_32);
103int arcompact_handle04_36_dasm(DASM_OPS_32);
104int arcompact_handle04_37_dasm(DASM_OPS_32);
105int arcompact_handle05_00_dasm(DASM_OPS_32);
106int arcompact_handle05_01_dasm(DASM_OPS_32);
107int arcompact_handle05_02_dasm(DASM_OPS_32);
108int arcompact_handle05_03_dasm(DASM_OPS_32);
109int arcompact_handle05_04_dasm(DASM_OPS_32);
110int arcompact_handle05_05_dasm(DASM_OPS_32);
111int arcompact_handle05_06_dasm(DASM_OPS_32);
112int arcompact_handle05_07_dasm(DASM_OPS_32);
113int arcompact_handle05_08_dasm(DASM_OPS_32);
114int arcompact_handle05_0a_dasm(DASM_OPS_32);
115int arcompact_handle05_0b_dasm(DASM_OPS_32);
116int arcompact_handle05_28_dasm(DASM_OPS_32);
117int arcompact_handle05_29_dasm(DASM_OPS_32);
118int arcompact_handle05_2f_dasm(DASM_OPS_32);
119int arcompact_handle06_dasm(DASM_OPS_32);
120int arcompact_handle07_dasm(DASM_OPS_32);
121int arcompact_handle08_dasm(DASM_OPS_32);
122int arcompact_handle09_dasm(DASM_OPS_32);
123int arcompact_handle0a_dasm(DASM_OPS_32);
124int arcompact_handle0b_dasm(DASM_OPS_32);
125
126int arcompact_handle0c_00_dasm(DASM_OPS_16);
127int arcompact_handle0c_01_dasm(DASM_OPS_16);
128int arcompact_handle0c_02_dasm(DASM_OPS_16);
129int arcompact_handle0c_03_dasm(DASM_OPS_16);
130int arcompact_handle0d_00_dasm(DASM_OPS_16);
131int arcompact_handle0d_01_dasm(DASM_OPS_16);
132int arcompact_handle0d_02_dasm(DASM_OPS_16);
133int arcompact_handle0d_03_dasm(DASM_OPS_16);
134int arcompact_handle0e_00_dasm(DASM_OPS_16);
135int arcompact_handle0e_01_dasm(DASM_OPS_16);
136int arcompact_handle0e_02_dasm(DASM_OPS_16);
137int arcompact_handle0e_03_dasm(DASM_OPS_16);
138int arcompact_handle0f_00_00_dasm(DASM_OPS_16);
139int arcompact_handle0f_00_01_dasm(DASM_OPS_16);
140int arcompact_handle0f_00_02_dasm(DASM_OPS_16);
141int arcompact_handle0f_00_03_dasm(DASM_OPS_16);
142int arcompact_handle0f_00_06_dasm(DASM_OPS_16);
143int arcompact_handle0f_00_07_00_dasm(DASM_OPS_16);
144int arcompact_handle0f_00_07_01_dasm(DASM_OPS_16);
145int arcompact_handle0f_00_07_04_dasm(DASM_OPS_16);
146int arcompact_handle0f_00_07_05_dasm(DASM_OPS_16);
147int arcompact_handle0f_00_07_06_dasm(DASM_OPS_16);
148int arcompact_handle0f_00_07_07_dasm(DASM_OPS_16);
149int arcompact_handle0f_02_dasm(DASM_OPS_16);
150int arcompact_handle0f_04_dasm(DASM_OPS_16);
151int arcompact_handle0f_05_dasm(DASM_OPS_16);
152int arcompact_handle0f_06_dasm(DASM_OPS_16);
153int arcompact_handle0f_07_dasm(DASM_OPS_16);
154int arcompact_handle0f_0b_dasm(DASM_OPS_16);
155int arcompact_handle0f_0c_dasm(DASM_OPS_16);
156int arcompact_handle0f_0d_dasm(DASM_OPS_16);
157int arcompact_handle0f_0e_dasm(DASM_OPS_16);
158int arcompact_handle0f_0f_dasm(DASM_OPS_16);
159int arcompact_handle0f_10_dasm(DASM_OPS_16);
160int arcompact_handle0f_11_dasm(DASM_OPS_16);
161int arcompact_handle0f_12_dasm(DASM_OPS_16);
162int arcompact_handle0f_13_dasm(DASM_OPS_16);
163int arcompact_handle0f_14_dasm(DASM_OPS_16);
164int arcompact_handle0f_15_dasm(DASM_OPS_16);
165int arcompact_handle0f_16_dasm(DASM_OPS_16);
166int arcompact_handle0f_18_dasm(DASM_OPS_16);
167int arcompact_handle0f_19_dasm(DASM_OPS_16);
168int arcompact_handle0f_1a_dasm(DASM_OPS_16);
169int arcompact_handle0f_1b_dasm(DASM_OPS_16);
170int arcompact_handle0f_1c_dasm(DASM_OPS_16);
171int arcompact_handle0f_1d_dasm(DASM_OPS_16);
172int arcompact_handle0f_1e_dasm(DASM_OPS_16);
173int arcompact_handle0f_1f_dasm(DASM_OPS_16);
174int arcompact_handle10_dasm(DASM_OPS_16);
175int arcompact_handle11_dasm(DASM_OPS_16);
176int arcompact_handle12_dasm(DASM_OPS_16);
177int arcompact_handle13_dasm(DASM_OPS_16);
178int arcompact_handle14_dasm(DASM_OPS_16);
179int arcompact_handle15_dasm(DASM_OPS_16);
180int arcompact_handle16_dasm(DASM_OPS_16);
181int arcompact_handle17_00_dasm(DASM_OPS_16);
182int arcompact_handle17_01_dasm(DASM_OPS_16);
183int arcompact_handle17_02_dasm(DASM_OPS_16);
184int arcompact_handle17_03_dasm(DASM_OPS_16);
185int arcompact_handle17_04_dasm(DASM_OPS_16);
186int arcompact_handle17_05_dasm(DASM_OPS_16);
187int arcompact_handle17_06_dasm(DASM_OPS_16);
188int arcompact_handle17_07_dasm(DASM_OPS_16);
189int arcompact_handle18_00_dasm(DASM_OPS_16);
190int arcompact_handle18_01_dasm(DASM_OPS_16);
191int arcompact_handle18_02_dasm(DASM_OPS_16);
192int arcompact_handle18_03_dasm(DASM_OPS_16);
193int arcompact_handle18_04_dasm(DASM_OPS_16);
194int arcompact_handle18_05_00_dasm(DASM_OPS_16);
195int arcompact_handle18_05_01_dasm(DASM_OPS_16);
196int arcompact_handle18_06_01_dasm(DASM_OPS_16);
197int arcompact_handle18_06_11_dasm(DASM_OPS_16);
198int arcompact_handle18_07_01_dasm(DASM_OPS_16);
199int arcompact_handle18_07_11_dasm(DASM_OPS_16);
200int arcompact_handle19_00_dasm(DASM_OPS_16);
201int arcompact_handle19_01_dasm(DASM_OPS_16);
202int arcompact_handle19_02_dasm(DASM_OPS_16);
203int arcompact_handle19_03_dasm(DASM_OPS_16);
204int arcompact_handle1a_dasm(DASM_OPS_16);
205int arcompact_handle1b_dasm(DASM_OPS_16);
206int arcompact_handle1c_00_dasm(DASM_OPS_16);
207int arcompact_handle1c_01_dasm(DASM_OPS_16);
208int arcompact_handle1d_00_dasm(DASM_OPS_16);
209int arcompact_handle1d_01_dasm(DASM_OPS_16);
210int arcompact_handle1e_00_dasm(DASM_OPS_16);
211int arcompact_handle1e_01_dasm(DASM_OPS_16);
212int arcompact_handle1e_02_dasm(DASM_OPS_16);
213int arcompact_handle1e_03_00_dasm(DASM_OPS_16);
214int arcompact_handle1e_03_01_dasm(DASM_OPS_16);
215int arcompact_handle1e_03_02_dasm(DASM_OPS_16);
216int arcompact_handle1e_03_03_dasm(DASM_OPS_16);
217int arcompact_handle1e_03_04_dasm(DASM_OPS_16);
218int arcompact_handle1e_03_05_dasm(DASM_OPS_16);
219int arcompact_handle1e_03_06_dasm(DASM_OPS_16);
220int arcompact_handle1e_03_07_dasm(DASM_OPS_16);
221int arcompact_handle1f_dasm(DASM_OPS_16);
222
223/************************************************************************************************************************************
224*                                                                                                                                   *
225* illegal opcode handlers (disassembly)                                                                                             *
226*                                                                                                                                   *
227************************************************************************************************************************************/
228
229int arcompact_handle01_01_00_06_dasm(DASM_OPS_32); //("<illegal 01_01_00_06> (%08x)", op); return 4; }
230int arcompact_handle01_01_00_07_dasm(DASM_OPS_32); //("<illegal 01_01_00_07> (%08x)", op); return 4; }
231int arcompact_handle01_01_00_08_dasm(DASM_OPS_32); //("<illegal 01_01_00_08> (%08x)", op); return 4; }
232int arcompact_handle01_01_00_09_dasm(DASM_OPS_32); //("<illegal 01_01_00_09> (%08x)", op); return 4; }
233int arcompact_handle01_01_00_0a_dasm(DASM_OPS_32); //("<illegal 01_01_00_0a> (%08x)", op); return 4; }
234int arcompact_handle01_01_00_0b_dasm(DASM_OPS_32); //("<illegal 01_01_00_0b> (%08x)", op); return 4; }
235int arcompact_handle01_01_00_0c_dasm(DASM_OPS_32); //("<illegal 01_01_00_0c> (%08x)", op); return 4; }
236int arcompact_handle01_01_00_0d_dasm(DASM_OPS_32); //("<illegal 01_01_00_0d> (%08x)", op); return 4; }
237
238int arcompact_handle01_01_01_06_dasm(DASM_OPS_32); //("<illegal 01_01_01_06> (%08x)", op); return 4; }
239int arcompact_handle01_01_01_07_dasm(DASM_OPS_32); //("<illegal 01_01_01_07> (%08x)", op); return 4; }
240int arcompact_handle01_01_01_08_dasm(DASM_OPS_32); //("<illegal 01_01_01_08> (%08x)", op); return 4; }
241int arcompact_handle01_01_01_09_dasm(DASM_OPS_32); //("<illegal 01_01_01_09> (%08x)", op); return 4; }
242int arcompact_handle01_01_01_0a_dasm(DASM_OPS_32); //("<illegal 01_01_01_0a> (%08x)", op); return 4; }
243int arcompact_handle01_01_01_0b_dasm(DASM_OPS_32); //("<illegal 01_01_01_0b> (%08x)", op); return 4; }
244int arcompact_handle01_01_01_0c_dasm(DASM_OPS_32); //("<illegal 01_01_01_0c> (%08x)", op); return 4; }
245int arcompact_handle01_01_01_0d_dasm(DASM_OPS_32); //("<illegal 01_01_01_0d> (%08x)", op); return 4; }
246
247
248int arcompact_handle04_1e_dasm(DASM_OPS_32); //("<illegal 0x04_1e> (%08x)", op); return 4;}
249int arcompact_handle04_1f_dasm(DASM_OPS_32); //("<illegal 0x04_1f> (%08x)", op); return 4;}
250
251int arcompact_handle04_24_dasm(DASM_OPS_32); //("<illegal 0x04_24> (%08x)", op); return 4;}
252int arcompact_handle04_25_dasm(DASM_OPS_32); //("<illegal 0x04_25> (%08x)", op); return 4;}
253int arcompact_handle04_26_dasm(DASM_OPS_32); //("<illegal 0x04_26> (%08x)", op); return 4;}
254int arcompact_handle04_27_dasm(DASM_OPS_32); //("<illegal 0x04_27> (%08x)", op); return 4;}
255
256int arcompact_handle04_2c_dasm(DASM_OPS_32); //("<illegal 0x04_2c> (%08x)", op); return 4;}
257int arcompact_handle04_2d_dasm(DASM_OPS_32); //("<illegal 0x04_2d> (%08x)", op); return 4;}
258int arcompact_handle04_2e_dasm(DASM_OPS_32); //("<illegal 0x04_2e> (%08x)", op); return 4;}
259
260int arcompact_handle04_2f_0d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_0d> (%08x)", op); return 4;}
261int arcompact_handle04_2f_0e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_0e> (%08x)", op); return 4;}
262int arcompact_handle04_2f_0f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_0f> (%08x)", op); return 4;}
263int arcompact_handle04_2f_10_dasm(DASM_OPS_32); //("<illegal 0x04_2f_10> (%08x)", op); return 4;}
264int arcompact_handle04_2f_11_dasm(DASM_OPS_32); //("<illegal 0x04_2f_11> (%08x)", op); return 4;}
265int arcompact_handle04_2f_12_dasm(DASM_OPS_32); //("<illegal 0x04_2f_12> (%08x)", op); return 4;}
266int arcompact_handle04_2f_13_dasm(DASM_OPS_32); //("<illegal 0x04_2f_13> (%08x)", op); return 4;}
267int arcompact_handle04_2f_14_dasm(DASM_OPS_32); //("<illegal 0x04_2f_14> (%08x)", op); return 4;}
268int arcompact_handle04_2f_15_dasm(DASM_OPS_32); //("<illegal 0x04_2f_15> (%08x)", op); return 4;}
269int arcompact_handle04_2f_16_dasm(DASM_OPS_32); //("<illegal 0x04_2f_16> (%08x)", op); return 4;}
270int arcompact_handle04_2f_17_dasm(DASM_OPS_32); //("<illegal 0x04_2f_17> (%08x)", op); return 4;}
271int arcompact_handle04_2f_18_dasm(DASM_OPS_32); //("<illegal 0x04_2f_18> (%08x)", op); return 4;}
272int arcompact_handle04_2f_19_dasm(DASM_OPS_32); //("<illegal 0x04_2f_19> (%08x)", op); return 4;}
273int arcompact_handle04_2f_1a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1a> (%08x)", op); return 4;}
274int arcompact_handle04_2f_1b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1b> (%08x)", op); return 4;}
275int arcompact_handle04_2f_1c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1c> (%08x)", op); return 4;}
276int arcompact_handle04_2f_1d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1d> (%08x)", op); return 4;}
277int arcompact_handle04_2f_1e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1e> (%08x)", op); return 4;}
278int arcompact_handle04_2f_1f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_1f> (%08x)", op); return 4;}
279int arcompact_handle04_2f_20_dasm(DASM_OPS_32); //("<illegal 0x04_2f_20> (%08x)", op); return 4;}
280int arcompact_handle04_2f_21_dasm(DASM_OPS_32); //("<illegal 0x04_2f_21> (%08x)", op); return 4;}
281int arcompact_handle04_2f_22_dasm(DASM_OPS_32); //("<illegal 0x04_2f_22> (%08x)", op); return 4;}
282int arcompact_handle04_2f_23_dasm(DASM_OPS_32); //("<illegal 0x04_2f_23> (%08x)", op); return 4;}
283int arcompact_handle04_2f_24_dasm(DASM_OPS_32); //("<illegal 0x04_2f_24> (%08x)", op); return 4;}
284int arcompact_handle04_2f_25_dasm(DASM_OPS_32); //("<illegal 0x04_2f_25> (%08x)", op); return 4;}
285int arcompact_handle04_2f_26_dasm(DASM_OPS_32); //("<illegal 0x04_2f_26> (%08x)", op); return 4;}
286int arcompact_handle04_2f_27_dasm(DASM_OPS_32); //("<illegal 0x04_2f_27> (%08x)", op); return 4;}
287int arcompact_handle04_2f_28_dasm(DASM_OPS_32); //("<illegal 0x04_2f_28> (%08x)", op); return 4;}
288int arcompact_handle04_2f_29_dasm(DASM_OPS_32); //("<illegal 0x04_2f_29> (%08x)", op); return 4;}
289int arcompact_handle04_2f_2a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2a> (%08x)", op); return 4;}
290int arcompact_handle04_2f_2b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2b> (%08x)", op); return 4;}
291int arcompact_handle04_2f_2c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2c> (%08x)", op); return 4;}
292int arcompact_handle04_2f_2d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2d> (%08x)", op); return 4;}
293int arcompact_handle04_2f_2e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2e> (%08x)", op); return 4;}
294int arcompact_handle04_2f_2f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_2f> (%08x)", op); return 4;}
295int arcompact_handle04_2f_30_dasm(DASM_OPS_32); //("<illegal 0x04_2f_30> (%08x)", op); return 4;}
296int arcompact_handle04_2f_31_dasm(DASM_OPS_32); //("<illegal 0x04_2f_31> (%08x)", op); return 4;}
297int arcompact_handle04_2f_32_dasm(DASM_OPS_32); //("<illegal 0x04_2f_32> (%08x)", op); return 4;}
298int arcompact_handle04_2f_33_dasm(DASM_OPS_32); //("<illegal 0x04_2f_33> (%08x)", op); return 4;}
299int arcompact_handle04_2f_34_dasm(DASM_OPS_32); //("<illegal 0x04_2f_34> (%08x)", op); return 4;}
300int arcompact_handle04_2f_35_dasm(DASM_OPS_32); //("<illegal 0x04_2f_35> (%08x)", op); return 4;}
301int arcompact_handle04_2f_36_dasm(DASM_OPS_32); //("<illegal 0x04_2f_36> (%08x)", op); return 4;}
302int arcompact_handle04_2f_37_dasm(DASM_OPS_32); //("<illegal 0x04_2f_37> (%08x)", op); return 4;}
303int arcompact_handle04_2f_38_dasm(DASM_OPS_32); //("<illegal 0x04_2f_38> (%08x)", op); return 4;}
304int arcompact_handle04_2f_39_dasm(DASM_OPS_32); //("<illegal 0x04_2f_39> (%08x)", op); return 4;}
305int arcompact_handle04_2f_3a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3a> (%08x)", op); return 4;}
306int arcompact_handle04_2f_3b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3b> (%08x)", op); return 4;}
307int arcompact_handle04_2f_3c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3c> (%08x)", op); return 4;}
308int arcompact_handle04_2f_3d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3d> (%08x)", op); return 4;}
309int arcompact_handle04_2f_3e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3e> (%08x)", op); return 4;}
310
311int arcompact_handle04_2f_3f_00_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_00> (%08x)", op); return 4;}
312int arcompact_handle04_2f_3f_06_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_06> (%08x)", op); return 4;}
313int arcompact_handle04_2f_3f_07_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_07> (%08x)", op); return 4;}
314int arcompact_handle04_2f_3f_08_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_08> (%08x)", op); return 4;}
315int arcompact_handle04_2f_3f_09_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_09> (%08x)", op); return 4;}
316int arcompact_handle04_2f_3f_0a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0a> (%08x)", op); return 4;}
317int arcompact_handle04_2f_3f_0b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0b> (%08x)", op); return 4;}
318int arcompact_handle04_2f_3f_0c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0c> (%08x)", op); return 4;}
319int arcompact_handle04_2f_3f_0d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0d> (%08x)", op); return 4;}
320int arcompact_handle04_2f_3f_0e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0e> (%08x)", op); return 4;}
321int arcompact_handle04_2f_3f_0f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_0f> (%08x)", op); return 4;}
322int arcompact_handle04_2f_3f_10_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_10> (%08x)", op); return 4;}
323int arcompact_handle04_2f_3f_11_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_11> (%08x)", op); return 4;}
324int arcompact_handle04_2f_3f_12_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_12> (%08x)", op); return 4;}
325int arcompact_handle04_2f_3f_13_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_13> (%08x)", op); return 4;}
326int arcompact_handle04_2f_3f_14_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_14> (%08x)", op); return 4;}
327int arcompact_handle04_2f_3f_15_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_15> (%08x)", op); return 4;}
328int arcompact_handle04_2f_3f_16_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_16> (%08x)", op); return 4;}
329int arcompact_handle04_2f_3f_17_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_17> (%08x)", op); return 4;}
330int arcompact_handle04_2f_3f_18_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_18> (%08x)", op); return 4;}
331int arcompact_handle04_2f_3f_19_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_19> (%08x)", op); return 4;}
332int arcompact_handle04_2f_3f_1a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1a> (%08x)", op); return 4;}
333int arcompact_handle04_2f_3f_1b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1b> (%08x)", op); return 4;}
334int arcompact_handle04_2f_3f_1c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1c> (%08x)", op); return 4;}
335int arcompact_handle04_2f_3f_1d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1d> (%08x)", op); return 4;}
336int arcompact_handle04_2f_3f_1e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1e> (%08x)", op); return 4;}
337int arcompact_handle04_2f_3f_1f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_1f> (%08x)", op); return 4;}
338int arcompact_handle04_2f_3f_20_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_20> (%08x)", op); return 4;}
339int arcompact_handle04_2f_3f_21_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_21> (%08x)", op); return 4;}
340int arcompact_handle04_2f_3f_22_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_22> (%08x)", op); return 4;}
341int arcompact_handle04_2f_3f_23_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_23> (%08x)", op); return 4;}
342int arcompact_handle04_2f_3f_24_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_24> (%08x)", op); return 4;}
343int arcompact_handle04_2f_3f_25_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_25> (%08x)", op); return 4;}
344int arcompact_handle04_2f_3f_26_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_26> (%08x)", op); return 4;}
345int arcompact_handle04_2f_3f_27_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_27> (%08x)", op); return 4;}
346int arcompact_handle04_2f_3f_28_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_28> (%08x)", op); return 4;}
347int arcompact_handle04_2f_3f_29_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_29> (%08x)", op); return 4;}
348int arcompact_handle04_2f_3f_2a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2a> (%08x)", op); return 4;}
349int arcompact_handle04_2f_3f_2b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2b> (%08x)", op); return 4;}
350int arcompact_handle04_2f_3f_2c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2c> (%08x)", op); return 4;}
351int arcompact_handle04_2f_3f_2d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2d> (%08x)", op); return 4;}
352int arcompact_handle04_2f_3f_2e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2e> (%08x)", op); return 4;}
353int arcompact_handle04_2f_3f_2f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_2f> (%08x)", op); return 4;}
354int arcompact_handle04_2f_3f_30_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_30> (%08x)", op); return 4;}
355int arcompact_handle04_2f_3f_31_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_31> (%08x)", op); return 4;}
356int arcompact_handle04_2f_3f_32_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_32> (%08x)", op); return 4;}
357int arcompact_handle04_2f_3f_33_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_33> (%08x)", op); return 4;}
358int arcompact_handle04_2f_3f_34_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_34> (%08x)", op); return 4;}
359int arcompact_handle04_2f_3f_35_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_35> (%08x)", op); return 4;}
360int arcompact_handle04_2f_3f_36_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_36> (%08x)", op); return 4;}
361int arcompact_handle04_2f_3f_37_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_37> (%08x)", op); return 4;}
362int arcompact_handle04_2f_3f_38_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_38> (%08x)", op); return 4;}
363int arcompact_handle04_2f_3f_39_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_39> (%08x)", op); return 4;}
364int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3a> (%08x)", op); return 4;}
365int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3b> (%08x)", op); return 4;}
366int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3c> (%08x)", op); return 4;}
367int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3d> (%08x)", op); return 4;}
368int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3e> (%08x)", op); return 4;}
369int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32); //("<illegal 0x04_2f_3f_3f> (%08x)", op); return 4;}
370
371int arcompact_handle04_38_dasm(DASM_OPS_32); //("<illegal 0x04_38> (%08x)", op); return 4;}
372int arcompact_handle04_39_dasm(DASM_OPS_32); //("<illegal 0x04_39> (%08x)", op); return 4;}
373int arcompact_handle04_3a_dasm(DASM_OPS_32); //("<illegal 0x04_3a> (%08x)", op); return 4;}
374int arcompact_handle04_3b_dasm(DASM_OPS_32); //("<illegal 0x04_3b> (%08x)", op); return 4;}
375int arcompact_handle04_3c_dasm(DASM_OPS_32); //("<illegal 0x04_3c> (%08x)", op); return 4;}
376int arcompact_handle04_3d_dasm(DASM_OPS_32); //("<illegal 0x04_3d> (%08x)", op); return 4;}
377int arcompact_handle04_3e_dasm(DASM_OPS_32); //("<illegal 0x04_3e> (%08x)", op); return 4;}
378int arcompact_handle04_3f_dasm(DASM_OPS_32); //("<illegal 0x04_3f> (%08x)", op); return 4;}
379
380int arcompact_handle05_09_dasm(DASM_OPS_32); //("<illegal 0x05_09> (%08x)", op); return 4;}
381int arcompact_handle05_0c_dasm(DASM_OPS_32); //("<illegal 0x05_0c> (%08x)", op); return 4;}
382int arcompact_handle05_0d_dasm(DASM_OPS_32); //("<illegal 0x05_0d> (%08x)", op); return 4;}
383int arcompact_handle05_0e_dasm(DASM_OPS_32); //("<illegal 0x05_0e> (%08x)", op); return 4;}
384int arcompact_handle05_0f_dasm(DASM_OPS_32); //("<illegal 0x05_0f> (%08x)", op); return 4;}
385int arcompact_handle05_10_dasm(DASM_OPS_32); //("<illegal 0x05_10> (%08x)", op); return 4;}
386int arcompact_handle05_11_dasm(DASM_OPS_32); //("<illegal 0x05_11> (%08x)", op); return 4;}
387int arcompact_handle05_12_dasm(DASM_OPS_32); //("<illegal 0x05_12> (%08x)", op); return 4;}
388int arcompact_handle05_13_dasm(DASM_OPS_32); //("<illegal 0x05_13> (%08x)", op); return 4;}
389int arcompact_handle05_14_dasm(DASM_OPS_32); //("<illegal 0x05_14> (%08x)", op); return 4;}
390int arcompact_handle05_15_dasm(DASM_OPS_32); //("<illegal 0x05_15> (%08x)", op); return 4;}
391int arcompact_handle05_16_dasm(DASM_OPS_32); //("<illegal 0x05_16> (%08x)", op); return 4;}
392int arcompact_handle05_17_dasm(DASM_OPS_32); //("<illegal 0x05_17> (%08x)", op); return 4;}
393int arcompact_handle05_18_dasm(DASM_OPS_32); //("<illegal 0x05_18> (%08x)", op); return 4;}
394int arcompact_handle05_19_dasm(DASM_OPS_32); //("<illegal 0x05_19> (%08x)", op); return 4;}
395int arcompact_handle05_1a_dasm(DASM_OPS_32); //("<illegal 0x05_1a> (%08x)", op); return 4;}
396int arcompact_handle05_1b_dasm(DASM_OPS_32); //("<illegal 0x05_1b> (%08x)", op); return 4;}
397int arcompact_handle05_1c_dasm(DASM_OPS_32); //("<illegal 0x05_1c> (%08x)", op); return 4;}
398int arcompact_handle05_1d_dasm(DASM_OPS_32); //("<illegal 0x05_1d> (%08x)", op); return 4;}
399int arcompact_handle05_1e_dasm(DASM_OPS_32); //("<illegal 0x05_1e> (%08x)", op); return 4;}
400int arcompact_handle05_1f_dasm(DASM_OPS_32); //("<illegal 0x05_1f> (%08x)", op); return 4;}
401int arcompact_handle05_20_dasm(DASM_OPS_32); //("<illegal 0x05_20> (%08x)", op); return 4;}
402int arcompact_handle05_21_dasm(DASM_OPS_32); //("<illegal 0x05_21> (%08x)", op); return 4;}
403int arcompact_handle05_22_dasm(DASM_OPS_32); //("<illegal 0x05_22> (%08x)", op); return 4;}
404int arcompact_handle05_23_dasm(DASM_OPS_32); //("<illegal 0x05_23> (%08x)", op); return 4;}
405int arcompact_handle05_24_dasm(DASM_OPS_32); //("<illegal 0x05_24> (%08x)", op); return 4;}
406int arcompact_handle05_25_dasm(DASM_OPS_32); //("<illegal 0x05_25> (%08x)", op); return 4;}
407int arcompact_handle05_26_dasm(DASM_OPS_32); //("<illegal 0x05_26> (%08x)", op); return 4;}
408int arcompact_handle05_27_dasm(DASM_OPS_32); //("<illegal 0x05_27> (%08x)", op); return 4;}
409
410int arcompact_handle05_2a_dasm(DASM_OPS_32); //("<illegal 0x05_2a> (%08x)", op); return 4;}
411int arcompact_handle05_2b_dasm(DASM_OPS_32); //("<illegal 0x05_2b> (%08x)", op); return 4;}
412int arcompact_handle05_2c_dasm(DASM_OPS_32); //("<illegal 0x05_2c> (%08x)", op); return 4;}
413int arcompact_handle05_2d_dasm(DASM_OPS_32); //("<illegal 0x05_2d> (%08x)", op); return 4;}
414int arcompact_handle05_2e_dasm(DASM_OPS_32); //("<illegal 0x05_2e> (%08x)", op); return 4;}
415
416int arcompact_handle05_30_dasm(DASM_OPS_32); //("<illegal 0x05_30> (%08x)", op); return 4;}
417int arcompact_handle05_31_dasm(DASM_OPS_32); //("<illegal 0x05_31> (%08x)", op); return 4;}
418int arcompact_handle05_32_dasm(DASM_OPS_32); //("<illegal 0x05_32> (%08x)", op); return 4;}
419int arcompact_handle05_33_dasm(DASM_OPS_32); //("<illegal 0x05_33> (%08x)", op); return 4;}
420int arcompact_handle05_34_dasm(DASM_OPS_32); //("<illegal 0x05_34> (%08x)", op); return 4;}
421int arcompact_handle05_35_dasm(DASM_OPS_32); //("<illegal 0x05_35> (%08x)", op); return 4;}
422int arcompact_handle05_36_dasm(DASM_OPS_32); //("<illegal 0x05_36> (%08x)", op); return 4;}
423int arcompact_handle05_37_dasm(DASM_OPS_32); //("<illegal 0x05_37> (%08x)", op); return 4;}
424int arcompact_handle05_38_dasm(DASM_OPS_32); //("<illegal 0x05_38> (%08x)", op); return 4;}
425int arcompact_handle05_39_dasm(DASM_OPS_32); //("<illegal 0x05_39> (%08x)", op); return 4;}
426int arcompact_handle05_3a_dasm(DASM_OPS_32); //("<illegal 0x05_3a> (%08x)", op); return 4;}
427int arcompact_handle05_3b_dasm(DASM_OPS_32); //("<illegal 0x05_3b> (%08x)", op); return 4;}
428int arcompact_handle05_3c_dasm(DASM_OPS_32); //("<illegal 0x05_3c> (%08x)", op); return 4;}
429int arcompact_handle05_3d_dasm(DASM_OPS_32); //("<illegal 0x05_3d> (%08x)", op); return 4;}
430int arcompact_handle05_3e_dasm(DASM_OPS_32); //("<illegal 0x05_3e> (%08x)", op); return 4;}
431int arcompact_handle05_3f_dasm(DASM_OPS_32); //("<illegal 0x05_3f> (%08x)", op); return 4;}
432
433int arcompact_handle0f_00_04_dasm(DASM_OPS_16); //("<illegal 0x0f_00_00> (%08x)", op); return 2;}
434int arcompact_handle0f_00_05_dasm(DASM_OPS_16); //("<illegal 0x0f_00_00> (%08x)", op); return 2;}
435int arcompact_handle0f_00_07_02_dasm(DASM_OPS_16); //("<illegal 0x0f_00_07_02> (%08x)", op); return 2;}
436int arcompact_handle0f_00_07_03_dasm(DASM_OPS_16); //("<illegal 0x0f_00_07_03> (%08x)", op); return 2;}
437int arcompact_handle0f_01_dasm(DASM_OPS_16); //("<illegal 0x0f_01> (%08x)", op); return 2;}
438int arcompact_handle0f_03_dasm(DASM_OPS_16); //("<illegal 0x0f_03> (%08x)", op); return 2;}
439int arcompact_handle0f_08_dasm(DASM_OPS_16); //("<illegal 0x0f_08> (%08x)", op); return 2;}
440int arcompact_handle0f_09_dasm(DASM_OPS_16); //("<illegal 0x0f_09> (%08x)", op); return 2;}
441int arcompact_handle0f_0a_dasm(DASM_OPS_16); //("<illegal 0x0f_0a> (%08x)", op); return 2;}
442int arcompact_handle0f_17_dasm(DASM_OPS_16); //("<illegal 0x0f_17> (%08x)", op); return 2;}
443
444int arcompact_handle18_05_02_dasm(DASM_OPS_16); //("<illegal 0x18_05_02> (%04x)", op); return 2;}
445int arcompact_handle18_05_03_dasm(DASM_OPS_16); //("<illegal 0x18_05_03> (%04x)", op); return 2;}
446int arcompact_handle18_05_04_dasm(DASM_OPS_16); //("<illegal 0x18_05_04> (%04x)", op); return 2;}
447int arcompact_handle18_05_05_dasm(DASM_OPS_16); //("<illegal 0x18_05_05> (%04x)", op); return 2;}
448int arcompact_handle18_05_06_dasm(DASM_OPS_16); //("<illegal 0x18_05_06> (%04x)", op); return 2;}
449int arcompact_handle18_05_07_dasm(DASM_OPS_16); //("<illegal 0x18_05_07> (%04x)", op); return 2;}
450int arcompact_handle18_06_00_dasm(DASM_OPS_16); //("<illegal 0x18_06_00> (%04x)",  op); return 2;}
451int arcompact_handle18_06_02_dasm(DASM_OPS_16); //("<illegal 0x18_06_02> (%04x)", op); return 2;}
452int arcompact_handle18_06_03_dasm(DASM_OPS_16); //("<illegal 0x18_06_03> (%04x)", op); return 2;}
453int arcompact_handle18_06_04_dasm(DASM_OPS_16); //("<illegal 0x18_06_04> (%04x)", op); return 2;}
454int arcompact_handle18_06_05_dasm(DASM_OPS_16); //("<illegal 0x18_06_05> (%04x)", op); return 2;}
455int arcompact_handle18_06_06_dasm(DASM_OPS_16); //("<illegal 0x18_06_06> (%04x)", op); return 2;}
456int arcompact_handle18_06_07_dasm(DASM_OPS_16); //("<illegal 0x18_06_07> (%04x)", op); return 2;}
457int arcompact_handle18_06_08_dasm(DASM_OPS_16); //("<illegal 0x18_06_08> (%04x)", op); return 2;}
458int arcompact_handle18_06_09_dasm(DASM_OPS_16); //("<illegal 0x18_06_09> (%04x)", op); return 2;}
459int arcompact_handle18_06_0a_dasm(DASM_OPS_16); //("<illegal 0x18_06_0a> (%04x)", op); return 2;}
460int arcompact_handle18_06_0b_dasm(DASM_OPS_16); //("<illegal 0x18_06_0b> (%04x)", op); return 2;}
461int arcompact_handle18_06_0c_dasm(DASM_OPS_16); //("<illegal 0x18_06_0c> (%04x)", op); return 2;}
462int arcompact_handle18_06_0d_dasm(DASM_OPS_16); //("<illegal 0x18_06_0d> (%04x)", op); return 2;}
463int arcompact_handle18_06_0e_dasm(DASM_OPS_16); //("<illegal 0x18_06_0e> (%04x)", op); return 2;}
464int arcompact_handle18_06_0f_dasm(DASM_OPS_16); //("<illegal 0x18_06_0f> (%04x)", op); return 2;}
465int arcompact_handle18_06_10_dasm(DASM_OPS_16); //("<illegal 0x18_06_10> (%04x)", op); return 2;}
466int arcompact_handle18_06_12_dasm(DASM_OPS_16); //("<illegal 0x18_06_12> (%04x)",  op); return 2;}
467int arcompact_handle18_06_13_dasm(DASM_OPS_16); //("<illegal 0x18_06_13> (%04x)",  op); return 2;}
468int arcompact_handle18_06_14_dasm(DASM_OPS_16); //("<illegal 0x18_06_14> (%04x)",  op); return 2;}
469int arcompact_handle18_06_15_dasm(DASM_OPS_16); //("<illegal 0x18_06_15> (%04x)",  op); return 2;}
470int arcompact_handle18_06_16_dasm(DASM_OPS_16); //("<illegal 0x18_06_16> (%04x)",  op); return 2;}
471int arcompact_handle18_06_17_dasm(DASM_OPS_16); //("<illegal 0x18_06_17> (%04x)",  op); return 2;}
472int arcompact_handle18_06_18_dasm(DASM_OPS_16); //("<illegal 0x18_06_18> (%04x)",  op); return 2;}
473int arcompact_handle18_06_19_dasm(DASM_OPS_16); //("<illegal 0x18_06_19> (%04x)",  op); return 2;}
474int arcompact_handle18_06_1a_dasm(DASM_OPS_16); //("<illegal 0x18_06_1a> (%04x)",  op); return 2;}
475int arcompact_handle18_06_1b_dasm(DASM_OPS_16); //("<illegal 0x18_06_1b> (%04x)",  op); return 2;}
476int arcompact_handle18_06_1c_dasm(DASM_OPS_16); //("<illegal 0x18_06_1c> (%04x)",  op); return 2;}
477int arcompact_handle18_06_1d_dasm(DASM_OPS_16); //("<illegal 0x18_06_1d> (%04x)",  op); return 2;}
478int arcompact_handle18_06_1e_dasm(DASM_OPS_16); //("<illegal 0x18_06_1e> (%04x)",  op); return 2;}
479int arcompact_handle18_06_1f_dasm(DASM_OPS_16); //("<illegal 0x18_06_1f> (%04x)",  op); return 2;}
480int arcompact_handle18_07_00_dasm(DASM_OPS_16); //("<illegal 0x18_07_00> (%04x)",  op); return 2;}
481int arcompact_handle18_07_02_dasm(DASM_OPS_16); //("<illegal 0x18_07_02> (%04x)", op); return 2;}
482int arcompact_handle18_07_03_dasm(DASM_OPS_16); //("<illegal 0x18_07_03> (%04x)", op); return 2;}
483int arcompact_handle18_07_04_dasm(DASM_OPS_16); //("<illegal 0x18_07_04> (%04x)", op); return 2;}
484int arcompact_handle18_07_05_dasm(DASM_OPS_16); //("<illegal 0x18_07_05> (%04x)", op); return 2;}
485int arcompact_handle18_07_06_dasm(DASM_OPS_16); //("<illegal 0x18_07_06> (%04x)", op); return 2;}
486int arcompact_handle18_07_07_dasm(DASM_OPS_16); //("<illegal 0x18_07_07> (%04x)", op); return 2;}
487int arcompact_handle18_07_08_dasm(DASM_OPS_16); //("<illegal 0x18_07_08> (%04x)", op); return 2;}
488int arcompact_handle18_07_09_dasm(DASM_OPS_16); //("<illegal 0x18_07_09> (%04x)", op); return 2;}
489int arcompact_handle18_07_0a_dasm(DASM_OPS_16); //("<illegal 0x18_07_0a> (%04x)", op); return 2;}
490int arcompact_handle18_07_0b_dasm(DASM_OPS_16); //("<illegal 0x18_07_0b> (%04x)", op); return 2;}
491int arcompact_handle18_07_0c_dasm(DASM_OPS_16); //("<illegal 0x18_07_0c> (%04x)", op); return 2;}
492int arcompact_handle18_07_0d_dasm(DASM_OPS_16); //("<illegal 0x18_07_0d> (%04x)", op); return 2;}
493int arcompact_handle18_07_0e_dasm(DASM_OPS_16); //("<illegal 0x18_07_0e> (%04x)", op); return 2;}
494int arcompact_handle18_07_0f_dasm(DASM_OPS_16); //("<illegal 0x18_07_0f> (%04x)", op); return 2;}
495int arcompact_handle18_07_10_dasm(DASM_OPS_16); //("<illegal 0x18_07_10> (%04x)", op); return 2;}
496int arcompact_handle18_07_12_dasm(DASM_OPS_16); //("<illegal 0x18_07_12> (%04x)",  op); return 2;}
497int arcompact_handle18_07_13_dasm(DASM_OPS_16); //("<illegal 0x18_07_13> (%04x)",  op); return 2;}
498int arcompact_handle18_07_14_dasm(DASM_OPS_16); //("<illegal 0x18_07_14> (%04x)",  op); return 2;}
499int arcompact_handle18_07_15_dasm(DASM_OPS_16); //("<illegal 0x18_07_15> (%04x)",  op); return 2;}
500int arcompact_handle18_07_16_dasm(DASM_OPS_16); //("<illegal 0x18_07_16> (%04x)",  op); return 2;}
501int arcompact_handle18_07_17_dasm(DASM_OPS_16); //("<illegal 0x18_07_17> (%04x)",  op); return 2;}
502int arcompact_handle18_07_18_dasm(DASM_OPS_16); //("<illegal 0x18_07_18> (%04x)",  op); return 2;}
503int arcompact_handle18_07_19_dasm(DASM_OPS_16); //("<illegal 0x18_07_19> (%04x)",  op); return 2;}
504int arcompact_handle18_07_1a_dasm(DASM_OPS_16); //("<illegal 0x18_07_1a> (%04x)",  op); return 2;}
505int arcompact_handle18_07_1b_dasm(DASM_OPS_16); //("<illegal 0x18_07_1b> (%04x)",  op); return 2;}
506int arcompact_handle18_07_1c_dasm(DASM_OPS_16); //("<illegal 0x18_07_1c> (%04x)",  op); return 2;}
507int arcompact_handle18_07_1d_dasm(DASM_OPS_16); //("<illegal 0x18_07_1d> (%04x)",  op); return 2;}
508int arcompact_handle18_07_1e_dasm(DASM_OPS_16); //("<illegal 0x18_07_1e> (%04x)",  op); return 2;}
509int arcompact_handle18_07_1f_dasm(DASM_OPS_16); //("<illegal 0x18_07_1f> (%04x)",  op); return 2;}
510
trunk/src/emu/cpu/cpu.mak
r242341r242342
101101ifneq ($(filter ARCOMPACT,$(CPUS)),)
102102OBJDIRS += $(CPUOBJ)/arcompact
103103CPUOBJS += $(CPUOBJ)/arcompact/arcompact.o
104DASMOBJS += $(CPUOBJ)/arcompact/arcompactdasm.o $(CPUOBJ)/arcompact/arcompactdasm_dispatch.o $(CPUOBJ)/arcompact/arcompactdasm_ops.o
104DASMOBJS += $(CPUOBJ)/arcompact/arcompactdasm.o
105105endif
106106
107107$(CPUOBJ)/arcompact/arcompact.o:  $(CPUSRC)/arcompact/arcompact.c \
trunk/src/emu/machine/machine.mak
r242341r242342
13041304
13051305#-------------------------------------------------
13061306#
1307#@src/emu/machine/r10696.h,MACHINES += R10696
1308#-------------------------------------------------
1309
1310ifneq ($(filter R10696,$(MACHINES)),)
1311MACHINEOBJS+= $(MACHINEOBJ)/r10696.o
1312endif
1313
1314#-------------------------------------------------
1315#
13161307#@src/emu/machine/r10788.h,MACHINES += R10788
13171308#-------------------------------------------------
13181309
trunk/src/emu/machine/r10696.c
r242341r242342
1/**********************************************************************
2
3    Rockwell 10696 General Purpose Input/Output (I/O)
4
5    Copyright Nicola Salmoria and the MAME Team.
6    Visit http://mamedev.org for licensing and usage restrictions.
7
8
9    REGISTER DESCRIPTION
10
11    HEX    Address   Select     Names
12    -------------------------------------------------------
13    A      x x x x   1 0 1 0    Read Group A
14    9      x x x x   1 0 0 1    Read Group B
15    3      x x x x   0 0 1 1    Read Group C
16    0      x x x x   0 0 0 0    Read Groups A | B | C
17    1      x x x x   0 0 0 1    Read Groups B | C
18    2      x x x x   0 0 1 0    Read Groups A | C
19    8      x x x x   1 0 0 0    Read Groups A | B
20
21    E      x x x x   1 1 1 0    Set Group A
22    D      x x x x   1 1 0 1    Set Group B
23    7      x x x x   0 1 1 1    Set Group C
24    4      x x x x   0 1 0 0    Set Groups A, B and C
25    5      x x x x   0 1 0 1    Set Groups B and C
26    6      x x x x   0 1 1 0    Set Groups A and C
27    C      x x x x   1 1 0 0    Set Groups A and B
28
29    Notes:
30    Any of the I/O chips may be used to read or set any group
31    (A, B, C) or combination of groups.
32**********************************************************************/
33
34#include "emu.h"
35#include "machine/r10696.h"
36
37#define   VERBOSE   1
38#if VERBOSE
39#define LOG(x) logerror x
40#else
41#define LOG(x)
42#endif
43
44/*************************************
45 *
46 *  Device interface
47 *
48 *************************************/
49
50const device_type R10696 = &device_creator<r10696_device>;
51
52r10696_device::r10696_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53    : device_t(mconfig, R10696, "Rockwell 10696", tag, owner, clock, "r10696", __FILE__),
54        m_io_a(0), m_io_b(0), m_io_c(0),
55        m_iord(*this), m_iowr(*this)
56{
57}
58
59/**
60 * @brief r10696_device::device_start device-specific startup
61 */
62void r10696_device::device_start()
63{
64    m_iord.resolve();
65    m_iowr.resolve();
66
67    save_item(NAME(m_io_a));
68    save_item(NAME(m_io_b));
69    save_item(NAME(m_io_c));
70}
71
72/**
73 * @brief r10696_device::device_reset device-specific reset
74 */
75void r10696_device::device_reset()
76{
77   m_io_a = 0;
78   m_io_b = 0;
79   m_io_c = 0;
80}
81
82
83/*************************************
84 *
85 *  Constants
86 *
87 *************************************/
88
89/*************************************
90 *
91 *  Command access handlers
92 *
93 *************************************/
94
95WRITE8_MEMBER( r10696_device::io_w )
96{
97    assert(offset < 16);
98    const UINT8 io_a = m_io_a;
99    const UINT8 io_b = m_io_b;
100    const UINT8 io_c = m_io_c;
101    switch (offset)
102    {
103    case 0x0A: // Read Group A
104    case 0x09: // Read Group B
105    case 0x03: // Read Group C
106    case 0x00: // Read Groups A | B | C
107    case 0x01: // Read Groups B | C
108    case 0x02: // Read Groups A | C
109    case 0x08: // Read Groups A | B
110        break;
111
112    case 0x0E: // Set Group A
113        m_io_a = data & 0x0f;
114        break;
115    case 0x0D: // Set Group B
116        m_io_b = data & 0x0f;
117        break;
118    case 0x07: // Set Group C
119        m_io_c = data & 0x0f;
120        break;
121    case 0x04: // Set Groups A, B and C
122        m_io_a = m_io_b = m_io_c = data & 0x0f;
123        break;
124    case 0x05: // Set Groups B and C
125        m_io_b = m_io_c = data & 0x0f;
126        break;
127    case 0x06: // Set Groups A and C
128        m_io_a = m_io_c = data & 0x0f;
129        break;
130    case 0x0C: // Set Groups A and B
131        m_io_a = m_io_b = data & 0x0f;
132        break;
133    }
134    if (io_a != m_io_a)
135        m_iowr(0, m_io_a, 0x0f);
136    if (io_b != m_io_b)
137        m_iowr(1, m_io_b, 0x0f);
138    if (io_c != m_io_c)
139        m_iowr(2, m_io_c, 0x0f);
140}
141
142
143READ8_MEMBER( r10696_device::io_r )
144{
145    assert(offset < 16);
146    UINT8 io_a, io_b, io_c;
147    UINT8 data = 0xf;
148    switch (offset)
149    {
150    case 0x0A: // Read Group A
151        io_a = m_iord(0);
152        data = io_a & 0x0f;
153        break;
154    case 0x09: // Read Group B
155        io_b = m_iord(1);
156        data = io_b & 0x0f;
157        break;
158    case 0x03: // Read Group C
159        io_c = m_iord(2);
160        data = io_c & 0x0f;
161        break;
162    case 0x00: // Read Groups A | B | C
163        io_a = m_iord(0);
164        io_b = m_iord(1);
165        io_c = m_iord(2);
166        data = (io_a | io_b | io_a) & 0x0f;
167        break;
168    case 0x01: // Read Groups B | C
169        io_b = m_iord(1);
170        io_c = m_iord(2);
171        data = (io_b | io_c) & 0x0f;
172        break;
173    case 0x02: // Read Groups A | C
174        io_a = m_iord(0);
175        io_c = m_iord(2);
176        data = (io_a | io_c) & 0x0f;
177        break;
178    case 0x08: // Read Groups A | B
179        io_a = m_iord(0);
180        io_b = m_iord(1);
181        data = (io_a | io_b) & 0x0f;
182        break;
183
184    case 0x0E: // Set Group A
185    case 0x0D: // Set Group B
186    case 0x07: // Set Group C
187    case 0x04: // Set Groups A, B and C
188    case 0x05: // Set Groups B and C
189    case 0x06: // Set Groups A and C
190    case 0x0C: // Set Groups A and B
191        break;
192    }
193    return data;
194}
trunk/src/emu/machine/r10696.h
r242341r242342
1/**********************************************************************
2
3    Rockwell 10696 General Purpose Input/Output (I/O)
4
5    Juergen Buchmueller <pullmoll@t-online.de>
6
7    The device decodes reads/write to a 16 byte I/O range defined
8    by four wired inputs SC1, SC2, SC3 and SC4.
9    It provides 12 inputs and 12 outputs in groups of three
10    time 4 bits each.
11
12**********************************************************************/
13
14#ifndef __R10696_H__
15#define __R10696_H__
16
17#include "device.h"
18
19/*************************************
20 *
21 *  Device configuration macros
22 *
23 *************************************/
24
25/* Set the writer used to update a display digit */
26#define MCFG_R10696_IO(_devcb_rd,_devcb_wr) \
27    r10696_device::set_iord(*device, DEVCB_##_devcb_rd); \
28    r10696_device::set_iowr(*device, DEVCB_##_devcb_wr);
29
30class r10696_device : public device_t
31{
32public:
33    r10696_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
34    ~r10696_device() {}
35
36    DECLARE_READ8_MEMBER ( io_r );
37    DECLARE_WRITE8_MEMBER( io_w );
38
39    template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iord.set_callback(object); }
40    template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iowr.set_callback(object); }
41protected:
42    // device-level overrides
43    virtual void device_start();
44    virtual void device_reset();
45
46private:
47    UINT8         m_io_a;   //!< input/output flip-flops group A
48    UINT8         m_io_b;   //!< input/output flip-flops group B
49    UINT8         m_io_c;   //!< input/output flip-flops group C
50    devcb_read8   m_iord;   //!< input line (read, offset = group, data = 4 bits)
51    devcb_write8  m_iowr;   //!< output line (write, offset = group, data = 4 bits)
52};
53
54extern const device_type R10696;
55
56#endif /* __R10696_H__ */
trunk/src/emu/video/upd7220.c
r242341r242342
148148
149149
150150// default address map
151static ADDRESS_MAP_START( upd7220_vram, AS_0, 16, upd7220_device )
151static ADDRESS_MAP_START( upd7220_vram, AS_0, 8, upd7220_device )
152152   AM_RANGE(0x00000, 0x3ffff) AM_RAM
153153ADDRESS_MAP_END
154154
r242341r242342
206206   space().write_byte(address, data);
207207}
208208
209inline UINT16 upd7220_device::readword(offs_t address)
210{
211   return space().read_word(address);
212}
213
214
215inline void upd7220_device::writeword(offs_t address, UINT16 data)
216{
217   space().write_word(address, data);
218}
219
220209//-------------------------------------------------
221210//  fifo_clear -
222211//-------------------------------------------------
r242341r242342
506495
507496   result = 0;
508497
509   result = m_pr[1] | (m_pr[2] << 8);
498   if(((m_mode & UPD7220_MODE_DISPLAY_MASK) == UPD7220_MODE_DISPLAY_GRAPHICS) || m_figs.m_gd)
499      result = BITSWAP8(m_pr[1],0,1,2,3,4,5,6,7) | (BITSWAP8(m_pr[2],0,1,2,3,4,5,6,7) << 8);
500   else
501      result = m_pr[1] | (m_pr[2] << 8);
510502
511503   switch(type)
512504   {
r242341r242342
534526      switch(mod & 3)
535527      {
536528         case 0x00: //replace
537            if(type == 0)
538               writeword(m_ead*2+0, result);
539            if(type == 2)
529            if(type == 0 || type == 2)
540530               writebyte(m_ead*2+0, result & 0xff);
541            if(type == 3)
531            if(type == 0 || type == 3)
542532               writebyte(m_ead*2+1, result >> 8);
543533            break;
544534         case 0x01: //complement
545            if(type == 0)
546               writeword(m_ead*2+0, readword(m_ead*2+0) ^ result);
547            if(type == 2)
535            if(type == 0 || type == 2)
548536               writebyte(m_ead*2+0, readbyte(m_ead*2+0) ^ (result & 0xff));
549            if(type == 3)
537            if(type == 0 || type == 3)
550538               writebyte(m_ead*2+1, readbyte(m_ead*2+1) ^ (result >> 8));
551539            break;
552540         case 0x02: //reset to zero
553            if(type == 0)
554               writeword(m_ead*2+0, readword(m_ead*2+0) & ~result);
555            if(type == 2)
541            if(type == 0 || type == 2)
556542               writebyte(m_ead*2+0, readbyte(m_ead*2+0) & ~(result & 0xff));
557            if(type == 3)
543            if(type == 0 || type == 3)
558544               writebyte(m_ead*2+1, readbyte(m_ead*2+1) & ~(result >> 8));
559545            break;
560546         case 0x03: //set to one
561            if(type == 0)
562               writeword(m_ead*2+0, readword(m_ead*2+0) | result);
563            if(type == 2)
547            if(type == 0 || type == 2)
564548               writebyte(m_ead*2+0, readbyte(m_ead*2+0) | (result & 0xff));
565            if(type == 3)
549            if(type == 0 || type == 3)
566550               writebyte(m_ead*2+1, readbyte(m_ead*2+1) | (result >> 8));
567551            break;
568552      }
r242341r242342
647631   m_disp(0),
648632   m_gchr(0),
649633   m_bitmap_mod(0),
650   m_space_config("videoram", ENDIANNESS_LITTLE, 16, 18, 0, NULL, *ADDRESS_MAP_NAME(upd7220_vram))
634   m_space_config("videoram", ENDIANNESS_LITTLE, 8, 18, 0, NULL, *ADDRESS_MAP_NAME(upd7220_vram))
651635{
652636   for (int i = 0; i < 16; i++)
653637   {
r242341r242342
789773void upd7220_device::draw_pixel(int x, int y, int xi, UINT16 tile_data)
790774{
791775   UINT32 addr = ((y * (m_pitch << (m_figs.m_gd ? 0 : 1))) + (x >> 3)) & 0x3ffff;
792   UINT16 data = readword(addr);
793   UINT16 new_pixel = (tile_data & (1 << (xi & 0xf))) ? (1 << (x & 0xf)) : 0;
776   UINT8 data = readbyte(addr);
777   UINT8 new_pixel = (xi & 8 ? tile_data >> 8 : tile_data & 0xff) & (0x80 >> (xi & 7));
778   new_pixel = new_pixel ? (0xff & (0x80 >> (x & 7))) : 0;
794779
795780   switch(m_bitmap_mod)
796781   {
797782      case 0: //replace
798         writeword(addr, (data & ~(1 << (x & 0xf))) | new_pixel);
783         writebyte(addr, (data & ~(0x80 >> (x & 7))) | new_pixel);
799784         break;
800785      case 1: //complement
801         writeword(addr, data ^ new_pixel);
786         writebyte(addr, data ^ new_pixel);
802787         break;
803788      case 2: //reset
804         writeword(addr, data & ~new_pixel);
789         writebyte(addr, data & ~new_pixel);
805790         break;
806791      case 3: //set
807         writeword(addr, data | new_pixel);
792         writebyte(addr, data | new_pixel);
808793         break;
809794   }
810795}
r242341r242342
1001986
1002987   for(int pi = 0; pi < psize; pi++)
1003988   {
1004      tile_data = (m_ra[((psize-1-pi) & 7) | 8] << 8) | m_ra[((psize-1-pi) & 7) | 8];
989      tile_data = BITSWAP8(m_ra[((psize-1-pi) & 7) | 8],0,1,2,3,4,5,6,7);
990      tile_data = (tile_data << 8) | (tile_data & 0xff);
1005991      for(int pz = 0; pz <= m_gchr; pz++)
1006992      {
1007993         for(int ii = 0, curpixel = 0; ii < isize; ii++)
r242341r242342
15861572
15871573   for (sx = 0; sx < pitch; sx++)
15881574   {
1589      if((sx << 4) < m_aw * 16 && y < al)
1590         m_display_cb(bitmap, y, sx << 4, addr);
1575      if((sx << 3) < m_aw * 16 && y < al)
1576         m_display_cb(bitmap, y, sx << 3, addr);
15911577
1592      addr+= (wd + 1) * 2;
1578      addr+= wd + 1;
15931579   }
15941580}
15951581
trunk/src/emu/video/upd7220.h
r242341r242342
126126
127127   inline UINT8 readbyte(offs_t address);
128128   inline void writebyte(offs_t address, UINT8 data);
129   inline UINT16 readword(offs_t address);
130   inline void writeword(offs_t address, UINT16 data);
131129   inline void fifo_clear();
132130   inline int fifo_param_count();
133131   inline void fifo_set_direction(int dir);
trunk/src/lib/formats/d64_dsk.h
r242341r242342
6363   virtual int get_sectors_per_track(const format &f, int track);
6464   virtual int get_disk_id_offset(const format &f);
6565   void get_disk_id(const format &f, io_generic *io, UINT8 &id1, UINT8 &id2);
66   virtual floppy_image_format_t::desc_e* get_sector_desc(const format &f, int &current_size, int sector_count, UINT8 id1, UINT8 id2, int gap_2);
66   floppy_image_format_t::desc_e* get_sector_desc(const format &f, int &current_size, int sector_count, UINT8 id1, UINT8 id2, int gap_2);
6767   void build_sector_description(const format &f, UINT8 *sectdata, offs_t sect_offs, offs_t error_offs, desc_s *sectors, int sector_count) const;
6868
6969   static const format file_formats[];
trunk/src/lib/formats/d80_dsk.c
r242341r242342
4343
4444const UINT32 d80_format::d80_cell_size[] =
4545{
46   2667, // 12MHz/2/16
47   2500, // 12MHz/2/15
48   2333, // 12MHz/2/14
49   2167  // 12MHz/2/13
46   2667, // 12MHz/16/2
47   2500, // 12MHz/15/2
48   2333, // 12MHz/14/2
49   2167  // 12MHz/13/2
5050};
5151
5252const int d80_format::d80_sectors_per_track[] =
trunk/src/lib/formats/dcp_dsk.c
r242341r242342
1// license:BSD-3-Clause
2// copyright-holders:etabeta
3/*********************************************************************
4
5    formats/dcp_dsk.h
6
7    PC98 DCP & DCU disk images
8
9    0xA2 header, followed by track data
10   header[0] - disk format
11    header[1-0xA1] - track map (1=track used, 0=track unused/unformatted)
12    header[0xA2] - all tracks used?
13                   (there seems to be a diff in its usage between DCP and DCU)
14
15    TODO:
16     - add support for track map. images available for tests were all
17       of type 0x01, with all 154 tracks present. combined with pete_j
18       reporting some images have faulty track map, we need some more
19       test cases to properly handle these disks!
20 
21*********************************************************************/
22
23#include "emu.h"
24#include "dcp_dsk.h"
25
26dcp_format::dcp_format()
27{
28}
29
30const char *dcp_format::name() const
31{
32   return "dcx";
33}
34
35const char *dcp_format::description() const
36{
37   return "DCP/DCU disk image";
38}
39
40const char *dcp_format::extensions() const
41{
42   return "dcp,dcu";
43}
44
45int dcp_format::identify(io_generic *io, UINT32 form_factor)
46{
47   UINT64 size = io_generic_size(io);
48   UINT8 h[0xa2];
49   int heads, tracks, spt, bps, count_tracks = 0;
50   bool is_hdb = false;
51
52   io_generic_read(io, h, 0, 0xa2);
53
54   // First byte is the disk format (see below in load() for details)
55   switch (h[0])
56   {
57      case 0x01:
58      default:
59         heads = 2; tracks = 77;
60         spt = 8; bps = 1024;
61         break;
62      case 0x02:
63         heads = 2; tracks = 80;
64         spt = 15; bps = 512;
65         break;
66      case 0x03:
67         heads = 2; tracks = 80;
68         spt = 18; bps = 512;
69         break;
70      case 0x04:
71         heads = 2; tracks = 80;
72         spt = 8; bps = 512;
73         break;
74      case 0x05:
75         heads = 2; tracks = 80;
76         spt = 9; bps = 512;
77         break;
78      case 0x08:
79         heads = 2; tracks = 80;
80         spt = 9; bps = 1024;
81         break;
82      case 0x11:
83         is_hdb = true;
84         heads = 2; tracks = 77;
85         spt = 26; bps = 256;
86         break;
87      case 0x19:
88         heads = 2; tracks = 80;
89         spt = 16; bps = 256;
90         break;
91      case 0x21:
92         heads = 2; tracks = 80;
93         spt = 26; bps = 256;
94         break;
95   }
96
97   // bytes 0x01 to 0xa1 are track map (0x01 if track is used, 0x00 if track is unformatted/unused)
98   for (int i = 1; i < 0xa1; i++)
99      if (h[i])
100         count_tracks++;
101
102   // in theory track map should be enough (former check), but some images have it wrong!
103   // hence, if this check fails, we also allow for images with all tracks and wrong track map
104   if (size - 0xa2 == (heads * count_tracks * spt * bps) || size - 0xa2 == (heads * tracks * spt * bps))
105      return 100;
106
107   // for disk type 0x11 the head 0 track 0 has 26 sectors of half width, so we need to compensate calculation
108   if (is_hdb && (size - 0xa2 + (0x80 * 26) == (heads * count_tracks * spt * bps) || size - 0xa2 + (0x80 * 26) == (heads * tracks * spt * bps)))
109      return 100;
110   
111   return 0;
112}
113
114bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
115{
116   UINT8 h[0xa2];
117   int heads, tracks, spt, bps;
118   bool is_hdb = false;
119   
120   io_generic_read(io, h, 0, 0xa2);
121   
122   // First byte is the disk format:
123   switch (h[0])
124   {
125      case 0x01:
126      default:
127         //01h: 2HD-8 sector (1.25MB) (BKDSK .HDM) (aka 2HS)
128         //2 sides, 77 tracks, 8 sectors/track, 1024 bytes/sector = 1261568 bytes (360rpm)
129         heads = 2;
130         tracks = 77;
131         spt = 8;
132         bps = 1024;
133         break;
134      case 0x02:
135         //02H: 2HD-15 sector (1.21MB) (BKDSK .HD5) (aka 2HC)
136         //2 sides, 80 tracks, 15 sectors/track, 512 bytes/sector = 1228800 bytes (360rpm)
137         heads = 2;
138         tracks = 80;
139         spt = 15;
140         bps = 512;
141         break;
142      case 0x03:
143         //03H: 2HQ-18 sector (1.44MB) (BKDSK .HD4) (aka 2HDE)
144         //2 sides, 80 tracks, 18 sectors/track, 512 bytes/sector = 1474560 bytes (300rpm)
145         heads = 2;
146         tracks = 80;
147         spt = 18;
148         bps = 512;
149         break;
150      case 0x04:
151         //04H: 2DD-8 sector (640KB) (BKDSK .DD6)
152         //2 sides, 80 tracks, 8 sectors/track, 512 bytes/sector = 655360 bytes (300rpm)
153         heads = 2;
154         tracks = 80;
155         spt = 8;
156         bps = 512;
157         break;
158      case 0x05:
159         //05h: 2DD-9 sector ( 720KB) (BKDSK .DD9)
160         //2 sides, 80 tracks, 9 sectors/track, 512 bytes/sector = 737280 bytes (300rpm)
161         heads = 2;
162         tracks = 80;
163         spt = 9;
164         bps = 512;
165         break;
166      case 0x08:
167         //08h: 2HD-9 sector (1.44MB)
168         //2 sides, 80 tracks, 9 sectors/track, 1024 bytes/sector = 1474560 bytes (300rpm)(??)
169         heads = 2;
170         tracks = 80;
171         spt = 9;
172         bps = 1024;
173         break;
174      case 0x11:
175         //11h: BASIC-2HD (BKDSK .HDB)
176         //Head 0 Track 0 - FM encoding - 26 sectors of 128 bytes = 1 track
177         //Head 1 Track 0 - MFM encoding - 26 sectors of 256 bytes = 1 track
178         //Head 0 Track 1 to Head 1 Track 77 - 26 sectors of 256 bytes = 152 tracks
179         //2 sides, 77 tracks, 26 sectors/track, 256 bytes/sector (except for head 0 track 0) = 1021696 bytes (360rpm)
180         is_hdb = true;
181         heads = 2;
182         tracks = 77;
183         spt = 26;
184         bps = 256;
185         break;
186      case 0x19:
187         //19h: BASIC 2DD (BKDSK .DDB)
188         //2 sides, 80 tracks, 16 sectors/track, 256 bytes/sector = 655360 bytes (300rpm)
189         heads = 2;
190         tracks = 80;
191         spt = 16;
192         bps = 256;
193         break;
194      case 0x21:
195         //21H: 2HD-26 sector
196         //2 sides, 80 tracks, 26 sectors/track, 256 bytes/sector = 1064960 bytes (??rpm)(??)
197         heads = 2;
198         tracks = 80;
199         spt = 26;
200         bps = 256;
201         break;
202   }
203
204   int cell_count = form_factor == floppy_image::FF_35 ? 200000 : 166666;
205
206   int ssize;
207   for (ssize = 0; (128 << ssize) < bps; ssize++);
208
209   desc_pc_sector sects[256];
210   UINT8 sect_data[65536];
211
212   if (!is_hdb)
213   {
214      for (int track = 0; track < tracks; track++)
215         for (int head = 0; head < heads; head++)
216         {
217            io_generic_read(io, sect_data, 0xa2 + bps * spt * (track * heads + head), bps * spt);
218           
219            for (int i = 0; i < spt; i++)
220            {
221               sects[i].track       = track;
222               sects[i].head        = head;
223               sects[i].sector      = i + 1;
224               sects[i].size        = ssize;
225               sects[i].actual_size = bps;
226               sects[i].deleted     = false;
227               sects[i].bad_crc     = false;
228               sects[i].data        = sect_data + i * bps;
229            }
230           
231            build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
232         }
233   }
234   else   // FIXME: the code below is untested, because no image was found... there might be some silly mistake in the disk geometry!
235   {
236      // Read Head 0 Track 0 is FM with 26 sectors of 128bytes instead of 256
237      io_generic_read(io, sect_data, 0xa2, 128 * spt);
238     
239      for (int i = 0; i < spt; i++)
240      {
241         sects[i].track       = 0;
242         sects[i].head        = 0;
243         sects[i].sector      = i + 1;
244         sects[i].size        = 0;
245         sects[i].actual_size = 128;
246         sects[i].deleted     = false;
247         sects[i].bad_crc     = false;
248         sects[i].data        = sect_data + i * 128;
249      }
250     
251      build_pc_track_fm(0, 0, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, 128));
252     
253      // Read Head 1 Track 0 is MFM with 26 sectors of 256bytes
254      io_generic_read(io, sect_data, 0xa2 + 128 * spt, bps * spt);
255     
256      for (int i = 0; i < spt; i++)
257      {
258         sects[i].track       = 0;
259         sects[i].head        = 1;
260         sects[i].sector      = i + 1;
261         sects[i].size        = ssize;
262         sects[i].actual_size = bps;
263         sects[i].deleted     = false;
264         sects[i].bad_crc     = false;
265         sects[i].data        = sect_data + i * bps;
266      }
267     
268      build_pc_track_mfm(0, 1, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
269     
270      // Read other tracks as usual
271      UINT32 data_offs = 0xa2 + (26 * 0x80) + (26 * 0x100);
272      for (int track = 1; track < tracks; track++)
273         for (int head = 0; head < heads; head++)
274         {
275            io_generic_read(io, sect_data, data_offs + bps * spt * ((track - 1) * heads + head), bps * spt);
276           
277            for (int i = 0; i < spt; i++)
278            {
279               sects[i].track       = track;
280               sects[i].head        = head;
281               sects[i].sector      = i + 1;
282               sects[i].size        = ssize;
283               sects[i].actual_size = bps;
284               sects[i].deleted     = false;
285               sects[i].bad_crc     = false;
286               sects[i].data        = sect_data + i * bps;
287            }
288           
289            build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
290         }
291   }
292   
293   return true;
294}
295
296bool dcp_format::supports_save() const
297{
298   return false;
299}
300
301const floppy_format_type FLOPPY_DCP_FORMAT = &floppy_image_format_creator<dcp_format>;
trunk/src/lib/formats/dcp_dsk.h
r242341r242342
1/*********************************************************************
2
3    formats/dcp_dsk.h
4
5    PC98 DCP & DCU disk images
6
7*********************************************************************/
8
9#ifndef DCP_DSK_H
10#define DCP_DSK_H
11
12#include "flopimg.h"
13
14
15class dcp_format : public floppy_image_format_t
16{
17public:
18   dcp_format();
19
20   virtual int identify(io_generic *io, UINT32 form_factor);
21   virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
22
23   virtual const char *name() const;
24   virtual const char *description() const;
25   virtual const char *extensions() const;
26   virtual bool supports_save() const;
27};
28
29extern const floppy_format_type FLOPPY_DCP_FORMAT;
30
31#endif /* PC98DCP_DSK_H */
trunk/src/lib/formats/dip_dsk.c
r242341r242342
1// license:BSD-3-Clause
2// copyright-holders:etabeta
3/*********************************************************************
4
5    formats/dip_dsk.h
6
7    PC98 DIP disk images
8 
9    0x100 header, followed by track data
10
11    TODO:
12    - Investigate header structure
13    - can this format be used to support different disc types?
14
15*********************************************************************/
16
17#include "emu.h"
18#include "dip_dsk.h"
19
20dip_format::dip_format()
21{
22}
23
24const char *dip_format::name() const
25{
26   return "dip";
27}
28
29const char *dip_format::description() const
30{
31   return "DIP disk image";
32}
33
34const char *dip_format::extensions() const
35{
36   return "dip";
37}
38
39int dip_format::identify(io_generic *io, UINT32 form_factor)
40{
41   UINT64 size = io_generic_size(io);
42
43   if (size == 0x134000 + 0x100)
44      return 100;
45
46   return 0;
47}
48
49bool dip_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
50{
51   int heads, tracks, spt, bps;
52
53   //For the moment we only support this disk structure...
54   //2 sides, 77 tracks, 8 sectors/track, 1024 bytes/sector = 1261568 bytes (360rpm)
55   heads = 2;
56   tracks = 77;
57   spt = 8;
58   bps = 1024;
59   
60   int cell_count = form_factor == floppy_image::FF_35 ? 200000 : 166666;
61   
62   int ssize;
63   for (ssize = 0; (128 << ssize) < bps; ssize++);
64   
65   desc_pc_sector sects[256];
66   UINT8 sect_data[65536];
67   
68   for (int track = 0; track < tracks; track++)
69      for (int head = 0; head < heads; head++)
70      {
71         io_generic_read(io, sect_data, 0x100 + bps * spt * (track * heads + head), bps * spt);
72         
73         for (int i = 0; i < spt; i++)
74         {
75            sects[i].track       = track;
76            sects[i].head        = head;
77            sects[i].sector      = i + 1;
78            sects[i].size        = ssize;
79            sects[i].actual_size = bps;
80            sects[i].deleted     = false;
81            sects[i].bad_crc     = false;
82            sects[i].data        = sect_data + i * bps;
83         }
84         
85         build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
86      }
87
88   return true;
89}
90
91bool dip_format::supports_save() const
92{
93   return false;
94}
95
96const floppy_format_type FLOPPY_DIP_FORMAT = &floppy_image_format_creator<dip_format>;
trunk/src/lib/formats/dip_dsk.h
r242341r242342
1/*********************************************************************
2
3    formats/dip_dsk.h
4
5    PC98DIP disk images
6
7*********************************************************************/
8
9#ifndef DIP_DSK_H
10#define DIP_DSK_H
11
12#include "flopimg.h"
13
14
15class dip_format : public floppy_image_format_t
16{
17public:
18   dip_format();
19
20   virtual int identify(io_generic *io, UINT32 form_factor);
21   virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
22
23   virtual const char *name() const;
24   virtual const char *description() const;
25   virtual const char *extensions() const;
26   virtual bool supports_save() const;
27};
28
29extern const floppy_format_type FLOPPY_DIP_FORMAT;
30
31#endif /* DIP_DSK_H */
trunk/src/lib/formats/fdd_dsk.c
r242341r242342
1// license:BSD-3-Clause
2// copyright-holders:etabeta
3/*********************************************************************
4
5    formats/fdd_dsk.h
6
7    PC98 FDD disk images
8 
9    0xC3FC header, followed by track data
10    Sector map starts at offset 0xDC, with 12bytes for each sector
11
12    Each entry of the sector map has the following structure
13    - 0x0 = track number (if 0xff the sector/track is unformatted/unused)
14    - 0x1 = head number
15    - 0x2 = sector number
16    - 0x3 = sector size (128 << this byte)
17    - 0x4 = fill byte. if it's not 0xff, then this sector in the original
18            disk consisted of this single value repeated for the whole
19            sector size, and the sector is skipped in the .fdd file.
20            if it's 0xff, then this sector is wholly contained in the .fdd
21            file
22    - 0x5 = ??
23    - 0x6 = ??
24    - 0x7 = ??
25    - 0x8-0x0b = absolute offset of the data for this sector, or 0xfffffff
26                 if the sector was skipped in the .fdd (and it has to be
27                 filled with the value at 0x4)
28
29 TODO:
30    - Investigate remaining sector map bytes (maybe related to protections?)
31
32*********************************************************************/
33
34#include "emu.h"
35#include "fdd_dsk.h"
36
37fdd_format::fdd_format()
38{
39}
40
41const char *fdd_format::name() const
42{
43   return "fdd";
44}
45
46const char *fdd_format::description() const
47{
48   return "FDD disk image";
49}
50
51const char *fdd_format::extensions() const
52{
53   return "fdd";
54}
55
56int fdd_format::identify(io_generic *io, UINT32 form_factor)
57{
58   UINT8 h[7];   
59   io_generic_read(io, h, 0, 7);
60   
61   if (strncmp((const char *)h, "VFD1.0", 6) == 0)
62      return 100;
63   
64   return 0;
65}
66
67bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
68{
69   UINT8 hsec[0x0c];   
70   
71   // sector map
72   UINT8 num_secs[160];
73   UINT32 track_sizes[160];
74   UINT8 tracks[160 * 26];
75   UINT8 heads[160 * 26];
76   UINT8 secs[160 * 26];
77   UINT8 fill_vals[160 * 26];
78   UINT32 sec_offs[160 * 26];
79   UINT8 sec_sizes[160 * 26];
80   
81   int pos = 0xdc;
82   
83   for (int track = 0; track < 160; track++)
84   {
85      int curr_num_sec = 0, curr_track_size = 0;
86      for (int sect = 0; sect < 26; sect++)
87      {
88         // read sector map for this sector
89         io_generic_read(io, hsec, pos, 0x0c);
90         pos += 0x0c;
91         
92         if (hsec[0] == 0xff)   // unformatted/unused sector
93            continue;
94         
95         tracks[(track * 26) + sect] = hsec[0];
96         heads[(track * 26) + sect] = hsec[1];
97         secs[(track * 26) + sect] = hsec[2];
98         sec_sizes[(track * 26) + sect] = hsec[3];
99         fill_vals[(track * 26) + sect] = hsec[4];
100         sec_offs[(track * 26) + sect] = LITTLE_ENDIANIZE_INT32(*(UINT32 *)(hsec + 0x08));
101
102         curr_track_size += (128 << hsec[3]);
103         curr_num_sec++;
104      }
105      num_secs[track] = curr_num_sec;
106      track_sizes[track] = curr_track_size;
107   }
108
109   int cell_count = form_factor == floppy_image::FF_35 ? 200000 : 166666;
110   desc_pc_sector sects[256];
111   UINT8 sect_data[65536];
112   int cur_sec_map = 0, sector_size;
113
114   for (int track = 0; track < 160; track++)
115   {     
116      int cur_pos = 0;
117      for (int i = 0; i < num_secs[track]; i++)
118      {
119         cur_sec_map = track * 26 + i;
120         sector_size = 128 << sec_sizes[cur_sec_map];
121
122         if (sec_offs[cur_sec_map] == 0xffffffff)
123            memset(sect_data + cur_pos, fill_vals[cur_sec_map], sector_size);
124         else
125            io_generic_read(io, sect_data + cur_pos, sec_offs[cur_sec_map], sector_size);
126         
127         sects[i].track       = tracks[cur_sec_map];
128         sects[i].head        = heads[cur_sec_map];
129         sects[i].sector      = secs[cur_sec_map];
130         sects[i].size        = sec_sizes[cur_sec_map];
131         sects[i].actual_size = sector_size;
132         sects[i].deleted     = false;
133         sects[i].bad_crc     = false;
134         sects[i].data        = sect_data + cur_pos;
135         cur_pos += sector_size;
136      }
137
138      build_pc_track_mfm(track / 2, track % 2, image, cell_count, num_secs[track], sects, calc_default_pc_gap3_size(form_factor, (128 << sec_sizes[track * 26])));
139   }
140   
141   return true;
142}
143
144bool fdd_format::supports_save() const
145{
146   return false;
147}
148
149const floppy_format_type FLOPPY_FDD_FORMAT = &floppy_image_format_creator<fdd_format>;
trunk/src/lib/formats/fdd_dsk.h
r242341r242342
1/*********************************************************************
2
3    formats/fdd_dsk.h
4
5    PC98 FDD disk images
6
7*********************************************************************/
8
9#ifndef FDD_DSK_H
10#define FDD_DSK_H
11
12#include "flopimg.h"
13
14
15class fdd_format : public floppy_image_format_t
16{
17public:
18   fdd_format();
19
20   virtual int identify(io_generic *io, UINT32 form_factor);
21   virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
22
23   virtual const char *name() const;
24   virtual const char *description() const;
25   virtual const char *extensions() const;
26   virtual bool supports_save() const;
27};
28
29extern const floppy_format_type FLOPPY_FDD_FORMAT;
30
31#endif /* FDD_DSK_H */
trunk/src/lib/formats/nfd_dsk.c
r242341r242342
1// license:BSD-3-Clause
2// copyright-holders:etabeta
3/*********************************************************************
4
5    formats/nfd_dsk.h
6
7    PC98 NFD disk images (info from: http://www.geocities.jp/t98next/dev.html )
8
9    Revision 0
10    ==========
11
12    header structure (variable length > 0x120, header length = DWORD at 0x110)
13    0x000-0x00F = T98FDDIMAGE.R* followed by 2 0x00 bytes, * = format revision (0 or 1 so far)
14    0x010-0x10F = space for image info / comments
15    0x110-0x113 = header length (DWORD)
16    0x114       = write protect (any value > 0 means not writeable)
17    0x115       = number of heads
18    0x116-0x11F = reserved
19    0x120-EOHeader = sector map (0x10 for each sector of the disk!)
20    last 0x10 are fixed to 0x00, probably it marks the end of sector map?
21
22    sector map structure
23    0x0     = track number
24    0x1     = head
25    0x2     = sector number
26    0x3     = sector size (in 128byte chunks)
27    0x4     = MFM/FM (1 = MFM, 0 = FM)?
28    0x5     = DDAM/DAM (1 = DDAM, 0 = DAM)
29    0x6-0x9 = READ DATA (FDDBIOS) Results (Status, St0, St1, St2) ??
30    0xA     = PDA (disk type)
31    0xB-0xF = reserved and equal to 0x00 (possibly available for future format extensions?)
32
33 
34   Revision 1
35    ==========
36 
37    header structure (variable length > 0x120, header length = DWORD at 0x110)
38    0x000-0x11F = same as Rev. 0 format
39   0x120-0x3AF = 164 DWORDs containing, for each track, the absolute position of the sector maps
40                  for sectors of the track. for unformatted/unused tracks 0 is used
41    0x3B0-0x3B3 = absolute position of addintional info in the header, if any
42    0x3B4-0x3BF = reserved
43    0x120-EOHeader = sector map + special data for each track:
44                     first 0x10 of each track = #sectors (WORD), #extra data (WORD), reserved 0xc bytes zeroed
45                     then 0x10 for each sector of this track and 0x10 for each extra data chunk
46
47    sector map structure
48   0x0     = track number
49    0x1     = head
50    0x2     = sector number
51    0x3     = sector size (in 128byte chunks)
52    0x4     = MFM/FM (1 = MFM, 0 = FM)?
53    0x5     = DDAM/DAM (1 = DDAM, 0 = DAM)
54    0x6-0x9 = READ DATA (FDDBIOS) Results (Status, St0, St1, St2) ??
55    0xA     = RETRY DATA (1 = Yes, 0 = No)
56    0xB     = PDA (disk type)
57    0xC-0xF = reserved and equal to 0x00 (possibly available for future format extensions?)
58
59    extra data map structure
60    0x0     = command
61    0x1     = track number
62    0x2     = head
63    0x3     = sector number
64    0x4     = sector size (in 128byte chunks)
65    0x5-0x8 = READ DATA (FDDBIOS) Results (Status, St0, St1, St2) ??
66    0x9     = Number of times to RETRY loading data
67    0xA-0xD = length of RETRY DATA
68    0xE     = PDA (disk type)
69    0xF     = reserved and equal to 0x00 (possibly available for future format extensions?)
70
71    TODO:
72    - add support for write protect header bit? apparently, some disks try to write and
73      fail to boot if they succeed which is the reason this bit was added
74    - add support for DDAM in Rev. 0 (need an image which set it in some sector)
75    - investigate the READ DATA bytes of sector headers
76    - investigate RETRY DATA chunks
77 
78 *********************************************************************/
79
80#include "emu.h"
81#include "nfd_dsk.h"
82
83nfd_format::nfd_format()
84{
85}
86
87const char *nfd_format::name() const
88{
89   return "nfd";
90}
91
92const char *nfd_format::description() const
93{
94   return "NFD disk image";
95}
96
97const char *nfd_format::extensions() const
98{
99   return "nfd";
100}
101
102int nfd_format::identify(io_generic *io, UINT32 form_factor)
103{
104   UINT8 h[16];   
105   io_generic_read(io, h, 0, 16);
106   
107   if (strncmp((const char *)h, "T98FDDIMAGE.R0", 14) == 0 || strncmp((const char *)h, "T98FDDIMAGE.R1", 14) == 0)
108      return 100;
109
110   return 0;
111}
112
113bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
114{
115   UINT64 size = io_generic_size(io);
116   UINT8 h[0x120], hsec[0x10];   
117   io_generic_read(io, h, 0, 0x120);
118   int format_version = !strncmp((const char *)h, "T98FDDIMAGE.R0", 14) ? 0 : 1;
119
120   // sector map (the 164th entry is only used by rev.1 format, loops with track < 163 are correct for rev.0)
121   UINT8 disk_type = 0;
122   UINT8 num_secs[164];
123   UINT8 num_specials[164];
124   UINT32 track_sizes[164];
125   UINT8 tracks[164 * 26];
126   UINT8 heads[164 * 26];
127   UINT8 secs[164 * 26];
128   UINT8 mfm[164 * 26];
129   UINT8 sec_sizes[164 * 26];
130
131   UINT32 hsize = LITTLE_ENDIANIZE_INT32(*(UINT32 *)(h+0x110));
132
133   int pos = 0x120;
134
135   // set up sector map
136   if (format_version == 1)
137   {
138      for (int track = 0; track < 164; track++)
139      {
140         int curr_track_size = 0;
141         // read sector map absolute location
142         io_generic_read(io, hsec, pos, 4);
143         pos += 4;
144         UINT32 secmap_addr = LITTLE_ENDIANIZE_INT32(*(UINT32 *)(hsec));
145
146         if (secmap_addr)
147         {
148            // read actual sector map for the sectors of this track
149            // for rev.1 format the first 0x10 are a track summary:
150            // first WORD is # of sectors, second WORD is # of special data sectors
151            io_generic_read(io, hsec, secmap_addr, 0x10);
152            secmap_addr += 0x10;
153            num_secs[track] = LITTLE_ENDIANIZE_INT16(*(UINT16 *)(hsec));
154            num_specials[track] = LITTLE_ENDIANIZE_INT16(*(UINT16 *)(hsec + 0x2));
155
156            for (int sect = 0; sect < num_secs[track]; sect++)
157            {
158               io_generic_read(io, hsec, secmap_addr, 0x10);
159               
160               if (track == 0 && sect == 0)
161                  disk_type = hsec[0xb];   // can this change across the disk? I don't think so...
162               secmap_addr += 0x10;
163               
164               tracks[(track * 26) + sect] = hsec[0];
165               heads[(track * 26) + sect] = hsec[1];
166               secs[(track * 26) + sect] = hsec[2];
167               sec_sizes[(track * 26) + sect] = hsec[3];
168               mfm[(track * 26) + sect] = hsec[4];
169               
170               curr_track_size += (128 << hsec[3]);
171            }
172
173            if (num_specials[track] > 0)
174            {
175               for (int sect = 0; sect < num_specials[track]; sect++)
176               {
177                  io_generic_read(io, hsec, secmap_addr, 0x10);   
178                  secmap_addr += 0x10;
179                  curr_track_size += (hsec[9] + 1) * LITTLE_ENDIANIZE_INT32(*(UINT32 *)(hsec + 0x0a));
180               }
181            }
182         }
183         else
184         {
185            num_secs[track] = 0;
186            num_specials[track] = 0;
187         }
188         track_sizes[track] = curr_track_size;
189      }
190   }
191   else
192   {
193      for (int track = 0; track < 163 && pos < hsize; track++)
194      {
195         int curr_num_sec = 0, curr_track_size = 0;
196         for (int sect = 0; sect < 26; sect++)
197         {
198            // read sector map for this sector
199            // for rev.0 format each sector uses 0x10 bytes
200            io_generic_read(io, hsec, pos, 0x10);
201
202            if (track == 0 && sect == 0)
203               disk_type = hsec[0xa];   // can this change across the disk? I don't think so...
204            pos += 0x10;
205           
206            if (hsec[0] == 0xff)   // unformatted/unused sector
207               continue;
208           
209            tracks[(track * 26) + sect] = hsec[0];
210            heads[(track * 26) + sect] = hsec[1];
211            secs[(track * 26) + sect] = hsec[2];
212            sec_sizes[(track * 26) + sect] = hsec[3];
213            mfm[(track * 26) + sect] = hsec[4];
214           
215            curr_track_size += (128 << hsec[3]);
216            curr_num_sec++;
217         }
218
219         num_secs[track] = curr_num_sec;
220         track_sizes[track] = curr_track_size;
221      }
222   }
223
224   // shouln't this be set-up depending on disk_type? gaplus does not like having less than 166666 cells
225   int cell_count = form_factor == floppy_image::FF_35 ? 200000 : 166666;
226
227   switch (disk_type)
228   {
229      case 0x10:   // 640K disk, 2DD
230         image->set_variant(floppy_image::DSDD);
231         break;
232      //case 0x30:   // 1.44M disk, ?? (no images found)
233      //   break;
234      case 0x90:   // 1.2M disk, 2HD
235      default:
236         image->set_variant(floppy_image::DSHD);
237         break;
238   }
239
240   desc_pc_sector sects[256];
241   UINT8 sect_data[65536];
242   int cur_sec_map = 0, sector_size;
243   pos = hsize;
244
245   for (int track = 0; track < 163 && pos < size; track++)
246   {
247      io_generic_read(io, sect_data, pos, track_sizes[track]);
248
249      for (int i = 0; i < num_secs[track]; i++)
250      {
251         cur_sec_map = track * 26 + i;
252         sector_size = 128 << sec_sizes[cur_sec_map];
253         sects[i].track       = tracks[cur_sec_map];
254         sects[i].head        = heads[cur_sec_map];
255         sects[i].sector      = secs[cur_sec_map];
256         sects[i].size        = sec_sizes[cur_sec_map];
257         sects[i].actual_size = sector_size;
258         sects[i].deleted     = false;
259         sects[i].bad_crc     = false;
260         sects[i].data        = sect_data + i * sector_size;
261      }
262      pos += track_sizes[track];
263
264      // notice that the operation below might fail if sectors of the same track have variable sec_sizes,
265      // because the gap3 calculation would account correctly only for the first sector...
266      // examined images had constant sec_sizes in the each track, so probably this is not an issue
267      if (mfm[track * 26])
268         build_pc_track_mfm(track / 2, track % 2, image, cell_count, num_secs[track], sects, calc_default_pc_gap3_size(form_factor, (128 << sec_sizes[track * 26])));
269      else
270         build_pc_track_fm(track / 2, track % 2, image, cell_count, num_secs[track], sects, calc_default_pc_gap3_size(form_factor, (128 << sec_sizes[track * 26])));
271   }
272   
273   return true;
274}
275
276bool nfd_format::supports_save() const
277{
278   return false;
279}
280
281const floppy_format_type FLOPPY_NFD_FORMAT = &floppy_image_format_creator<nfd_format>;
trunk/src/lib/formats/nfd_dsk.h
r242341r242342
1/*********************************************************************
2
3    formats/nfd_dsk.h
4
5    PC98 NFD disk images
6
7*********************************************************************/
8
9#ifndef NFD_DSK_H
10#define NFD_DSK_H
11
12#include "flopimg.h"
13
14
15class nfd_format : public floppy_image_format_t
16{
17public:
18   nfd_format();
19
20   virtual int identify(io_generic *io, UINT32 form_factor);
21   virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
22
23   virtual const char *name() const;
24   virtual const char *description() const;
25   virtual const char *extensions() const;
26   virtual bool supports_save() const;
27};
28
29extern const floppy_format_type FLOPPY_NFD_FORMAT;
30
31#endif /* NFD_DSK_H */
trunk/src/lib/formats/pc98_dsk.c
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7575   },
7676   {   /* 2880K 3 1/2 inch extended density - gaps unverified */
7777      floppy_image::FF_35,  floppy_image::DSED, floppy_image::MFM,
78      500, 36, 80, 2, 512, {}, 1, {}, 80, 50, 41, 80
78         500, 36, 80, 2, 512, {}, 1, {}, 80, 50, 41, 80
7979   },
8080   {
8181      floppy_image::FF_525,  floppy_image::DSHD, floppy_image::MFM,
trunk/src/lib/lib.mak
r242341r242342
138138   $(LIBOBJ)/formats/d81_dsk.o     \
139139   $(LIBOBJ)/formats/d82_dsk.o     \
140140   $(LIBOBJ)/formats/d88_dsk.o     \
141   $(LIBOBJ)/formats/dcp_dsk.o     \
142141   $(LIBOBJ)/formats/dfi_dsk.o     \
143142   $(LIBOBJ)/formats/dim_dsk.o     \
144   $(LIBOBJ)/formats/dip_dsk.o     \
145143   $(LIBOBJ)/formats/dmk_dsk.o     \
146144   $(LIBOBJ)/formats/dmv_dsk.o     \
147145   $(LIBOBJ)/formats/dsk_dsk.o     \
r242341r242342
150148   $(LIBOBJ)/formats/esq16_dsk.o   \
151149   $(LIBOBJ)/formats/fc100_cas.o   \
152150   $(LIBOBJ)/formats/fdi_dsk.o     \
153   $(LIBOBJ)/formats/fdd_dsk.o     \
154151   $(LIBOBJ)/formats/flex_dsk.o    \
155152   $(LIBOBJ)/formats/fm7_cas.o     \
156153   $(LIBOBJ)/formats/fmsx_cas.o    \
r242341r242342
178175   $(LIBOBJ)/formats/nanos_dsk.o   \
179176   $(LIBOBJ)/formats/naslite_dsk.o \
180177   $(LIBOBJ)/formats/nes_dsk.o     \
181   $(LIBOBJ)/formats/nfd_dsk.o     \
182178   $(LIBOBJ)/formats/orao_cas.o    \
183179   $(LIBOBJ)/formats/oric_dsk.o    \
184180   $(LIBOBJ)/formats/oric_tap.o    \
trunk/src/mame/drivers/gts1.c
r242341r242342
6767
6868
6969#include "machine/genpin.h"
70#include "machine/r10696.h"
7170#include "machine/r10788.h"
7271#include "cpu/pps4/pps4.h"
7372#include "gts1.lh"
r242341r242342
9392    DECLARE_WRITE8_MEMBER(gts1_display_w);
9493    DECLARE_READ8_MEMBER (gts1_io_r);
9594    DECLARE_WRITE8_MEMBER(gts1_io_w);
96    DECLARE_READ8_MEMBER (gts1_lamp_apm_r);
97    DECLARE_WRITE8_MEMBER(gts1_lamp_apm_w);
98    DECLARE_READ8_MEMBER (gts1_nvram_r);
99    DECLARE_WRITE8_MEMBER(gts1_nvram_w);
10095    DECLARE_READ8_MEMBER (gts1_pa_r);
10196    DECLARE_WRITE8_MEMBER(gts1_pa_w);
10297    DECLARE_WRITE8_MEMBER(gts1_pb_w);
r242341r242342
10499    virtual void machine_reset();
105100    required_device<cpu_device> m_maincpu;
106101    UINT8 m_io[256];
107    UINT8 m_nvram_addr;
108    UINT16 m_6351_addr;
109    UINT16 m_z30_out;
102    UINT8 m_6351_addr;
110103};
111104
112105static ADDRESS_MAP_START( gts1_map, AS_PROGRAM, 8, gts1_state )
r242341r242342
118111ADDRESS_MAP_END
119112
120113static ADDRESS_MAP_START( gts1_io, AS_IO, 8, gts1_state )
121    AM_RANGE(0x0030, 0x003f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U3) solenoid + dips
122    AM_RANGE(0x0060, 0x006f) AM_DEVREADWRITE ( "r10696", r10696_device, io_r, io_w ) // (U2) NVRAM io chip
123    AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w ) // (U6) display chip
114    AM_RANGE(0x00d0, 0x00df) AM_DEVREADWRITE ( "r10788", r10788_device, io_r, io_w )
124115    AM_RANGE(0x0000, 0x00ff) AM_READ ( gts1_io_r )   AM_WRITE( gts1_io_w ) // connects to all the other chips
116
125117    AM_RANGE(0x0100, 0x0100) AM_READ ( gts1_pa_r ) AM_WRITE( gts1_pa_w )
126118    AM_RANGE(0x0101, 0x0101) AM_WRITE(gts1_pb_w)
127119ADDRESS_MAP_END
r242341r242342
208200
209201void gts1_state::machine_reset()
210202{
211    m_nvram_addr = 0;
212203    m_6351_addr = 0;
213    m_z30_out = 0;
214204}
215205
216206DRIVER_INIT_MEMBER(gts1_state,gts1)
r242341r242342
284274#undef _h
285275}
286276
287/**
288 * @brief read input groups A, B, C of NVRAM io chip (U2)
289 * @param offset 0 ... 2 = group
290 * @return 4-bit value read from the group
291 */
292READ8_MEMBER (gts1_state::gts1_nvram_r)
293{
294    UINT8 data = 0x0f;
295    switch (offset)
296    {
297        case 0: // group A
298            // FIXME: Schematics says TO Z5
299            break;
300        case 1: // group B
301        case 2: // group C
302            // Schematics says: SPARES
303            break;
304    }
305    return data;
306}
307
308/**
309 * @brief write output groups A, B, C of NVRAM io chip (U2)
310 * @param offset 0 ... 2 = group
311 * @param data 4 bit value to write
312 */
313WRITE8_MEMBER(gts1_state::gts1_nvram_w)
314{
315    switch (offset)
316    {
317        case 0: // group A - address lines 3:0
318            m_nvram_addr = (m_nvram_addr & ~15) | (data & 15);
319            break;
320        case 1: // group B - address lines 7:4
321            m_nvram_addr = (m_nvram_addr & ~(15 << 4)) | ((data & 15) << 4);
322            break;
323        case 2: // group C - data bits 3:0 of NVRAM
324            // FIXME: schematics says write enable is U4-36 (O14)
325            LOG(("%s: nvram[%02x] <- %x\n", __FUNCTION__, m_nvram_addr, data & 15));
326            break;
327    }
328}
329
330/**
331 * @brief read input groups A, B, C of lamp + apm I/O chip (U3)
332 * @param offset 0 ... 2 = group
333 * @return 4-bit value read from the group
334 */
335READ8_MEMBER (gts1_state::gts1_lamp_apm_r)
336{
337    UINT8 data = 0x0f;
338    switch (offset) {
339        case 0: // group A switches S01-S04, S09-S12, S17-S20
340            if (m_z30_out & 1) {
341                UINT8 dsw0 = ioport("DSW0")->read();
342                if (0 == BIT(dsw0,0)) // S01
343                    data &= ~(1 << 3);
344                if (0 == BIT(dsw0,1)) // S02
345                    data &= ~(1 << 2);
346                if (0 == BIT(dsw0,2)) // S03
347                    data &= ~(1 << 1);
348                if (0 == BIT(dsw0,3)) // S04
349                    data &= ~(1 << 0);
350            }
351            if (m_z30_out & 2) {
352                UINT8 dsw1 = ioport("DSW1")->read();
353                if (0 == BIT(dsw1,0)) // S09
354                    data &= ~(1 << 0);
355                if (0 == BIT(dsw1,1)) // S10
356                    data &= ~(1 << 1);
357                if (0 == BIT(dsw1,2)) // S11
358                    data &= ~(1 << 2);
359                if (0 == BIT(dsw1,3)) // S12
360                    data &= ~(1 << 3);
361            }
362            if (m_z30_out & 4) {
363                UINT8 dsw2 = ioport("DSW2")->read();
364                if (0 == BIT(dsw2,0)) // S17
365                    data &= ~(1 << 0);
366                if (0 == BIT(dsw2,1)) // S18
367                    data &= ~(1 << 1);
368                if (0 == BIT(dsw2,2)) // S19
369                    data &= ~(1 << 2);
370                if (0 == BIT(dsw2,3)) // S20
371                    data &= ~(1 << 3);
372            }
373            break;
374        case 1: // group B switches S05-S08, S09-S12, S17-S20
375            if (m_z30_out & 1) {
376                UINT8 dsw0 = ioport("DSW0")->read();
377                if (0 == BIT(dsw0,4)) // S05
378                    data &= ~(1 << 3);
379                if (0 == BIT(dsw0,5)) // S06
380                    data &= ~(1 << 2);
381                if (0 == BIT(dsw0,6)) // S07
382                    data &= ~(1 << 1);
383                if (0 == BIT(dsw0,7)) // S08
384                    data &= ~(1 << 0);
385            }
386            if (m_z30_out & 2) {
387                UINT8 dsw1 = ioport("DSW1")->read();
388                if (0 == BIT(dsw1,4)) // S13
389                    data &= ~(1 << 0);
390                if (0 == BIT(dsw1,5)) // S14
391                    data &= ~(1 << 1);
392                if (0 == BIT(dsw1,6)) // S15
393                    data &= ~(1 << 2);
394                if (0 == BIT(dsw1,7)) // S16
395                    data &= ~(1 << 3);
396            }
397            if (m_z30_out & 4) {
398                UINT8 dsw2 = ioport("DSW2")->read();
399                if (0 == BIT(dsw2,4)) // S21
400                    data &= ~(1 << 0);
401                if (0 == BIT(dsw2,5)) // S22
402                    data &= ~(1 << 1);
403                if (0 == BIT(dsw2,6)) // S23
404                    data &= ~(1 << 2);
405                if (0 == BIT(dsw2,7)) // S24
406                    data &= ~(1 << 3);
407            }
408            break;
409        case 2: // TODO: connect
410            // IN-9 (unused?)
411            // IN-10 (reset sw25)
412            // IN-11 (outhole sw)
413            // IN-12 (slam sw)
414            break;
415    }
416    return data;
417}
418
419/**
420 * @brief write output groups A, B, C of lamp + apm I/O chip (U3)
421 * @param offset 0 ... 2 = group
422 * @param data 4 bit value to write
423 */
424WRITE8_MEMBER(gts1_state::gts1_lamp_apm_w)
425{
426    switch (offset) {
427        case 0: // LD1-LD4 on jumper J5
428            break;
429        case 1: // Z30 1-of-16 decoder
430            m_z30_out = 1 << (data & 15);
431            break;
432        case 2: // O9: PGOL PROM A8, O10: PGOL PROM A9
433            m_6351_addr = (m_6351_addr & ~(3 << 8)) | ((data & 3) << 8);
434            // O11 and O12 are unused(?)
435            break;
436    }
437}
438
439277READ8_MEMBER (gts1_state::gts1_io_r)
440278{
441279    UINT8 data = m_io[offset] & 0x0f;
r242341r242342
482320
483321    //MCFG_NVRAM_ADD_0FILL("nvram")
484322
485    /* General Purpose Input/Output */
486    MCFG_DEVICE_ADD( "r10696", R10696, 0 )
487    MCFG_R10696_IO( READ8 (gts1_state,gts1_nvram_r),
488                    WRITE8(gts1_state,gts1_nvram_w) )
489
490323    /* General Purpose Display and Keyboard */
491324    MCFG_DEVICE_ADD( "r10788", R10788, XTAL_3_579545MHz / 18 )  // divided in the circuit
492325    MCFG_R10788_UPDATE( WRITE8(gts1_state,gts1_display_w) )
trunk/src/mame/drivers/viper.c
r242341r242342
8484                (application register reads all 0xFF and the status register reads back 0xFF), so it's probably safe
8585                to assume they're not used on any of them.
8686                It appears the DS2430 is not protected from reading and the unique silicon serial number is
87                included in the 40 byte dump. This serial number is used as a check to verify the NVRAM and DS2430.
88                In the Police 911 2 NVRAM dump the serial number of the DS2430 is located at 0x002A and 0x1026
89                If the serial number in the NVRAM and DS2430 match then they are paired and the game accepts the NVRAM.
90                If they don't match the game requires an external DS2430 (i.e. dongle) and flags the NVRAM as 'BAD'
91                The serial number is not present in the CF card (2 different Police 911 2 cards of the same version
92                were dumped and matched).
87                included in the 40 byte dump. In the Police 911 2 NVRAM dump the serial number is located at both 0x002A and 0x1026
88                so that means it is tied to the DS2430. If the serial number in the NVRAM and DS2430 match then they are
89                paired. The same serial number is likely present in the CF card image and a compare is done there too.
90                If they don't match the game requires an external DS2430 (i.e. dongle)
9391                When the lasered ROM is read from the DS2430, it comes out from LSB to MSB (family code, LSB of
9492                S/N->MSB of S/N, CRC)
9593                For Police 911 2 that is 0x14 0xB2 0xB7 0x4A 0x00 0x00 0x00 0x83
r242341r242342
104102                It may be possible to hand craft a DS2430 for a dongle-protected version of a game simply by using
105103                one of the existing DS2430 dumps and adjusting the serial number found in a dump of the NVRAM to pair them
106104                or adjusting the serial number in the NVRAM to match the serial number found in one of the dumped DS2430s.
107                This Police 911 2 board was upgraded from Police 911 by plugging in the dongle and changing the CF card.
108                The NVRAM had previously died and the board was dead. Normally for a Viper game that is fatal. Using
109                the NVRAM from Police 911 allowed it to boot and then the NVRAM upgraded itself with some additional
110                data (the original data remained untouched). This means the dongle does more than just protect the game.
111                Another interesting fact about this upgrade is it has been discovered that the PCB can write to the
112                external DS2430 in the dongle. This has been proven because the serial number of the DS2430 soldered
113                on the PCB is present in the EEPROM area of the Police 911 2 DS2430.
114                Here is a dump of the DS2430 from Police 911. Note the EEPROM area is empty and the serial number (from 0x20 onwards)
115                is present in the above Police 911 2 DS2430 dump at locations 0x11, 0x10 and 0x0F
116                00000000h FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
117                00000010h FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
118                00000020h 14 A9 30 74 00 00 00 E7
119                This proves that the EEPROM area in the DS2430 is unused by an unprotected game and in fact the on-board
120                DS2430 is completely unused by an unprotected game. That is why any unprotected game will work on any
121                Viper PCB regardless of the on-board DS2430 serial number.
122                The existing DS2430 'common' dump used in the unprotected games was actually from a (dongle-protected)
123                Mahjong Fight Club PCB but that PCB was used to test and run all of the unprotected Viper games.
124105      M48T58Y - ST Microelectronics M48T58Y Timekeeper RAM (DIP28 @ U39). When this dies (after 10 year lifespan)
125106                the game will complain with error RTC BAD then reset. The data inside the RTC can not be hand created
126107                (yet) so to revive the PCB the correct RTC data must be re-programmed to a new RTC and replaced
r242341r242342
133114                required and plugged in it overrides the DS2430 on the main board. Without the (on-board)
134115                DS2430 the PCB will complain after the CF check with HARDWARE ERROR. If the DS2430 is not
135116                correct for the game the error given is RTC BAD even if the RTC is correct. Most games don't require
136                a dongle and accept any DS2430 on the main board.
117                a dongle and use the factory DS2430 on the main board.
137118         CN12 - 4 pin connector (possibly stereo audio output?)
138119         CN13 - Power connector for plug-in daughterboard
139120    CN15/CN16 - Multi-pin IDC connectors for plug-in daughterboard (see detail below)
trunk/src/mame/layout/gts1.lay
r242341r242342
2929      </backdrop>
3030
3131      <!-- Top Row -->
32      <bezel name="digit8_5" element="digit8_">
32      <bezel name="digit8_0" element="digit8_">
3333         <bounds left="10" top="45" right="30" bottom="84" />
3434      </bezel>
35      <bezel name="digit8_4" element="digit8_">
35      <bezel name="digit8_1" element="digit8_">
3636         <bounds left="34" top="45" right="54" bottom="84" />
3737      </bezel>
38      <bezel name="digit8_3" element="digit8_">
38      <bezel name="digit8_2" element="digit8_">
3939         <bounds left="58" top="45" right="78" bottom="84" />
4040      </bezel>
41      <bezel name="digit8_2" element="digit8_">
41      <bezel name="digit8_3" element="digit8_">
4242         <bounds left="87" top="45" right="107" bottom="84" />
4343      </bezel>
44      <bezel name="digit8_1" element="digit8_">
44      <bezel name="digit8_4" element="digit8_">
4545         <bounds left="111" top="45" right="131" bottom="84" />
4646      </bezel>
47      <bezel name="digit8_0" element="digit8_">
47      <bezel name="digit8_5" element="digit8_">
4848         <bounds left="135" top="45" right="155" bottom="84" />
4949      </bezel>
50      <bezel name="digit8_13" element="digit8_">
50      <bezel name="digit8_8" element="digit8_">
5151         <bounds left="170" top="45" right="190" bottom="84" />
5252      </bezel>
53      <bezel name="digit8_12" element="digit8_">
53      <bezel name="digit8_9" element="digit8_">
5454         <bounds left="194" top="45" right="214" bottom="84" />
5555      </bezel>
56      <bezel name="digit8_11" element="digit8_">
56      <bezel name="digit8_10" element="digit8_">
5757         <bounds left="218" top="45" right="238" bottom="84" />
5858      </bezel>
59      <bezel name="digit8_10" element="digit8_">
59      <bezel name="digit8_11" element="digit8_">
6060         <bounds left="247" top="45" right="267" bottom="84" />
6161      </bezel>
62      <bezel name="digit8_9" element="digit8_">
62      <bezel name="digit8_12" element="digit8_">
6363         <bounds left="271" top="45" right="291" bottom="84" />
6464      </bezel>
65      <bezel name="digit8_8" element="digit8_">
65      <bezel name="digit8_13" element="digit8_">
6666         <bounds left="295" top="45" right="315" bottom="84" />
6767      </bezel>
6868
6969      <!-- Bottom Row -->
70      <bezel name="digit8_21" element="digit8_">
70      <bezel name="digit8_16" element="digit8_">
7171         <bounds left="10" top="100" right="30" bottom="139" />
7272      </bezel>
73      <bezel name="digit8_20" element="digit8_">
73      <bezel name="digit8_17" element="digit8_">
7474         <bounds left="34" top="100" right="54" bottom="139" />
7575      </bezel>
76      <bezel name="digit8_19" element="digit8_">
76      <bezel name="digit8_18" element="digit8_">
7777         <bounds left="58" top="100" right="78" bottom="139" />
7878      </bezel>
79      <bezel name="digit8_18" element="digit8_">
79      <bezel name="digit8_19" element="digit8_">
8080         <bounds left="87" top="100" right="107" bottom="139" />
8181      </bezel>
82      <bezel name="digit8_17" element="digit8_">
82      <bezel name="digit8_20" element="digit8_">
8383         <bounds left="111" top="100" right="131" bottom="139" />
8484      </bezel>
85      <bezel name="digit8_16" element="digit8_">
85      <bezel name="digit8_21" element="digit8_">
8686         <bounds left="135" top="100" right="155" bottom="139" />
8787      </bezel>
8888      <!-- Digits 22 and 23 are not used -->
89      <bezel name="digit8_29" element="digit8_">
89      <bezel name="digit8_24" element="digit8_">
9090         <bounds left="170" top="100" right="190" bottom="139" />
9191      </bezel>
92      <bezel name="digit8_28" element="digit8_">
92      <bezel name="digit8_25" element="digit8_">
9393         <bounds left="194" top="100" right="214" bottom="139" />
9494      </bezel>
95      <bezel name="digit8_27" element="digit8_">
95      <bezel name="digit8_26" element="digit8_">
9696         <bounds left="218" top="100" right="238" bottom="139" />
9797      </bezel>
98      <bezel name="digit8_26" element="digit8_">
98      <bezel name="digit8_27" element="digit8_">
9999         <bounds left="247" top="100" right="267" bottom="139" />
100100      </bezel>
101      <bezel name="digit8_25" element="digit8_">
101      <bezel name="digit8_28" element="digit8_">
102102         <bounds left="271" top="100" right="291" bottom="139" />
103103      </bezel>
104      <bezel name="digit8_24" element="digit8_">
104      <bezel name="digit8_29" element="digit8_">
105105         <bounds left="295" top="100" right="315" bottom="139" />
106106      </bezel>
107107      <!-- Digits 30 and 31 are not used -->
108108
109109      <!-- 4 digit display -->
110      <bezel name="digit7_15" element="digit7_">
110      <bezel name="digit7_6" element="digit7_">
111111         <bounds left="121" top="155" right="136" bottom="189" />
112112      </bezel>
113      <bezel name="digit7_14" element="digit7_">
113      <bezel name="digit7_7" element="digit7_">
114114         <bounds left="140" top="155" right="155" bottom="189" />
115115      </bezel>
116      <bezel name="digit7_7" element="digit7_">
116      <bezel name="digit7_14" element="digit7_">
117117         <bounds left="170" top="155" right="185" bottom="189" />
118118      </bezel>
119      <bezel name="digit7_6" element="digit7_">
119      <bezel name="digit7_15" element="digit7_">
120120         <bounds left="189" top="155" right="204" bottom="189" />
121121      </bezel>
122122   </view>
trunk/src/mame/mame.mak
r242341r242342
499499MACHINES += PIC8259
500500MACHINES += PIT8253
501501MACHINES += PLA
502MACHINES += R10696
503502MACHINES += R10788
504503#MACHINES += PROFILE
505504#MACHINES += R64H156
trunk/src/mess/drivers/a5105.c
r242341r242342
7373   DECLARE_WRITE8_MEMBER( a5105_upd765_w );
7474   DECLARE_WRITE8_MEMBER(pcg_addr_w);
7575   DECLARE_WRITE8_MEMBER(pcg_val_w);
76   required_shared_ptr<UINT16> m_video_ram;
76   required_shared_ptr<UINT8> m_video_ram;
7777   UINT8 *m_ram_base;
7878   UINT8 *m_rom_base;
7979   UINT8 *m_char_ram;
r242341r242342
100100   int xi,gfx;
101101   UINT8 pen;
102102
103   gfx = m_video_ram[(address & 0x1ffff) >> 1];
103   gfx = m_video_ram[address & 0x1ffff];
104104
105   for(xi=0;xi<16;xi++)
105   for(xi=0;xi<8;xi++)
106106   {
107107      pen = ((gfx >> xi) & 1) ? 7 : 0;
108108
r242341r242342
120120
121121   for( x = 0; x < pitch; x++ )
122122   {
123      tile = (m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] & 0xff);
124      color = ((m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] >> 8) & 0x0f);
123      tile = (m_video_ram[((addr+x)*2) & 0x1ffff] & 0xff);
124      color = (m_video_ram[((addr+x)*2+1) & 0x1ffff] & 0x0f);
125125
126126      for( yi = 0; yi < lr; yi++)
127127      {
r242341r242342
533533   m_char_ram = memregion("pcg")->base();
534534}
535535
536static ADDRESS_MAP_START( upd7220_map, AS_0, 16, a5105_state)
536static ADDRESS_MAP_START( upd7220_map, AS_0, 8, a5105_state)
537537   ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
538538   AM_RANGE(0x00000, 0x1ffff) AM_RAM AM_SHARE("video_ram")
539539ADDRESS_MAP_END
trunk/src/mess/drivers/apc.c
r242341r242342
9999   UINT8 *m_char_rom;
100100   UINT8 *m_aux_pcg;
101101
102   required_shared_ptr<UINT16> m_video_ram_1;
103   required_shared_ptr<UINT16> m_video_ram_2;
102   required_shared_ptr<UINT8> m_video_ram_1;
103   required_shared_ptr<UINT8> m_video_ram_2;
104104
105105   required_device<palette_device> m_palette;
106106
r242341r242342
210210//      tile_addr = addr+(x*(m_video_ff[WIDTH40_REG]+1));
211211      tile_addr = addr+(x*(1));
212212
213      tile = (m_video_ram_1[((tile_addr*2) & 0x1fff) >> 1] >> 8) & 0x00ff;
214      tile_sel = m_video_ram_1[((tile_addr*2) & 0x1fff) >> 1] & 0x00ff;
215      attr = (m_video_ram_1[((tile_addr*2 & 0x1fff) | 0x2000) >> 1] & 0x00ff);
213      tile = m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0x00ff;
214      tile_sel = m_video_ram_1[(tile_addr*2) & 0x1fff] & 0x00ff;
215      attr = (m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0x00ff);
216216
217217      u_line = attr & 0x01;
218218      o_line = attr & 0x02;
r242341r242342
784784
785785
786786
787static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, apc_state)
787static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, apc_state)
788788   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_1")
789789ADDRESS_MAP_END
790790
791static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, apc_state )
791static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, apc_state )
792792   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
793793ADDRESS_MAP_END
794794
trunk/src/mess/drivers/asst128.c
r242341r242342
8484ADDRESS_MAP_END
8585
8686static SLOT_INTERFACE_START( asst128_floppies )
87      SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
87   SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD )
8888SLOT_INTERFACE_END
8989
9090FLOPPY_FORMATS_MEMBER( asst128_state::asst128_formats )
trunk/src/mess/drivers/compis.c
r242341r242342
312312//  ADDRESS_MAP( upd7220_map )
313313//-------------------------------------------------
314314
315static ADDRESS_MAP_START( upd7220_map, AS_0, 16, compis_state )
315static ADDRESS_MAP_START( upd7220_map, AS_0, 8, compis_state )
316316   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
317317   AM_RANGE(0x00000, 0x7fff) AM_RAM AM_SHARE("video_ram")
318318ADDRESS_MAP_END
r242341r242342
451451
452452UPD7220_DISPLAY_PIXELS_MEMBER( compis_state::hgdc_display_pixels )
453453{
454   UINT16 i,gfx = m_video_ram[(address & 0x7fff) >> 1];
454   UINT8 i,gfx = m_video_ram[(address & 0x7fff)];
455455   const pen_t *pen = m_palette->pens();
456456
457   for(i=0; i<16; i++)
458      bitmap.pix32(y, x + i) = pen[BIT(gfx, i)];
457   for(i=0; i<8; i++)
458      bitmap.pix32(y, x + i) = pen[BIT(gfx, 7 - i)];
459459}
460460
461461
trunk/src/mess/drivers/dmv.c
r242341r242342
7373   required_device<floppy_connector> m_floppy1;
7474   required_device<dmv_keyboard_device> m_keyboard;
7575   required_device<speaker_sound_device> m_speaker;
76   required_shared_ptr<UINT16> m_video_ram;
76   required_shared_ptr<UINT8> m_video_ram;
7777   required_device<palette_device> m_palette;
7878   required_memory_region m_ram;
7979   required_memory_region m_bootrom;
r242341r242342
286286   if (m_color_mode)
287287   {
288288      // 96KB videoram (32KB green + 32KB red + 32KB blue)
289      UINT16 green = m_video_ram[(0x00000 + (address & 0x7fff)) >> 1];
290      UINT16 red   = m_video_ram[(0x08000 + (address & 0x7fff)) >> 1];
291      UINT16 blue  = m_video_ram[(0x10000 + (address & 0x7fff)) >> 1];
289      UINT8 green = m_video_ram[0x00000 + (address & 0x7fff)];
290      UINT8 red   = m_video_ram[0x08000 + (address & 0x7fff)];
291      UINT8 blue  = m_video_ram[0x10000 + (address & 0x7fff)];
292292
293      for(int xi=0; xi<16; xi++)
293      for(int xi=0; xi<8; xi++)
294294      {
295         int r = ((red   >> xi) & 1) ? 255 : 0;
296         int g = ((green >> xi) & 1) ? 255 : 0;
297         int b = ((blue  >> xi) & 1) ? 255 : 0;
295         int r = ((red   >> (7-xi)) & 1) ? 255 : 0;
296         int g = ((green >> (7-xi)) & 1) ? 255 : 0;
297         int b = ((blue  >> (7-xi)) & 1) ? 255 : 0;
298298
299299         if (bitmap.cliprect().contains(x + xi, y))
300300            bitmap.pix32(y, x + xi) = rgb_t(r, g, b);
r242341r242342
305305      const rgb_t *palette = m_palette->palette()->entry_list_raw();
306306
307307      // 32KB videoram
308      UINT16 gfx = m_video_ram[(address & 0xffff) >> 1];
308      UINT8 gfx = m_video_ram[address & 0xffff];
309309
310      for(int xi=0;xi<16;xi++)
310      for(int xi=0;xi<8;xi++)
311311      {
312312         if (bitmap.cliprect().contains(x + xi, y))
313            bitmap.pix32(y, x + xi) = ((gfx >> xi) & 1) ? palette[1] : palette[0];
313            bitmap.pix32(y, x + xi) = ((gfx >> (7-xi)) & 1) ? palette[1] : palette[0];
314314      }
315315   }
316316}
r242341r242342
319319{
320320   for( int x = 0; x < pitch; x++ )
321321   {
322      UINT8 tile = m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] & 0xff;
323      UINT8 attr = m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] >> 8;
322      UINT8 tile = m_video_ram[((addr+x)*2) & 0x1ffff] & 0xff;
323      UINT8 attr = m_video_ram[((addr+x)*2 + 1) & 0x1ffff] & 0xff;
324324
325325      rgb_t bg, fg;
326326      if (m_color_mode)
r242341r242342
554554   AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_mcu_port2_w)
555555ADDRESS_MAP_END
556556
557static ADDRESS_MAP_START( upd7220_map, AS_0, 16, dmv_state )
557static ADDRESS_MAP_START( upd7220_map, AS_0, 8, dmv_state )
558558   ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
559559   AM_RANGE(0x00000, 0x1ffff) AM_RAM  AM_SHARE("video_ram")
560560ADDRESS_MAP_END
trunk/src/mess/drivers/ec184x.c
r242341r242342
202202
203203static ADDRESS_MAP_START( ec1847_io, AS_IO, 8, ec184x_state )
204204   ADDRESS_MAP_UNMAP_HIGH
205//  AM_RANGE(0x0210, 0x021f) AM_RAM // internal (non-standard?) bus extender
205//   AM_RANGE(0x0210, 0x021f) AM_RAM // internal (non-standard?) bus extender
206206ADDRESS_MAP_END
207207
208208
r242341r242342
252252   MCFG_CPU_IO_MAP(ec1841_io)
253253   MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mb:pic8259", pic8259_device, inta_cb)
254254
255//  MCFG_MACHINE_START_OVERRIDE(ec184x_state, ec184x)
256255   MCFG_MACHINE_RESET_OVERRIDE(ec184x_state, ec184x)
257256
258257   MCFG_EC1841_MOTHERBOARD_ADD("mb", "maincpu")
trunk/src/mess/drivers/excali64.c
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33/***************************************************************************
44
55Excalibur 64 kit computer, designed and sold in Australia by BGR Computers.
6The official schematics have a LOT of errors and omissions.
76
87Skeleton driver created on 2014-12-09.
98
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1615- Some keys can be connected to more than one position in the matrix. Need to
1716  determine the correct positions.
1817- The position of the "Line Insert" key is unknown.
19- Colours are approximate.
18- PCGEN command not working.
19- Colours are wrong (colour prom needs to be dumped)
2020- Disk controller
21- ROM banking
21- Banking
2222- The schematic shows the audio counter connected to 2MHz, but this produces
2323  sounds that are too high. Connected to 1MHz for now.
2424- Serial
2525- Parallel / Centronics
2626- Need software
27- Pasting can sometimes drop a character.
27- Pasting can drop a character or two at the start of a line.
28- Clock change for crtc
2829
2930****************************************************************************/
3031
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5455      , m_io_keyboard(*this, "KEY")
5556   { }
5657
58   DECLARE_DRIVER_INIT(excali64);
5759   DECLARE_PALETTE_INIT(excali64);
5860   DECLARE_WRITE8_MEMBER(ppib_w);
5961   DECLARE_READ8_MEMBER(ppic_r);
r242341r242342
6163   DECLARE_READ8_MEMBER(port00_r);
6264   DECLARE_READ8_MEMBER(port50_r);
6365   DECLARE_WRITE8_MEMBER(port70_w);
66   DECLARE_WRITE8_MEMBER(video_w);
6467   MC6845_UPDATE_ROW(update_row);
6568   DECLARE_WRITE_LINE_MEMBER(crtc_de);
6669   DECLARE_WRITE_LINE_MEMBER(crtc_vs);
67   DECLARE_MACHINE_RESET(excali64);
70
6871   required_device<palette_device> m_palette;
6972   
7073private:
7174   const UINT8 *m_p_chargen;
7275   UINT8 *m_p_videoram;
73   UINT8 *m_p_hiresram;
7476   UINT8 m_sys_status;
7577   UINT8 m_kbdrow;
7678   bool m_crtc_vs;
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8284};
8385
8486static ADDRESS_MAP_START(excali64_mem, AS_PROGRAM, 8, excali64_state)
85   AM_RANGE(0x0000, 0x1FFF) AM_READ_BANK("bankr1") AM_WRITE_BANK("bankw1")
86   AM_RANGE(0x2000, 0x2FFF) AM_READ_BANK("bankr2") AM_WRITE_BANK("bankw2")
87   AM_RANGE(0x3000, 0x3FFF) AM_READ_BANK("bankr3") AM_WRITE_BANK("bankw3")
88   AM_RANGE(0x4000, 0x4FFF) AM_READ_BANK("bankr4") AM_WRITE_BANK("bankw4")
89   AM_RANGE(0x5000, 0xFFFF) AM_RAM AM_REGION("rambank", 0x5000)
87   AM_RANGE(0x0000, 0x1FFF) AM_ROM
88   AM_RANGE(0x2000, 0x3FFF) AM_ROM AM_WRITE(video_w)
89   AM_RANGE(0x4000, 0xFFFF) AM_RAM
9090ADDRESS_MAP_END
9191
9292static ADDRESS_MAP_START(excali64_io, AS_IO, 8, excali64_state)
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103103ADDRESS_MAP_END
104104
105105
106// Keyboard matrix is not included in schematics, so some guesswork
106/* Input ports */
107107static INPUT_PORTS_START( excali64 )
108108   PORT_START("KEY.0")    /* line 0 */
109109   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') PORT_CHAR(0x12)
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198198   return data;
199199}
200200
201WRITE8_MEMBER( excali64_state::ppic_w )
202{
203   m_cass->output(BIT(data, 7) ? -1.0 : +1.0);
204}
205
206201READ8_MEMBER( excali64_state::port00_r )
207202{
208203   UINT8 data = 0xff;
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220215d0 : /rom ; screen
221216d1 : ram on
222217d2 : /low ; high res
223d3 : 2nd colour set (previously, dispen, which is a mistake in hardware and schematic)
218d3 : dispen
224219d4 : vsync
225d5 : rombank
226220*/
227221READ8_MEMBER( excali64_state::port50_r )
228222{
229   UINT8 data = m_sys_status & 0x2f;
223   UINT8 data = m_sys_status & 7;
230224   data |= (UINT8)m_crtc_vs << 4;
225   data |= (UINT8)m_crtc_de << 5;
231226   return data;
232227}
233228
229WRITE8_MEMBER( excali64_state::ppic_w )
230{
231   m_cass->output(BIT(data, 7) ? -1.0 : +1.0);
232}
233
234234/*
235d0,1,2,3,5 : same as port50
236(schematic wrongly says d7 used for 2nd colour set)
235d0,1,2 : same as port50
236d3 : 2nd colour set
237237*/
238238WRITE8_MEMBER( excali64_state::port70_w )
239239{
240240   m_sys_status = data;
241241   m_crtc->set_unscaled_clock(BIT(data, 2) ? 2e6 : 1e6);
242   if BIT(data, 1)
243   {
244   // select 64k ram
245      membank("bankr1")->set_entry(0);
246      membank("bankr2")->set_entry(0);
247      membank("bankr3")->set_entry(0);
248      membank("bankr4")->set_entry(0);
249      membank("bankw1")->set_entry(0);
250      membank("bankw2")->set_entry(0);
251      membank("bankw3")->set_entry(0);
252      membank("bankw4")->set_entry(0);
253   }
254   else
255   if BIT(data, 0)
256   {
257   // select videoram and hiresram for writing, and ROM for reading
258      membank("bankr1")->set_entry(1);
259      membank("bankr2")->set_entry(1);
260      membank("bankr3")->set_entry(1);
261      membank("bankr4")->set_entry(0);
262      membank("bankw1")->set_entry(0);
263      membank("bankw2")->set_entry(2);
264      membank("bankw3")->set_entry(2);
265      membank("bankw4")->set_entry(2);
266   }
267   else
268   {
269   // as above, except 4000-4FFF is main ram
270      membank("bankr1")->set_entry(1);
271      membank("bankr2")->set_entry(1);
272      membank("bankr3")->set_entry(1);
273      membank("bankr4")->set_entry(0);
274      membank("bankw1")->set_entry(0);
275      membank("bankw2")->set_entry(2);
276      membank("bankw3")->set_entry(2);
277      membank("bankw4")->set_entry(0);
278   }
279242}
280243
281MACHINE_RESET_MEMBER( excali64_state, excali64 )
244WRITE8_MEMBER( excali64_state::video_w )
282245{
283   membank("bankr1")->set_entry(1); // read from ROM
284   membank("bankr2")->set_entry(1); // read from ROM
285   membank("bankr3")->set_entry(1); // read from ROM
286   membank("bankr4")->set_entry(0); // read from RAM
287   membank("bankw1")->set_entry(0); // write to RAM
288   membank("bankw2")->set_entry(2); // write to videoram
289   membank("bankw3")->set_entry(2); // write to hiresram
290   membank("bankw4")->set_entry(0); // write to RAM
291   m_maincpu->reset();
246   m_p_videoram[offset] = data;
292247}
293248
294249WRITE_LINE_MEMBER( excali64_state::crtc_de )
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301256   m_crtc_vs = state;
302257}
303258
259DRIVER_INIT_MEMBER( excali64_state, excali64 )
260{
261   m_p_chargen = memregion("chargen")->base();
262   m_p_videoram = memregion("videoram")->base();
263}
264
304265/* F4 Character Displayer */
305266static const gfx_layout excali64_charlayout =
306267{
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319280   GFXDECODE_ENTRY( "chargen", 0x0000, excali64_charlayout, 0, 1 )
320281GFXDECODE_END
321282
322// The prom, the schematic, and the manual all contradict each other,
323// so the colours can only be described as wild guesses. Further, the 38
324// colour-load resistors are missing labels and values.
283// The colour names in the comments are what's needed, the current rgb values are mostly wrong
325284PALETTE_INIT_MEMBER( excali64_state, excali64 )
326285{
327   // do this here because driver_init hasn't run yet
328   m_p_videoram = memregion("videoram")->base();
329   m_p_chargen = memregion("chargen")->base();
330   m_p_hiresram = memregion("hiresram")->base();
331   UINT8 *main = memregion("roms")->base();
332   UINT8 *ram = memregion("rambank")->base();
333
334   // main ram (cp/m mode)
335   membank("bankr1")->configure_entry(0, &ram[0x0000]);
336   membank("bankr2")->configure_entry(0, &ram[0x2000]);
337   membank("bankr3")->configure_entry(0, &ram[0x3000]);
338   membank("bankr4")->configure_entry(0, &ram[0x4000]);//boot
339   membank("bankw1")->configure_entry(0, &ram[0x0000]);//boot
340   membank("bankw2")->configure_entry(0, &ram[0x2000]);
341   membank("bankw3")->configure_entry(0, &ram[0x3000]);
342   membank("bankw4")->configure_entry(0, &ram[0x4000]);//boot
343   // rom_1
344   membank("bankr1")->configure_entry(1, &main[0x0000]);//boot
345   // rom_2
346   membank("bankr2")->configure_entry(1, &main[0x4000]);//boot
347   membank("bankr3")->configure_entry(1, &main[0x5000]);//boot
348   // videoram
349   membank("bankw2")->configure_entry(2, &m_p_videoram[0x0000]);//boot
350   // hiresram
351   membank("bankw3")->configure_entry(2, &m_p_hiresram[0x0000]);//boot
352   membank("bankw4")->configure_entry(2, &m_p_hiresram[0x0000]);
353
354   // Set up foreground palettes
355   UINT8 r,g,b,i,code;
356   for (i = 0; i < 32; i++)
357   {
358      code = m_p_chargen[0x1000+i];
359      r = (BIT(code, 0) ? 38 : 0) + (BIT(code, 1) ? 73 : 0) + (BIT(code, 2) ? 144 : 0);
360      b = (BIT(code, 3) ? 38 : 0) + (BIT(code, 4) ? 73 : 0) + (BIT(code, 5) ? 144 : 0);
361      g = (BIT(code, 6) ? 85 : 0) + (BIT(code, 7) ? 170 : 0);
362      palette.set_pen_color(i, r, g, b);
363   }
364
286   // Colour Menu A
287   palette.set_pen_color(0, 0x00, 0x00, 0x00);   /*  0 Black     */
288   palette.set_pen_color(1, 0x7f, 0x00, 0x00);   /*  1 Dark Red      */
289   palette.set_pen_color(2, 0xff, 0x00, 0x00);   /*  2 Red       */
290   palette.set_pen_color(3, 0x00, 0x00, 0x00);   /*  3 Pink     */
291   palette.set_pen_color(4, 0xbf, 0xbf, 0xbf);   /*  4 Orange     */
292   palette.set_pen_color(5, 0x00, 0xff, 0xff);   /*  5 Brown     */
293   palette.set_pen_color(6, 0xff, 0xff, 0x00);   /*  6 Yellow        */
294   palette.set_pen_color(7, 0x7f, 0x7f, 0x00);   /*  7 Dark Green */
295   palette.set_pen_color(8, 0x00, 0x7f, 0x00);   /*  8 Green     */
296   palette.set_pen_color(9, 0x00, 0xff, 0x00);   /*  9 Bright Green  */
297   palette.set_pen_color(10, 0x00, 0x00, 0xff);  /* 10 Light Blue    */
298   palette.set_pen_color(11, 0x00, 0x00, 0x7f);  /* 11 Blue      */
299   palette.set_pen_color(12, 0xff, 0x00, 0xff);  /* 12 Magenta       */
300   palette.set_pen_color(13, 0x7f, 0x00, 0x7f);  /* 13 Purple        */
301   palette.set_pen_color(14, 0x80, 0x80, 0x80);  /* 14 Dark Grey      */
302   palette.set_pen_color(15, 0xff, 0xff, 0xff);  /* 15 White     */
303   // Colour Menu B
304   palette.set_pen_color(16, 0x00, 0x00, 0x00);  /*  0 Black     */
305   palette.set_pen_color(17, 0x7f, 0x00, 0x00);  /*  1 Dark Red  */
306   palette.set_pen_color(18, 0xff, 0x00, 0x00);  /*  2 Red       */
307   palette.set_pen_color(19, 0x80, 0x80, 0x80);  /*  3 Flesh     */
308   palette.set_pen_color(20, 0x00, 0x00, 0xff);  /*  4 Pink      */
309   palette.set_pen_color(21, 0xff, 0xff, 0x80);  /*  5 Yellow Brown */
310   palette.set_pen_color(22, 0x00, 0x00, 0x00);  /*  6 Dark Brown     */
311   palette.set_pen_color(23, 0x00, 0xff, 0x00);  /*  7 Dark Purple */
312   palette.set_pen_color(24, 0xff, 0x80, 0xff);  /*  8 Very Dark Green */
313   palette.set_pen_color(25, 0x00, 0xff, 0xff);  /*  9 Yellow Green */
314   palette.set_pen_color(26, 0xff, 0x40, 0x40);  /* 10 Grey Blue */
315   palette.set_pen_color(27, 0xff, 0x00, 0x00);  /* 11 Sky Blue */
316   palette.set_pen_color(28, 0x00, 0x80, 0x80);  /* 12 Very Pale Blue */
317   palette.set_pen_color(29, 0xff, 0x00, 0xff);  /* 13 Dark Grey */
318   palette.set_pen_color(30, 0x80, 0xff, 0x80);  /* 14 Light Grey */
319   palette.set_pen_color(31, 0xff, 0xff, 0xff);  /* 15 White     */
365320   // Background
366321   palette.set_pen_color(32, 0x00, 0x00, 0x00);  //  0 Black
367322   palette.set_pen_color(33, 0xff, 0x00, 0x00);  //  1 Red
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371326   palette.set_pen_color(37, 0xff, 0xff, 0x00);  //  5 Yellow
372327   palette.set_pen_color(38, 0x00, 0xff, 0xff);  //  6 Cyan
373328   palette.set_pen_color(39, 0xff, 0xff, 0xff);  //  7 White
329
374330}
375331
376332MC6845_UPDATE_ROW( excali64_state::update_row )
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390346      bg = 32 + ((col >> 1) & 7);
391347
392348      if (BIT(col, 0) & BIT(chr, 7))
393         gfx = m_p_hiresram[(chr<<4) | ra]; // hires definition
349         gfx = m_p_videoram[0x800 + (chr<<4) + ra]; // hires definition
394350      else
395351         gfx = m_p_chargen[(chr<<4) | ra]; // normal character
396352     
397      gfx ^= (x == cursor_x) ? 0xff : 0;
353      gfx ^= ((x == cursor_x) ? 0xff : 0);
398354
399355      /* Display a scanline of a character */
400356      *p++ = palette[BIT(gfx, 0) ? fg : bg];
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414370   MCFG_CPU_PROGRAM_MAP(excali64_mem)
415371   MCFG_CPU_IO_MAP(excali64_io)
416372
417   MCFG_MACHINE_RESET_OVERRIDE(excali64_state, excali64)
418
419373   MCFG_DEVICE_ADD("uart", I8251, 0)
420374   //MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
421375   //MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
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469423
470424/* ROM definition */
471425ROM_START( excali64 )
472   ROM_REGION(0x6000, "roms", 0)
426   ROM_REGION(0x10000, "maincpu", 0)
473427   ROM_LOAD( "rom_1.ic17", 0x0000, 0x4000, CRC(e129a305) SHA1(e43ec7d040c2b2e548d22fd6bbc7df8b45a26e5a) )
474   ROM_LOAD( "rom_2.ic24", 0x4000, 0x2000, CRC(916d9f5a) SHA1(91c527cce963481b7bebf077e955ca89578bb553) )
428   ROM_LOAD( "rom_2.ic24", 0x2000, 0x2000, CRC(916d9f5a) SHA1(91c527cce963481b7bebf077e955ca89578bb553) )
475429   // fix a bug that causes screen to be filled with 'p'
476430   ROM_FILL(0x4ee, 1, 0)
477431   ROM_FILL(0x4ef, 1, 8)
478432   ROM_FILL(0x4f6, 1, 0)
479433   ROM_FILL(0x4f7, 1, 8)
480434
481   ROM_REGION(0x10000, "rambank", ROMREGION_ERASE00)
482   ROM_REGION(0x1000, "videoram", ROMREGION_ERASE00)
483   ROM_REGION(0x1000, "hiresram", ROMREGION_ERASE00)
435   ROM_REGION(0x2000, "videoram", ROMREGION_ERASE00)
484436
485   ROM_REGION(0x1020, "chargen", 0)
437   ROM_REGION(0x1000, "chargen", 0)
486438   ROM_LOAD( "genex_3.ic43", 0x0000, 0x1000, CRC(b91619a9) SHA1(2ced636cb7b94ba9d329868d7ecf79963cefe9d9) )
487   ROM_LOAD( "hm7603.ic55",  0x1000, 0x0020, CRC(c74f47dc) SHA1(331ff3c913846191ddd97cacb80bd19438c1ff71) )
488439ROM_END
489440
490441/* Driver */
491442
492/*    YEAR  NAME      PARENT  COMPAT   MACHINE    INPUT     CLASS         INIT        COMPANY         FULLNAME        FLAGS */
493COMP( 1984, excali64, 0,      0,       excali64,  excali64, driver_device, 0,  "BGR Computers", "Excalibur 64", GAME_NOT_WORKING )
443/*    YEAR  NAME      PARENT  COMPAT   MACHINE    INPUT     CLASS             INIT        COMPANY         FULLNAME        FLAGS */
444COMP( 1984, excali64, 0,      0,       excali64,  excali64, excali64_state, excali64,  "BGR Computers", "Excalibur 64", GAME_NOT_WORKING )
trunk/src/mess/drivers/if800.c
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2323
2424   required_device<upd7220_device> m_hgdc;
2525
26   required_shared_ptr<UINT16> m_video_ram;
26   required_shared_ptr<UINT8> m_video_ram;
2727   virtual void machine_start();
2828   virtual void machine_reset();
2929   required_device<cpu_device> m_maincpu;
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3838   int xi,gfx;
3939   UINT8 pen;
4040
41   gfx = m_video_ram[address >> 1];
41   gfx = m_video_ram[address];
4242
43   for(xi=0;xi<16;xi++)
43   for(xi=0;xi<8;xi++)
4444   {
4545      pen = ((gfx >> xi) & 1) ? 1 : 0;
4646
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7373{
7474}
7575
76static ADDRESS_MAP_START( upd7220_map, AS_0, 16, if800_state )
76static ADDRESS_MAP_START( upd7220_map, AS_0, 8, if800_state )
7777   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
7878ADDRESS_MAP_END
7979
trunk/src/mess/drivers/iskr103x.c
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7777   MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
7878   MCFG_DEVICE_INPUT_DEFAULTS(iskr1030m)
7979
80   MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", iskr103x_isa8_cards, "cga_iskr1030m", false)   // actually MDA?
80   MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", iskr103x_isa8_cards, "cga_iskr1030m", false)
8181   MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", iskr103x_isa8_cards, "fdc_xt", false)
82   MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", iskr103x_isa8_cards, NULL, false) // hdc is WIP
82   MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", iskr103x_isa8_cards, NULL, false)
8383   MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", iskr103x_isa8_cards, NULL, false)
8484   MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", iskr103x_isa8_cards, NULL, false)
8585   MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", iskr103x_isa8_cards, NULL, false)
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103103
104104   MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", iskr103x_isa8_cards, "cga_iskr1031", false)
105105   MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", iskr103x_isa8_cards, "fdc_xt", false)
106   MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", iskr103x_isa8_cards, NULL, false) // hdc is WIP
106   MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", iskr103x_isa8_cards, NULL, false)
107107   MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", iskr103x_isa8_cards, NULL, false)
108108   MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", iskr103x_isa8_cards, NULL, false)
109109   MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", iskr103x_isa8_cards, NULL, false)
trunk/src/mess/drivers/leapster.c
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215215public:
216216   leapster_state(const machine_config &mconfig, device_type type, const char *tag)
217217      : driver_device(mconfig, type, tag),
218      m_maincpu(*this, "maincpu"),
219218      m_cart(*this, "cartslot")
220219      { }
221220
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228227   DECLARE_DRIVER_INIT(leapster);
229228
230229protected:
231   required_device<cpu_device> m_maincpu;
232230   required_device<generic_slot_device> m_cart;
233231
234232   memory_region *m_cart_rom;
r242341r242342
261259{
262260   astring region_tag;
263261   m_cart_rom = memregion(region_tag.cpy(m_cart->tag()).cat(GENERIC_ROM_REGION_TAG));
264
265   if (m_cart_rom)
266   {
267      address_space &space = m_maincpu->space(AS_PROGRAM);
268
269      space.install_readwrite_bank(0x80000000, 0x807fffff, "cartrom");
270      membank("cartrom")->set_base(m_cart_rom->base());
271   }
262   membank("cartrom")->set_base(m_cart_rom->base());
272263}
273264
274265void leapster_state::machine_reset()
r242341r242342
277268
278269static ADDRESS_MAP_START( leapster_map, AS_PROGRAM, 32, leapster_state )
279270   AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_MIRROR(0x40000000) // pointers in the bios region seem to be to the 40xxxxxx region, either we mirror there or something (real bios?) is acutally missing
280//   AM_RANGE(0x80000000, 0x807fffff) AM_ROMBANK("cartrom") // game ROM pointers are all to the 80xxxxxx region, so I assume it maps here - installed if a cart is present
271   AM_RANGE(0x80000000, 0x807fffff) AM_ROMBANK("cartrom") // game ROM pointers are all to the 80xxxxxx region, so I assume it maps here
272
281273ADDRESS_MAP_END
282274
283275static MACHINE_CONFIG_START( leapster, leapster_state )
trunk/src/mess/drivers/mc1502.c
r242341r242342
5151   key |= ioport("Y10")->read();
5252   key |= ioport("Y11")->read();
5353   key |= ioport("Y12")->read();
54//  DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, m_kbd.pulsing,
55//          (key || m_kbd.pulsing) ? " will IRQ" : ""));
54//   DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, m_kbd.pulsing,
55//       (key || m_kbd.pulsing) ? " will IRQ" : ""));
5656
5757   /*
5858      If a key is pressed and we're not pulsing yet, start pulsing the IRQ1;
r242341r242342
7373
7474WRITE8_MEMBER(mc1502_state::mc1502_ppi_portb_w)
7575{
76//  DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
76//   DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
7777   m_ppi_portb = data;
7878   m_pit8253->write_gate2(BIT(data, 0));
7979   mc1502_speaker_set_spkrdata(BIT(data, 1));
r242341r242342
8787// bit 3: i8251 SYNDET pin triggers NMI (default = 1 = no)
8888WRITE8_MEMBER(mc1502_state::mc1502_ppi_portc_w)
8989{
90//  DBG_LOG(2,"mc1502_ppi_portc_w",("( %02X )\n", data));
90//   DBG_LOG(2,"mc1502_ppi_portc_w",("( %02X )\n", data));
9191   m_ppi_portc = data & 15;
9292}
9393
94//  0x80 -- serial RxD
95//  0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
96//  0x20 -- T2OUT
97//  0x10 -- SNDOUT
94// 0x80 -- serial RxD
95// 0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
96// 0x20 -- T2OUT
97// 0x10 -- SNDOUT
9898READ8_MEMBER(mc1502_state::mc1502_ppi_portc_r)
9999{
100100   int data = 0xff;
r242341r242342
104104   data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 );
105105   data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && m_pit_out2) ? 0x10 : 0x00 );
106106
107//  DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
108//          data, tap_val, m_pit_out2, machine().describe_context()));
107//   DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
108//       data, tap_val, m_pit_out2, machine().describe_context()));
109109   return data;
110110}
111111
r242341r242342
126126   if (m_kbd.mask & 0x0400) { key |= ioport("Y11")->read(); }
127127   if (m_kbd.mask & 0x0800) { key |= ioport("Y12")->read(); }
128128   key ^= 0xff;
129//  DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
129//   DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
130130   return key;
131131}
132132
r242341r242342
138138      m_kbd.mask |= 1 << 11;
139139   else
140140      m_kbd.mask &= ~(1 << 11);
141//  DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, m_kbd.mask));
141//   DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, m_kbd.mask));
142142}
143143
144144WRITE8_MEMBER(mc1502_state::mc1502_kppi_portc_w)
145145{
146146   m_kbd.mask &= ~(7 << 8);
147147   m_kbd.mask |= ((data ^ 7) & 7) << 8;
148//  DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, m_kbd.mask));
148//   DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, m_kbd.mask));
149149}
150150
151151WRITE_LINE_MEMBER(mc1502_state::mc1502_i8251_syndet)
r242341r242342
219219   ADDRESS_MAP_UNMAP_HIGH
220220   AM_RANGE(0x00000, 0x97fff) AM_RAM   /* 96K on mainboard + 512K on extension card */
221221   AM_RANGE(0xc0000, 0xfbfff) AM_NOP
222//  AM_RANGE(0xe8000, 0xeffff) AM_ROM       /* BASIC */
223222   AM_RANGE(0xfc000, 0xfffff) AM_ROM
224223ADDRESS_MAP_END
225224
r242341r242342
232231
233232static ADDRESS_MAP_START(mc1502_io, AS_IO, 8, mc1502_state )
234233   AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
235   AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w)   // not working yet
234   AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w)
236235   AM_RANGE(0x0029, 0x0029) AM_DEVREADWRITE("upd8251", i8251_device, status_r, control_w)
237236   AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
238237   AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE("ppi8255n1", i8255_device, read, write)
r242341r242342
244243INPUT_PORTS_END
245244
246245static MACHINE_CONFIG_START( mc1502, mc1502_state )
247   /* basic machine hardware */
248246   MCFG_CPU_ADD("maincpu", I8088, XTAL_16MHz/3)
249247   MCFG_CPU_PROGRAM_MAP(mc1502_map)
250248   MCFG_CPU_IO_MAP(mc1502_io)
trunk/src/mess/drivers/mz3500.c
r242341r242342
6161   required_device<upd7220_device> m_hgdc1;
6262   required_device<upd7220_device> m_hgdc2;
6363   required_device<upd765a_device> m_fdc;
64   required_shared_ptr<UINT16> m_video_ram;
64   required_shared_ptr<UINT8> m_video_ram;
6565   required_device<beep_device> m_beeper;
6666   required_device<palette_device> m_palette;
6767
r242341r242342
174174
175175   for( x = 0; x < pitch; x++ )
176176   {
177      tile = (m_video_ram[(((addr+x)*2) & 0x1fff) >> 1] & 0xff);
178      attr = ((m_video_ram[(((addr+x)*2+1) & 0x3ffff) >> 1] >> 8) & 0x0f);
177      tile = (m_video_ram[((addr+x)*2) & 0x1fff] & 0xff);
178      attr = (m_video_ram[((addr+x)*2+1) & 0x3ffff] & 0x0f);
179179
180180      //if(hires)
181181      //  tile <<= 1;
r242341r242342
796796
797797}
798798
799static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, mz3500_state )
799static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, mz3500_state )
800800   ADDRESS_MAP_GLOBAL_MASK(0x1fff)
801801   AM_RANGE(0x00000, 0x00fff) AM_RAM AM_SHARE("video_ram")
802802ADDRESS_MAP_END
803803
804static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, mz3500_state )
804static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, mz3500_state )
805805   AM_RANGE(0x00000, 0x3ffff) AM_RAM // AM_SHARE("video_ram_2")
806806ADDRESS_MAP_END
807807
trunk/src/mess/drivers/mz6500.c
r242341r242342
2828   DECLARE_WRITE8_MEMBER(mz6500_vram_w);
2929   void fdc_irq(bool state);
3030   void fdc_drq(bool state);
31   required_shared_ptr<UINT16> m_video_ram;
31   required_shared_ptr<UINT8> m_video_ram;
3232   virtual void machine_reset();
3333   virtual void video_start();
3434   required_device<cpu_device> m_maincpu;
r242341r242342
4242   int gfx[3];
4343   UINT8 i,pen;
4444
45   gfx[0] = m_video_ram[(address + 0x00000) >> 1];
46   gfx[1] = m_video_ram[(address + 0x10000) >> 1];
47   gfx[2] = m_video_ram[(address + 0x20000) >> 1];
45   gfx[0] = m_video_ram[address + 0x00000];
46   gfx[1] = m_video_ram[address + 0x10000];
47   gfx[2] = m_video_ram[address + 0x20000];
4848
49   for(i=0; i<16; i++)
49   for(i=0; i<8; i++)
5050   {
5151      pen = (BIT(gfx[0], i)) | (BIT(gfx[1], i) << 1) | (BIT(gfx[2], i) << 2);
5252
r242341r242342
126126   SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
127127SLOT_INTERFACE_END
128128
129static ADDRESS_MAP_START( upd7220_map, AS_0, 16, mz6500_state )
129static ADDRESS_MAP_START( upd7220_map, AS_0, 8, mz6500_state )
130130   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
131131ADDRESS_MAP_END
132132
trunk/src/mess/drivers/pc9801.c
r242341r242342
416416
417417#include "formats/pc98_dsk.h"
418418#include "formats/pc98fdi_dsk.h"
419#include "formats/fdd_dsk.h"
420#include "formats/dcp_dsk.h"
421#include "formats/dip_dsk.h"
422#include "formats/nfd_dsk.h"
423419
424420#include "machine/pc9801_26.h"
425421#include "machine/pc9801_86.h"
r242341r242342
485481   optional_device<input_buffer_device> m_sasi_data_in;
486482   optional_device<input_buffer_device> m_sasi_ctrl_in;
487483   optional_device<ata_interface_device> m_ide;
488   required_shared_ptr<UINT16> m_video_ram_1;
489   required_shared_ptr<UINT16> m_video_ram_2;
490   optional_shared_ptr<UINT16> m_ext_gvram;
484   required_shared_ptr<UINT8> m_video_ram_1;
485   required_shared_ptr<UINT8> m_video_ram_2;
486   optional_shared_ptr<UINT8> m_ext_gvram;
491487   required_device<beep_device> m_beeper;
492488   optional_device<ram_device> m_ram;
493489   required_device<gfxdecode_device> m_gfxdecode;
r242341r242342
509505   UINT8 m_txt_scroll_reg[8];
510506   UINT8 m_pal_clut[4];
511507
512   UINT16 *m_tvram;
508   UINT8 *m_tvram;
513509
514510   UINT16 m_font_addr;
515511   UINT8 m_font_line;
r242341r242342
543539      UINT8 tile[4], tile_index;
544540   }m_grcg;
545541
546   struct {
547      UINT16 regs[8];
548      UINT16 pat[4];
549      UINT16 src[4];
550      INT16 count;
551      UINT16 leftover[4];
552      bool first;
553   } m_egc;
554
555542   /* PC9821 specific */
556543   UINT8 m_sdip[24], m_sdip_bank;
557544   UINT8 m_pc9821_window_bank;
r242341r242342
567554   DECLARE_WRITE8_MEMBER(txt_scrl_w);
568555   DECLARE_READ8_MEMBER(grcg_r);
569556   DECLARE_WRITE8_MEMBER(grcg_w);
570   DECLARE_WRITE16_MEMBER(egc_w);
571557   DECLARE_READ8_MEMBER(pc9801_a0_r);
572558   DECLARE_WRITE8_MEMBER(pc9801_a0_w);
573559   DECLARE_READ8_MEMBER(pc9801_fdc_2hd_r);
574560   DECLARE_WRITE8_MEMBER(pc9801_fdc_2hd_w);
575561   DECLARE_READ8_MEMBER(pc9801_fdc_2dd_r);
576562   DECLARE_WRITE8_MEMBER(pc9801_fdc_2dd_w);
577   DECLARE_READ16_MEMBER(tvram_r);
578   DECLARE_WRITE16_MEMBER(tvram_w);
563   DECLARE_READ8_MEMBER(tvram_r);
564   DECLARE_WRITE8_MEMBER(tvram_w);
579565   DECLARE_READ8_MEMBER(gvram_r);
580566   DECLARE_WRITE8_MEMBER(gvram_w);
581567   DECLARE_WRITE8_MEMBER(pc9801rs_mouse_freq_w);
582568   DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
583   DECLARE_READ16_MEMBER(grcg_gvram_r);
584   DECLARE_WRITE16_MEMBER(grcg_gvram_w);
585   DECLARE_READ16_MEMBER(grcg_gvram0_r);
586   DECLARE_WRITE16_MEMBER(grcg_gvram0_w);
587   DECLARE_READ16_MEMBER(upd7220_grcg_r);
588   DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
589   void egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask);
590   UINT16 egc_blit_r(UINT32 offset, UINT16 mem_mask);
591   inline UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
569   DECLARE_READ8_MEMBER(grcg_gvram_r);
570   DECLARE_WRITE8_MEMBER(grcg_gvram_w);
571   DECLARE_READ8_MEMBER(grcg_gvram0_r);
572   DECLARE_WRITE8_MEMBER(grcg_gvram0_w);
573   DECLARE_READ8_MEMBER(upd7220_grcg_r);
574   DECLARE_WRITE8_MEMBER(upd7220_grcg_w);
592575   UINT32 pc9801_286_a20(bool state);
593576
594577   DECLARE_READ8_MEMBER(ide_hack_r);
r242341r242342
731714
732715void pc9801_state::video_start()
733716{
734   m_tvram = auto_alloc_array(machine(), UINT16, 0x2000);
717   m_tvram = auto_alloc_array(machine(), UINT8, 0x4000);
735718
736719   // find memory regions
737720   m_char_rom = memregion("chargen")->base();
r242341r242342
767750
768751   if(m_ex_video_ff[ANALOG_256_MODE])
769752   {
770      for(xi=0;xi<16;xi++)
753      for(xi=0;xi<8;xi++)
771754      {
772755         res_x = x + xi;
773756         res_y = y;
r242341r242342
775758         if(!m_screen->visible_area().contains(res_x, res_y*2+0))
776759            return;
777760
778         pen = m_ext_gvram[((address*16+xi)+(m_vram_disp*0x40000)) >> 1];
761         pen = m_ext_gvram[(address*8+xi)+(m_vram_disp*0x40000)];
779762
780763         bitmap.pix32(res_y*2+0, res_x) = palette[pen + 0x20];
781764         if(m_screen->visible_area().contains(res_x, res_y*2+1))
r242341r242342
784767   }
785768   else
786769   {
787      for(xi=0;xi<16;xi++)
770      for(xi=0;xi<8;xi++)
788771      {
789772         res_x = x + xi;
790773         res_y = y;
791774
792         pen = ((m_video_ram_2[((address & 0x7fff) + (0x08000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 1 : 0;
793         pen|= ((m_video_ram_2[((address & 0x7fff) + (0x10000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 2 : 0;
794         pen|= ((m_video_ram_2[((address & 0x7fff) + (0x18000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 4 : 0;
775         pen = ((m_video_ram_2[(address & 0x7fff) + (0x08000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 1 : 0;
776         pen|= ((m_video_ram_2[(address & 0x7fff) + (0x10000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 2 : 0;
777         pen|= ((m_video_ram_2[(address & 0x7fff) + (0x18000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 4 : 0;
795778         if(m_ex_video_ff[ANALOG_16_MODE])
796            pen|= ((m_video_ram_2[((address & 0x7fff) + (0) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 8 : 0;
779            pen|= ((m_video_ram_2[(address & 0x7fff) + (0) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 8 : 0;
797780
798781         if(interlace_on)
799782         {
r242341r242342
843826      kanji_sel = 0;
844827      kanji_lr = 0;
845828
846      tile = m_video_ram_1[tile_addr & 0xfff] & 0xff;
847      knj_tile = m_video_ram_1[tile_addr & 0xfff] >> 8;
829      tile = m_video_ram_1[(tile_addr*2) & 0x1fff] & 0xff;
830      knj_tile = m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0xff;
848831      if(knj_tile)
849832      {
850833         /* Note: bit 7 doesn't really count, if a kanji is enabled then the successive tile is always the second part of it.
r242341r242342
865848      else
866849         x_step = 1;
867850
868      attr = (m_video_ram_1[(tile_addr & 0xfff) | 0x1000] & 0xff);
851      attr = (m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0xff);
869852
870853      secret = (attr & 1) ^ 1;
871854      blink = attr & 2;
r242341r242342
12961279
12971280
12981281/* TODO: banking? */
1299READ16_MEMBER(pc9801_state::tvram_r)
1282READ8_MEMBER(pc9801_state::tvram_r)
13001283{
1301   UINT16 res;
1284   UINT8 res;
13021285
1303   if((offset & 0x1000) && (mem_mask == 0xff00))
1304      return 0xffff;
1286   if((offset & 0x2000) && offset & 1)
1287      return 0xff;
13051288
13061289   res = m_tvram[offset];
13071290
13081291   return res;
13091292}
13101293
1311WRITE16_MEMBER(pc9801_state::tvram_w)
1294WRITE8_MEMBER(pc9801_state::tvram_w)
13121295{
1313   if(offset < (0x3fe2>>1) || m_video_ff[MEMSW_REG])
1314      COMBINE_DATA(&m_tvram[offset]);
1296   if(offset < (0x3fe2) || m_video_ff[MEMSW_REG])
1297      m_tvram[offset] = data;
13151298
1316   COMBINE_DATA(&m_video_ram_1[offset]); //TODO: check me
1299   m_video_ram_1[offset] = data; //TODO: check me
13171300}
13181301
13191302/* +0x8000 is trusted (bank 0 is actually used by 16 colors mode) */
13201303READ8_MEMBER(pc9801_state::gvram_r)
13211304{
1322   return BITSWAP8(m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] >> ((offset & 1) << 3),0,1,2,3,4,5,6,7);
1305   return m_video_ram_2[offset+0x08000+m_vram_bank*0x20000];
13231306}
13241307
13251308WRITE8_MEMBER(pc9801_state::gvram_w)
13261309{
1327   UINT16 ram = m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000];
1328   int mask = (offset & 1) << 3;
1329   data = BITSWAP8(data,0,1,2,3,4,5,6,7);
1330   m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask);
1310   m_video_ram_2[offset+0x08000+m_vram_bank*0x20000] = data;
13311311}
13321312
1333inline UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
1313READ8_MEMBER(pc9801_state::upd7220_grcg_r)
13341314{
1335   UINT16 out = 0;
1336   int src_off, dst_off;
1337   UINT16 src_tmp = src;
1315   UINT8 res = 0;
13381316
1339   if(m_egc.regs[6] & 0x1000)
1340   {
1341      src_off = 15 - (m_egc.regs[6] & 0xf);
1342      dst_off = 15 - ((m_egc.regs[6] >> 4) & 0xf);
1343   }
1344   else
1345   {
1346      src_off = m_egc.regs[6] & 0xf;
1347      dst_off = (m_egc.regs[6] >> 4) & 0xf;
1348   }
1349
1350   if(src_off < dst_off)
1351   {
1352      src = src_tmp << (dst_off - src_off);
1353      src |= m_egc.leftover[plane];
1354      m_egc.leftover[plane] = src_tmp >> (15 - (dst_off - src_off));
1355   }
1356   else
1357   {
1358      src = src_tmp >> (src_off - dst_off);
1359      src |= m_egc.leftover[plane];
1360      m_egc.leftover[plane] = src_tmp << (15 - (src_off - dst_off));
1361   }
1362
1363   for(int i = 7; i >= 0; i--)
1364   {
1365      if(BIT(m_egc.regs[2], i))
1366         out |= src & pat & dst;
1367      pat = ~pat;
1368      dst = (!(i & 1)) ? ~dst : dst;
1369      src = (i == 4) ? ~src : src;
1370   }
1371   return out;
1372}
1373
1374void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
1375{
1376   UINT16 mask = m_egc.regs[4] & mem_mask, out = 0;
1377   bool dir = !(m_egc.regs[6] & 0x1000);
1378   int dst_off = (m_egc.regs[6] >> 4) & 0xf;
1379   offset &= 0x3fff;
1380
1381   if((((m_egc.regs[2] >> 11) & 3) == 1) || ((((m_egc.regs[2] >> 11) & 3) == 2) && !BIT(m_egc.regs[2], 10)))
1382   {
1383      // mask off the bits past the end of the blit
1384      if(m_egc.count < 16)
1385         mask &= dir ? ((1 << (m_egc.count + 1)) - 1) : ~((1 << (16 - m_egc.count)) - 1);
1386
1387      // mask off the bits before the start
1388      if(m_egc.first)
1389      {
1390         m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
1391         mask &= dir ? ~((1 << (16 - dst_off)) - 1) : ((1 << (dst_off + 1)) - 1);
1392      }
1393   }
1394
1395   for(int i = 0; i < 4; i++)
1396   {
1397      if(!BIT(m_egc.regs[0], i))
1398      {
1399         UINT16 src = m_egc.src[i] & mem_mask, pat = m_egc.pat[i];
1400         if(BIT(m_egc.regs[2], 10))
1401            src = data;
1402
1403         if((m_egc.regs[2] & 0x300) == 0x200)
1404            pat = m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)];
1405
1406         switch((m_egc.regs[2] >> 11) & 3)
1407         {
1408            case 0:
1409               out = data;
1410               break;
1411            case 1:
1412               if(mem_mask == 0x00ff)
1413                  src = src | src << 8;
1414               else if(mem_mask == 0xff00)
1415                  src = src | src >> 8;
1416
1417               out = egc_do_partial_op(i, src, pat, m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)]);
1418               break;
1419            case 2:
1420               out = pat;
1421               break;
1422            case 3:
1423               logerror("Invalid EGC blit operation\n");
1424               return;
1425         }
1426
1427         m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)] &= ~mask;
1428         m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)] |= out & mask;
1429      }
1430   }
1431   if(mem_mask != 0xffff)
1432   {
1433      dst_off &= 7;
1434      if(m_egc.first)
1435         m_egc.count -= dir ? 7 - dst_off : dst_off;
1436      else
1437         m_egc.count -= 8;
1438   }
1439   else
1440   {
1441      if(m_egc.first)
1442         m_egc.count -= dir ? 15 - dst_off : dst_off;
1443      else
1444         m_egc.count -= 16;
1445   }
1446
1447   m_egc.first = false;
1448
1449   if(m_egc.count <= 0)
1450   {
1451      m_egc.first = true;
1452      m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
1453   }
1454}
1455
1456UINT16 pc9801_state::egc_blit_r(UINT32 offset, UINT16 mem_mask)
1457{
1458   UINT16 plane_off = offset & 0x3fff;
1459   if((m_egc.regs[2] & 0x300) == 0x100)
1460   {
1461      m_egc.pat[0] = m_video_ram_2[plane_off + 0x4000];
1462      m_egc.pat[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
1463      m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
1464      m_egc.pat[3] = m_video_ram_2[plane_off];
1465   }
1466   if(!BIT(m_egc.regs[2], 10))
1467   {
1468      m_egc.src[0] = m_video_ram_2[plane_off + 0x4000];
1469      m_egc.src[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
1470      m_egc.src[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
1471      m_egc.src[3] = m_video_ram_2[plane_off];
1472   }
1473   if(BIT(m_egc.regs[2], 13))
1474      return m_video_ram_2[offset];
1475   else
1476      return m_video_ram_2[plane_off + (((m_egc.regs[1] >> 8) + 1) & 3) * 0x4000];
1477}
1478
1479READ16_MEMBER(pc9801_state::upd7220_grcg_r)
1480{
1481   UINT16 res = 0;
1482
1483   if(!(m_grcg.mode & 0x80) || space.debugger_access())
1317   if(!(m_grcg.mode & 0x80))
14841318      res = m_video_ram_2[offset];
1485   else if(m_ex_video_ff[2])
1486      res = egc_blit_r(offset, mem_mask);
14871319   else if(!(m_grcg.mode & 0x40))
14881320   {
14891321      int i;
14901322
1491      offset &= 0x3fff;
1323      offset &= ~(3 << 15);
14921324      res = 0;
14931325      for(i=0;i<4;i++)
14941326      {
14951327         if((m_grcg.mode & (1 << i)) == 0)
1496         {
1497            res |= m_video_ram_2[offset | (((i + 1) & 3) * 0x4000)] ^ (m_grcg.tile[i] | m_grcg.tile[i] << 8);
1498         }
1328            res |= m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] ^ m_grcg.tile[i];
14991329      }
15001330
1501      res ^= 0xffff;
1331      res ^= 0xff;
15021332   }
15031333
15041334   return res;
15051335}
15061336
1507WRITE16_MEMBER(pc9801_state::upd7220_grcg_w)
1337WRITE8_MEMBER(pc9801_state::upd7220_grcg_w)
15081338{
1509   if(!(m_grcg.mode & 0x80))
1510      COMBINE_DATA(&m_video_ram_2[offset]);
1511   else if(m_ex_video_ff[2])
1512      egc_blit_w(offset, data, mem_mask);
1339   if((m_grcg.mode & 0x80) == 0)
1340      m_video_ram_2[offset] = data;
15131341   else
15141342   {
15151343      int i;
1516      UINT8 *vram = (UINT8 *)m_video_ram_2.target();
1517      offset = (offset << 1) & 0x7fff;
1344      offset &= ~(3 << 15);
15181345
15191346      if(m_grcg.mode & 0x40) // RMW
15201347      {
r242341r242342
15221349         {
15231350            if((m_grcg.mode & (1 << i)) == 0)
15241351            {
1525               if(mem_mask & 0xff)
1526               {
1527                  vram[offset | (((i + 1) & 3) * 0x8000)] &= ~data;
1528                  vram[offset | (((i + 1) & 3) * 0x8000)] |= m_grcg.tile[i] & data;
1529               }
1530               if(mem_mask & 0xff00)
1531               {
1532                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] &= ~(data >> 8);
1533                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] |= m_grcg.tile[i] & (data >> 8);
1534               }
1352               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] &= ~data;
1353               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] |= m_grcg.tile[i] & data;
15351354            }
15361355         }
15371356      }
r242341r242342
15411360         {
15421361            if((m_grcg.mode & (1 << i)) == 0)
15431362            {
1544               if(mem_mask & 0xff)
1545                  vram[offset | (((i + 1) & 3) * 0x8000)] = m_grcg.tile[i];
1546               if(mem_mask & 0xff00)
1547                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] = m_grcg.tile[i];
1363               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] = m_grcg.tile[i];
15481364            }
15491365         }
15501366      }
r242341r242342
16751491
16761492static ADDRESS_MAP_START( pc9801_map, AS_PROGRAM, 16, pc9801_state )
16771493   AM_RANGE(0x00000, 0x9ffff) AM_RAM //work RAM
1678   AM_RANGE(0xa0000, 0xa3fff) AM_READWRITE(tvram_r,tvram_w) //TVRAM
1494   AM_RANGE(0xa0000, 0xa3fff) AM_READWRITE8(tvram_r,tvram_w,0xffff) //TVRAM
16791495   AM_RANGE(0xa8000, 0xbffff) AM_READWRITE8(gvram_r,gvram_w,0xffff) //bitmap VRAM
16801496   AM_RANGE(0xcc000, 0xcdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
16811497   AM_RANGE(0xd6000, 0xd6fff) AM_ROM AM_REGION("fdc_bios_2dd",0) //floppy BIOS 2dd
r242341r242342
18581674   txt_scrl_w(space,offset,data);
18591675}
18601676
1861WRITE16_MEMBER(pc9801_state::egc_w)
1862{
1863   if(!m_ex_video_ff[2])
1864      return;
1865
1866   COMBINE_DATA(&m_egc.regs[offset]);
1867   switch(offset)
1868   {
1869      case 1:
1870      case 3:
1871      case 5:
1872      {
1873         UINT8 color = 0;
1874         switch((m_egc.regs[1] >> 13) & 3)
1875         {
1876            case 1:
1877               //back color
1878               color = m_egc.regs[5];
1879               break;
1880            case 2:
1881               //fore color
1882               color = m_egc.regs[3];
1883               break;
1884            default:
1885               return;
1886         }
1887         m_egc.pat[0] = (color & 1) ? 0xffff : 0;
1888         m_egc.pat[1] = (color & 2) ? 0xffff : 0;
1889         m_egc.pat[2] = (color & 4) ? 0xffff : 0;
1890         m_egc.pat[3] = (color & 8) ? 0xffff : 0;
1891         break;
1892      }
1893      case 6:
1894      case 7:
1895         m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
1896         m_egc.first = true;
1897         break;
1898   }
1899}
1900
19011677READ8_MEMBER(pc9801_state::pc9810rs_fdc_ctrl_r)
19021678{
19031679   return (m_fdc_ctrl & 3) | 0xf0 | 8 | 4;
r242341r242342
21091885   ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data);
21101886}
21111887
2112READ16_MEMBER(pc9801_state::grcg_gvram_r)
1888READ8_MEMBER(pc9801_state::grcg_gvram_r)
21131889{
2114   UINT16 ret = upd7220_grcg_r(space, (offset + 0x4000) | (m_vram_bank << 16), mem_mask);
2115   return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
1890   return upd7220_grcg_r(space, (offset + 0x8000) | (m_vram_bank << 17), mem_mask);
21161891}
21171892
2118WRITE16_MEMBER(pc9801_state::grcg_gvram_w)
1893WRITE8_MEMBER(pc9801_state::grcg_gvram_w)
21191894{
2120   data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
2121   upd7220_grcg_w(space, (offset + 0x4000) | (m_vram_bank << 16), data, mem_mask);
1895   upd7220_grcg_w(space, (offset + 0x8000) | (m_vram_bank << 17), data, mem_mask);
21221896}
21231897
2124READ16_MEMBER(pc9801_state::grcg_gvram0_r)
1898READ8_MEMBER(pc9801_state::grcg_gvram0_r)
21251899{
2126   UINT16 ret = upd7220_grcg_r(space, offset | (m_vram_bank << 16), mem_mask);
2127   return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
1900   return upd7220_grcg_r(space, offset | (m_vram_bank << 17), mem_mask);
21281901}
21291902
2130WRITE16_MEMBER(pc9801_state::grcg_gvram0_w)
1903WRITE8_MEMBER(pc9801_state::grcg_gvram0_w)
21311904{
2132   data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
2133   upd7220_grcg_w(space, offset | (m_vram_bank << 16), data, mem_mask);
1905   upd7220_grcg_w(space, offset | (m_vram_bank << 17), data, mem_mask);
21341906}
21351907
21361908static ADDRESS_MAP_START( pc9801ux_map, AS_PROGRAM, 16, pc9801_state )
21371909   AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("wram")
2138   AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE(tvram_r, tvram_w)
1910   AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE8(tvram_r, tvram_w, 0xffff)
21391911   AM_RANGE(0x0a4000, 0x0a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffff)
2140   AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE(grcg_gvram_r, grcg_gvram_w)
2141   AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE(grcg_gvram0_r,grcg_gvram0_w)
1912   AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffff)
1913   AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffff)
21421914   AM_RANGE(0x0e0000, 0x0fffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
21431915ADDRESS_MAP_END
21441916
r242341r242342
21551927   AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(a20_ctrl_r,      a20_ctrl_w,      0x00ff)
21561928   AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffff)
21571929   AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w,    0xffff) //ROM/RAM bank
2158   AM_RANGE(0x04a0, 0x04af) AM_WRITE(egc_w)
21591930   AM_RANGE(0x3fd8, 0x3fdf) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00)
21601931//  AM_RANGE(0xa460, 0xa463) AM_READWRITE8(pc9801_ext_opna_r,  pc9801_ext_opna_w,  0xffff)
21611932   AM_IMPORT_FROM(pc9801_io)
r242341r242342
23642135static ADDRESS_MAP_START( pc9821_map, AS_PROGRAM, 32, pc9801_state )
23652136   AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("wram")
23662137   //AM_RANGE(0x00080000, 0x0009ffff) AM_READWRITE8(winram_r, winram_w, 0xffffffff)
2367   AM_RANGE(0x000a0000, 0x000a3fff) AM_READWRITE16(tvram_r, tvram_w, 0xffffffff)
2138   AM_RANGE(0x000a0000, 0x000a3fff) AM_READWRITE8(tvram_r, tvram_w, 0xffffffff)
23682139   AM_RANGE(0x000a4000, 0x000a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffffffff)
2369   AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE16(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
2140   AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
23702141   AM_RANGE(0x000cc000, 0x000cdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
23712142   AM_RANGE(0x000d8000, 0x000d9fff) AM_ROM AM_REGION("ide",0)
23722143   AM_RANGE(0x000da000, 0x000dbfff) AM_RAM // ide ram
2373   AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE16(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
2144   AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
23742145   AM_RANGE(0x000e0000, 0x000fffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
23752146   AM_RANGE(0x00f00000, 0x00f9ffff) AM_RAM AM_SHARE("ext_gvram")
23762147   AM_RANGE(0xffee0000, 0xffefffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
r242341r242342
24582229//  AM_RANGE(0xfcd0, 0xfcd3) MIDI port, option F / <undefined>
24592230ADDRESS_MAP_END
24602231
2461static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, pc9801_state )
2232static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, pc9801_state )
24622233   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_1")
24632234ADDRESS_MAP_END
24642235
2465static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, pc9801_state )
2236static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, pc9801_state )
24662237   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
24672238ADDRESS_MAP_END
24682239
2469static ADDRESS_MAP_START( upd7220_grcg_2_map, AS_0, 16, pc9801_state )
2240static ADDRESS_MAP_START( upd7220_grcg_2_map, AS_0, 8, pc9801_state )
24702241   AM_RANGE(0x00000, 0x3ffff) AM_READWRITE(upd7220_grcg_r, upd7220_grcg_w) AM_SHARE("video_ram_2")
24712242ADDRESS_MAP_END
24722243
r242341r242342
30102781
30112782MACHINE_RESET_MEMBER(pc9801_state,pc9801_common)
30122783{
3013   memset(m_tvram, 0, sizeof(UINT16) * 0x2000);
2784   memset(m_tvram, 0, sizeof(UINT8) * 0x4000);
30142785   /* this looks like to be some kind of backup ram, system will boot with green colors otherwise */
30152786   {
30162787      int i;
r242341r242342
30212792      };
30222793
30232794      for(i=0;i<0x10;i++)
3024         m_tvram[(0x3fe0>>1)+i] = default_memsw_data[i];
2795         m_tvram[(0x3fe0)+i*2] = default_memsw_data[i];
30252796   }
30262797
30272798   m_beeper->set_frequency(2400);
r242341r242342
30312802   m_mouse.control = 0xff;
30322803   m_mouse.freq_reg = 0;
30332804   m_mouse.freq_index = 0;
3034   memset(&m_egc, 0, sizeof(m_egc));
30352805}
30362806
30372807MACHINE_RESET_MEMBER(pc9801_state,pc9801f)
r242341r242342
30992869
31002870FLOPPY_FORMATS_MEMBER( pc9801_state::floppy_formats )
31012871   FLOPPY_PC98_FORMAT,
3102   FLOPPY_PC98FDI_FORMAT,
3103   FLOPPY_FDD_FORMAT,
3104   FLOPPY_DCP_FORMAT,
3105   FLOPPY_DIP_FORMAT,
3106   FLOPPY_NFD_FORMAT
2872   FLOPPY_PC98FDI_FORMAT
31072873FLOPPY_FORMATS_END
31082874
31092875TIMER_DEVICE_CALLBACK_MEMBER( pc9801_state::mouse_irq_cb )
r242341r242342
33893155   ROM_IGNORE( 0x2000 ) \
33903156   ROM_IGNORE( 0x2000 ) \
33913157   ROM_IGNORE( 0x2000 ) \
3392//   ROM_FILL( 0x0000, 0x2000, 0xcb )
3158   ROM_FILL( 0x0000, 0x2000, 0xcb )
33933159
33943160// all of these are half size :/
33953161#define LOAD_KANJI_ROMS \
trunk/src/mess/drivers/qx10.c
r242341r242342
8888   required_device<rs232_port_device> m_kbd;
8989   UINT8 m_vram_bank;
9090   //required_shared_ptr<UINT8> m_video_ram;
91   UINT16 *m_video_ram;
91   UINT8 *m_video_ram;
9292
9393   UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
9494
r242341r242342
115115   DECLARE_READ8_MEMBER( get_slave_ack );
116116   DECLARE_READ8_MEMBER( vram_bank_r );
117117   DECLARE_WRITE8_MEMBER( vram_bank_w );
118   DECLARE_READ16_MEMBER( vram_r );
119   DECLARE_WRITE16_MEMBER( vram_w );
118   DECLARE_READ8_MEMBER( vram_r );
119   DECLARE_WRITE8_MEMBER( vram_w );
120120   DECLARE_READ8_MEMBER(memory_read_byte);
121121   DECLARE_WRITE8_MEMBER(memory_write_byte);
122122   DECLARE_WRITE_LINE_MEMBER(keyboard_clk);
r242341r242342
159159
160160   if(m_color_mode)
161161   {
162      gfx[0] = m_video_ram[((address) + 0x00000) >> 1];
163      gfx[1] = m_video_ram[((address) + 0x20000) >> 1];
164      gfx[2] = m_video_ram[((address) + 0x40000) >> 1];
162      gfx[0] = m_video_ram[(address) + 0x00000];
163      gfx[1] = m_video_ram[(address) + 0x20000];
164      gfx[2] = m_video_ram[(address) + 0x40000];
165165   }
166166   else
167167   {
168      gfx[0] = m_video_ram[(address) >> 1];
168      gfx[0] = m_video_ram[address];
169169      gfx[1] = 0;
170170      gfx[2] = 0;
171171   }
172172
173   for(xi=0;xi<16;xi++)
173   for(xi=0;xi<8;xi++)
174174   {
175      pen = ((gfx[0] >> xi) & 1) ? 1 : 0;
176      pen|= ((gfx[1] >> xi) & 1) ? 2 : 0;
177      pen|= ((gfx[2] >> xi) & 1) ? 4 : 0;
175      pen = ((gfx[0] >> (7-xi)) & 1) ? 1 : 0;
176      pen|= ((gfx[1] >> (7-xi)) & 1) ? 2 : 0;
177      pen|= ((gfx[2] >> (7-xi)) & 1) ? 4 : 0;
178178
179179      bitmap.pix32(y, x + xi) = palette[pen];
180180   }
r242341r242342
193193
194194   for( x = 0; x < pitch; x++ )
195195   {
196      tile = m_video_ram[((addr+x)*2) >> 1] & 0xff;
197      attr = m_video_ram[((addr+x)*2) >> 1] >> 8;
196      tile = m_video_ram[(addr+x)*2];
197      attr = m_video_ram[(addr+x)*2+1];
198198
199199      color = (m_color_mode) ? 1 : (attr & 4) ? 2 : 1; /* TODO: color mode */
200200
r242341r242342
685685void qx10_state::video_start()
686686{
687687   // allocate memory
688   m_video_ram = auto_alloc_array_clear(machine(), UINT16, 0x30000);
688   m_video_ram = auto_alloc_array_clear(machine(), UINT8, 0x60000);
689689
690690   // find memory regions
691691   m_char_rom = memregion("chargen")->base();
r242341r242342
696696   // ...
697697}
698698
699READ16_MEMBER( qx10_state::vram_r )
699READ8_MEMBER( qx10_state::vram_r )
700700{
701701   int bank = 0;
702702
r242341r242342
704704   else if(m_vram_bank & 2) { bank = 1; } // G
705705   else if(m_vram_bank & 4) { bank = 2; } // R
706706
707   return m_video_ram[offset + (0x20000 * bank)] | (m_video_ram[offset + (0x20000 * bank) + 1] << 8);
707   return m_video_ram[offset + (0x20000 * bank)];
708708}
709709
710WRITE16_MEMBER( qx10_state::vram_w )
710WRITE8_MEMBER( qx10_state::vram_w )
711711{
712712   int bank = 0;
713713
r242341r242342
715715   else if(m_vram_bank & 2) { bank = 1; } // G
716716   else if(m_vram_bank & 4) { bank = 2; } // R
717717
718   if(mem_mask & 0xff)
719      m_video_ram[offset + (0x20000 * bank)] = data;
720   if(mem_mask & 0xff00)
721      m_video_ram[offset + (0x20000 * bank) + 1] = data >> 8;
718   m_video_ram[offset + (0x20000 * bank)] = data;
722719}
723720
724static ADDRESS_MAP_START( upd7220_map, AS_0, 16, qx10_state )
721static ADDRESS_MAP_START( upd7220_map, AS_0, 8, qx10_state )
725722   AM_RANGE(0x00000, 0x5ffff) AM_READWRITE(vram_r,vram_w)
726723ADDRESS_MAP_END
727724
trunk/src/mess/drivers/vt240.c
r242341r242342
4343   //UINT8 m_pcg_internal_addr;
4444   //UINT8 *m_char_rom;
4545
46   required_shared_ptr<UINT16> m_video_ram;
46   required_shared_ptr<UINT8> m_video_ram;
4747   DECLARE_DRIVER_INIT(vt240);
4848   virtual void machine_reset();
4949   INTERRUPT_GEN_MEMBER(vt240_irq);
r242341r242342
117117ADDRESS_MAP_END
118118
119119
120static ADDRESS_MAP_START( upd7220_map, AS_0, 16, vt240_state)
120static ADDRESS_MAP_START( upd7220_map, AS_0, 8, vt240_state)
121121   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
122122ADDRESS_MAP_END
123123
trunk/src/mess/includes/compis.h
r242341r242342
8484   required_device<isbx_slot_device> m_isbx0;
8585   required_device<isbx_slot_device> m_isbx1;
8686   required_device<ram_device> m_ram;
87   required_shared_ptr<UINT16> m_video_ram;
87   required_shared_ptr<UINT8> m_video_ram;
8888   required_ioport m_s8;
8989
9090   virtual void machine_start();
trunk/src/mess/includes/genpc.h
r242341r242342
154154   MCFG_DEVICE_ADD(_tag, EC1841_MOTHERBOARD, 0) \
155155   ec1841_mb_device::static_set_cputag(*device, _cputag);
156156
157// ======================> ibm5150_mb_device
158157class ec1841_mb_device : public ibm5160_mb_device
159158{
160159public:
r242341r242342
177176   virtual DECLARE_WRITE_LINE_MEMBER( keyboard_clock_w );
178177};
179178
180
181// device type definition
182179extern const device_type EC1841_MOTHERBOARD;
183180
184181#define MCFG_PCNOPPI_MOTHERBOARD_ADD(_tag, _cputag) \
trunk/src/mess/includes/mc1502.h
r242341r242342
7777
7878private:
7979   int m_pit_out2;
80
81/*
82    TIMER_CALLBACK_MEMBER(fdc_motor_callback);
83    static struct {
84        int         fdc_motor_on;
85        emu_timer   *fdc_motor_timer;
86    } m_motor;
87    const char *m_cputag;
88*/
8980};
9081
9182#endif /* MC1502_H_ */
trunk/src/mess/includes/mikromik.h
r242341r242342
8181   required_memory_region m_rom;
8282   required_memory_region m_mmu_rom;
8383   required_memory_region m_char_rom;
84   required_shared_ptr<UINT16> m_video_ram;
84   required_shared_ptr<UINT8> m_video_ram;
8585
8686   virtual void machine_start();
8787   virtual void machine_reset();
trunk/src/mess/includes/victor9k.h
r242341r242342
9494   required_device<hc55516_device> m_cvsd;
9595   required_device<mc6845_device> m_crtc;
9696   required_device<ram_device> m_ram;
97   required_device<victor_9000_keyboard_t> m_kb;
97   required_device<victor9k_keyboard_device> m_kb;
9898   required_device<victor_9000_fdc_t> m_fdc;
9999   required_device<centronics_device> m_centronics;
100100   required_device<rs232_port_device> m_rs232a;
trunk/src/mess/machine/victor9kb.c
r242341r242342
1616
1717Marking on PCB back: A65-02307-201D 007
1818
19|------------------------------------------------------------------------------------|
20| 22-908-03 22-950-3B     XTAL 8021  74LS14     [804x]           [EPROM]  [???] L CN1=___
19|------------------------------------------------------------------------------------=
20| 22-908-03 22-950-3B .   XTAL 8021  74LS14     [804x]           [EPROM]  [???]   CN1=___
2121|         X       X       X       X       X       X        X      X   X      X      X    |
2222| X    X   X   X   X   X   X   X   X   X   X   X   X   X    X     X   X    X   X   X   X |
2323| X     X   X   X   X   X   X   X   X   X   X   X   X   X    X    X   X    X   X   X   X |
r242341r242342
2525| X    X   X  X   X   X   X   X   X   X   X   X   X       X       X   X    X   X   X   X |
2626| X     X    marking             X                 X              X   X    X   X   X   X |
2727|----------------------------------------------------------------------------------------|
28                                         
2829
29
3030Notes:
3131    All IC's shown.
32    XTAL        - 3.579545Mhz Crystal, marked "48-300-010" (front of xtal) and "3.579545Mhz" (back of xtal)
33    74LS14      - Z4 - 74LS14 Hex inverter with Schmitt-trigger inputs (0.8v hysteresis)
34    8021        - Z3 - Intel 8021 MCU, marked: "P8021 2137 // 8227 // 20-8021-139 // (C) INTEL 77"
35    22-908-03   - Z2 - Exar Semiconductor XR22-008-03 keyboard matrix capacitive readout latch
36    22-950-3B   - Z1 - Exar Semiconductor XR22-050-3B keyboard matrix row driver with 4 to 12 decoder/demultiplexer
37    CN1 or J1   - J1 - keyboard data connector (SIP, 7 pins, right angle)
38    L           - L1 & L2 - mil-spec 22uH 10% inductors (double wide silver band(mil spec), red(2) red(2) black(x1uH) silver(10%))
32    XTAL        - 3.579545Mhz Crystal, marked "48-300-010" (front) and "3.579545Mhz" (back)
33    8021        - Intel 8021 MCU, marked: "iP8021 2137 // 8227 // 20-8021-139 // (C) INTEL 77"
34    22-908-03   - Exar Semiconductor XR22-008-03 keyboard matrix capacitive readout latch
35    22-950-3B   - Exar Semiconductor XR22-050-3B keyboard matrix row driver with 4 to 12 decoder/demultiplexer
36    CN1         - keyboard data connector (SIP, 7 pins, right angle)
3937
4038    [804x]      - unpopulated space for a 40 pin 804x or 803x MCU
4139    [EPROM]     - unpopulated space for an EPROM, if a ROMless 803x MCU was used
4240    [???]       - unpopulated space for an unknown NDIP10 IC or DIP-switch array
4341    X           - capacitive sensor pad for one key
4442    marking     - PCB trace marking: "KTC // A65-02307-007 // PCB 201 D"
45
4674LS14 (Hex inverter with Schmitt-trigger inputs (0.8v hysteresis))
47------------------
48         __   __
49   1A 1 |* \_/  | 14 VCC
50  /1Y 2 |       | 13 6A
51   2A 3 |       | 12 /6Y
52  /2Y 4 |       | 11 5A
53   3A 5 | 74LS14| 10 /5Y
54  /3Y 6 |       | 9  4A
55  GND 7 |_______| 8  /4Y
56
57
58P8021 Pinout
59------------------
60            _____   _____
61   P22   1 |*    \_/     | 28  VCC
62   P23   2 |             | 27  P21
63  PROG   3 |             | 26  P20
64   P00   4 |             | 25  P17
65   P01   5 |    P8021    | 24  P16
66   P02   6 |             | 23  P15
67   P03   7 |             | 22  P14
68   P04   8 |             | 21  P13
69   P05   9 |             | 20  P12
70   P06  10 |             | 19  P11
71   P07  11 |             | 18  P10
72   ALE  12 |             | 17  RESET
73    T1  13 |             | 16  XTAL 2
74   VSS  14 |_____________| 15  XTAL 1
75
76
77XR22-008-03 Pinout (AKA XR22-908-03)
78------------------
79            _____   _____
80    D0   1 |*    \_/     | 20  Vcc
81    D1   2 |             | 19  _CLR
82    D2   3 |             | 18  Q0
83    D3   4 |             | 17  Q1
84   HYS   5 |  22-008-03  | 16  Q2
85    D4   6 |             | 15  Q3
86    D5   7 |             | 14  Q4
87    D6   8 |             | 13  Q5
88    D7   9 |             | 12  Q6
89   GND  10 |_____________| 11  Q7
90
91
92XR22-050-3B Pinout (AKA XR22-950-3B)
93------------------
94            _____   _____
95    Y8   1 |*    \_/     | 20  Vcc
96    Y9   2 |             | 19  Y7
97   Y10   3 |             | 18  Y6
98   Y11   4 |             | 17  Y5
99  _STB   5 |  22-050-3B  | 16  Y4
100    A0   6 |             | 15  Y3
101    A1   7 |             | 14  Y2
102    A2   8 |             | 13  Y1
103    A3   9 |             | 12  Y0
104   GND  10 |_____________| 11  OE?
105
106i8021 to elsewhere connections
107------------------------------
1088021 pin - 22-xxx pin
109  P22  1 - 74LS14 pin 5 (3A)                            AND (804x chip pin 37, P26)
110  P23  2 - 74LS14 pin 11 (5A)                           AND (804x chip pin 38, P27)
111 PROG  3 -                                                  (804x chip pin 25, PROG)
112  P00  4 - N/C
113  P01  5 - N/C
114  P02  6 - N/C
115  P03  7 - N/C
116  P04  8 - N/C
117  P05  9 - N/C
118  P06 10 - N/C
119  P07 11 - N/C
120  ALE 12 - N/C
121   T1 13 - 74LS14 pin 2 (/1Y)                           AND (804x chip pin 39, T1)
122  VSS 14 - GND
123XTAL1 15 - XTAL
124XTAL2 16 - XTAL
125RESET 17 - 10uf capacitor - VCC
126  P10 18 - 22-908 pin 18 (Q0) AND 22-950 pin 6 (A0)     AND (804x chip pin 27, P10)
127  P11 19 - 22-908 pin 17 (Q1) AND 22-950 pin 7 (A1)     AND (804x chip pin 28, P11)
128  P12 20 - 22-908 pin 16 (Q2) AND 22-950 pin 8 (A2)     AND (804x chip pin 29, P12)
129  P13 21 - 22-908 pin 15 (Q3) AND 22-950 pin 9 (A3)     AND (804x chip pin 30, P13)
130  P14 22 - 22-908 pin 14 (Q4)                           AND (804x chip pin 31, P14)
131  P15 23 - 22-908 pin 13 (Q5)                           AND (804x chip pin 32, P15)
132  P16 24 - 22-908 pin 12 (Q6)                           AND (804x chip pin 33, P16)
133  P17 25 - 22-908 pin 11 (Q7)                           AND (804x chip pin 34, P17)
134  P20 26 - 22-908 pin 19 (/CLR) AND 22-950 pin 5 (/STB) AND (804x chip pin 35, P24)
135  P21 27 - 74LS14 pin 9 (4A)                            AND (804x chip pin 36, P25)
136  VCC 28 - VCC
137
13874LS14 to elsewhere connections
139-------------------------------
140  1A  1 - 100 Ohm resistor - J1 pin 4
141 /1Y  2 - 8021 pin 13 (T1)
142  2A  3 - 74LS14 pin 8
143 /2Y  4 - 22uH 10% inductor 'L1' - J1 pin 5
144  3A  5 - 8021 pin 1 (P22)
145 /3Y  6 - many keyboard contact pads (!)
146 GND  7 - GND
147 /4Y  8 - 74LS14 pin 3
148  4A  9 - 8021 pin 27 (P21)
149 /5Y 10 - 74LS14 pin 13
150  5A 11 - 8021 pin 2 (P23)
151 /6Y 12 - 22uH 10% inductor 'L2' - J1 pin 6
152  6A 13 - 74LS14 pin 10
153 VCC 14 - VCC
154
155
156J1 (aka CN1) connections:
157-------------------------
1581 - VCC
1592 - GND
1603 - GND
1614 - 100 Ohm 5% resistor -> 74LS14 pin 1 -> inverted 74LS14 pin 2 -> inverted 8021 pin 13 (T1)
1625 - 22uH 10% inductor 'L1' <- 74LS14 pin 4 <- inverted 74LS14 pin 3 <- inverted 74LS14 pin 8 <- 74LS14 pin 9 <- 8021 pin 27 (P21)
1636 - 22uH 10% inductor 'L2' <- 74LS14 pin 12 <- inverted 74LS14 pin 13 <- inverted 74LS14 pin 10 <- 74LS14 pin 11 <- 8021 pin 2 (P23)
1647 - VCC
165
166Pins 5,and 6 also have a .0047uF capacitor to GND (forming some sort of LC filter)
167There is another .0047uF capacitor to ground from the connection between 74LS14 pin 1 and the 100 Ohm 5% resistor which connects to pin 4 (forming some sort of RC filter)
168
169Exar Custom connections between each other:
170-------------------------------------------
17122-950 pin 11 (OE?) - 68KOhm 5% resistor - 22-908 pin 5 (HYS)
172
173Cable connecting J1/CN1 to the Victor:
174--------------------------------------
175RJ45 when looking at end of plug (not socket!)
176.||||||||.
177|87654321|
178|__----__|
179   |__|
180
181RJ45 pins   Wire Color   Connection
1821           White        J1 pin 1 (VCC)
1832           Yellow       J1 pin 2 (GND)
1843           Green        J1 pin 3 (GND)
1854           Orange       J1 pin 4 (?KBACK?)
1865           Blue         J1 pin 5 (?KBRDY?)
1876           Red          J1 pin 6 (?KBDATA?)
1887           Black        J1 pin 7 (VCC)
1898           shield/bare  Keyboard Frame Ground
190
191
192Key Layout (USA Variant): (the S0x markings appear on the back of the PCB)
193|------------------------------------------------------------------------------------|
194| 22-908-03 22-950-3B     XTAL 8021  74LS14     [804x]           [EPROM]  [???] L CN1=___
195|         01      02      03      04      05      06       07     08  09     10     11   |
196| 12   13  14  15  16  17  18  19  20  21  22  23  24  25   26    27  28   29  30  31 32 |
197| 33    34  35  36  37  38  39  40  41  42  43  44  45  46   47   48  49   50  51  52 53 |
198| 54    55   56  57  58  59  60  61  62  63  64  65  66  67   68  69  70   71  72  73 74 |
199| 75   76  77 78  79  80  81  82  83  84  85  86  87      88      89  90   91  92  93 94 |
200| 95    96   marking             97                98             99 100  101 102 103 104|
201|----------------------------------------------------------------------------------------|
202
203   key - Shifted(top)/Unshifted(bottom)/Alt(front) (if no slashes in description assume key has just one symbol on it)
204   S01 - [1]
205   S02 - [2]
206   S03 - [3]
207   S04 - [4]
208   S05 - [5]
209   S06 - [6]
210   S07 - [7]
211   S08 - [8]
212   S09 - UNUSED (under the [8] key, no metal contact on key)
213   S10 - [9]
214   S11 - [10]
215
216   S12 - CLR/HOME
217   S13 - (Degree symbol U+00B0)/(+- symbol U+00B1)/(Pi symbol U+03C0)
218   S14 - !/1/|
219   S15 - @/2/<
220   S16 - #/3/>
221   S17 - $/4/(centered closed dot U+00B7)
222   S18 - %/5/(up arrow symbol U+2191)
223   S19 - (cent symbol U+00A2)/6/(logical not symbol U+00AC)
224   S20 - &/7/^
225   S21 - * /8/`
226   S22 - (/9/{
227   S23 - )/0/}
228   S24 - _/-/~
229   S25 - +/=/\
230   S26 - BACKSPACE
231   S27 - INS
232   S28 - DEL
233   S29 - MODE CALC/= (white keypad key)
234   S30 - % (white keypad key)
235   S31 - (division symbol U+00F7) (white keypad key)
236   S32 - (multiplication symbol U+00D7) (white keypad key)
237
238   S33 - (up arrow, SCRL, down arrow)//VTAB
239   S34 - TAB//BACK
240   S35 - Q
241   S36 - W
242   S37 - E
243   S38 - R
244   S39 - T
245   S40 - Y
246   S41 - U
247   S42 - I
248   S43 - O
249   S44 - P
250   S45 - (1/4 symbol U+00BC)/(1/2 symbol U+00BD)
251   S46 - [/]
252   S47 - UNUSED (under the RETURN key, no metal contact on key)
253   S48 - ERASE/EOL
254   S49 - REQ/CAN
255   S50 - 7 (white keypad key)
256   S51 - 8 (white keypad key)
257   S52 - 9 (white keypad key)
258   S53 - - (white keypad key)
259
260   S54 - (OFF,RVS,ON)//ESC
261   S55 - LOCK//CAPS LOCK
262   S56 - A
263   S57 - S
264   S58 - D
265   S59 - F
266   S60 - G
267   S61 - H
268   S62 - J
269   S63 - K
270   S64 - L
271   S65 - :/;
272   S66 - "/'
273   S67 - UNUSED (under the RETURN key, no metal contact on key)
274   S68 - RETURN
275   S69 - WORD/(left arrow U+2190)/(volume up U+1F508 plus U+25B4) (i.e. 'Previous Word')
276   S70 - WORD/(right arrow U+2192)/(volume down U+1F508 plus U+25BE) (i.e. 'Next Word')
277   S71 - 4 (white keypad key)
278   S72 - 5 (white keypad key)
279   S73 - 6 (white keypad key)
280   S74 - + (white keypad key)
281
282   S75 - (OFF,UNDL,ON)
283   S76 - SHIFT (left shift)
284   S77 - UNUSED (under the left SHIFT key, no metal contact on key)
285   S78 - Z
286   S79 - X
287   S80 - C
288   S81 - V
289   S82 - B
290   S83 - N
291   S84 - M
292   S85 - ,/, (yes, both are comma)
293   S86 - ./. (yes, both are period/fullstop)
294   S87 - ?// (this is the actual / key)
295   S88 - SHIFT (right shift)
296   S89 - (up arrow U+2191)//(brightness up U+263C plus U+25B4)
297   S90 - (down arrow U+2193)//(brightness down U+263C plus U+25BE)
298   S91 - 1 (white keypad key)
299   S92 - 2 (white keypad key)
300   S93 - 3 (white keypad key)
301   S94 - ENTER (white keypad key)
302
303   S95 - RPT
304   S96 - ALT
305   S97 - (spacebar)
306   S98 - PAUSE/CONT
307   S99 - (left arrow U+2190)//(contrast up U+25D0 plus U+25B4) (U+1F313 can be used in place of U+25D0)
308   S100 - (right arrow U+2192)//(contrast down U+25D0 plus U+25BE) ''
309   S101 - 0 (white keypad key)
310   S102 - 00 (white keypad key) ('double zero')
311   S103 - . (white keypad key)
312   S104 - UNUSED (under the ENTER (keypad) key, no metal contact on key)
313
314   Note that the five unused key contacts:
315   S09, S47, S67, S77 and S104
316   may be used on international variants of the Victor 9000/Sirius 1 Keyboard.
317
318Keyboard Matrix
319---------------
320Row select
321|         Columns
322|         0   1   2   3   4   5   6   7
323V         V   V   V   V   V   V   V   V
324Y0        12  13  33  34  54  55  75  76
325Y1        14  15  35  36  56  57  77  78
326Y2        16  17  37  38  58  59  79  80
327Y3        18  19  39  40  60  61  81  82
328Y4        20  21  41  42  62  63  83  84
329Y5        22  23  43  44  64  65  85  86
330Y6        24  25  45  46  66  67  87  88
331Y7        26  27  47  48  68  69  89  90
332Y8        28  29  49  50  70  71  91  92
333Y9        30  31  51  52  72  73  93  94
334Y10       32  11  53  10  74  09  07  06
335Y11       104 103 102 101 100 99  98  97
336/3Y       05  04  03  02  01  08  95  96
337
33843*/
33944
34045#include "victor9kb.h"
r242341r242342
34550//  MACROS / CONSTANTS
34651//**************************************************************************
34752
348#define I8021_TAG   "z3"
53#define I8021_TAG       "z3"
34954
350#define LOG       0
35155
35256
353
35457//**************************************************************************
35558//  DEVICE DEFINITIONS
35659//**************************************************************************
35760
358const device_type VICTOR9K_KEYBOARD = &device_creator<victor_9000_keyboard_t>;
61const device_type VICTOR9K_KEYBOARD = &device_creator<victor9k_keyboard_device>;
35962
36063
36164//-------------------------------------------------
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37275//  rom_region - device-specific ROM region
37376//-------------------------------------------------
37477
375const rom_entry *victor_9000_keyboard_t::device_rom_region() const
78const rom_entry *victor9k_keyboard_device::device_rom_region() const
37679{
37780   return ROM_NAME( victor9k_keyboard );
37881}
r242341r242342
38285//  ADDRESS_MAP( kb_io )
38386//-------------------------------------------------
38487
385static ADDRESS_MAP_START( victor9k_keyboard_io, AS_IO, 8, victor_9000_keyboard_t )
88static ADDRESS_MAP_START( victor9k_keyboard_io, AS_IO, 8, victor9k_keyboard_device )
38689   AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(kb_p1_r, kb_p1_w)
38790   AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_p2_w)
38891   AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(kb_t1_r)
r242341r242342
404107//  machine configurations
405108//-------------------------------------------------
406109
407machine_config_constructor victor_9000_keyboard_t::device_mconfig_additions() const
110machine_config_constructor victor9k_keyboard_device::device_mconfig_additions() const
408111{
409112   return MACHINE_CONFIG_NAME( victor9k_keyboard );
410113}
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476179   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
477180
478181   PORT_START("Y6")
479   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
480   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
481   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
482   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
483   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
484   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
485   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
486   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
182   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q)
183   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W)
184   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E)
185   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R)
186   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T)
187   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y)
188   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U)
189   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I)
487190
488191   PORT_START("Y7")
489192   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
r242341r242342
551254//  input_ports - device-specific input ports
552255//-------------------------------------------------
553256
554ioport_constructor victor_9000_keyboard_t::device_input_ports() const
257ioport_constructor victor9k_keyboard_device::device_input_ports() const
555258{
556259   return INPUT_PORTS_NAME( victor9k_keyboard );
557260}
r242341r242342
563266//**************************************************************************
564267
565268//-------------------------------------------------
566//  victor_9000_keyboard_t - constructor
269//  victor9k_keyboard_device - constructor
567270//-------------------------------------------------
568271
569victor_9000_keyboard_t::victor_9000_keyboard_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
272victor9k_keyboard_device::victor9k_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
570273   device_t(mconfig, VICTOR9K_KEYBOARD, "Victor 9000 Keyboard", tag, owner, clock, "victor9kb", __FILE__),
571274   m_maincpu(*this, I8021_TAG),
572275   m_y0(*this, "Y0"),
r242341r242342
582285   m_ya(*this, "YA"),
583286   m_yb(*this, "YB"),
584287   m_yc(*this, "YC"),
585   m_kbrdy_cb(*this),
586   m_kbdata_cb(*this),
288   m_kbrdy_handler(*this),
289   m_kbdata_handler(*this),
587290   m_y(0),
588291   m_kbrdy(-1),
589292   m_kbdata(-1),
r242341r242342
596299//  device_start - device-specific startup
597300//-------------------------------------------------
598301
599void victor_9000_keyboard_t::device_start()
302void victor9k_keyboard_device::device_start()
600303{
601304   // resolve callbacks
602   m_kbrdy_cb.resolve_safe();
603   m_kbdata_cb.resolve_safe();
305   m_kbrdy_handler.resolve_safe();
306   m_kbdata_handler.resolve_safe();
604307
605308   // state saving
606   save_item(NAME(m_p1));
607309   save_item(NAME(m_y));
608   save_item(NAME(m_stb));
609   save_item(NAME(m_y12));
610310   save_item(NAME(m_kbrdy));
611311   save_item(NAME(m_kbdata));
612312   save_item(NAME(m_kback));
r242341r242342
614314
615315
616316//-------------------------------------------------
617//  kback_w -
317//  device_reset - device-specific reset
618318//-------------------------------------------------
619319
620WRITE_LINE_MEMBER( victor_9000_keyboard_t::kback_w )
320void victor9k_keyboard_device::device_reset()
621321{
622   if (LOG) logerror("KBACK %u\n", state);
322}
623323
624   m_kback = !state;
324
325//-------------------------------------------------
326//  kback_w -
327//-------------------------------------------------
328
329WRITE_LINE_MEMBER( victor9k_keyboard_device::kback_w )
330{
331   //logerror("KBACK %u\n", state);
332   m_kback = state;
625333}
626334
627335
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629337//  kb_p1_r -
630338//-------------------------------------------------
631339
632READ8_MEMBER( victor_9000_keyboard_t::kb_p1_r )
340READ8_MEMBER( victor9k_keyboard_device::kb_p1_r )
633341{
634342   UINT8 data = 0xff;
635343
r242341r242342
647355      case 9: data &= m_y9->read(); break;
648356      case 0xa: data &= m_ya->read(); break;
649357      case 0xb: data &= m_yb->read(); break;
358      case 0xc: data &= m_yc->read(); break;
650359   }
651360
652   if (!m_y12)
653   {
654      data &= m_yc->read();
655   }
656
657361   return data;
658362}
659363
r242341r242342
662366//  kb_p1_w -
663367//-------------------------------------------------
664368
665WRITE8_MEMBER( victor_9000_keyboard_t::kb_p1_w )
369WRITE8_MEMBER( victor9k_keyboard_device::kb_p1_w )
666370{
667   m_p1 = data;
371   if ((data & 0xf0) == 0x20)
372   {
373      m_y = data & 0x0f;
374   }
375
376   //logerror("%s P1 %02x\n", machine().describe_context(), data);
668377}
669378
670379
r242341r242342
672381//  kb_p2_w -
673382//-------------------------------------------------
674383
675WRITE8_MEMBER( victor_9000_keyboard_t::kb_p2_w )
384WRITE8_MEMBER( victor9k_keyboard_device::kb_p2_w )
676385{
677386   /*
678387
679388       bit     description
680389
681       P20     22-908 CLR, 22-950 STB
390       P20     ?
682391       P21     KBRDY
683       P22     Y12
392       P22     ?
684393       P23     KBDATA
685394
686395   */
687396
688   // keyboard rows 0-11
689   if (!BIT(data, 0))
397   int kbrdy = BIT(data, 1);
398
399   if (m_kbrdy != kbrdy)
690400   {
691      m_y = m_p1 & 0x0f;
401      m_kbrdy = kbrdy;
402      m_kbrdy_handler(m_kbrdy);
692403   }
693404
694   // keyboard row 12
695   m_y12 = BIT(data, 2);
405   int kbdata = BIT(data, 3);
696406
697   // keyboard ready
698   m_kbrdy_cb(BIT(data, 1));
407   if (m_kbdata != kbdata)
408   {
409      m_kbdata = kbdata;
410      m_kbdata_handler(m_kbdata);
411   }
699412
700   // keyboard data
701   m_kbdata_cb(BIT(data, 3));
413   //logerror("%s P2 %01x\n", machine().describe_context(), data&0x0f);
702414}
703415
704416
r242341r242342
706418//  kb_t1_r -
707419//-------------------------------------------------
708420
709READ8_MEMBER( victor_9000_keyboard_t::kb_t1_r )
421READ8_MEMBER( victor9k_keyboard_device::kb_t1_r )
710422{
711423   return m_kback;
712424}
trunk/src/mess/machine/victor9kb.h
r242341r242342
2525//**************************************************************************
2626
2727#define MCFG_VICTOR9K_KBRDY_HANDLER(_devcb) \
28   devcb = &victor_9000_keyboard_t::set_kbrdy_cb(*device, DEVCB_##_devcb);
28   devcb = &victor9k_keyboard_device::set_kbrdy_handler(*device, DEVCB_##_devcb);
2929
3030#define MCFG_VICTOR9K_KBDATA_HANDLER(_devcb) \
31   devcb = &victor_9000_keyboard_t::set_kbdata_cb(*device, DEVCB_##_devcb);
31   devcb = &victor9k_keyboard_device::set_kbdata_handler(*device, DEVCB_##_devcb);
3232
3333
3434//**************************************************************************
3535//  TYPE DEFINITIONS
3636//**************************************************************************
3737
38// ======================> victor_9000_keyboard_t
38// ======================> victor9k_keyboard_device
3939
40class victor_9000_keyboard_t :  public device_t
40class victor9k_keyboard_device :  public device_t
4141{
4242public:
4343   // construction/destruction
44   victor_9000_keyboard_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
44   victor9k_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
4545
46   template<class _Object> static devcb_base &set_kbrdy_cb(device_t &device, _Object object) { return downcast<victor_9000_keyboard_t &>(device).m_kbrdy_cb.set_callback(object); }
47   template<class _Object> static devcb_base &set_kbdata_cb(device_t &device, _Object object) { return downcast<victor_9000_keyboard_t &>(device).m_kbdata_cb.set_callback(object); }
46   template<class _Object> static devcb_base &set_kbrdy_handler(device_t &device, _Object object) { return downcast<victor9k_keyboard_device &>(device).m_kbrdy_handler.set_callback(object); }
47   template<class _Object> static devcb_base &set_kbdata_handler(device_t &device, _Object object) { return downcast<victor9k_keyboard_device &>(device).m_kbdata_handler.set_callback(object); }
4848
4949   // optional information overrides
5050   virtual const rom_entry *device_rom_region() const;
r242341r242342
6262protected:
6363   // device-level overrides
6464   virtual void device_start();
65   virtual void device_reset();
6566
6667private:
6768   required_device<cpu_device> m_maincpu;
r242341r242342
7980   required_ioport m_yb;
8081   required_ioport m_yc;
8182
82   devcb_write_line   m_kbrdy_cb;
83   devcb_write_line   m_kbdata_cb;
83   devcb_write_line   m_kbrdy_handler;
84   devcb_write_line   m_kbdata_handler;
8485
85   UINT8 m_p1;
8686   UINT8 m_y;
87   int m_stb;
88   int m_y12;
8987   int m_kbrdy;
9088   int m_kbdata;
9189   int m_kback;
trunk/src/mess/video/mikromik.c
r242341r242342
3838//  ADDRESS_MAP( mm1_upd7220_map )
3939//-------------------------------------------------
4040
41static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 16, mm1_state )
41static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 8, mm1_state )
4242   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
4343   AM_RANGE(0x0000, 0x7fff) AM_RAM AM_SHARE("video_ram")
4444ADDRESS_MAP_END
r242341r242342
5050
5151UPD7220_DISPLAY_PIXELS_MEMBER( mm1_state::hgdc_display_pixels )
5252{
53   UINT16 data = m_video_ram[address >> 1];
53   UINT8 data = m_video_ram[address];
5454
55   for (int i = 0; i < 16; i++)
55   for (int i = 0; i < 8; i++)
5656   {
57      if (BIT(data, i)) bitmap.pix32(y, x + i) = m_palette->pen(1);
57      if (BIT(data, 7 - i)) bitmap.pix32(y, x + i) = m_palette->pen(1);
5858   }
5959}
6060

https://github.com/mamedev/mame/commit/787f186d48fd16c7d5a523d43c83ddca48e8cc6c

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