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r33807 Wednesday 10th December, 2014 at 23:27:13 UTC by Carl
upd7220: reverse bit order and make address space 16 bit (nw)
(mess) pc9801: egc wip (nw)
[src/emu/bus/isa]num9rev.c
[src/emu/bus/wangpc]tig.c
[src/emu/video]upd7220.c upd7220.h
[src/mess/drivers]a5105.c apc.c compis.c dmv.c if800.c mz3500.c mz6500.c pc9801.c qx10.c vt240.c
[src/mess/includes]compis.h mikromik.h
[src/mess/video]mikromik.c

trunk/src/emu/bus/isa/num9rev.c
r242318r242319
1111
1212const device_type ISA8_NUM_9_REV = &device_creator<isa8_number_9_rev_device>;
1313
14static ADDRESS_MAP_START( upd7220_map, AS_0, 8, isa8_number_9_rev_device )
14static ADDRESS_MAP_START( upd7220_map, AS_0, 16, isa8_number_9_rev_device )
1515   AM_RANGE(0x00000, 0x3ffff) AM_NOP
1616ADDRESS_MAP_END
1717
r242318r242319
2222   {
2323      rgb_t color(0);
2424      UINT16 overlay;
25      if(((address << 3) + 0xc0008) > (1024*1024))
25      if(((address << 4) + 0xc0016) > (1024*1024))
2626         return;
27      for(int i = 0; i < 8; i++)
27      for(int i = 0; i < 16; i++)
2828      {
29         UINT32 addr = (address << 3) + i;
29         UINT32 addr = (address << 4) + i;
3030         overlay = m_ram[addr + 0xc0000] << 1;
3131         overlay = m_overlay[overlay + ((m_mode & 8) ? 512 : 0)] | (m_overlay[overlay + 1 + ((m_mode & 8) ? 512 : 0)] << 8);
3232         color.set_r(pal->entry_color(m_ram[addr] | ((overlay & 0xf) << 8)).r());
r242318r242319
3737   }
3838   else
3939   {
40      if(((address << 3) + 8) > (1024*1024))
40      if(((address << 4) + 16) > (1024*1024))
4141         return;
42      for(int i = 0; i < 8; i++)
43         bitmap.pix32(y, x + i) = pal->entry_color(m_ram[(address << 3) + i]);
42      for(int i = 0; i < 16; i++)
43         bitmap.pix32(y, x + i) = pal->entry_color(m_ram[(address << 4) + i]);
4444   }
4545}
4646
trunk/src/emu/bus/wangpc/tig.c
r242318r242319
8383//  UPD7220_INTERFACE( hgdc0_intf )
8484//-------------------------------------------------
8585
86static ADDRESS_MAP_START( upd7220_0_map, AS_0, 8, wangpc_tig_device )
86static ADDRESS_MAP_START( upd7220_0_map, AS_0, 16, wangpc_tig_device )
8787   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
8888   AM_RANGE(0x0000, 0x0fff) AM_MIRROR(0x1000) AM_RAM // frame buffer
8989   AM_RANGE(0x4000, 0x7fff) AM_RAM // font memory
r242318r242319
9898//  UPD7220_INTERFACE( hgdc1_intf )
9999//-------------------------------------------------
100100
101static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, wangpc_tig_device )
101static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, wangpc_tig_device )
102102   ADDRESS_MAP_GLOBAL_MASK(0xffff)
103103   AM_RANGE(0x0000, 0xffff) AM_RAM // graphics memory
104104ADDRESS_MAP_END
trunk/src/emu/video/upd7220.c
r242318r242319
148148
149149
150150// default address map
151static ADDRESS_MAP_START( upd7220_vram, AS_0, 8, upd7220_device )
151static ADDRESS_MAP_START( upd7220_vram, AS_0, 16, upd7220_device )
152152   AM_RANGE(0x00000, 0x3ffff) AM_RAM
153153ADDRESS_MAP_END
154154
r242318r242319
206206   space().write_byte(address, data);
207207}
208208
209inline UINT16 upd7220_device::readword(offs_t address)
210{
211   return space().read_word(address);
212}
213
214
215inline void upd7220_device::writeword(offs_t address, UINT16 data)
216{
217   space().write_word(address, data);
218}
219
209220//-------------------------------------------------
210221//  fifo_clear -
211222//-------------------------------------------------
r242318r242319
495506
496507   result = 0;
497508
498   if(((m_mode & UPD7220_MODE_DISPLAY_MASK) == UPD7220_MODE_DISPLAY_GRAPHICS) || m_figs.m_gd)
499      result = BITSWAP8(m_pr[1],0,1,2,3,4,5,6,7) | (BITSWAP8(m_pr[2],0,1,2,3,4,5,6,7) << 8);
500   else
501      result = m_pr[1] | (m_pr[2] << 8);
509   result = m_pr[1] | (m_pr[2] << 8);
502510
503511   switch(type)
504512   {
r242318r242319
526534      switch(mod & 3)
527535      {
528536         case 0x00: //replace
529            if(type == 0 || type == 2)
537            if(type == 0)
538               writeword(m_ead*2+0, result);
539            if(type == 2)
530540               writebyte(m_ead*2+0, result & 0xff);
531            if(type == 0 || type == 3)
541            if(type == 3)
532542               writebyte(m_ead*2+1, result >> 8);
533543            break;
534544         case 0x01: //complement
535            if(type == 0 || type == 2)
545            if(type == 0)
546               writeword(m_ead*2+0, readword(m_ead*2+0) ^ result);
547            if(type == 2)
536548               writebyte(m_ead*2+0, readbyte(m_ead*2+0) ^ (result & 0xff));
537            if(type == 0 || type == 3)
549            if(type == 3)
538550               writebyte(m_ead*2+1, readbyte(m_ead*2+1) ^ (result >> 8));
539551            break;
540552         case 0x02: //reset to zero
541            if(type == 0 || type == 2)
553            if(type == 0)
554               writeword(m_ead*2+0, readword(m_ead*2+0) & ~result);
555            if(type == 2)
542556               writebyte(m_ead*2+0, readbyte(m_ead*2+0) & ~(result & 0xff));
543            if(type == 0 || type == 3)
557            if(type == 3)
544558               writebyte(m_ead*2+1, readbyte(m_ead*2+1) & ~(result >> 8));
545559            break;
546560         case 0x03: //set to one
547            if(type == 0 || type == 2)
561            if(type == 0)
562               writeword(m_ead*2+0, readword(m_ead*2+0) | result);
563            if(type == 2)
548564               writebyte(m_ead*2+0, readbyte(m_ead*2+0) | (result & 0xff));
549            if(type == 0 || type == 3)
565            if(type == 3)
550566               writebyte(m_ead*2+1, readbyte(m_ead*2+1) | (result >> 8));
551567            break;
552568      }
r242318r242319
631647   m_disp(0),
632648   m_gchr(0),
633649   m_bitmap_mod(0),
634   m_space_config("videoram", ENDIANNESS_LITTLE, 8, 18, 0, NULL, *ADDRESS_MAP_NAME(upd7220_vram))
650   m_space_config("videoram", ENDIANNESS_LITTLE, 16, 18, 0, NULL, *ADDRESS_MAP_NAME(upd7220_vram))
635651{
636652   for (int i = 0; i < 16; i++)
637653   {
r242318r242319
773789void upd7220_device::draw_pixel(int x, int y, int xi, UINT16 tile_data)
774790{
775791   UINT32 addr = ((y * (m_pitch << (m_figs.m_gd ? 0 : 1))) + (x >> 3)) & 0x3ffff;
776   UINT8 data = readbyte(addr);
777   UINT8 new_pixel = (xi & 8 ? tile_data >> 8 : tile_data & 0xff) & (0x80 >> (xi & 7));
778   new_pixel = new_pixel ? (0xff & (0x80 >> (x & 7))) : 0;
792   UINT16 data = readword(addr);
793   UINT16 new_pixel = (tile_data & (1 << (xi & 0xf))) ? (1 << (x & 0xf)) : 0;
779794
780795   switch(m_bitmap_mod)
781796   {
782797      case 0: //replace
783         writebyte(addr, (data & ~(0x80 >> (x & 7))) | new_pixel);
798         writeword(addr, (data & ~(1 << (x & 0xf))) | new_pixel);
784799         break;
785800      case 1: //complement
786         writebyte(addr, data ^ new_pixel);
801         writeword(addr, data ^ new_pixel);
787802         break;
788803      case 2: //reset
789         writebyte(addr, data & ~new_pixel);
804         writeword(addr, data & ~new_pixel);
790805         break;
791806      case 3: //set
792         writebyte(addr, data | new_pixel);
807         writeword(addr, data | new_pixel);
793808         break;
794809   }
795810}
r242318r242319
9861001
9871002   for(int pi = 0; pi < psize; pi++)
9881003   {
989      tile_data = BITSWAP8(m_ra[((psize-1-pi) & 7) | 8],0,1,2,3,4,5,6,7);
990      tile_data = (tile_data << 8) | (tile_data & 0xff);
1004      tile_data = (m_ra[((psize-1-pi) & 7) | 8] << 8) | m_ra[((psize-1-pi) & 7) | 8];
9911005      for(int pz = 0; pz <= m_gchr; pz++)
9921006      {
9931007         for(int ii = 0, curpixel = 0; ii < isize; ii++)
r242318r242319
15721586
15731587   for (sx = 0; sx < pitch; sx++)
15741588   {
1575      if((sx << 3) < m_aw * 16 && y < al)
1576         m_display_cb(bitmap, y, sx << 3, addr);
1589      if((sx << 4) < m_aw * 16 && y < al)
1590         m_display_cb(bitmap, y, sx << 4, addr);
15771591
1578      addr+= wd + 1;
1592      addr+= (wd + 1) * 2;
15791593   }
15801594}
15811595
trunk/src/emu/video/upd7220.h
r242318r242319
126126
127127   inline UINT8 readbyte(offs_t address);
128128   inline void writebyte(offs_t address, UINT8 data);
129   inline UINT16 readword(offs_t address);
130   inline void writeword(offs_t address, UINT16 data);
129131   inline void fifo_clear();
130132   inline int fifo_param_count();
131133   inline void fifo_set_direction(int dir);
trunk/src/mess/drivers/a5105.c
r242318r242319
7373   DECLARE_WRITE8_MEMBER( a5105_upd765_w );
7474   DECLARE_WRITE8_MEMBER(pcg_addr_w);
7575   DECLARE_WRITE8_MEMBER(pcg_val_w);
76   required_shared_ptr<UINT8> m_video_ram;
76   required_shared_ptr<UINT16> m_video_ram;
7777   UINT8 *m_ram_base;
7878   UINT8 *m_rom_base;
7979   UINT8 *m_char_ram;
r242318r242319
100100   int xi,gfx;
101101   UINT8 pen;
102102
103   gfx = m_video_ram[address & 0x1ffff];
103   gfx = m_video_ram[(address & 0x1ffff) >> 1];
104104
105   for(xi=0;xi<8;xi++)
105   for(xi=0;xi<16;xi++)
106106   {
107107      pen = ((gfx >> xi) & 1) ? 7 : 0;
108108
r242318r242319
120120
121121   for( x = 0; x < pitch; x++ )
122122   {
123      tile = (m_video_ram[((addr+x)*2) & 0x1ffff] & 0xff);
124      color = (m_video_ram[((addr+x)*2+1) & 0x1ffff] & 0x0f);
123      tile = (m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] & 0xff);
124      color = ((m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] >> 8) & 0x0f);
125125
126126      for( yi = 0; yi < lr; yi++)
127127      {
r242318r242319
533533   m_char_ram = memregion("pcg")->base();
534534}
535535
536static ADDRESS_MAP_START( upd7220_map, AS_0, 8, a5105_state)
536static ADDRESS_MAP_START( upd7220_map, AS_0, 16, a5105_state)
537537   ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
538538   AM_RANGE(0x00000, 0x1ffff) AM_RAM AM_SHARE("video_ram")
539539ADDRESS_MAP_END
trunk/src/mess/drivers/apc.c
r242318r242319
9999   UINT8 *m_char_rom;
100100   UINT8 *m_aux_pcg;
101101
102   required_shared_ptr<UINT8> m_video_ram_1;
103   required_shared_ptr<UINT8> m_video_ram_2;
102   required_shared_ptr<UINT16> m_video_ram_1;
103   required_shared_ptr<UINT16> m_video_ram_2;
104104
105105   required_device<palette_device> m_palette;
106106
r242318r242319
210210//      tile_addr = addr+(x*(m_video_ff[WIDTH40_REG]+1));
211211      tile_addr = addr+(x*(1));
212212
213      tile = m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0x00ff;
214      tile_sel = m_video_ram_1[(tile_addr*2) & 0x1fff] & 0x00ff;
215      attr = (m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0x00ff);
213      tile = (m_video_ram_1[((tile_addr*2) & 0x1fff) >> 1] >> 8) & 0x00ff;
214      tile_sel = m_video_ram_1[((tile_addr*2) & 0x1fff) >> 1] & 0x00ff;
215      attr = (m_video_ram_1[((tile_addr*2 & 0x1fff) | 0x2000) >> 1] & 0x00ff);
216216
217217      u_line = attr & 0x01;
218218      o_line = attr & 0x02;
r242318r242319
784784
785785
786786
787static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, apc_state)
787static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, apc_state)
788788   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_1")
789789ADDRESS_MAP_END
790790
791static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, apc_state )
791static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, apc_state )
792792   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
793793ADDRESS_MAP_END
794794
trunk/src/mess/drivers/compis.c
r242318r242319
312312//  ADDRESS_MAP( upd7220_map )
313313//-------------------------------------------------
314314
315static ADDRESS_MAP_START( upd7220_map, AS_0, 8, compis_state )
315static ADDRESS_MAP_START( upd7220_map, AS_0, 16, compis_state )
316316   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
317317   AM_RANGE(0x00000, 0x7fff) AM_RAM AM_SHARE("video_ram")
318318ADDRESS_MAP_END
r242318r242319
451451
452452UPD7220_DISPLAY_PIXELS_MEMBER( compis_state::hgdc_display_pixels )
453453{
454   UINT8 i,gfx = m_video_ram[(address & 0x7fff)];
454   UINT16 i,gfx = m_video_ram[(address & 0x7fff) >> 1];
455455   const pen_t *pen = m_palette->pens();
456456
457   for(i=0; i<8; i++)
458      bitmap.pix32(y, x + i) = pen[BIT(gfx, 7 - i)];
457   for(i=0; i<16; i++)
458      bitmap.pix32(y, x + i) = pen[BIT(gfx, i)];
459459}
460460
461461
trunk/src/mess/drivers/dmv.c
r242318r242319
7373   required_device<floppy_connector> m_floppy1;
7474   required_device<dmv_keyboard_device> m_keyboard;
7575   required_device<speaker_sound_device> m_speaker;
76   required_shared_ptr<UINT8> m_video_ram;
76   required_shared_ptr<UINT16> m_video_ram;
7777   required_device<palette_device> m_palette;
7878   required_memory_region m_ram;
7979   required_memory_region m_bootrom;
r242318r242319
286286   if (m_color_mode)
287287   {
288288      // 96KB videoram (32KB green + 32KB red + 32KB blue)
289      UINT8 green = m_video_ram[0x00000 + (address & 0x7fff)];
290      UINT8 red   = m_video_ram[0x08000 + (address & 0x7fff)];
291      UINT8 blue  = m_video_ram[0x10000 + (address & 0x7fff)];
289      UINT16 green = m_video_ram[(0x00000 + (address & 0x7fff)) >> 1];
290      UINT16 red   = m_video_ram[(0x08000 + (address & 0x7fff)) >> 1];
291      UINT16 blue  = m_video_ram[(0x10000 + (address & 0x7fff)) >> 1];
292292
293      for(int xi=0; xi<8; xi++)
293      for(int xi=0; xi<16; xi++)
294294      {
295         int r = ((red   >> (7-xi)) & 1) ? 255 : 0;
296         int g = ((green >> (7-xi)) & 1) ? 255 : 0;
297         int b = ((blue  >> (7-xi)) & 1) ? 255 : 0;
295         int r = ((red   >> xi) & 1) ? 255 : 0;
296         int g = ((green >> xi) & 1) ? 255 : 0;
297         int b = ((blue  >> xi) & 1) ? 255 : 0;
298298
299299         if (bitmap.cliprect().contains(x + xi, y))
300300            bitmap.pix32(y, x + xi) = rgb_t(r, g, b);
r242318r242319
305305      const rgb_t *palette = m_palette->palette()->entry_list_raw();
306306
307307      // 32KB videoram
308      UINT8 gfx = m_video_ram[address & 0xffff];
308      UINT16 gfx = m_video_ram[(address & 0xffff) >> 1];
309309
310      for(int xi=0;xi<8;xi++)
310      for(int xi=0;xi<16;xi++)
311311      {
312312         if (bitmap.cliprect().contains(x + xi, y))
313            bitmap.pix32(y, x + xi) = ((gfx >> (7-xi)) & 1) ? palette[1] : palette[0];
313            bitmap.pix32(y, x + xi) = ((gfx >> xi) & 1) ? palette[1] : palette[0];
314314      }
315315   }
316316}
r242318r242319
319319{
320320   for( int x = 0; x < pitch; x++ )
321321   {
322      UINT8 tile = m_video_ram[((addr+x)*2) & 0x1ffff] & 0xff;
323      UINT8 attr = m_video_ram[((addr+x)*2 + 1) & 0x1ffff] & 0xff;
322      UINT8 tile = m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] & 0xff;
323      UINT8 attr = m_video_ram[(((addr+x)*2) & 0x1ffff) >> 1] >> 8;
324324
325325      rgb_t bg, fg;
326326      if (m_color_mode)
r242318r242319
554554   AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(kb_mcu_port2_w)
555555ADDRESS_MAP_END
556556
557static ADDRESS_MAP_START( upd7220_map, AS_0, 8, dmv_state )
557static ADDRESS_MAP_START( upd7220_map, AS_0, 16, dmv_state )
558558   ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
559559   AM_RANGE(0x00000, 0x1ffff) AM_RAM  AM_SHARE("video_ram")
560560ADDRESS_MAP_END
trunk/src/mess/drivers/if800.c
r242318r242319
2323
2424   required_device<upd7220_device> m_hgdc;
2525
26   required_shared_ptr<UINT8> m_video_ram;
26   required_shared_ptr<UINT16> m_video_ram;
2727   virtual void machine_start();
2828   virtual void machine_reset();
2929   required_device<cpu_device> m_maincpu;
r242318r242319
3838   int xi,gfx;
3939   UINT8 pen;
4040
41   gfx = m_video_ram[address];
41   gfx = m_video_ram[address >> 1];
4242
43   for(xi=0;xi<8;xi++)
43   for(xi=0;xi<16;xi++)
4444   {
4545      pen = ((gfx >> xi) & 1) ? 1 : 0;
4646
r242318r242319
7373{
7474}
7575
76static ADDRESS_MAP_START( upd7220_map, AS_0, 8, if800_state )
76static ADDRESS_MAP_START( upd7220_map, AS_0, 16, if800_state )
7777   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
7878ADDRESS_MAP_END
7979
trunk/src/mess/drivers/mz3500.c
r242318r242319
6161   required_device<upd7220_device> m_hgdc1;
6262   required_device<upd7220_device> m_hgdc2;
6363   required_device<upd765a_device> m_fdc;
64   required_shared_ptr<UINT8> m_video_ram;
64   required_shared_ptr<UINT16> m_video_ram;
6565   required_device<beep_device> m_beeper;
6666   required_device<palette_device> m_palette;
6767
r242318r242319
174174
175175   for( x = 0; x < pitch; x++ )
176176   {
177      tile = (m_video_ram[((addr+x)*2) & 0x1fff] & 0xff);
178      attr = (m_video_ram[((addr+x)*2+1) & 0x3ffff] & 0x0f);
177      tile = (m_video_ram[(((addr+x)*2) & 0x1fff) >> 1] & 0xff);
178      attr = ((m_video_ram[(((addr+x)*2+1) & 0x3ffff) >> 1] >> 8) & 0x0f);
179179
180180      //if(hires)
181181      //  tile <<= 1;
r242318r242319
796796
797797}
798798
799static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, mz3500_state )
799static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, mz3500_state )
800800   ADDRESS_MAP_GLOBAL_MASK(0x1fff)
801801   AM_RANGE(0x00000, 0x00fff) AM_RAM AM_SHARE("video_ram")
802802ADDRESS_MAP_END
803803
804static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, mz3500_state )
804static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, mz3500_state )
805805   AM_RANGE(0x00000, 0x3ffff) AM_RAM // AM_SHARE("video_ram_2")
806806ADDRESS_MAP_END
807807
trunk/src/mess/drivers/mz6500.c
r242318r242319
2828   DECLARE_WRITE8_MEMBER(mz6500_vram_w);
2929   void fdc_irq(bool state);
3030   void fdc_drq(bool state);
31   required_shared_ptr<UINT8> m_video_ram;
31   required_shared_ptr<UINT16> m_video_ram;
3232   virtual void machine_reset();
3333   virtual void video_start();
3434   required_device<cpu_device> m_maincpu;
r242318r242319
4242   int gfx[3];
4343   UINT8 i,pen;
4444
45   gfx[0] = m_video_ram[address + 0x00000];
46   gfx[1] = m_video_ram[address + 0x10000];
47   gfx[2] = m_video_ram[address + 0x20000];
45   gfx[0] = m_video_ram[(address + 0x00000) >> 1];
46   gfx[1] = m_video_ram[(address + 0x10000) >> 1];
47   gfx[2] = m_video_ram[(address + 0x20000) >> 1];
4848
49   for(i=0; i<8; i++)
49   for(i=0; i<16; i++)
5050   {
5151      pen = (BIT(gfx[0], i)) | (BIT(gfx[1], i) << 1) | (BIT(gfx[2], i) << 2);
5252
r242318r242319
126126   SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
127127SLOT_INTERFACE_END
128128
129static ADDRESS_MAP_START( upd7220_map, AS_0, 8, mz6500_state )
129static ADDRESS_MAP_START( upd7220_map, AS_0, 16, mz6500_state )
130130   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
131131ADDRESS_MAP_END
132132
trunk/src/mess/drivers/pc9801.c
r242318r242319
484484   optional_device<input_buffer_device> m_sasi_data_in;
485485   optional_device<input_buffer_device> m_sasi_ctrl_in;
486486   optional_device<ata_interface_device> m_ide;
487   required_shared_ptr<UINT8> m_video_ram_1;
488   required_shared_ptr<UINT8> m_video_ram_2;
489   optional_shared_ptr<UINT8> m_ext_gvram;
487   required_shared_ptr<UINT16> m_video_ram_1;
488   required_shared_ptr<UINT16> m_video_ram_2;
489   optional_shared_ptr<UINT16> m_ext_gvram;
490490   required_device<beep_device> m_beeper;
491491   optional_device<ram_device> m_ram;
492492   required_device<gfxdecode_device> m_gfxdecode;
r242318r242319
508508   UINT8 m_txt_scroll_reg[8];
509509   UINT8 m_pal_clut[4];
510510
511   UINT8 *m_tvram;
511   UINT16 *m_tvram;
512512
513513   UINT16 m_font_addr;
514514   UINT8 m_font_line;
r242318r242319
542542      UINT8 tile[4], tile_index;
543543   }m_grcg;
544544
545   struct {
546      UINT16 regs[8];
547      UINT16 pat[4];
548      UINT16 src[4];
549      INT16 count;
550      UINT16 leftover[4];
551      bool first;
552   } m_egc;
553
545554   /* PC9821 specific */
546555   UINT8 m_sdip[24], m_sdip_bank;
547556   UINT8 m_pc9821_window_bank;
r242318r242319
557566   DECLARE_WRITE8_MEMBER(txt_scrl_w);
558567   DECLARE_READ8_MEMBER(grcg_r);
559568   DECLARE_WRITE8_MEMBER(grcg_w);
569   DECLARE_WRITE16_MEMBER(egc_w);
560570   DECLARE_READ8_MEMBER(pc9801_a0_r);
561571   DECLARE_WRITE8_MEMBER(pc9801_a0_w);
562572   DECLARE_READ8_MEMBER(pc9801_fdc_2hd_r);
563573   DECLARE_WRITE8_MEMBER(pc9801_fdc_2hd_w);
564574   DECLARE_READ8_MEMBER(pc9801_fdc_2dd_r);
565575   DECLARE_WRITE8_MEMBER(pc9801_fdc_2dd_w);
566   DECLARE_READ8_MEMBER(tvram_r);
567   DECLARE_WRITE8_MEMBER(tvram_w);
576   DECLARE_READ16_MEMBER(tvram_r);
577   DECLARE_WRITE16_MEMBER(tvram_w);
568578   DECLARE_READ8_MEMBER(gvram_r);
569579   DECLARE_WRITE8_MEMBER(gvram_w);
570580   DECLARE_WRITE8_MEMBER(pc9801rs_mouse_freq_w);
571581   DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
572   DECLARE_READ8_MEMBER(grcg_gvram_r);
573   DECLARE_WRITE8_MEMBER(grcg_gvram_w);
574   DECLARE_READ8_MEMBER(grcg_gvram0_r);
575   DECLARE_WRITE8_MEMBER(grcg_gvram0_w);
576   DECLARE_READ8_MEMBER(upd7220_grcg_r);
577   DECLARE_WRITE8_MEMBER(upd7220_grcg_w);
582   DECLARE_READ16_MEMBER(grcg_gvram_r);
583   DECLARE_WRITE16_MEMBER(grcg_gvram_w);
584   DECLARE_READ16_MEMBER(grcg_gvram0_r);
585   DECLARE_WRITE16_MEMBER(grcg_gvram0_w);
586   DECLARE_READ16_MEMBER(upd7220_grcg_r);
587   DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
588   void egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask);
589   UINT16 egc_blit_r(UINT32 offset, UINT16 mem_mask);
590   inline UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
578591   UINT32 pc9801_286_a20(bool state);
579592
580593   DECLARE_READ8_MEMBER(ide_hack_r);
r242318r242319
717730
718731void pc9801_state::video_start()
719732{
720   m_tvram = auto_alloc_array(machine(), UINT8, 0x4000);
733   m_tvram = auto_alloc_array(machine(), UINT16, 0x2000);
721734
722735   // find memory regions
723736   m_char_rom = memregion("chargen")->base();
r242318r242319
753766
754767   if(m_ex_video_ff[ANALOG_256_MODE])
755768   {
756      for(xi=0;xi<8;xi++)
769      for(xi=0;xi<16;xi++)
757770      {
758771         res_x = x + xi;
759772         res_y = y;
r242318r242319
761774         if(!m_screen->visible_area().contains(res_x, res_y*2+0))
762775            return;
763776
764         pen = m_ext_gvram[(address*8+xi)+(m_vram_disp*0x40000)];
777         pen = m_ext_gvram[((address*16+xi)+(m_vram_disp*0x40000)) >> 1];
765778
766779         bitmap.pix32(res_y*2+0, res_x) = palette[pen + 0x20];
767780         if(m_screen->visible_area().contains(res_x, res_y*2+1))
r242318r242319
770783   }
771784   else
772785   {
773      for(xi=0;xi<8;xi++)
786      for(xi=0;xi<16;xi++)
774787      {
775788         res_x = x + xi;
776789         res_y = y;
777790
778         pen = ((m_video_ram_2[(address & 0x7fff) + (0x08000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 1 : 0;
779         pen|= ((m_video_ram_2[(address & 0x7fff) + (0x10000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 2 : 0;
780         pen|= ((m_video_ram_2[(address & 0x7fff) + (0x18000) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 4 : 0;
791         pen = ((m_video_ram_2[((address & 0x7fff) + (0x08000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 1 : 0;
792         pen|= ((m_video_ram_2[((address & 0x7fff) + (0x10000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 2 : 0;
793         pen|= ((m_video_ram_2[((address & 0x7fff) + (0x18000) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 4 : 0;
781794         if(m_ex_video_ff[ANALOG_16_MODE])
782            pen|= ((m_video_ram_2[(address & 0x7fff) + (0) + (m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 8 : 0;
795            pen|= ((m_video_ram_2[((address & 0x7fff) + (0) + (m_vram_disp*0x20000)) >> 1] >> xi) & 1) ? 8 : 0;
783796
784797         if(interlace_on)
785798         {
r242318r242319
829842      kanji_sel = 0;
830843      kanji_lr = 0;
831844
832      tile = m_video_ram_1[(tile_addr*2) & 0x1fff] & 0xff;
833      knj_tile = m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0xff;
845      tile = m_video_ram_1[tile_addr & 0xfff] & 0xff;
846      knj_tile = m_video_ram_1[tile_addr & 0xfff] >> 8;
834847      if(knj_tile)
835848      {
836849         /* Note: bit 7 doesn't really count, if a kanji is enabled then the successive tile is always the second part of it.
r242318r242319
851864      else
852865         x_step = 1;
853866
854      attr = (m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0xff);
867      attr = (m_video_ram_1[(tile_addr & 0xfff) | 0x1000] & 0xff);
855868
856869      secret = (attr & 1) ^ 1;
857870      blink = attr & 2;
r242318r242319
12821295
12831296
12841297/* TODO: banking? */
1285READ8_MEMBER(pc9801_state::tvram_r)
1298READ16_MEMBER(pc9801_state::tvram_r)
12861299{
1287   UINT8 res;
1300   UINT16 res;
12881301
1289   if((offset & 0x2000) && offset & 1)
1290      return 0xff;
1302   if((offset & 0x1000) && (mem_mask == 0xff00))
1303      return 0xffff;
12911304
12921305   res = m_tvram[offset];
12931306
12941307   return res;
12951308}
12961309
1297WRITE8_MEMBER(pc9801_state::tvram_w)
1310WRITE16_MEMBER(pc9801_state::tvram_w)
12981311{
1299   if(offset < (0x3fe2) || m_video_ff[MEMSW_REG])
1300      m_tvram[offset] = data;
1312   if(offset < (0x3fe2>>1) || m_video_ff[MEMSW_REG])
1313      COMBINE_DATA(&m_tvram[offset]);
13011314
1302   m_video_ram_1[offset] = data; //TODO: check me
1315   COMBINE_DATA(&m_video_ram_1[offset]); //TODO: check me
13031316}
13041317
13051318/* +0x8000 is trusted (bank 0 is actually used by 16 colors mode) */
13061319READ8_MEMBER(pc9801_state::gvram_r)
13071320{
1308   return m_video_ram_2[offset+0x08000+m_vram_bank*0x20000];
1321   return BITSWAP8(m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] >> ((offset & 1) << 3),0,1,2,3,4,5,6,7);
13091322}
13101323
13111324WRITE8_MEMBER(pc9801_state::gvram_w)
13121325{
1313   m_video_ram_2[offset+0x08000+m_vram_bank*0x20000] = data;
1326   UINT16 ram = m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000];
1327   int mask = (offset & 1) << 3;
1328   data = BITSWAP8(data,0,1,2,3,4,5,6,7);
1329   m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask);
13141330}
13151331
1316READ8_MEMBER(pc9801_state::upd7220_grcg_r)
1332inline UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
13171333{
1318   UINT8 res = 0;
1334   UINT16 out = 0;
1335   int src_off, dst_off;
1336   UINT16 src_tmp = src;
13191337
1320   if(!(m_grcg.mode & 0x80))
1338   if(m_egc.regs[6] & 0x1000)
1339   {
1340      src_off = 16 - (m_egc.regs[6] & 0xf);
1341      dst_off = 16 - ((m_egc.regs[6] >> 4) & 0xf);
1342   }
1343   else
1344   {
1345      src_off = m_egc.regs[6] & 0xf;
1346      dst_off = (m_egc.regs[6] >> 4) & 0xf;
1347   }
1348
1349   if(src_off < dst_off)
1350   {
1351      src = src_tmp << (dst_off - src_off);
1352      src |= m_egc.leftover[plane];
1353      m_egc.leftover[plane] = src_tmp >> (16 - (dst_off - src_off));
1354   }
1355   else
1356   {
1357      src = src_tmp >> (src_off - dst_off);
1358      src |= m_egc.leftover[plane] >> dst_off;
1359      m_egc.leftover[plane] = src_tmp << (16 - (src_off - dst_off));
1360   }
1361
1362   for(int i = 7; i >= 0; i--)
1363   {
1364      if(BIT(m_egc.regs[2], i))
1365         out |= src & pat & dst;
1366      pat = ~pat;
1367      dst = (!(i & 1)) ? ~dst : dst;
1368      src = (i == 4) ? ~src : src;
1369   }
1370   return out;
1371}
1372
1373void pc9801_state::egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask)
1374{
1375   UINT16 mask = m_egc.regs[4] & mem_mask, out = 0;
1376   bool dir = !(m_egc.regs[6] & 0x1000);
1377   int dst_off = (m_egc.regs[6] >> 4) & 0xf;
1378   offset &= 0x3fff;
1379
1380   // mask off the bits past the end of the blit
1381   if(m_egc.count < 16)
1382      mask &= dir ? ((1 << (m_egc.count + 1)) - 1) : ~((1 << (15 - m_egc.count)) - 1);
1383
1384   // mask off the bits before the start
1385   if(m_egc.first)
1386   {
1387      m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
1388      mask &= dir ? ~((1 << (15 - dst_off)) - 1) : ((1 << (dst_off + 1)) - 1);
1389   }
1390
1391   for(int i = 0; i < 4; i++)
1392   {
1393      if(!BIT(m_egc.regs[0], i))
1394      {
1395         UINT16 src = m_egc.src[i] & mem_mask, pat = m_egc.pat[i];
1396         if(BIT(m_egc.regs[2], 10))
1397            src = data;
1398
1399         if((m_egc.regs[2] & 0x300) == 0x200)
1400            pat = m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)];
1401
1402         switch((m_egc.regs[2] >> 11) & 3)
1403         {
1404            case 0:
1405               out = data;
1406               break;
1407            case 1:
1408               if(mem_mask == 0x00ff)
1409                  src = src | src << 8;
1410               else if(mem_mask == 0xff00)
1411                  src = src | src >> 8;
1412
1413               out = egc_do_partial_op(i, src, pat, m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)]);
1414               break;
1415            case 2:
1416               out = pat;
1417               break;
1418            case 3:
1419               logerror("Invalid EGC blit operation\n");
1420               return;
1421         }
1422
1423         m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)] &= ~mask;
1424         m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)] |= out & mask;
1425      }
1426   }
1427   if(mem_mask != 0xffff)
1428   {
1429      dst_off &= 7;
1430      if(m_egc.first)
1431         m_egc.count -= dir ? 7 - dst_off : dst_off;
1432      else
1433         m_egc.count -= 8;
1434   }
1435   else
1436   {
1437      if(m_egc.first)
1438         m_egc.count -= dir ? 15 - dst_off : dst_off;
1439      else
1440         m_egc.count -= 16;
1441   }
1442
1443   m_egc.first = false;
1444
1445   if(m_egc.count <= 0)
1446   {
1447      m_egc.first = true;
1448      m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
1449   }
1450}
1451
1452UINT16 pc9801_state::egc_blit_r(UINT32 offset, UINT16 mem_mask)
1453{
1454   UINT16 plane_off = offset & 0x3fff;
1455   if((m_egc.regs[2] & 0x300) == 0x100)
1456   {
1457      m_egc.pat[0] = m_video_ram_2[plane_off + 0x4000];
1458      m_egc.pat[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
1459      m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
1460      m_egc.pat[3] = m_video_ram_2[plane_off];
1461   }
1462   if(!BIT(m_egc.regs[2], 10))
1463   {
1464      m_egc.src[0] = m_video_ram_2[plane_off + 0x4000];
1465      m_egc.src[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
1466      m_egc.src[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
1467      m_egc.src[3] = m_video_ram_2[plane_off];
1468   }
1469   if(BIT(m_egc.regs[2], 13))
1470      return m_video_ram_2[offset];
1471   else
1472      return m_video_ram_2[plane_off + (((m_egc.regs[1] >> 8) + 1) & 3) * 0x4000];
1473}
1474
1475READ16_MEMBER(pc9801_state::upd7220_grcg_r)
1476{
1477   UINT16 res = 0;
1478
1479   if(!(m_grcg.mode & 0x80) || space.debugger_access())
13211480      res = m_video_ram_2[offset];
1481   else if(m_ex_video_ff[2])
1482      res = egc_blit_r(offset, mem_mask);
13221483   else if(!(m_grcg.mode & 0x40))
13231484   {
13241485      int i;
13251486
1326      offset &= ~(3 << 15);
1487      offset &= 0x3fff;
13271488      res = 0;
13281489      for(i=0;i<4;i++)
13291490      {
13301491         if((m_grcg.mode & (1 << i)) == 0)
1331            res |= m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] ^ m_grcg.tile[i];
1492         {
1493            res |= m_video_ram_2[offset | (((i + 1) & 3) * 0x4000)] ^ (m_grcg.tile[i] | m_grcg.tile[i] << 8);
1494         }
13321495      }
13331496
1334      res ^= 0xff;
1497      res ^= 0xffff;
13351498   }
13361499
13371500   return res;
13381501}
13391502
1340WRITE8_MEMBER(pc9801_state::upd7220_grcg_w)
1503WRITE16_MEMBER(pc9801_state::upd7220_grcg_w)
13411504{
1342   if((m_grcg.mode & 0x80) == 0)
1343      m_video_ram_2[offset] = data;
1505   if(!(m_grcg.mode & 0x80))
1506      COMBINE_DATA(&m_video_ram_2[offset]);
1507   else if(m_ex_video_ff[2])
1508      egc_blit_w(offset, data, mem_mask);
13441509   else
13451510   {
13461511      int i;
1347      offset &= ~(3 << 15);
1512      UINT8 *vram = (UINT8 *)m_video_ram_2.target();
1513      offset = (offset << 1) & 0x7fff;
13481514
13491515      if(m_grcg.mode & 0x40) // RMW
13501516      {
r242318r242319
13521518         {
13531519            if((m_grcg.mode & (1 << i)) == 0)
13541520            {
1355               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] &= ~data;
1356               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] |= m_grcg.tile[i] & data;
1521               if(mem_mask & 0xff)
1522               {
1523                  vram[offset | (((i + 1) & 3) * 0x8000)] &= ~data;
1524                  vram[offset | (((i + 1) & 3) * 0x8000)] |= m_grcg.tile[i] & data;
1525               }
1526               if(mem_mask & 0xff00)
1527               {
1528                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] &= ~(data >> 8);
1529                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] |= m_grcg.tile[i] & (data >> 8);
1530               }
13571531            }
13581532         }
13591533      }
r242318r242319
13631537         {
13641538            if((m_grcg.mode & (1 << i)) == 0)
13651539            {
1366               m_video_ram_2[offset | (((i + 1) & 3) * 0x8000)] = m_grcg.tile[i];
1540               if(mem_mask & 0xff)
1541                  vram[offset | (((i + 1) & 3) * 0x8000)] = m_grcg.tile[i];
1542               if(mem_mask & 0xff00)
1543                  vram[offset | (((i + 1) & 3) * 0x8000) | 1] = m_grcg.tile[i];
13671544            }
13681545         }
13691546      }
r242318r242319
14941671
14951672static ADDRESS_MAP_START( pc9801_map, AS_PROGRAM, 16, pc9801_state )
14961673   AM_RANGE(0x00000, 0x9ffff) AM_RAM //work RAM
1497   AM_RANGE(0xa0000, 0xa3fff) AM_READWRITE8(tvram_r,tvram_w,0xffff) //TVRAM
1674   AM_RANGE(0xa0000, 0xa3fff) AM_READWRITE(tvram_r,tvram_w) //TVRAM
14981675   AM_RANGE(0xa8000, 0xbffff) AM_READWRITE8(gvram_r,gvram_w,0xffff) //bitmap VRAM
14991676   AM_RANGE(0xcc000, 0xcdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
15001677   AM_RANGE(0xd6000, 0xd6fff) AM_ROM AM_REGION("fdc_bios_2dd",0) //floppy BIOS 2dd
r242318r242319
16771854   txt_scrl_w(space,offset,data);
16781855}
16791856
1857WRITE16_MEMBER(pc9801_state::egc_w)
1858{
1859   if(!m_ex_video_ff[2])
1860      return;
1861
1862   COMBINE_DATA(&m_egc.regs[offset]);
1863   switch(offset)
1864   {
1865      case 1:
1866      case 3:
1867      case 5:
1868      {
1869         UINT8 color = 0;
1870         switch((m_egc.regs[1] >> 13) & 3)
1871         {
1872            case 1:
1873               //back color
1874               color = m_egc.regs[5];
1875               break;
1876            case 2:
1877               //fore color
1878               color = m_egc.regs[3];
1879               break;
1880            default:
1881               return;
1882         }
1883         m_egc.pat[0] = (color & 1) ? 0xffff : 0;
1884         m_egc.pat[1] = (color & 2) ? 0xffff : 0;
1885         m_egc.pat[2] = (color & 4) ? 0xffff : 0;
1886         m_egc.pat[3] = (color & 8) ? 0xffff : 0;
1887         break;
1888      }
1889      case 6:
1890      case 7:
1891         m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
1892         m_egc.first = true;
1893         break;
1894   }
1895}
1896
16801897READ8_MEMBER(pc9801_state::pc9810rs_fdc_ctrl_r)
16811898{
16821899   return (m_fdc_ctrl & 3) | 0xf0 | 8 | 4;
r242318r242319
18882105   ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data);
18892106}
18902107
1891READ8_MEMBER(pc9801_state::grcg_gvram_r)
2108READ16_MEMBER(pc9801_state::grcg_gvram_r)
18922109{
1893   return upd7220_grcg_r(space, (offset + 0x8000) | (m_vram_bank << 17), mem_mask);
2110   UINT16 ret = upd7220_grcg_r(space, (offset + 0x4000) | (m_vram_bank << 16), mem_mask);
2111   return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
18942112}
18952113
1896WRITE8_MEMBER(pc9801_state::grcg_gvram_w)
2114WRITE16_MEMBER(pc9801_state::grcg_gvram_w)
18972115{
1898   upd7220_grcg_w(space, (offset + 0x8000) | (m_vram_bank << 17), data, mem_mask);
2116   data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
2117   upd7220_grcg_w(space, (offset + 0x4000) | (m_vram_bank << 16), data, mem_mask);
18992118}
19002119
1901READ8_MEMBER(pc9801_state::grcg_gvram0_r)
2120READ16_MEMBER(pc9801_state::grcg_gvram0_r)
19022121{
1903   return upd7220_grcg_r(space, offset | (m_vram_bank << 17), mem_mask);
2122   UINT16 ret = upd7220_grcg_r(space, offset | (m_vram_bank << 16), mem_mask);
2123   return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
19042124}
19052125
1906WRITE8_MEMBER(pc9801_state::grcg_gvram0_w)
2126WRITE16_MEMBER(pc9801_state::grcg_gvram0_w)
19072127{
1908   upd7220_grcg_w(space, offset | (m_vram_bank << 17), data, mem_mask);
2128   data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7);
2129   upd7220_grcg_w(space, offset | (m_vram_bank << 16), data, mem_mask);
19092130}
19102131
19112132static ADDRESS_MAP_START( pc9801ux_map, AS_PROGRAM, 16, pc9801_state )
19122133   AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("wram")
1913   AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE8(tvram_r, tvram_w, 0xffff)
2134   AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE(tvram_r, tvram_w)
19142135   AM_RANGE(0x0a4000, 0x0a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffff)
1915   AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffff)
1916   AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffff)
2136   AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE(grcg_gvram_r, grcg_gvram_w)
2137   AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE(grcg_gvram0_r,grcg_gvram0_w)
19172138   AM_RANGE(0x0e0000, 0x0fffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
19182139ADDRESS_MAP_END
19192140
r242318r242319
19302151   AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(a20_ctrl_r,      a20_ctrl_w,      0x00ff)
19312152   AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffff)
19322153   AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w,    0xffff) //ROM/RAM bank
2154   AM_RANGE(0x04a0, 0x04af) AM_WRITE(egc_w)
19332155   AM_RANGE(0x3fd8, 0x3fdf) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00)
19342156//  AM_RANGE(0xa460, 0xa463) AM_READWRITE8(pc9801_ext_opna_r,  pc9801_ext_opna_w,  0xffff)
19352157   AM_IMPORT_FROM(pc9801_io)
r242318r242319
21382360static ADDRESS_MAP_START( pc9821_map, AS_PROGRAM, 32, pc9801_state )
21392361   AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("wram")
21402362   //AM_RANGE(0x00080000, 0x0009ffff) AM_READWRITE8(winram_r, winram_w, 0xffffffff)
2141   AM_RANGE(0x000a0000, 0x000a3fff) AM_READWRITE8(tvram_r, tvram_w, 0xffffffff)
2363   AM_RANGE(0x000a0000, 0x000a3fff) AM_READWRITE16(tvram_r, tvram_w, 0xffffffff)
21422364   AM_RANGE(0x000a4000, 0x000a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffffffff)
2143   AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
2365   AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE16(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
21442366   AM_RANGE(0x000cc000, 0x000cdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
21452367   AM_RANGE(0x000d8000, 0x000d9fff) AM_ROM AM_REGION("ide",0)
21462368   AM_RANGE(0x000da000, 0x000dbfff) AM_RAM // ide ram
2147   AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
2369   AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE16(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
21482370   AM_RANGE(0x000e0000, 0x000fffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
21492371   AM_RANGE(0x00f00000, 0x00f9ffff) AM_RAM AM_SHARE("ext_gvram")
21502372   AM_RANGE(0xffee0000, 0xffefffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
r242318r242319
22322454//  AM_RANGE(0xfcd0, 0xfcd3) MIDI port, option F / <undefined>
22332455ADDRESS_MAP_END
22342456
2235static ADDRESS_MAP_START( upd7220_1_map, AS_0, 8, pc9801_state )
2457static ADDRESS_MAP_START( upd7220_1_map, AS_0, 16, pc9801_state )
22362458   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_1")
22372459ADDRESS_MAP_END
22382460
2239static ADDRESS_MAP_START( upd7220_2_map, AS_0, 8, pc9801_state )
2461static ADDRESS_MAP_START( upd7220_2_map, AS_0, 16, pc9801_state )
22402462   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram_2")
22412463ADDRESS_MAP_END
22422464
2243static ADDRESS_MAP_START( upd7220_grcg_2_map, AS_0, 8, pc9801_state )
2465static ADDRESS_MAP_START( upd7220_grcg_2_map, AS_0, 16, pc9801_state )
22442466   AM_RANGE(0x00000, 0x3ffff) AM_READWRITE(upd7220_grcg_r, upd7220_grcg_w) AM_SHARE("video_ram_2")
22452467ADDRESS_MAP_END
22462468
r242318r242319
27843006
27853007MACHINE_RESET_MEMBER(pc9801_state,pc9801_common)
27863008{
2787   memset(m_tvram, 0, sizeof(UINT8) * 0x4000);
3009   memset(m_tvram, 0, sizeof(UINT16) * 0x2000);
27883010   /* this looks like to be some kind of backup ram, system will boot with green colors otherwise */
27893011   {
27903012      int i;
r242318r242319
27953017      };
27963018
27973019      for(i=0;i<0x10;i++)
2798         m_tvram[(0x3fe0)+i*2] = default_memsw_data[i];
3020         m_tvram[(0x3fe0>>1)+i] = default_memsw_data[i];
27993021   }
28003022
28013023   m_beeper->set_frequency(2400);
r242318r242319
28053027   m_mouse.control = 0xff;
28063028   m_mouse.freq_reg = 0;
28073029   m_mouse.freq_index = 0;
3030   memset(&m_egc, 0, sizeof(m_egc));
28083031}
28093032
28103033MACHINE_RESET_MEMBER(pc9801_state,pc9801f)
r242318r242319
31613384   ROM_IGNORE( 0x2000 ) \
31623385   ROM_IGNORE( 0x2000 ) \
31633386   ROM_IGNORE( 0x2000 ) \
3164   ROM_FILL( 0x0000, 0x2000, 0xcb )
3387//   ROM_FILL( 0x0000, 0x2000, 0xcb )
31653388
31663389// all of these are half size :/
31673390#define LOAD_KANJI_ROMS \
trunk/src/mess/drivers/qx10.c
r242318r242319
8888   required_device<rs232_port_device> m_kbd;
8989   UINT8 m_vram_bank;
9090   //required_shared_ptr<UINT8> m_video_ram;
91   UINT8 *m_video_ram;
91   UINT16 *m_video_ram;
9292
9393   UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
9494
r242318r242319
115115   DECLARE_READ8_MEMBER( get_slave_ack );
116116   DECLARE_READ8_MEMBER( vram_bank_r );
117117   DECLARE_WRITE8_MEMBER( vram_bank_w );
118   DECLARE_READ8_MEMBER( vram_r );
119   DECLARE_WRITE8_MEMBER( vram_w );
118   DECLARE_READ16_MEMBER( vram_r );
119   DECLARE_WRITE16_MEMBER( vram_w );
120120   DECLARE_READ8_MEMBER(memory_read_byte);
121121   DECLARE_WRITE8_MEMBER(memory_write_byte);
122122   DECLARE_WRITE_LINE_MEMBER(keyboard_clk);
r242318r242319
159159
160160   if(m_color_mode)
161161   {
162      gfx[0] = m_video_ram[(address) + 0x00000];
163      gfx[1] = m_video_ram[(address) + 0x20000];
164      gfx[2] = m_video_ram[(address) + 0x40000];
162      gfx[0] = m_video_ram[((address) + 0x00000) >> 1];
163      gfx[1] = m_video_ram[((address) + 0x20000) >> 1];
164      gfx[2] = m_video_ram[((address) + 0x40000) >> 1];
165165   }
166166   else
167167   {
168      gfx[0] = m_video_ram[address];
168      gfx[0] = m_video_ram[(address) >> 1];
169169      gfx[1] = 0;
170170      gfx[2] = 0;
171171   }
172172
173   for(xi=0;xi<8;xi++)
173   for(xi=0;xi<16;xi++)
174174   {
175      pen = ((gfx[0] >> (7-xi)) & 1) ? 1 : 0;
176      pen|= ((gfx[1] >> (7-xi)) & 1) ? 2 : 0;
177      pen|= ((gfx[2] >> (7-xi)) & 1) ? 4 : 0;
175      pen = ((gfx[0] >> xi) & 1) ? 1 : 0;
176      pen|= ((gfx[1] >> xi) & 1) ? 2 : 0;
177      pen|= ((gfx[2] >> xi) & 1) ? 4 : 0;
178178
179179      bitmap.pix32(y, x + xi) = palette[pen];
180180   }
r242318r242319
193193
194194   for( x = 0; x < pitch; x++ )
195195   {
196      tile = m_video_ram[(addr+x)*2];
197      attr = m_video_ram[(addr+x)*2+1];
196      tile = m_video_ram[((addr+x)*2) >> 1] & 0xff;
197      attr = m_video_ram[((addr+x)*2) >> 1] >> 8;
198198
199199      color = (m_color_mode) ? 1 : (attr & 4) ? 2 : 1; /* TODO: color mode */
200200
r242318r242319
685685void qx10_state::video_start()
686686{
687687   // allocate memory
688   m_video_ram = auto_alloc_array_clear(machine(), UINT8, 0x60000);
688   m_video_ram = auto_alloc_array_clear(machine(), UINT16, 0x30000);
689689
690690   // find memory regions
691691   m_char_rom = memregion("chargen")->base();
r242318r242319
696696   // ...
697697}
698698
699READ8_MEMBER( qx10_state::vram_r )
699READ16_MEMBER( qx10_state::vram_r )
700700{
701701   int bank = 0;
702702
r242318r242319
704704   else if(m_vram_bank & 2) { bank = 1; } // G
705705   else if(m_vram_bank & 4) { bank = 2; } // R
706706
707   return m_video_ram[offset + (0x20000 * bank)];
707   return m_video_ram[offset + (0x20000 * bank)] | (m_video_ram[offset + (0x20000 * bank) + 1] << 8);
708708}
709709
710WRITE8_MEMBER( qx10_state::vram_w )
710WRITE16_MEMBER( qx10_state::vram_w )
711711{
712712   int bank = 0;
713713
r242318r242319
715715   else if(m_vram_bank & 2) { bank = 1; } // G
716716   else if(m_vram_bank & 4) { bank = 2; } // R
717717
718   m_video_ram[offset + (0x20000 * bank)] = data;
718   if(mem_mask & 0xff)
719      m_video_ram[offset + (0x20000 * bank)] = data;
720   if(mem_mask & 0xff00)
721      m_video_ram[offset + (0x20000 * bank) + 1] = data >> 8;
719722}
720723
721static ADDRESS_MAP_START( upd7220_map, AS_0, 8, qx10_state )
724static ADDRESS_MAP_START( upd7220_map, AS_0, 16, qx10_state )
722725   AM_RANGE(0x00000, 0x5ffff) AM_READWRITE(vram_r,vram_w)
723726ADDRESS_MAP_END
724727
trunk/src/mess/drivers/vt240.c
r242318r242319
4343   //UINT8 m_pcg_internal_addr;
4444   //UINT8 *m_char_rom;
4545
46   required_shared_ptr<UINT8> m_video_ram;
46   required_shared_ptr<UINT16> m_video_ram;
4747   DECLARE_DRIVER_INIT(vt240);
4848   virtual void machine_reset();
4949   INTERRUPT_GEN_MEMBER(vt240_irq);
r242318r242319
117117ADDRESS_MAP_END
118118
119119
120static ADDRESS_MAP_START( upd7220_map, AS_0, 8, vt240_state)
120static ADDRESS_MAP_START( upd7220_map, AS_0, 16, vt240_state)
121121   AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
122122ADDRESS_MAP_END
123123
trunk/src/mess/includes/compis.h
r242318r242319
8484   required_device<isbx_slot_device> m_isbx0;
8585   required_device<isbx_slot_device> m_isbx1;
8686   required_device<ram_device> m_ram;
87   required_shared_ptr<UINT8> m_video_ram;
87   required_shared_ptr<UINT16> m_video_ram;
8888   required_ioport m_s8;
8989
9090   virtual void machine_start();
trunk/src/mess/includes/mikromik.h
r242318r242319
8181   required_memory_region m_rom;
8282   required_memory_region m_mmu_rom;
8383   required_memory_region m_char_rom;
84   required_shared_ptr<UINT8> m_video_ram;
84   required_shared_ptr<UINT16> m_video_ram;
8585
8686   virtual void machine_start();
8787   virtual void machine_reset();
trunk/src/mess/video/mikromik.c
r242318r242319
3838//  ADDRESS_MAP( mm1_upd7220_map )
3939//-------------------------------------------------
4040
41static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 8, mm1_state )
41static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 16, mm1_state )
4242   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
4343   AM_RANGE(0x0000, 0x7fff) AM_RAM AM_SHARE("video_ram")
4444ADDRESS_MAP_END
r242318r242319
5050
5151UPD7220_DISPLAY_PIXELS_MEMBER( mm1_state::hgdc_display_pixels )
5252{
53   UINT8 data = m_video_ram[address];
53   UINT16 data = m_video_ram[address >> 1];
5454
55   for (int i = 0; i < 8; i++)
55   for (int i = 0; i < 16; i++)
5656   {
57      if (BIT(data, 7 - i)) bitmap.pix32(y, x + i) = m_palette->pen(1);
57      if (BIT(data, i)) bitmap.pix32(y, x + i) = m_palette->pen(1);
5858   }
5959}
6060

https://github.com/mamedev/mame/commit/fc9890b8819f4cc8a81f080c300db5750ec69888

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