trunk/src/emu/machine/pci.c
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| 13 | 13 | AM_RANGE(0x0c, 0x0f) AM_READ8 (latency_timer_r, 0x0000ff00) |
| 14 | 14 | AM_RANGE(0x0c, 0x0f) AM_READ8 (header_type_r, 0x00ff0000) |
| 15 | 15 | AM_RANGE(0x0c, 0x0f) AM_READ8 (bist_r, 0xff000000) |
| 16 | AM_RANGE(0x0c, 0x0f) AM_WRITENOP |
| 16 | 17 | AM_RANGE(0x10, 0x27) AM_READWRITE (address_base_r, address_base_w) |
| 17 | | |
| 18 | // Cardbus CIS pointer at 28 |
| 18 | 19 | AM_RANGE(0x2c, 0x2f) AM_READ16 (subvendor_r, 0x0000ffff) |
| 19 | 20 | AM_RANGE(0x2c, 0x2f) AM_READ16 (subsystem_r, 0xffff0000) |
| 20 | 21 | AM_RANGE(0x2c, 0x2f) AM_WRITENOP |
| 21 | | |
| 22 | AM_RANGE(0x30, 0x33) AM_READWRITE (expansion_base_r, expansion_base_w) |
| 22 | 23 | AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff) |
| 23 | 24 | ADDRESS_MAP_END |
| 24 | 25 | |
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| 88 | 89 | |
| 89 | 90 | bank_count = 0; |
| 90 | 91 | bank_reg_count = 0; |
| 92 | |
| 93 | expansion_rom = 0; |
| 94 | expansion_rom_size = 0; |
| 95 | expansion_rom_base = 0; |
| 91 | 96 | } |
| 92 | 97 | |
| 93 | 98 | void pci_device::device_reset() |
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| 209 | 214 | return subsystem_id; |
| 210 | 215 | } |
| 211 | 216 | |
| 217 | READ32_MEMBER(pci_device::expansion_base_r) |
| 218 | { |
| 219 | return expansion_rom_base; |
| 220 | } |
| 221 | |
| 222 | |
| 223 | WRITE32_MEMBER(pci_device::expansion_base_w) |
| 224 | { |
| 225 | COMBINE_DATA(&expansion_rom_base); |
| 226 | if(!expansion_rom_size) |
| 227 | expansion_rom_base = 0; |
| 228 | else { |
| 229 | // Trick to get an address resolution at expansion_rom_size with minimal granularity of 0x800, plus bit 1 set to keep the on/off information |
| 230 | expansion_rom_base &= 0xfffff801 & (1-expansion_rom_size); |
| 231 | } |
| 232 | remap_cb(); |
| 233 | } |
| 234 | |
| 212 | 235 | READ8_MEMBER(pci_device::capptr_r) |
| 213 | 236 | { |
| 214 | 237 | return 0x00; |
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| 256 | 279 | case 5: space->install_readwrite_handler(start, end, 0, 0, read32_delegate(FUNC(pci_device::unmapped5_r), this), write32_delegate(FUNC(pci_device::unmapped5_w), this)); break; |
| 257 | 280 | } |
| 258 | 281 | space->install_device_delegate(start, end, *this, bi.map); |
| 282 | logerror("%s: map %s at %0*x-%0*x\n", tag(), bi.map.name(), bi.flags & M_IO ? 4 : 8, UINT32(start), bi.flags & M_IO ? 4 : 8, UINT32(end)); |
| 259 | 283 | } |
| 260 | 284 | |
| 261 | 285 | map_extra(memory_window_start, memory_window_end, memory_offset, memory_space, |
| 262 | 286 | io_window_start, io_window_end, io_offset, io_space); |
| 287 | |
| 288 | if(expansion_rom_base & 1) { |
| 289 | logerror("%s: map expansion rom at %08x-%08x\n", tag(), expansion_rom_base & ~1, (expansion_rom_base & ~1) + expansion_rom_size - 1); |
| 290 | UINT32 start = (expansion_rom_base & ~1) + memory_offset; |
| 291 | UINT32 end = start + expansion_rom_size - 1; |
| 292 | if(end > memory_window_end) |
| 293 | end = memory_window_end; |
| 294 | memory_space->install_rom(start, end, (void *)expansion_rom); |
| 295 | } |
| 263 | 296 | } |
| 264 | 297 | |
| 265 | 298 | void pci_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space, |
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| 305 | 338 | logerror("Device %s (%s) has 0x%" I64FMT "x bytes of %s named %s\n", tag(), name(), size, flags & M_IO ? "io" : "memory", map.name()); |
| 306 | 339 | } |
| 307 | 340 | |
| 341 | void pci_device::add_rom(const UINT8 *rom, UINT32 size) |
| 342 | { |
| 343 | expansion_rom = rom; |
| 344 | expansion_rom_size = size; |
| 345 | logerror("Device %s (%s) has 0x%x bytes of expansion rom\n", tag(), name(), size); |
| 346 | } |
| 347 | |
| 348 | void pci_device::add_rom_from_region() |
| 349 | { |
| 350 | add_rom(m_region->base(), m_region->bytes()); |
| 351 | } |
| 352 | |
| 308 | 353 | agp_device::agp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) |
| 309 | 354 | : pci_device(mconfig, type, name, tag, owner, clock, shortname, source) |
| 310 | 355 | { |
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| 662 | 707 | logerror("%s: iolimitu_w %04x\n", tag(), data); |
| 663 | 708 | } |
| 664 | 709 | |
| 665 | | READ32_MEMBER (pci_bridge_device::expansion_base_r) |
| 666 | | { |
| 667 | | logerror("%s: expansion_base_r\n", tag()); |
| 668 | | return 0xffffffff; |
| 669 | | } |
| 670 | | |
| 671 | | WRITE32_MEMBER(pci_bridge_device::expansion_base_w) |
| 672 | | { |
| 673 | | logerror("%s: expansion_base_w %08x\n", tag(), data); |
| 674 | | } |
| 675 | | |
| 676 | 710 | READ8_MEMBER (pci_bridge_device::interrupt_line_r) |
| 677 | 711 | { |
| 678 | 712 | logerror("%s: interrupt_line_r\n", tag()); |
trunk/src/emu/machine/pci.h
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| 74 | 74 | DECLARE_WRITE32_MEMBER(address_base_w); |
| 75 | 75 | DECLARE_READ16_MEMBER(subvendor_r); |
| 76 | 76 | DECLARE_READ16_MEMBER(subsystem_r); |
| 77 | DECLARE_READ32_MEMBER (expansion_base_r); |
| 78 | DECLARE_WRITE32_MEMBER(expansion_base_w); |
| 77 | 79 | virtual DECLARE_READ8_MEMBER(capptr_r); |
| 78 | 80 | |
| 79 | 81 | protected: |
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| 104 | 106 | UINT32 pclass; |
| 105 | 107 | UINT8 revision; |
| 106 | 108 | UINT16 command, command_mask, status; |
| 109 | const UINT8 *expansion_rom; |
| 110 | UINT32 expansion_rom_size; |
| 111 | UINT32 expansion_rom_base; |
| 107 | 112 | |
| 108 | 113 | virtual void device_start(); |
| 109 | 114 | virtual void device_reset(); |
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| 116 | 121 | address_map_delegate delegate(map, name, static_cast<T *>(this)); |
| 117 | 122 | add_map(size, flags, delegate); |
| 118 | 123 | } |
| 124 | |
| 125 | void add_rom(const UINT8 *data, UINT32 size); |
| 126 | void add_rom_from_region(); |
| 119 | 127 | }; |
| 120 | 128 | |
| 121 | 129 | class agp_device : public pci_device { |
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| 173 | 181 | DECLARE_WRITE16_MEMBER(iobaseu_w); |
| 174 | 182 | DECLARE_READ16_MEMBER (iolimitu_r); |
| 175 | 183 | DECLARE_WRITE16_MEMBER(iolimitu_w); |
| 176 | | DECLARE_READ32_MEMBER (expansion_base_r); |
| 177 | | DECLARE_WRITE32_MEMBER(expansion_base_w); |
| 178 | 184 | DECLARE_READ8_MEMBER (interrupt_line_r); |
| 179 | 185 | DECLARE_WRITE8_MEMBER (interrupt_line_w); |
| 180 | 186 | DECLARE_READ8_MEMBER (interrupt_pin_r); |