trunk/src/emu/cpu/tms0980/tms0980.c
| r242283 | r242284 | |
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| 78 | 78 | #define M_CKM 0x00000040 /* CKB to MEM */ |
| 79 | 79 | #define M_CKN 0x00000080 /* CKB to -ALU */ |
| 80 | 80 | #define M_CKP 0x00000100 /* CKB to +ALU */ |
| 81 | | #define M_CME 0x00000200 /* Conditional Memory Enable */ |
| 82 | | #define M_DMTP 0x00000400 /* DAM to +ALU */ |
| 83 | | #define M_MTN 0x00000800 /* MEM to -ALU */ |
| 84 | | #define M_MTP 0x00001000 /* MEM to +ALU */ |
| 85 | | #define M_NATN 0x00002000 /* ~ACC to -ALU */ |
| 86 | | #define M_NDMTP 0x00004000 /* ~DAM to +ALU */ |
| 87 | | #define M_NE 0x00008000 /* COMP to STATUS */ |
| 88 | | #define M_SSE 0x00010000 /* Special Status Enable */ |
| 89 | | #define M_SSS 0x00020000 /* Special Status Sample */ |
| 90 | | #define M_STO 0x00040000 /* ACC to MEM */ |
| 91 | | #define M_STSL 0x00080000 /* STATUS to Status Latch */ |
| 92 | | #define M_YTP 0x00100000 /* Y to +ALU */ |
| 81 | #define M_MTN 0x00000200 /* MEM to -ALU */ |
| 82 | #define M_MTP 0x00000400 /* MEM to +ALU */ |
| 83 | #define M_NATN 0x00000800 /* ~ACC to -ALU */ |
| 84 | #define M_NE 0x00001000 /* COMP to STATUS */ |
| 85 | #define M_STO 0x00002000 /* ACC to MEM */ |
| 86 | #define M_STSL 0x00004000 /* STATUS to Status Latch */ |
| 87 | #define M_YTP 0x00008000 /* Y to +ALU */ |
| 93 | 88 | |
| 94 | | #define M_RSTR 0x00200000 /* -> F_RSTR */ |
| 89 | #define M_CME 0x00010000 /* Conditional Memory Enable */ |
| 90 | #define M_DMTP 0x00020000 /* DAM to +ALU */ |
| 91 | #define M_NDMTP 0x00040000 /* ~DAM to +ALU */ |
| 92 | #define M_SSE 0x00080000 /* Special Status Enable */ |
| 93 | #define M_SSS 0x00100000 /* Special Status Sample */ |
| 95 | 94 | |
| 95 | #define M_RSTR 0x00200000 /* -> line #36, F_RSTR (TMC02x0 custom) */ |
| 96 | #define M_UNK1 0x00400000 /* -> line #37, F_???? (TMC0270 custom) */ |
| 97 | |
| 96 | 98 | /* Standard/fixed instructions - these are documented more in their specific handlers below */ |
| 97 | 99 | #define F_BR 0x00000001 |
| 98 | 100 | #define F_CALL 0x00000002 |
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| 102 | 104 | #define F_COMX8 0x00000020 |
| 103 | 105 | #define F_LDP 0x00000040 |
| 104 | 106 | #define F_LDX 0x00000080 |
| 105 | | #define F_OFF 0x00000100 |
| 106 | | #define F_RBIT 0x00000200 |
| 107 | | #define F_REAC 0x00000400 |
| 108 | | #define F_RETN 0x00000800 |
| 109 | | #define F_RSTR 0x00001000 |
| 110 | | #define F_SAL 0x00002000 |
| 111 | | #define F_SBIT 0x00004000 |
| 112 | | #define F_SBL 0x00008000 |
| 113 | | #define F_SEAC 0x00010000 |
| 114 | | #define F_SETR 0x00020000 |
| 115 | | #define F_TDO 0x00040000 |
| 107 | #define F_RBIT 0x00000100 |
| 108 | #define F_RETN 0x00000200 |
| 109 | #define F_RSTR 0x00000400 |
| 110 | #define F_SBIT 0x00000800 |
| 111 | #define F_SETR 0x00001000 |
| 112 | #define F_TDO 0x00002000 |
| 113 | |
| 114 | #define F_OFF 0x00004000 |
| 115 | #define F_REAC 0x00008000 |
| 116 | #define F_SAL 0x00010000 |
| 117 | #define F_SBL 0x00020000 |
| 118 | #define F_SEAC 0x00040000 |
| 116 | 119 | #define F_XDA 0x00080000 |
| 117 | 120 | |
| 118 | 121 | |
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| 311 | 314 | // main opcodes PLA, microinstructions PLA, output PLA |
| 312 | 315 | MCFG_PLA_ADD("ipla", 9, 22, 24) |
| 313 | 316 | MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY) |
| 314 | | MCFG_PLA_ADD("mpla", 6, 21, 64) |
| 317 | MCFG_PLA_ADD("mpla", 6, 22, 64) |
| 315 | 318 | MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY) |
| 316 | 319 | MCFG_PLA_ADD("opla", 6, 16, 48) |
| 317 | 320 | MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY) |
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| 508 | 511 | // clear outputs |
| 509 | 512 | m_r = 0; |
| 510 | 513 | m_write_r(0, m_r & m_r_mask, 0xffff); |
| 514 | m_o_latch = 0; |
| 511 | 515 | write_o_output(0); |
| 512 | 516 | m_write_r(0, m_r & m_r_mask, 0xffff); |
| 513 | 517 | } |
| r242283 | r242284 | |
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| 617 | 621 | UINT32 mask = m_mpla->read(sel); |
| 618 | 622 | mask ^= 0x43fc3; // invert active-negative |
| 619 | 623 | |
| 620 | | // note: M_RSTR is specific to TMC02x0, it redirects to F_RSTR |
| 624 | // M_RSTR is specific to TMC02x0, it redirects to F_RSTR |
| 625 | // M_UNK1 is specific to TMC0270, unknown yet |
| 621 | 626 | // _______ ______ _____ _____ _____ _____ ______ _____ ______ _____ _____ |
| 622 | | const UINT32 md[21] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR }; |
| 627 | const UINT32 md[22] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR, M_UNK1 }; |
| 623 | 628 | |
| 624 | | for (int bit = 0; bit < 21 && bit < m_mpla->outputs(); bit++) |
| 629 | for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++) |
| 625 | 630 | if (mask & (1 << bit)) |
| 626 | 631 | decode |= md[bit]; |
| 627 | 632 | |
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| 722 | 727 | // RSTR is on the mpla |
| 723 | 728 | if (m_micro & M_RSTR) |
| 724 | 729 | m_fixed |= F_RSTR; |
| 730 | |
| 731 | // TODO: M_UNK1 |
| 725 | 732 | } |
| 726 | 733 | |
| 727 | 734 | |