trunk/src/emu/cpu/arcompact/arcompactdasm.c
| r242257 | r242258 | |
| 27 | 27 | #define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom |
| 28 | 28 | #define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom |
| 29 | 29 | |
| 30 | int arcompact_handle04_00_dasm(DASM_OPS_32); |
| 31 | int arcompact_handle04_01_dasm(DASM_OPS_32); |
| 32 | int arcompact_handle04_02_dasm(DASM_OPS_32); |
| 33 | int arcompact_handle04_03_dasm(DASM_OPS_32); |
| 34 | int arcompact_handle04_04_dasm(DASM_OPS_32); |
| 35 | int arcompact_handle04_05_dasm(DASM_OPS_32); |
| 36 | int arcompact_handle04_06_dasm(DASM_OPS_32); |
| 37 | int arcompact_handle04_07_dasm(DASM_OPS_32); |
| 38 | int arcompact_handle04_08_dasm(DASM_OPS_32); |
| 39 | int arcompact_handle04_09_dasm(DASM_OPS_32); |
| 40 | int arcompact_handle04_0a_dasm(DASM_OPS_32); |
| 41 | int arcompact_handle04_0b_dasm(DASM_OPS_32); |
| 42 | int arcompact_handle04_0c_dasm(DASM_OPS_32); |
| 43 | int arcompact_handle04_0d_dasm(DASM_OPS_32); |
| 44 | int arcompact_handle04_0e_dasm(DASM_OPS_32); |
| 45 | int arcompact_handle04_0f_dasm(DASM_OPS_32); |
| 46 | int arcompact_handle04_10_dasm(DASM_OPS_32); |
| 47 | int arcompact_handle04_11_dasm(DASM_OPS_32); |
| 48 | int arcompact_handle04_12_dasm(DASM_OPS_32); |
| 49 | int arcompact_handle04_13_dasm(DASM_OPS_32); |
| 50 | int arcompact_handle04_14_dasm(DASM_OPS_32); |
| 51 | int arcompact_handle04_15_dasm(DASM_OPS_32); |
| 52 | int arcompact_handle04_16_dasm(DASM_OPS_32); |
| 53 | int arcompact_handle04_17_dasm(DASM_OPS_32); |
| 54 | int arcompact_handle04_18_dasm(DASM_OPS_32); |
| 55 | int arcompact_handle04_19_dasm(DASM_OPS_32); |
| 56 | int arcompact_handle04_1a_dasm(DASM_OPS_32); |
| 57 | int arcompact_handle04_1b_dasm(DASM_OPS_32); |
| 58 | int arcompact_handle04_1c_dasm(DASM_OPS_32); |
| 59 | int arcompact_handle04_1d_dasm(DASM_OPS_32); |
| 60 | int arcompact_handle04_1e_dasm(DASM_OPS_32); |
| 61 | int arcompact_handle04_1f_dasm(DASM_OPS_32); |
| 62 | int arcompact_handle04_20_dasm(DASM_OPS_32); |
| 63 | int arcompact_handle04_21_dasm(DASM_OPS_32); |
| 64 | int arcompact_handle04_22_dasm(DASM_OPS_32); |
| 65 | int arcompact_handle04_23_dasm(DASM_OPS_32); |
| 66 | int arcompact_handle04_24_dasm(DASM_OPS_32); |
| 67 | int arcompact_handle04_25_dasm(DASM_OPS_32); |
| 68 | int arcompact_handle04_26_dasm(DASM_OPS_32); |
| 69 | int arcompact_handle04_27_dasm(DASM_OPS_32); |
| 70 | int arcompact_handle04_28_dasm(DASM_OPS_32); |
| 71 | int arcompact_handle04_29_dasm(DASM_OPS_32); |
| 72 | int arcompact_handle04_2a_dasm(DASM_OPS_32); |
| 73 | int arcompact_handle04_2b_dasm(DASM_OPS_32); |
| 74 | int arcompact_handle04_2c_dasm(DASM_OPS_32); |
| 75 | int arcompact_handle04_2d_dasm(DASM_OPS_32); |
| 76 | int arcompact_handle04_2e_dasm(DASM_OPS_32); |
| 77 | int arcompact_handle04_2f_dasm(DASM_OPS_32); |
| 78 | int arcompact_handle04_30_dasm(DASM_OPS_32); |
| 79 | int arcompact_handle04_31_dasm(DASM_OPS_32); |
| 80 | int arcompact_handle04_32_dasm(DASM_OPS_32); |
| 81 | int arcompact_handle04_33_dasm(DASM_OPS_32); |
| 82 | int arcompact_handle04_34_dasm(DASM_OPS_32); |
| 83 | int arcompact_handle04_35_dasm(DASM_OPS_32); |
| 84 | int arcompact_handle04_36_dasm(DASM_OPS_32); |
| 85 | int arcompact_handle04_37_dasm(DASM_OPS_32); |
| 86 | int arcompact_handle04_38_dasm(DASM_OPS_32); |
| 87 | int arcompact_handle04_39_dasm(DASM_OPS_32); |
| 88 | int arcompact_handle04_3a_dasm(DASM_OPS_32); |
| 89 | int arcompact_handle04_3b_dasm(DASM_OPS_32); |
| 90 | int arcompact_handle04_3c_dasm(DASM_OPS_32); |
| 91 | int arcompact_handle04_3d_dasm(DASM_OPS_32); |
| 92 | int arcompact_handle04_3e_dasm(DASM_OPS_32); |
| 93 | int arcompact_handle04_3f_dasm(DASM_OPS_32); |
| 94 | |
| 95 | |
| 30 | 96 | int arcompact_handle18_00_dasm(DASM_OPS_16); |
| 31 | 97 | int arcompact_handle18_01_dasm(DASM_OPS_16); |
| 32 | 98 | int arcompact_handle18_02_dasm(DASM_OPS_16); |
| r242257 | r242258 | |
| 325 | 391 | |
| 326 | 392 | int arcompact_handle02_dasm(DASM_OPS_32) |
| 327 | 393 | { |
| 394 | // bitpos |
| 395 | // 11111 111 11111111 0 000 0 00 00 0 000000 |
| 396 | // fedcb a98 76543210 f edc b a9 87 6 543210 |
| 397 | // fields |
| 398 | // 00010 bbb ssssssss S BBB D aa ZZ X AAAAAA |
| 399 | #if 0 |
| 400 | int A = (op & 0x0000003f >> 0); op &= ~0x0000003f; |
| 401 | int X = (op & 0x00000040 >> 6); op &= ~0x00000040; |
| 402 | int Z = (op & 0x00000180 >> 7); op &= ~0x00000180; |
| 403 | int a = (op & 0x00000600 >> 9); op &= ~0x00000600; |
| 404 | int D = (op & 0x00000800 >> 11); op &= ~0x00000800; |
| 405 | int B = (op & 0x00007000 >> 12); op &= ~0x00007000; |
| 406 | int S = (op & 0x00008000 >> 15); op &= ~0x00008000; |
| 407 | int s = (op & 0x00ff0000 >> 16); op &= ~0x00ff0000; |
| 408 | int b = (op & 0x07000000 >> 24); op &= ~0x07000000; |
| 409 | #endif |
| 410 | |
| 328 | 411 | print("LD r+o (%08x)", op ); |
| 329 | 412 | return 4; |
| 330 | 413 | } |
| 331 | 414 | |
| 332 | 415 | int arcompact_handle03_dasm(DASM_OPS_32) |
| 333 | 416 | { |
| 417 | // bitpos |
| 418 | // 11111 111 11111111 0 000 000000 0 00 00 0 |
| 419 | // fedcb a98 76543210 f edc ba9876 5 43 21 0 |
| 420 | // fields |
| 421 | // 00011 bbb ssssssss S BBB CCCCCC D aa ZZ R |
| 422 | |
| 334 | 423 | print("ST r+o (%08x)", op ); |
| 335 | 424 | return 4; |
| 336 | 425 | } |
| 337 | 426 | |
| 338 | 427 | int arcompact_handle04_dasm(DASM_OPS_32) |
| 339 | 428 | { |
| 340 | | print("op a,b,c (basecase) (%08x)", op ); |
| 341 | | return 4; |
| 429 | int size = 4; |
| 430 | // General Operations |
| 431 | |
| 432 | // bitpos |
| 433 | // 11111 111 11 111111 0 000 000000 0 00000 |
| 434 | // fedcb a98 76 543210 f edc ba9876 5 43210 |
| 435 | // |
| 436 | // 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA General Operations *UN*Conditional Register to Register |
| 437 | // 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA General Operations *UN*Conditional Register (Unsigned 6-bit IMM) |
| 438 | // 00100 bbb 10 iiiiii F BBB ssssss S SSSSS General Operations *UN*Conditional Register (Signed 12-bit IMM) |
| 439 | |
| 440 | // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register |
| 441 | // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM) |
| 442 | UINT8 subinstr = (op & 0x003f0000) >> 16; |
| 443 | op &= ~0x003f0000; |
| 444 | |
| 445 | switch (subinstr) |
| 446 | { |
| 447 | case 0x00: size = arcompact_handle04_00_dasm(output, pc, op, oprom); break; // ADD |
| 448 | case 0x01: size = arcompact_handle04_01_dasm(output, pc, op, oprom); break; // ADC |
| 449 | case 0x02: size = arcompact_handle04_02_dasm(output, pc, op, oprom); break; // SUB |
| 450 | case 0x03: size = arcompact_handle04_03_dasm(output, pc, op, oprom); break; // SBC |
| 451 | case 0x04: size = arcompact_handle04_04_dasm(output, pc, op, oprom); break; // AND |
| 452 | case 0x05: size = arcompact_handle04_05_dasm(output, pc, op, oprom); break; // OR |
| 453 | case 0x06: size = arcompact_handle04_06_dasm(output, pc, op, oprom); break; // BIC |
| 454 | case 0x07: size = arcompact_handle04_07_dasm(output, pc, op, oprom); break; // XOR |
| 455 | case 0x08: size = arcompact_handle04_08_dasm(output, pc, op, oprom); break; // MAX |
| 456 | case 0x09: size = arcompact_handle04_09_dasm(output, pc, op, oprom); break; // MIN |
| 457 | case 0x0a: size = arcompact_handle04_0a_dasm(output, pc, op, oprom); break; // MOV |
| 458 | case 0x0b: size = arcompact_handle04_0b_dasm(output, pc, op, oprom); break; // TST |
| 459 | case 0x0c: size = arcompact_handle04_0c_dasm(output, pc, op, oprom); break; // CMP |
| 460 | case 0x0d: size = arcompact_handle04_0d_dasm(output, pc, op, oprom); break; // RCMP |
| 461 | case 0x0e: size = arcompact_handle04_0e_dasm(output, pc, op, oprom); break; // RSUB |
| 462 | case 0x0f: size = arcompact_handle04_0f_dasm(output, pc, op, oprom); break; // BSET |
| 463 | case 0x10: size = arcompact_handle04_10_dasm(output, pc, op, oprom); break; // BCLR |
| 464 | case 0x11: size = arcompact_handle04_11_dasm(output, pc, op, oprom); break; // BTST |
| 465 | case 0x12: size = arcompact_handle04_12_dasm(output, pc, op, oprom); break; // BXOR |
| 466 | case 0x13: size = arcompact_handle04_13_dasm(output, pc, op, oprom); break; // BMSK |
| 467 | case 0x14: size = arcompact_handle04_14_dasm(output, pc, op, oprom); break; // ADD1 |
| 468 | case 0x15: size = arcompact_handle04_15_dasm(output, pc, op, oprom); break; // ADD2 |
| 469 | case 0x16: size = arcompact_handle04_16_dasm(output, pc, op, oprom); break; // ADD3 |
| 470 | case 0x17: size = arcompact_handle04_17_dasm(output, pc, op, oprom); break; // SUB1 |
| 471 | case 0x18: size = arcompact_handle04_18_dasm(output, pc, op, oprom); break; // SUB2 |
| 472 | case 0x19: size = arcompact_handle04_19_dasm(output, pc, op, oprom); break; // SUB3 |
| 473 | case 0x1a: size = arcompact_handle04_1a_dasm(output, pc, op, oprom); break; // MPY * |
| 474 | case 0x1b: size = arcompact_handle04_1b_dasm(output, pc, op, oprom); break; // MPYH * |
| 475 | case 0x1c: size = arcompact_handle04_1c_dasm(output, pc, op, oprom); break; // MPYHU * |
| 476 | case 0x1d: size = arcompact_handle04_1d_dasm(output, pc, op, oprom); break; // MPYU * |
| 477 | case 0x1e: size = arcompact_handle04_1e_dasm(output, pc, op, oprom); break; // illegal |
| 478 | case 0x1f: size = arcompact_handle04_1f_dasm(output, pc, op, oprom); break; // illegal |
| 479 | case 0x20: size = arcompact_handle04_20_dasm(output, pc, op, oprom); break; // Jcc |
| 480 | case 0x21: size = arcompact_handle04_21_dasm(output, pc, op, oprom); break; // Jcc.D |
| 481 | case 0x22: size = arcompact_handle04_22_dasm(output, pc, op, oprom); break; // JLcc |
| 482 | case 0x23: size = arcompact_handle04_23_dasm(output, pc, op, oprom); break; // JLcc.D |
| 483 | case 0x24: size = arcompact_handle04_24_dasm(output, pc, op, oprom); break; // illegal |
| 484 | case 0x25: size = arcompact_handle04_25_dasm(output, pc, op, oprom); break; // illegal |
| 485 | case 0x26: size = arcompact_handle04_26_dasm(output, pc, op, oprom); break; // illegal |
| 486 | case 0x27: size = arcompact_handle04_27_dasm(output, pc, op, oprom); break; // illegal |
| 487 | case 0x28: size = arcompact_handle04_28_dasm(output, pc, op, oprom); break; // LPcc |
| 488 | case 0x29: size = arcompact_handle04_29_dasm(output, pc, op, oprom); break; // FLAG |
| 489 | case 0x2a: size = arcompact_handle04_2a_dasm(output, pc, op, oprom); break; // LR |
| 490 | case 0x2b: size = arcompact_handle04_2b_dasm(output, pc, op, oprom); break; // SR |
| 491 | case 0x2c: size = arcompact_handle04_2c_dasm(output, pc, op, oprom); break; // illegal |
| 492 | case 0x2d: size = arcompact_handle04_2d_dasm(output, pc, op, oprom); break; // illegal |
| 493 | case 0x2e: size = arcompact_handle04_2e_dasm(output, pc, op, oprom); break; // illegal |
| 494 | case 0x2f: size = arcompact_handle04_2f_dasm(output, pc, op, oprom); break; // Sub Opcode |
| 495 | case 0x30: size = arcompact_handle04_30_dasm(output, pc, op, oprom); break; // LD r-r |
| 496 | case 0x31: size = arcompact_handle04_31_dasm(output, pc, op, oprom); break; // LD r-r |
| 497 | case 0x32: size = arcompact_handle04_32_dasm(output, pc, op, oprom); break; // LD r-r |
| 498 | case 0x33: size = arcompact_handle04_33_dasm(output, pc, op, oprom); break; // LD r-r |
| 499 | case 0x34: size = arcompact_handle04_34_dasm(output, pc, op, oprom); break; // LD r-r |
| 500 | case 0x35: size = arcompact_handle04_35_dasm(output, pc, op, oprom); break; // LD r-r |
| 501 | case 0x36: size = arcompact_handle04_36_dasm(output, pc, op, oprom); break; // LD r-r |
| 502 | case 0x37: size = arcompact_handle04_37_dasm(output, pc, op, oprom); break; // LD r-r |
| 503 | case 0x38: size = arcompact_handle04_38_dasm(output, pc, op, oprom); break; // illegal |
| 504 | case 0x39: size = arcompact_handle04_39_dasm(output, pc, op, oprom); break; // illegal |
| 505 | case 0x3a: size = arcompact_handle04_3a_dasm(output, pc, op, oprom); break; // illegal |
| 506 | case 0x3b: size = arcompact_handle04_3b_dasm(output, pc, op, oprom); break; // illegal |
| 507 | case 0x3c: size = arcompact_handle04_3c_dasm(output, pc, op, oprom); break; // illegal |
| 508 | case 0x3d: size = arcompact_handle04_3d_dasm(output, pc, op, oprom); break; // illegal |
| 509 | case 0x3e: size = arcompact_handle04_3e_dasm(output, pc, op, oprom); break; // illegal |
| 510 | case 0x3f: size = arcompact_handle04_3f_dasm(output, pc, op, oprom); break; // illegal |
| 511 | } |
| 512 | |
| 513 | return size; |
| 342 | 514 | } |
| 343 | 515 | |
| 516 | int arcompact_handle04_00_dasm(DASM_OPS_32) { print("ADD (%08x)", op); return 4;} |
| 517 | int arcompact_handle04_01_dasm(DASM_OPS_32) { print("ADC (%08x)", op); return 4;} |
| 518 | int arcompact_handle04_02_dasm(DASM_OPS_32) { print("SUB (%08x)", op); return 4;} |
| 519 | int arcompact_handle04_03_dasm(DASM_OPS_32) { print("SBC (%08x)", op); return 4;} |
| 520 | int arcompact_handle04_04_dasm(DASM_OPS_32) { print("AND (%08x)", op); return 4;} |
| 521 | int arcompact_handle04_05_dasm(DASM_OPS_32) { print("OR (%08x)", op); return 4;} |
| 522 | int arcompact_handle04_06_dasm(DASM_OPS_32) { print("BIC (%08x)", op); return 4;} |
| 523 | int arcompact_handle04_07_dasm(DASM_OPS_32) { print("XOR (%08x)", op); return 4;} |
| 524 | int arcompact_handle04_08_dasm(DASM_OPS_32) { print("MAX (%08x)", op); return 4;} |
| 525 | int arcompact_handle04_09_dasm(DASM_OPS_32) { print("MIN (%08x)", op); return 4;} |
| 526 | int arcompact_handle04_0a_dasm(DASM_OPS_32) { print("MOV (%08x)", op); return 4;} |
| 527 | int arcompact_handle04_0b_dasm(DASM_OPS_32) { print("TST (%08x)", op); return 4;} |
| 528 | int arcompact_handle04_0c_dasm(DASM_OPS_32) { print("CMP (%08x)", op); return 4;} |
| 529 | int arcompact_handle04_0d_dasm(DASM_OPS_32) { print("RCMP (%08x)", op); return 4;} |
| 530 | int arcompact_handle04_0e_dasm(DASM_OPS_32) { print("RSUB (%08x)", op); return 4;} |
| 531 | int arcompact_handle04_0f_dasm(DASM_OPS_32) { print("BSET (%08x)", op); return 4;} |
| 532 | int arcompact_handle04_10_dasm(DASM_OPS_32) { print("BCLR (%08x)", op); return 4;} |
| 533 | int arcompact_handle04_11_dasm(DASM_OPS_32) { print("BTST (%08x)", op); return 4;} |
| 534 | int arcompact_handle04_12_dasm(DASM_OPS_32) { print("BXOR (%08x)", op); return 4;} |
| 535 | int arcompact_handle04_13_dasm(DASM_OPS_32) { print("BMSK (%08x)", op); return 4;} |
| 536 | int arcompact_handle04_14_dasm(DASM_OPS_32) { print("ADD1 (%08x)", op); return 4;} |
| 537 | int arcompact_handle04_15_dasm(DASM_OPS_32) { print("ADD2 (%08x)", op); return 4;} |
| 538 | int arcompact_handle04_16_dasm(DASM_OPS_32) { print("ADD3 (%08x)", op); return 4;} |
| 539 | int arcompact_handle04_17_dasm(DASM_OPS_32) { print("SUB1 (%08x)", op); return 4;} |
| 540 | int arcompact_handle04_18_dasm(DASM_OPS_32) { print("SUB2 (%08x)", op); return 4;} |
| 541 | int arcompact_handle04_19_dasm(DASM_OPS_32) { print("SUB3 (%08x)", op); return 4;} |
| 542 | int arcompact_handle04_1a_dasm(DASM_OPS_32) { print("MPY (%08x)", op); return 4;} // * |
| 543 | int arcompact_handle04_1b_dasm(DASM_OPS_32) { print("MPYH (%08x)", op); return 4;} // * |
| 544 | int arcompact_handle04_1c_dasm(DASM_OPS_32) { print("MPYHU (%08x)", op); return 4;} // * |
| 545 | int arcompact_handle04_1d_dasm(DASM_OPS_32) { print("MPYU (%08x)", op); return 4;} // * |
| 546 | int arcompact_handle04_1e_dasm(DASM_OPS_32) { print("<illegal 0x04_1e> (%08x)", op); return 4;} |
| 547 | int arcompact_handle04_1f_dasm(DASM_OPS_32) { print("<illegal 0x04_1f> (%08x)", op); return 4;} |
| 548 | int arcompact_handle04_20_dasm(DASM_OPS_32) { print("Jcc (%08x)", op); return 4;} |
| 549 | int arcompact_handle04_21_dasm(DASM_OPS_32) { print("Jcc.D (%08x)", op); return 4;} |
| 550 | int arcompact_handle04_22_dasm(DASM_OPS_32) { print("JLcc (%08x)", op); return 4;} |
| 551 | int arcompact_handle04_23_dasm(DASM_OPS_32) { print("JLcc.D (%08x)", op); return 4;} |
| 552 | int arcompact_handle04_24_dasm(DASM_OPS_32) { print("<illegal 0x04_24> (%08x)", op); return 4;} |
| 553 | int arcompact_handle04_25_dasm(DASM_OPS_32) { print("<illegal 0x04_25> (%08x)", op); return 4;} |
| 554 | int arcompact_handle04_26_dasm(DASM_OPS_32) { print("<illegal 0x04_26> (%08x)", op); return 4;} |
| 555 | int arcompact_handle04_27_dasm(DASM_OPS_32) { print("<illegal 0x04_27> (%08x)", op); return 4;} |
| 556 | int arcompact_handle04_28_dasm(DASM_OPS_32) { print("LPcc (%08x)", op); return 4;} |
| 557 | int arcompact_handle04_29_dasm(DASM_OPS_32) { print("FLAG (%08x)", op); return 4;} |
| 558 | int arcompact_handle04_2a_dasm(DASM_OPS_32) { print("LR (%08x)", op); return 4;} |
| 559 | int arcompact_handle04_2b_dasm(DASM_OPS_32) { print("SR (%08x)", op); return 4;} |
| 560 | int arcompact_handle04_2c_dasm(DASM_OPS_32) { print("<illegal 0x04_2c> (%08x)", op); return 4;} |
| 561 | int arcompact_handle04_2d_dasm(DASM_OPS_32) { print("<illegal 0x04_2d> (%08x)", op); return 4;} |
| 562 | int arcompact_handle04_2e_dasm(DASM_OPS_32) { print("<illegal 0x04_2e> (%08x)", op); return 4;} |
| 563 | int arcompact_handle04_2f_dasm(DASM_OPS_32) { print("SOP (another subcode) (%08x)", op); return 4;} |
| 564 | int arcompact_handle04_30_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x30) (%08x)", op); return 4;} |
| 565 | int arcompact_handle04_31_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x31) (%08x)", op); return 4;} |
| 566 | int arcompact_handle04_32_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x32) (%08x)", op); return 4;} |
| 567 | int arcompact_handle04_33_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x33) (%08x)", op); return 4;} |
| 568 | int arcompact_handle04_34_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x34) (%08x)", op); return 4;} |
| 569 | int arcompact_handle04_35_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x35) (%08x)", op); return 4;} |
| 570 | int arcompact_handle04_36_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x36) (%08x)", op); return 4;} |
| 571 | int arcompact_handle04_37_dasm(DASM_OPS_32) { print("LD r-r (basecase 0x37) (%08x)", op); return 4;} |
| 572 | int arcompact_handle04_38_dasm(DASM_OPS_32) { print("<illegal 0x04_38> (%08x)", op); return 4;} |
| 573 | int arcompact_handle04_39_dasm(DASM_OPS_32) { print("<illegal 0x04_39> (%08x)", op); return 4;} |
| 574 | int arcompact_handle04_3a_dasm(DASM_OPS_32) { print("<illegal 0x04_3a> (%08x)", op); return 4;} |
| 575 | int arcompact_handle04_3b_dasm(DASM_OPS_32) { print("<illegal 0x04_3b> (%08x)", op); return 4;} |
| 576 | int arcompact_handle04_3c_dasm(DASM_OPS_32) { print("<illegal 0x04_3c> (%08x)", op); return 4;} |
| 577 | int arcompact_handle04_3d_dasm(DASM_OPS_32) { print("<illegal 0x04_3d> (%08x)", op); return 4;} |
| 578 | int arcompact_handle04_3e_dasm(DASM_OPS_32) { print("<illegal 0x04_3e> (%08x)", op); return 4;} |
| 579 | int arcompact_handle04_3f_dasm(DASM_OPS_32) { print("<illegal 0x04_3f> (%08x)", op); return 4;} |
| 580 | |
| 581 | |
| 582 | |
| 583 | |
| 584 | |
| 585 | |
| 344 | 586 | int arcompact_handle05_dasm(DASM_OPS_32) |
| 345 | 587 | { |
| 346 | 588 | print("op a,b,c (05 ARC ext) (%08x)", op ); |