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r33741 Monday 8th December, 2014 at 15:12:58 UTC by Curt Coder
(MESS) victor9k: Floppy WIP. (nw)
[src/lib/formats]victor9k_dsk.c
[src/mess/machine]victor9k_fdc.c victor9k_fdc.h

trunk/src/lib/formats/victor9k_dsk.c
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210210   static floppy_image_format_t::desc_e desc[] = {
211211      /* 00 */ { SECTOR_INTERLEAVE_SKEW, 0, 0},
212212      /* 01 */ { SECTOR_LOOP_START, 0, -1 },
213      /* 02 */ {   SYNC_GCR5, 6 },
213      /* 02 */ {   SYNC_GCR5, 9 },
214214      /* 03 */ {   GCR5, 0x07, 1 },
215215      /* 04 */ {   CRC_VICTOR_HDR_START, 1 },
216216      /* 05 */ {     TRACK_ID_VICTOR_GCR5 },
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231231      /* 20 */ { END }
232232   };
233233
234   current_size = 60 + (1+1+1+1)*10 + 8*8 + 50 + (1+f.sector_base_size+2)*10 + 8*8;
234   current_size = 90 + (1+1+1+1)*10 + 8*8 + 50 + (1+f.sector_base_size+2)*10 + 8*8;
235235
236236   current_size *= sector_count;
237237   return desc;
trunk/src/mess/machine/victor9k_fdc.c
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3535   - communication error with SCP after loading boot sector
3636      - bp ff1a8
3737      - patch ff1ab=c3
38   - sync counter errors
39      - FF if sync byte counter loaded to 10
40      - 11 if sync byte counter loaded to 9
38    - single/double sided jumper
39    - header sync length unknown (6 is too short)
4140    - 8048 spindle speed control
42    - write logic
4341
4442*/
4543
r242252r242253
6058#define M6522_5_TAG     "1k"
6159#define M6522_6_TAG     "1h"
6260
63// this is exactly the same decode as used in the Commodore 4040/8050 series drives
61// this is exactly the same decode/encode as used in the Commodore 4040/8050 series drives
6462#define GCR_DECODE(_e, _i) \
6563    ((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
6664
65// E7 E6 I7 E5 E4 E3 E2 I2 E1 E0
66#define GCR_ENCODE(_e, _i) \
67    ((_e & 0xc0) << 2 | (_i & 0x80) | (_e & 0x3c) << 1 | (_i & 0x04) | (_e & 0x03))
68
6769// Tandon TM-100 spindle @ 300RPM, measured TACH 12VAC 256Hz
6870// TACH = RPM / 60 * SPINDLE RATIO * MOTOR POLES
6971// 256 = 300 / 60 * 6.4 * 8
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794796
795797   */
796798
799   if (LOG_VIA) logerror("%s %s WD %02x\n", machine().time().as_string(), machine().describe_context(), data);
800
797801   if (m_wd != data)
798802   {
799803      live_sync();
800804      m_wd = cur_live.wd = data;
801      if (LOG_VIA) logerror("%s %s WD %02x\n", machine().time().as_string(), machine().describe_context(), data);
802805      checkpoint();
803806      live_run();
804807   }
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931934   // door A sense
932935   data |= (m_floppy0->exists() ? 0 : 1) << 4;
933936
934   // single/double sided
935   data |= (m_drive ? m_floppy1->twosid_r() : m_floppy0->twosid_r()) << 5;
937   // single/double sided jumper
938   //data |= 0x20;
936939
937940   return data;
938941}
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9971000      checkpoint();
9981001      if (LOG_VIA) logerror("%s %s DRW %u\n", machine().time().as_string(), machine().describe_context(), state);
9991002      if (state) {
1000         stop_writing(machine().time());
1003         pll_stop_writing(get_floppy(), machine().time());
10011004      } else {
1002         start_writing(machine().time());
1005         pll_start_writing(machine().time());
10031006      }
10041007      live_run();
10051008   }
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10791082   cur_pll.set_clock(clock);
10801083}
10811084
1082void victor_9000_fdc_t::pll_save_checkpoint()
1085void victor_9000_fdc_t::pll_start_writing(const attotime &tm)
10831086{
1084   checkpoint_pll = cur_pll;
1087   cur_pll.start_writing(tm);
10851088}
10861089
1087void victor_9000_fdc_t::pll_retrieve_checkpoint()
1090void victor_9000_fdc_t::pll_commit(floppy_image_device *floppy, const attotime &tm)
10881091{
1089   cur_pll = checkpoint_pll;
1092   cur_pll.commit(floppy, tm);
10901093}
10911094
1092void victor_9000_fdc_t::checkpoint()
1095void victor_9000_fdc_t::pll_stop_writing(floppy_image_device *floppy, const attotime &tm)
10931096{
1094   checkpoint_live = cur_live;
1095   pll_save_checkpoint();
1097   cur_pll.stop_writing(floppy, tm);
10961098}
10971099
1098void victor_9000_fdc_t::rollback()
1100void victor_9000_fdc_t::pll_save_checkpoint()
10991101{
1100   cur_live = checkpoint_live;
1101   pll_retrieve_checkpoint();
1102   checkpoint_pll = cur_pll;
11021103}
11031104
1104void victor_9000_fdc_t::start_writing(const attotime &tm)
1105void victor_9000_fdc_t::pll_retrieve_checkpoint()
11051106{
1106   cur_live.write_start_time = tm;
1107   cur_live.write_position = 0;
1107   cur_pll = checkpoint_pll;
11081108}
11091109
1110void victor_9000_fdc_t::stop_writing(const attotime &tm)
1110int victor_9000_fdc_t::pll_get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit)
11111111{
1112   commit(tm);
1113   cur_live.write_start_time = attotime::never;
1112   return cur_pll.get_next_bit(tm, floppy, limit);
11141113}
11151114
1116bool victor_9000_fdc_t::write_next_bit(bool bit, const attotime &limit)
1115bool victor_9000_fdc_t::pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit)
11171116{
1118   if(cur_live.write_start_time.is_never()) {
1119      cur_live.write_start_time = cur_live.tm;
1120      cur_live.write_position = 0;
1121   }
1122
1123   attotime etime = cur_live.tm + m_period;
1124   if(etime > limit)
1125      return true;
1126
1127   if(bit && cur_live.write_position < ARRAY_LENGTH(cur_live.write_buffer))
1128      cur_live.write_buffer[cur_live.write_position++] = cur_live.tm;
1129
1130   if (LOG) logerror("%s write bit %u (%u)\n", cur_live.tm.as_string(), cur_live.bit_counter, bit);
1131
1132   return false;
1117   return cur_pll.write_next_bit(bit, tm, floppy, limit);
11331118}
11341119
1135void victor_9000_fdc_t::commit(const attotime &tm)
1120void victor_9000_fdc_t::checkpoint()
11361121{
1137   if(cur_live.write_start_time.is_never() || tm == cur_live.write_start_time || !cur_live.write_position)
1138      return;
1122   pll_commit(get_floppy(), cur_live.tm);
1123   checkpoint_live = cur_live;
1124   pll_save_checkpoint();
1125}
11391126
1140   if (LOG) logerror("%s committing %u transitions since %s\n", tm.as_string(), cur_live.write_position, cur_live.write_start_time.as_string());
1141
1142   if(get_floppy())
1143      get_floppy()->write_flux(cur_live.write_start_time, tm, cur_live.write_position, cur_live.write_buffer);
1144
1145   cur_live.write_start_time = tm;
1146   cur_live.write_position = 0;
1127void victor_9000_fdc_t::rollback()
1128{
1129   cur_live = checkpoint_live;
1130   pll_retrieve_checkpoint();
11471131}
11481132
11491133void victor_9000_fdc_t::live_delay(int state)
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11611145      if(cur_live.tm > machine().time()) {
11621146         rollback();
11631147         live_run(machine().time());
1164         commit(cur_live.tm);
1148         pll_commit(get_floppy(), cur_live.tm);
11651149      } else {
1166         commit(cur_live.tm);
1150         pll_commit(get_floppy(), cur_live.tm);
11671151         if(cur_live.next_state != -1) {
11681152            cur_live.state = cur_live.next_state;
11691153            cur_live.next_state = -1;
11701154         }
11711155         if(cur_live.state == IDLE) {
1172            stop_writing(cur_live.tm);
1156            pll_stop_writing(get_floppy(), cur_live.tm);
11731157            cur_live.tm = attotime::never;
11741158         }
11751159      }
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11851169      live_run(machine().time());
11861170   }
11871171
1188   stop_writing(cur_live.tm);
1172   pll_stop_writing(get_floppy(), cur_live.tm);
11891173
11901174   cur_live.tm = attotime::never;
11911175   cur_live.state = IDLE;
r242252r242253
12151199            return;
12161200
12171201         // read bit
1218         int bit = get_next_bit(cur_live.tm, limit);
1202         int bit = pll_get_next_bit(cur_live.tm, get_floppy(), limit);
12191203         if(bit < 0)
12201204            return;
12211205
r242252r242253
12271211         int sync = !(cur_live.shift_reg == 0x3ff);
12281212
12291213         // bit counter
1230         if (!sync) {
1231            cur_live.bit_counter = 0;
1232         } else if (cur_live.sync) {
1214         if (cur_live.drw) {
1215            if (!sync) {
1216               cur_live.bit_counter = 0;
1217            } else if (cur_live.sync) {
1218               cur_live.bit_counter++;
1219               if (cur_live.bit_counter == 10) {
1220                  cur_live.bit_counter = 0;
1221               }
1222            }
1223         } else {
12331224            cur_live.bit_counter++;
12341225            if (cur_live.bit_counter == 10) {
12351226               cur_live.bit_counter = 0;
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12391230         // sync counter
12401231         if (sync) {
12411232            cur_live.sync_bit_counter = 0;
1242            cur_live.sync_byte_counter = 9;
1233            cur_live.sync_byte_counter = 10; // TODO 9 in schematics
12431234         } else if (!cur_live.sync) {
12441235            cur_live.sync_bit_counter++;
12451236            if (cur_live.sync_bit_counter == 10) {
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12561247
12571248         // GCR decoder
12581249         if (cur_live.drw) {
1259            cur_live.i = cur_live.drw << 10 | cur_live.shift_reg;
1250            cur_live.i = cur_live.shift_reg;
12601251         } else {
1261            cur_live.i = cur_live.drw << 10 | ((cur_live.wd & 0xf0) << 1) | cur_live.wrsync << 4 | (cur_live.wd & 0x0f);
1252            cur_live.i = 0x200 | ((cur_live.wd & 0xf0) << 1) | cur_live.wrsync << 4 | (cur_live.wd & 0x0f);
12621253         }
12631254
1264         cur_live.e = m_gcr_rom->base()[cur_live.i];
1255         cur_live.e = m_gcr_rom->base()[cur_live.drw << 10 | cur_live.i];
12651256
12661257         attotime next = cur_live.tm + m_period;
1267         if (LOG) logerror("%s:%s:%s bit %u sync %u bc %u sbc %u sBC %u syn %u i %03x e %02x\n",cur_live.tm.as_string(),next.as_string(),cur_live.edge.as_string(),bit,sync,cur_live.bit_counter,cur_live.sync_bit_counter,cur_live.sync_byte_counter,syn,cur_live.i,cur_live.e);
1258         if (LOG) logerror("%s:%s cyl %u bit %u sync %u bc %u sr %03x sbc %u sBC %u syn %u i %03x e %02x\n",cur_live.tm.as_string(),next.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.sync_bit_counter,cur_live.sync_byte_counter,syn,cur_live.i,cur_live.e);
12681259
12691260         // byte ready
12701261         int brdy = !(cur_live.bit_counter == 9);
r242252r242253
12721263         // GCR error
12731264         int gcr_err = !(brdy || BIT(cur_live.e, 3));
12741265
1266         // write bit
1267         if (!cur_live.drw) { // TODO WPS
1268            int write_bit = BIT(cur_live.shift_reg_write, 9);
1269            if (LOG) logerror("%s writing bit %u sr %03x\n",cur_live.tm.as_string(),write_bit,cur_live.shift_reg_write);
1270            pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit);
1271         }
1272
1273         if (!brdy) {
1274            // load write shift register
1275            cur_live.shift_reg_write = GCR_ENCODE(cur_live.e, cur_live.i);
1276
1277            if (LOG) logerror("%s load write shift register %03x\n",cur_live.tm.as_string(),cur_live.shift_reg_write);
1278         } else {
1279            // clock write shift register
1280            cur_live.shift_reg_write <<= 1;
1281            cur_live.shift_reg_write &= 0x3ff;
1282         }
1283
12751284         if (brdy != cur_live.brdy) {
12761285            if (LOG) logerror("%s BRDY %u\n", cur_live.tm.as_string(),brdy);
12771286            if (!brdy)
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13031312         }
13041313
13051314         if (syncpoint) {
1306            commit(cur_live.tm);
1307
1308            cur_live.tm += m_period;
13091315            live_delay(RUNNING_SYNCPOINT);
13101316            return;
13111317         }
1312
1313         cur_live.tm += m_period;
13141318         break;
13151319      }
13161320
r242252r242253
13341338      }
13351339   }
13361340}
1337
1338int victor_9000_fdc_t::get_next_bit(attotime &tm, const attotime &limit)
1339{
1340   return cur_pll.get_next_bit(tm, get_floppy(), limit);
1341}
trunk/src/mess/machine/victor9k_fdc.h
r242252r242253
135135      UINT8 e;
136136
137137      // read
138      attotime edge;
139138      UINT16 shift_reg;
140139      int bit_counter;
141140      int sync_bit_counter;
r242252r242253
223222   floppy_image_device* get_floppy();
224223   void live_start();
225224   void pll_reset(const attotime &when, const attotime clock);
225   void pll_start_writing(const attotime &tm);
226   void pll_commit(floppy_image_device *floppy, const attotime &tm);
227   void pll_stop_writing(floppy_image_device *floppy, const attotime &tm);
228   int pll_get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit);
229   bool pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit);
226230   void pll_save_checkpoint();
227231   void pll_retrieve_checkpoint();
228232   void checkpoint();
229233   void rollback();
230   bool write_next_bit(bool bit, const attotime &limit);
231   void start_writing(const attotime &tm);
232   void commit(const attotime &tm);
233   void stop_writing(const attotime &tm);
234234   void live_delay(int state);
235235   void live_sync();
236236   void live_abort();
237237   void live_run(const attotime &limit = attotime::never);
238   void get_next_edge(const attotime &when);
239   int get_next_bit(attotime &tm, const attotime &limit);
240238};
241239
242240

https://github.com/mamedev/mame/commit/beb6c17cedab06a6e069db882c244cb03ec20a82

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