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r33708 Saturday 6th December, 2014 at 11:36:07 UTC by Curt Coder
(MESS) victor9k: Floppy WIP. (nw)
[src/mess/machine]victor9k_fdc.c victor9k_fdc.h

trunk/src/mess/machine/victor9k_fdc.c
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5353#define M6522_5_TAG     "1k"
5454#define M6522_6_TAG     "1h"
5555
56// this is exactly the same decode as used in the Commodore 4040/8050 series drives
5657#define GCR_DECODE(_e, _i) \
5758    ((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
5859
60// Tandon TM-100 spindle @ 300RPM, measured TACH 12VAC 256Hz
61// TACH = RPM / 60 * SPINDLE RATIO * MOTOR POLES
62// 256 = 300 / 60 * 6.4 * 8
63#define SPINDLE_RATIO    6.4
64#define MOTOR_POLES      8
5965
66// TODO wrong values here! motor speed is controlled by an LM2917, with help from the spindle TACH and a DAC0808 whose value is set by the SCP 8048
67const int victor_9000_fdc_t::rpm[] = { 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 252, 254, 255, 257, 259, 260, 262, 264, 266, 267, 269, 271, 273, 275, 276, 278, 280, 282, 284, 286, 288, 290, 291, 293, 295, 297, 299, 301, 303, 305, 307, 309, 311, 313, 315, 318, 320, 322, 324, 326, 328, 330, 333, 335, 337, 339, 342, 344, 346, 348, 351, 353, 355, 358, 360, 362, 365, 367, 370, 372, 375, 377, 380, 382, 385, 387, 390, 392, 395, 398, 400, 403, 406, 408, 411, 414, 416, 419, 422, 425, 428, 430, 433, 436, 439, 442, 445, 448, 451, 454, 457, 460, 463, 466, 469, 472, 475, 478, 482, 485, 488, 491, 494, 498, 501, 504, 508, 511, 514, 518, 521, 525, 528, 532, 535, 539, 542, 546, 550, 553, 557, 561, 564, 568, 572, 576, 579, 583, 587, 591, 595, 599, 603, 607, 611, 615, 619, 623, 627, 631, 636, 640, 644, 648, 653, 657, 661, 666, 670, 674, 679, 683, 688, 693, 697, 702, 706, 711, 716, 721, 725, 730, 735, 740, 745, 750, 755, 760, 765, 770, 775, 780, 785, 790, 796, 801, 806, 812, 817, 822, 828, 833, 839, 844, 850, 856, 861, 867, 873, 878, 884 };
68
69
70
6071//**************************************************************************
6172//  DEVICE DEFINITIONS
6273//**************************************************************************
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92103//-------------------------------------------------
93104
94105static ADDRESS_MAP_START( floppy_io, AS_IO, 8, victor_9000_fdc_t )
95   AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READ(floppy_p1_r) AM_WRITENOP
106   AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(floppy_p1_r, floppy_p1_w)
96107   AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(floppy_p2_r, floppy_p2_w)
97108   AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(tach0_r)
98109   AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(tach1_r)
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106117
107118int victor_9000_fdc_t::load0_cb(floppy_image_device *device)
108119{
120   // DOOR OPEN 0
109121   m_via4->write_ca1(0);
110122
111123   return IMAGE_INIT_PASS;
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113125
114126void victor_9000_fdc_t::unload0_cb(floppy_image_device *device)
115127{
128   // DOOR OPEN 0
116129   m_via4->write_ca1(1);
117130}
118131
119132int victor_9000_fdc_t::load1_cb(floppy_image_device *device)
120133{
134   // DOOR OPEN 1
121135   m_via4->write_cb1(0);
122136
123137   return IMAGE_INIT_PASS;
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125139
126140void victor_9000_fdc_t::unload1_cb(floppy_image_device *device)
127141{
142   // DOOR OPEN 1
128143   m_via4->write_cb1(1);
129144}
130145
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147162   MCFG_CPU_IO_MAP(floppy_io)
148163
149164   MCFG_DEVICE_ADD(M6522_4_TAG, VIA6522, XTAL_30MHz/30)
165   MCFG_VIA6522_READPA_HANDLER(READ8(victor_9000_fdc_t, via4_pa_r))
150166   MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor_9000_fdc_t, via4_pa_w))
167   MCFG_VIA6522_READPB_HANDLER(READ8(victor_9000_fdc_t, via4_pb_r))
151168   MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor_9000_fdc_t, via4_pb_w))
152169   MCFG_VIA6522_CA2_HANDLER(WRITELINE(victor_9000_fdc_t, wrsync_w))
153170   MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor_9000_fdc_t, via4_irq_w))
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319336      break;
320337
321338   case TM_TACH0:
322      // TODO
339      m_tach0 = !m_tach0;
340      if (LOG_SCP) logerror("TACH0 %u\n", m_tach0);
323341      break;
324342
325343   case TM_TACH1:
326      // TODO
344      m_tach1 = !m_tach1;
345      if (LOG_SCP) logerror("TACH1 %u\n", m_tach1);
327346      break;
328347   }
329348}
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355374
356375
357376//-------------------------------------------------
377//  floppy_p1_w -
378//-------------------------------------------------
379
380WRITE8_MEMBER( victor_9000_fdc_t::floppy_p1_w )
381{
382   /*
383
384       bit     description
385
386       0       L0MS0
387       1       L0MS1
388       2       L0MS2
389       3       L0MS3
390       4       L1MS0
391       5       L1MS1
392       6       L1MS2
393       7       L1MS3
394
395   */
396
397   m_l0ms = data & 0x0f;
398   m_l1ms = data >> 4;
399}
400
401
402//-------------------------------------------------
358403//  floppy_p2_r -
359404//-------------------------------------------------
360405
361406READ8_MEMBER( victor_9000_fdc_t::floppy_p2_r )
362407{
363   return m_p2; // TODO needed because of ORL/ANL P2, should be in mcs48.c
408   /*
409
410       bit     description
411
412       0
413       1
414       2
415       3
416       4
417       5
418       6       RDY0
419       7       RDY1
420
421   */
422
423   UINT8 data = m_p2 & 0x3f;
424
425   data |= m_rdy0 << 6;
426   data |= m_rdy1 << 7;
427
428   return data;
364429}
365430
366431
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407472   int sel1 = BIT(data, 4);
408473   if (m_sel1 != sel1) sync = true;
409474
410   //m_rdy0 = BIT(data, 6);
411   //m_via5->write_ca2(m_rdy0);
475   set_rdy0(BIT(data, 6));
476   set_rdy1(BIT(data, 7));
412477
413   //m_rdy1 = BIT(data, 7);
414   //m_via5->write_cb2(m_rdy1);
415
416478   if (LOG_SCP) logerror("%s %s START0/STOP0/SEL0/RDY0 %u/%u/%u/%u START1/STOP1/SEL1/RDY1 %u/%u/%u/%u\n", machine().time().as_string(), machine().describe_context(), start0, stop0, sel0, m_rdy0, start1, stop1, sel1, m_rdy1);
417479
418480   if (sync)
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500562   } else if (stop && !floppy->mon_r()) {
501563      if (LOG_SCP) logerror("%s: motor stop\n", floppy->tag());
502564      floppy->mon_w(1);
565      t_tach->reset();
503566   }
504567
505568   if (sel) {
506569      da = m_da;
570      if (!floppy->mon_r()) {
571         float tach = rpm[da] / 60 * SPINDLE_RATIO * MOTOR_POLES;
572
573         if (LOG_SCP) logerror("%s: motor speed %u rpm / tach %0.1f hz (DA %02x)\n", floppy->tag(), rpm[da], tach, da);
574
575         t_tach->adjust(attotime::from_hz(tach*2), 0, attotime::from_hz(tach*2));
576         floppy->set_rpm(rpm[da]);
577      }
507578   }
508579}
509580
581void victor_9000_fdc_t::set_rdy0(int state)
582{
583   //m_rdy0 = state;
584   //m_via5->write_ca2(m_rdy0);
585}
510586
587void victor_9000_fdc_t::set_rdy1(int state)
588{
589   //m_rdy1 = state;
590   //m_via5->write_cb2(m_rdy1);
591}
592
593
511594//-------------------------------------------------
512595//  da_w -
513596//-------------------------------------------------
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527610   }
528611}
529612
613READ8_MEMBER( victor_9000_fdc_t::via4_pa_r )
614{
615   /*
616
617       bit     description
618
619       PA0     L0MS0
620       PA1     L0MS1
621       PA2     L0MS2
622       PA3     L0MS3
623       PA4
624       PA5
625       PA6
626       PA7
627
628   */
629
630   return m_l0ms;
631}
632
530633WRITE8_MEMBER( victor_9000_fdc_t::via4_pa_w )
531634{
532635   /*
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567670   }
568671}
569672
673READ8_MEMBER( victor_9000_fdc_t::via4_pb_r )
674{
675   /*
676
677       bit     description
678
679       PB0     L1MS0
680       PB1     L1MS1
681       PB2     L1MS2
682       PB3     L1MS3
683       PB4
684       PB5
685       PB6
686       PB7
687
688   */
689
690   return m_l1ms;
691}
692
570693WRITE8_MEMBER( victor_9000_fdc_t::via4_pb_w )
571694{
572695   /*
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615738      m_wrsync = state;
616739      cur_live.wrsync = state;
617740      checkpoint();
618      if (LOG_VIA) logerror("%s %s ERASE %u\n", machine().time().as_string(), machine().describe_context(), state);
741      if (LOG_VIA) logerror("%s %s WRSYNC %u\n", machine().time().as_string(), machine().describe_context(), state);
619742      live_run();
620743   }
621744}
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813936
814937       bit     description
815938
816       PB0
817       PB1
939       PB0     RDY0
940       PB1     RDY1
818941       PB2     _SCRESET
819942       PB3
820943       PB4
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824947
825948   */
826949
950   set_rdy0(BIT(data, 0));
951   set_rdy1(BIT(data, 1));
952
827953   // motor speed controller reset
828954   if (!BIT(data, 2))
829955      m_maincpu->reset();
trunk/src/mess/machine/victor9k_fdc.h
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6363   DECLARE_FLOPPY_FORMATS( floppy_formats );
6464
6565   DECLARE_READ8_MEMBER( floppy_p1_r );
66   DECLARE_WRITE8_MEMBER( floppy_p1_w );
6667   DECLARE_READ8_MEMBER( floppy_p2_r );
6768   DECLARE_WRITE8_MEMBER( floppy_p2_w );
6869   DECLARE_READ8_MEMBER( tach0_r );
6970   DECLARE_READ8_MEMBER( tach1_r );
7071   DECLARE_WRITE8_MEMBER( da_w );
7172
73   DECLARE_READ8_MEMBER( via4_pa_r );
7274   DECLARE_WRITE8_MEMBER( via4_pa_w );
75   DECLARE_READ8_MEMBER( via4_pb_r );
7376   DECLARE_WRITE8_MEMBER( via4_pb_w );
7477   DECLARE_WRITE_LINE_MEMBER( wrsync_w );
7578   DECLARE_WRITE_LINE_MEMBER( via4_irq_w );
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97100   virtual machine_config_constructor device_mconfig_additions() const;
98101
99102private:
103   static const int rpm[0x100];
104
100105   enum
101106   {
102107      TM_GEN,
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167172
168173   void update_stepper_motor(floppy_image_device *floppy, int stp, int old_st, int st);
169174   void update_spindle_motor(floppy_image_device *floppy, emu_timer *t_tach, bool start, bool stop, bool sel, UINT8 &da);
175   void set_rdy0(int state);
176   void set_rdy1(int state);
170177
171178   int load0_cb(floppy_image_device *device);
172179   void unload0_cb(floppy_image_device *device);

https://github.com/mamedev/mame/commit/78255c2c595e945d5bfe5b181f0dec96e977ed25

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