trunk/src/emu/cpu/arc/arc.c
| r0 | r242151 | |
| 1 | /*********************************\ |
| 2 | |
| 3 | ARCtangent (A4) core |
| 4 | ARC == Argonaut RISC Core |
| 5 | |
| 6 | (this is a skeleton core) |
| 7 | |
| 8 | \*********************************/ |
| 9 | |
| 10 | #include "emu.h" |
| 11 | #include "debugger.h" |
| 12 | #include "arc.h" |
| 13 | |
| 14 | |
| 15 | const device_type ARC = &device_creator<arc_device>; |
| 16 | |
| 17 | |
| 18 | arc_device::arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 19 | : cpu_device(mconfig, ARC, "ARCtangent A4", tag, owner, clock, "arc", __FILE__) |
| 20 | , m_program_config("program", ENDIANNESS_BIG, 32, 24, 0) // some docs describe these as 'middle endian'?! |
| 21 | { |
| 22 | } |
| 23 | |
| 24 | |
| 25 | offs_t arc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) |
| 26 | { |
| 27 | extern CPU_DISASSEMBLE( arc ); |
| 28 | return CPU_DISASSEMBLE_NAME(arc)(this, buffer, pc, oprom, opram, options); |
| 29 | } |
| 30 | |
| 31 | |
| 32 | /*****************************************************************************/ |
| 33 | |
| 34 | /*****************************************************************************/ |
| 35 | |
| 36 | void arc_device::unimplemented_opcode(UINT16 op) |
| 37 | { |
| 38 | fatalerror("arc: unknown opcode %04x at %04x\n", op, m_pc << 2); |
| 39 | } |
| 40 | |
| 41 | /*****************************************************************************/ |
| 42 | |
| 43 | UINT16 arc_device::READ32(UINT32 address) |
| 44 | { |
| 45 | return m_program->read_dword(address << 2); |
| 46 | } |
| 47 | |
| 48 | void arc_device::WRITE32(UINT32 address, UINT32 data) |
| 49 | { |
| 50 | m_program->write_dword(address << 2, data); |
| 51 | } |
| 52 | |
| 53 | /*****************************************************************************/ |
| 54 | |
| 55 | void arc_device::device_start() |
| 56 | { |
| 57 | m_pc = 0; |
| 58 | |
| 59 | m_debugger_temp = 0; |
| 60 | |
| 61 | m_program = &space(AS_PROGRAM); |
| 62 | |
| 63 | state_add( 0, "PC", m_debugger_temp).callimport().callexport().formatstr("%08X"); |
| 64 | state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow(); |
| 65 | |
| 66 | m_icountptr = &m_icount; |
| 67 | } |
| 68 | |
| 69 | void arc_device::state_export(const device_state_entry &entry) |
| 70 | { |
| 71 | switch (entry.index()) |
| 72 | { |
| 73 | case 0: |
| 74 | m_debugger_temp = m_pc << 2; |
| 75 | break; |
| 76 | |
| 77 | case STATE_GENPC: |
| 78 | m_debugger_temp = m_pc << 2; |
| 79 | break; |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | void arc_device::state_import(const device_state_entry &entry) |
| 84 | { |
| 85 | switch (entry.index()) |
| 86 | { |
| 87 | case 0: |
| 88 | m_pc = (m_debugger_temp & 0xfffffffc) >> 2; |
| 89 | break; |
| 90 | } |
| 91 | } |
| 92 | |
| 93 | void arc_device::device_reset() |
| 94 | { |
| 95 | m_pc = 0x00000000; |
| 96 | } |
| 97 | |
| 98 | /*****************************************************************************/ |
| 99 | |
| 100 | void arc_device::execute_set_input(int irqline, int state) |
| 101 | { |
| 102 | |
| 103 | } |
| 104 | |
| 105 | |
| 106 | void arc_device::execute_run() |
| 107 | { |
| 108 | //UINT32 lres; |
| 109 | //lres = 0; |
| 110 | |
| 111 | while (m_icount > 0) |
| 112 | { |
| 113 | debugger_instruction_hook(this, m_pc<<2); |
| 114 | |
| 115 | //UINT32 op = READ32(m_pc); |
| 116 | |
| 117 | m_pc++; |
| 118 | |
| 119 | m_icount--; |
| 120 | } |
| 121 | |
| 122 | } |
trunk/src/emu/cpu/arc/arc.h
| r0 | r242151 | |
| 1 | /*********************************\ |
| 2 | |
| 3 | ARCtangent (A4) core |
| 4 | ARC == Argonaut RISC Core |
| 5 | |
| 6 | \*********************************/ |
| 7 | |
| 8 | #pragma once |
| 9 | |
| 10 | #ifndef __ARC_H__ |
| 11 | #define __ARC_H__ |
| 12 | |
| 13 | class arc_device : public cpu_device |
| 14 | { |
| 15 | public: |
| 16 | // construction/destruction |
| 17 | arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 18 | |
| 19 | protected: |
| 20 | // device-level overrides |
| 21 | virtual void device_start(); |
| 22 | virtual void device_reset(); |
| 23 | |
| 24 | // device_execute_interface overrides |
| 25 | virtual UINT32 execute_min_cycles() const { return 5; } |
| 26 | virtual UINT32 execute_max_cycles() const { return 5; } |
| 27 | virtual UINT32 execute_input_lines() const { return 0; } |
| 28 | virtual void execute_run(); |
| 29 | virtual void execute_set_input(int inputnum, int state); |
| 30 | |
| 31 | // device_memory_interface overrides |
| 32 | virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; } |
| 33 | |
| 34 | // device_state_interface overrides |
| 35 | virtual void state_import(const device_state_entry &entry); |
| 36 | virtual void state_export(const device_state_entry &entry); |
| 37 | |
| 38 | // device_disasm_interface overrides |
| 39 | virtual UINT32 disasm_min_opcode_bytes() const { return 4; } |
| 40 | virtual UINT32 disasm_max_opcode_bytes() const { return 4; } |
| 41 | virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); |
| 42 | |
| 43 | private: |
| 44 | address_space_config m_program_config; |
| 45 | |
| 46 | // 0 - 28 = r00 - r28 (General Purpose Registers) |
| 47 | // 29 = r29 (ILINK1) |
| 48 | // 30 = r30 (ILINE2) |
| 49 | // 31 = r31 (BLINK) |
| 50 | // 32- 59 = r32 - r59 (Reserved Registers) |
| 51 | // 60 = LPCOUNT |
| 52 | // 61 = Short Immediate Data Indicator Settings Flag |
| 53 | // 62 = Long Immediate Data Indicator |
| 54 | // 63 = Short Immediate Data Indicator NOT Settings Flag |
| 55 | UINT32 m_pc; |
| 56 | UINT32 m_r[64]; |
| 57 | |
| 58 | |
| 59 | address_space *m_program; |
| 60 | int m_icount; |
| 61 | |
| 62 | UINT32 m_debugger_temp; |
| 63 | |
| 64 | void unimplemented_opcode(UINT16 op); |
| 65 | inline UINT16 READ32(UINT32 address); |
| 66 | inline void WRITE32(UINT32 address, UINT32 data); |
| 67 | }; |
| 68 | |
| 69 | |
| 70 | extern const device_type ARC; |
| 71 | |
| 72 | |
| 73 | #endif /* __ARC_H__ */ |
trunk/src/emu/cpu/arc/arcdasm.c
| r0 | r242151 | |
| 1 | /*********************************\ |
| 2 | |
| 3 | ARCtangent (A4? A5?) disassembler |
| 4 | |
| 5 | \*********************************/ |
| 6 | |
| 7 | #include "emu.h" |
| 8 | #include <stdarg.h> |
| 9 | |
| 10 | static char *output; |
| 11 | |
| 12 | static void ATTR_PRINTF(1,2) print(const char *fmt, ...) |
| 13 | { |
| 14 | va_list vl; |
| 15 | |
| 16 | va_start(vl, fmt); |
| 17 | vsprintf(output, fmt, vl); |
| 18 | va_end(vl); |
| 19 | } |
| 20 | |
| 21 | /*****************************************************************************/ |
| 22 | |
| 23 | |
| 24 | |
| 25 | /*****************************************************************************/ |
| 26 | |
| 27 | static const char *basic[0x20] = |
| 28 | { |
| 29 | /* 00 */ "LD r+r", |
| 30 | /* 01 */ "LD r+o", |
| 31 | /* 02 */ "ST r+o", |
| 32 | /* 03 */ "extended", |
| 33 | /* 04 */ "Bcc", |
| 34 | /* 05 */ "BLcc", |
| 35 | /* 06 */ "LPcc", |
| 36 | /* 07 */ "Jcc JLcc", |
| 37 | /* 08 */ "ADD", |
| 38 | /* 09 */ "ADC", |
| 39 | /* 0a */ "SUB", |
| 40 | /* 0b */ "SBC", |
| 41 | /* 0c */ "AND", |
| 42 | /* 0d */ "OR", |
| 43 | /* 0e */ "BIC", |
| 44 | /* 0f */ "XOR", |
| 45 | /* 10 */ "ASL", |
| 46 | /* 11 */ "LSR", |
| 47 | /* 12 */ "ASR", |
| 48 | /* 13 */ "ROR", |
| 49 | /* 14 */ "MUL64", |
| 50 | /* 15 */ "MULU64", |
| 51 | /* 16 */ "undefined", |
| 52 | /* 17 */ "undefined", |
| 53 | /* 18 */ "undefined", |
| 54 | /* 19 */ "undefined", |
| 55 | /* 1a */ "undefined", |
| 56 | /* 1b */ "undefined", |
| 57 | /* 1c */ "undefined", |
| 58 | /* 1d */ "undefined", |
| 59 | /* 1e */ "MAX", |
| 60 | /* 1f */ "MIN" |
| 61 | }; |
| 62 | |
| 63 | |
| 64 | CPU_DISASSEMBLE( arc ) |
| 65 | { |
| 66 | UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24); |
| 67 | op = BIG_ENDIANIZE_INT32(op); |
| 68 | |
| 69 | output = buffer; |
| 70 | |
| 71 | UINT8 opcode = (op & 0xf8000000) >> 27; |
| 72 | |
| 73 | print("%s (%08x)", basic[opcode], op &~ 0xf8000000); |
| 74 | |
| 75 | return 4 | DASMFLAG_SUPPORTED; |
| 76 | } |
trunk/src/mess/drivers/leapster.c
| r242150 | r242151 | |
| 207 | 207 | #include "emu.h" |
| 208 | 208 | #include "bus/generic/slot.h" |
| 209 | 209 | #include "bus/generic/carts.h" |
| 210 | #include "cpu/arc/arc.h" |
| 210 | 211 | |
| 211 | 212 | |
| 212 | 213 | class leapster_state : public driver_device |
| r242150 | r242151 | |
| 263 | 264 | { |
| 264 | 265 | } |
| 265 | 266 | |
| 267 | static ADDRESS_MAP_START( leapster_map, AS_PROGRAM, 32, leapster_state ) |
| 268 | AM_RANGE(0x000000, 0x1fffff) AM_ROM |
| 269 | ADDRESS_MAP_END |
| 266 | 270 | |
| 267 | | |
| 268 | 271 | static MACHINE_CONFIG_START( leapster, leapster_state ) |
| 269 | 272 | /* basic machine hardware */ |
| 270 | 273 | // CPU is ArcTangent A5 |
| 274 | MCFG_CPU_ADD("maincpu", ARC, 96000000/10) |
| 275 | MCFG_CPU_PROGRAM_MAP(leapster_map) |
| 271 | 276 | |
| 277 | |
| 272 | 278 | /* video hardware */ |
| 273 | 279 | MCFG_SCREEN_ADD("screen", LCD) |
| 274 | 280 | MCFG_SCREEN_REFRESH_RATE(60) |
| r242150 | r242151 | |
| 287 | 293 | |
| 288 | 294 | ROM_START(leapster) |
| 289 | 295 | ROM_REGION(0x200000, "maincpu", ROMREGION_ERASE00) |
| 290 | | ROM_LOAD( "155-10072-a.bin", 0x00000, 0x200000, CRC(af05e5a0) SHA1(d4468d060543ba7e44785041093bc98bcd9afa07) ) |
| 296 | ROM_LOAD16_WORD_SWAP( "155-10072-a.bin", 0x00000, 0x200000, CRC(af05e5a0) SHA1(d4468d060543ba7e44785041093bc98bcd9afa07) ) |
| 291 | 297 | ROM_END |
| 292 | 298 | |
| 293 | 299 | ROM_START(leapstertv) |
| 294 | 300 | ROM_REGION(0x200000, "maincpu", ROMREGION_ERASE00) |
| 295 | | ROM_LOAD( "am29pl160cb-90sf.bin", 0x00000, 0x200000, BAD_DUMP CRC(dc281f1f) SHA1(17588de54ab3bb82801bd5062f3e6aa687412178) ) |
| 301 | ROM_LOAD16_WORD_SWAP( "am29pl160cb-90sf.bin", 0x00000, 0x200000, BAD_DUMP CRC(dc281f1f) SHA1(17588de54ab3bb82801bd5062f3e6aa687412178) ) |
| 296 | 302 | ROM_END |
| 297 | 303 | |
| 298 | 304 | |