trunk/src/mame/drivers/cultures.c
| r242136 | r242137 | |
| 11 | 11 | #include "emu.h" |
| 12 | 12 | #include "cpu/z80/z80.h" |
| 13 | 13 | #include "sound/okim6295.h" |
| 14 | #include "machine/bankdev.h" |
| 14 | 15 | |
| 15 | 16 | #define MCLK 16000000 |
| 16 | 17 | |
| r242136 | r242137 | |
| 28 | 29 | m_bg2_regs_y(*this, "bg2_regs_y"), |
| 29 | 30 | m_maincpu(*this, "maincpu"), |
| 30 | 31 | m_gfxdecode(*this, "gfxdecode"), |
| 31 | | m_palette(*this, "palette") { } |
| 32 | m_palette(*this, "palette"), |
| 33 | m_vrambank(*this, "vrambank") |
| 34 | { } |
| 32 | 35 | |
| 33 | | UINT8 m_paletteram[0x4000]; |
| 34 | 36 | /* memory pointers */ |
| 35 | 37 | required_shared_ptr<UINT8> m_bg0_videoram; |
| 36 | 38 | required_shared_ptr<UINT8> m_bg0_regs_x; |
| r242136 | r242137 | |
| 44 | 46 | tilemap_t *m_bg0_tilemap; |
| 45 | 47 | tilemap_t *m_bg1_tilemap; |
| 46 | 48 | tilemap_t *m_bg2_tilemap; |
| 47 | | int m_video_bank; |
| 48 | 49 | int m_irq_enable; |
| 49 | 50 | int m_bg1_bank; |
| 50 | 51 | int m_bg2_bank; |
| 51 | | int m_old_bank; |
| 52 | 52 | DECLARE_WRITE8_MEMBER(cpu_bankswitch_w); |
| 53 | 53 | DECLARE_WRITE8_MEMBER(bg0_videoram_w); |
| 54 | 54 | DECLARE_WRITE8_MEMBER(misc_w); |
| r242136 | r242137 | |
| 64 | 64 | required_device<cpu_device> m_maincpu; |
| 65 | 65 | required_device<gfxdecode_device> m_gfxdecode; |
| 66 | 66 | required_device<palette_device> m_palette; |
| 67 | required_device<address_map_bank_device> m_vrambank; |
| 67 | 68 | }; |
| 68 | 69 | |
| 69 | 70 | |
| r242136 | r242137 | |
| 138 | 139 | WRITE8_MEMBER(cultures_state::cpu_bankswitch_w) |
| 139 | 140 | { |
| 140 | 141 | membank("bank1")->set_entry(data & 0x0f); |
| 141 | | m_video_bank = ~data & 0x20; |
| 142 | m_vrambank->set_bank((data & 0x20)>>5); |
| 142 | 143 | } |
| 143 | 144 | |
| 145 | |
| 144 | 146 | WRITE8_MEMBER(cultures_state::bg0_videoram_w) |
| 145 | 147 | { |
| 146 | | if (m_video_bank == 0) |
| 147 | | { |
| 148 | | int r, g, b, datax; |
| 149 | | m_paletteram[offset] = data; |
| 150 | | offset >>= 1; |
| 151 | | datax = m_paletteram[offset * 2] + 256 * m_paletteram[offset * 2 + 1]; |
| 152 | | |
| 153 | | r = ((datax >> 7) & 0x1e) | ((datax & 0x4000) ? 0x1 : 0); |
| 154 | | g = ((datax >> 3) & 0x1e) | ((datax & 0x2000) ? 0x1 : 0); |
| 155 | | b = ((datax << 1) & 0x1e) | ((datax & 0x1000) ? 0x1 : 0); |
| 156 | | |
| 157 | | m_palette->set_pen_color(offset, pal5bit(r), pal5bit(g), pal5bit(b)); |
| 158 | | } |
| 159 | | else |
| 160 | | { |
| 161 | | m_bg0_videoram[offset] = data; |
| 162 | | m_bg0_tilemap->mark_tile_dirty(offset >> 1); |
| 163 | | } |
| 148 | m_bg0_videoram[offset] = data; |
| 149 | m_bg0_tilemap->mark_tile_dirty(offset >> 1); |
| 164 | 150 | } |
| 165 | 151 | |
| 166 | 152 | WRITE8_MEMBER(cultures_state::misc_w) |
| 167 | 153 | { |
| 168 | | int new_bank = data & 0xf; |
| 169 | | |
| 170 | | if (m_old_bank != new_bank) |
| 171 | | { |
| 172 | | // oki banking |
| 173 | | UINT8 *src = memregion("oki")->base() + 0x40000 + 0x20000 * new_bank; |
| 174 | | UINT8 *dst = memregion("oki")->base() + 0x20000; |
| 175 | | memcpy(dst, src, 0x20000); |
| 176 | | |
| 177 | | m_old_bank = new_bank; |
| 178 | | } |
| 179 | | |
| 154 | membank("okibank")->set_entry(data&0x0f); |
| 180 | 155 | m_irq_enable = data & 0x80; |
| 181 | 156 | } |
| 182 | 157 | |
| r242136 | r242137 | |
| 196 | 171 | coin_counter_w(machine(), 0, data & 0x10); |
| 197 | 172 | } |
| 198 | 173 | |
| 174 | |
| 175 | static ADDRESS_MAP_START( oki_map, AS_0, 8, cultures_state ) |
| 176 | AM_RANGE(0x00000, 0x1ffff) AM_ROM |
| 177 | AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank") |
| 178 | ADDRESS_MAP_END |
| 179 | |
| 180 | static ADDRESS_MAP_START( vrambank_map, AS_PROGRAM, 8, cultures_state ) |
| 181 | AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram") |
| 182 | AM_RANGE(0x4000, 0x6fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 183 | ADDRESS_MAP_END |
| 184 | |
| 199 | 185 | static ADDRESS_MAP_START( cultures_map, AS_PROGRAM, 8, cultures_state ) |
| 200 | 186 | AM_RANGE(0x0000, 0x3fff) AM_ROM |
| 201 | 187 | AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") |
| 202 | | AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram") |
| 188 | AM_RANGE(0x8000, 0xbfff) AM_DEVICE("vrambank", address_map_bank_device, amap8) |
| 203 | 189 | AM_RANGE(0xc000, 0xdfff) AM_RAM |
| 204 | 190 | AM_RANGE(0xf000, 0xffff) AM_RAM |
| 205 | 191 | ADDRESS_MAP_END |
| r242136 | r242137 | |
| 380 | 366 | UINT8 *ROM = memregion("maincpu")->base(); |
| 381 | 367 | |
| 382 | 368 | membank("bank1")->configure_entries(0, 16, &ROM[0x0000], 0x4000); |
| 369 | membank("okibank")->configure_entries(0, 0x200000 / 0x20000, memregion("oki")->base(), 0x20000); |
| 370 | membank("okibank")->set_entry(0); |
| 383 | 371 | |
| 384 | | save_item(NAME(m_paletteram)); |
| 385 | | save_item(NAME(m_old_bank)); |
| 386 | | save_item(NAME(m_video_bank)); |
| 387 | 372 | save_item(NAME(m_irq_enable)); |
| 388 | 373 | save_item(NAME(m_bg1_bank)); |
| 389 | 374 | save_item(NAME(m_bg2_bank)); |
| r242136 | r242137 | |
| 391 | 376 | |
| 392 | 377 | void cultures_state::machine_reset() |
| 393 | 378 | { |
| 394 | | m_old_bank = -1; |
| 395 | | m_video_bank = 0; |
| 379 | membank("okibank")->set_entry(0); |
| 380 | m_vrambank->set_bank(1); |
| 396 | 381 | m_irq_enable = 0; |
| 397 | 382 | m_bg1_bank = 0; |
| 398 | 383 | m_bg2_bank = 0; |
| 399 | 384 | } |
| 400 | 385 | |
| 386 | |
| 387 | |
| 401 | 388 | static MACHINE_CONFIG_START( cultures, cultures_state ) |
| 402 | 389 | |
| 403 | 390 | /* basic machine hardware */ |
| r242136 | r242137 | |
| 406 | 393 | MCFG_CPU_IO_MAP(cultures_io_map) |
| 407 | 394 | MCFG_CPU_VBLANK_INT_DRIVER("screen", cultures_state, cultures_interrupt) |
| 408 | 395 | |
| 396 | MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0) |
| 397 | MCFG_DEVICE_PROGRAM_MAP(vrambank_map) |
| 398 | MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE) |
| 399 | MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8) |
| 400 | MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(15) |
| 401 | MCFG_ADDRESS_MAP_BANK_STRIDE(0x4000) |
| 409 | 402 | |
| 403 | |
| 410 | 404 | /* video hardware */ |
| 411 | 405 | MCFG_SCREEN_ADD("screen", RASTER) |
| 412 | 406 | MCFG_SCREEN_REFRESH_RATE(60) |
| r242136 | r242137 | |
| 417 | 411 | MCFG_SCREEN_PALETTE("palette") |
| 418 | 412 | |
| 419 | 413 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", culture) |
| 420 | | MCFG_PALETTE_ADD("palette", 0x2000) |
| 414 | MCFG_PALETTE_ADD("palette", 0x3000/2) |
| 415 | MCFG_PALETTE_FORMAT(xRGBRRRRGGGGBBBB_bit0) |
| 416 | MCFG_PALETTE_ENDIANNESS(ENDIANNESS_LITTLE) |
| 421 | 417 | |
| 422 | | |
| 423 | 418 | /* sound hardware */ |
| 424 | 419 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 425 | 420 | |
| 426 | | MCFG_OKIM6295_ADD("oki", (MCLK/1024)*132, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified |
| 421 | MCFG_OKIM6295_ADD("oki", MCLK/8, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified |
| 427 | 422 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) |
| 423 | MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) |
| 424 | |
| 428 | 425 | MACHINE_CONFIG_END |
| 429 | 426 | |
| 430 | 427 | /* |
| r242136 | r242137 | |
| 485 | 482 | ROM_LOAD( "bg1t.u67", 0x200000, 0x100000, CRC(d2e594ee) SHA1(a84b5ab62dec1867d433ccaeb1381e7593958cf0) ) |
| 486 | 483 | /* 0x300000 - 0x3fffff empty */ |
| 487 | 484 | |
| 488 | | ROM_REGION( 0x240000, "oki", 0 ) |
| 489 | | ROM_LOAD( "pcm.u87", 0x040000, 0x200000, CRC(84206475) SHA1(d1423bd5c7425e121fb4e7845cf57801e9afa7b3) ) |
| 490 | | ROM_RELOAD( 0x000000, 0x020000 ) |
| 485 | ROM_REGION( 0x200000, "oki", 0 ) |
| 486 | ROM_LOAD( "pcm.u87", 0x000000, 0x200000, CRC(84206475) SHA1(d1423bd5c7425e121fb4e7845cf57801e9afa7b3) ) |
| 491 | 487 | ROM_END |
| 492 | 488 | |
| 493 | 489 | |