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r33571 Friday 28th November, 2014 at 13:54:35 UTC by Robbbert
(MESS) gamecom : fixed pixel blending.
Centipede, Wheel of Fortune 1 & 2 are fully playable.
Frogger and Quiz Whiz are 98% playable.
[src/mess/drivers]gamecom.c
[src/mess/machine]gamecom.c
[src/mess/video]gamecom.c

trunk/src/mess/drivers/gamecom.c
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1111Game Status:
1212- The DAC sound partially works, sound from ports 1,2,3 not done
1313- Inbuilt ROM and PDA functions all work
14- When starting a cart, the graphic of the cart going into the slot is corrupt
14- On the screen where the cart goes into the slot there is video flicker
1515- Due to an irritating message, the NVRAM is commented out in the machine config
16- Cart games all have severe video issues such as flickering and nonsense gfx
16- Most of the cart games have severe video issues such as flickering and nonsense gfx
1717- Lights Out works
18- Centipede works with bad flickering
19- Frogger works, but there are bugs on the 2nd row of cars (if you turn your
20  frog to the right it dies, and also one car goes in reverse), and not possible
21  to get the female frog.
22- Wheel of Fortune 1&2, playable although the spinner is corrupt
18- Centipede works
19- Wheel of Fortune 1 & 2 are working.
20- Frogger works, but it is difficult to capture the female frog or the insect.
21- Quiz Wiz works, but the end-of-round score doesn't show
2322- Jeopardy, playable with bad gfx
24- Quiz Wiz works, but the final score doesn't show
2523- Tiger Web Link & Internet, they look ok, obviously aren't going to connect to anything
2624- Williams Arcade Classics, Robotron works, the rest are no use.
25- Monopoly is starting to show promise. It's playable but the video is terrible.
2726- The remaining carts are not functional to any useful degree.
2827
2928***************************************************************************/
trunk/src/mess/machine/gamecom.c
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77
88TIMER_CALLBACK_MEMBER(gamecom_state::gamecom_clock_timer_callback)
99{
10   UINT8 * RAM = m_region_maincpu->base();
11   UINT8 val = RAM[SM8521_CLKT] + 1;
12   RAM[SM8521_CLKT] = ( RAM[SM8521_CLKT] & 0xC0 ) | (val & 0x3f);
10   UINT8 val = m_p_ram[SM8521_CLKT] + 1;
11   m_p_ram[SM8521_CLKT] = ( m_p_ram[SM8521_CLKT] & 0xC0 ) | (val & 0x3f);
1312   m_maincpu->set_input_line(sm8500_cpu_device::CK_INT, ASSERT_LINE );
1413}
1514
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417416
418417/* The manual is not conclusive as to which bit of the DMVP register (offset 0x3D) determines
419418   which page for source or destination is used */
420/* For now the increment/decrement-x and increment/decrement-y parts are NOT supported.
421   Their usage is also not explained properly in the manuals. Guess we'll have to wait
422   for them to show up in some rom images...
423 */
424419WRITE8_MEMBER( gamecom_state::gamecom_handle_dma )
425420{
426   UINT8 * RAM = m_region_maincpu->base();
427   UINT8 dmc = RAM[SM8521_DMC];
421   UINT8 dmc = m_p_ram[SM8521_DMC];
428422   m_dma.overwrite_mode = dmc & 0x01;
429423   m_dma.transfer_mode = dmc & 0x06;
430424   m_dma.decrement_x = dmc & 0x08;
r242082r242083
435429      return;
436430   }
437431
438   //if ( m_dma.decrement_x || m_dma.decrement_y )
439   //{
440      //popmessage( "TODO: Decrement-x and decrement-y are not supported yet\n" );
441   //}
442
443   m_dma.width_x = RAM[SM8521_DMDX];
432   m_dma.width_x = m_p_ram[SM8521_DMDX];
444433   m_dma.width_x_count = 0;
445   m_dma.width_y = RAM[SM8521_DMDY];
434   m_dma.width_y = m_p_ram[SM8521_DMDY];
446435   m_dma.width_y_count = 0;
447   m_dma.source_x = RAM[SM8521_DMX1];
436   m_dma.source_x = m_p_ram[SM8521_DMX1];
448437   m_dma.source_x_current = m_dma.source_x;
449   m_dma.source_y = RAM[SM8521_DMY1];
450   m_dma.source_width = ( RAM[SM8521_LCH] & 0x20 ) ? 50 : 40;
451   m_dma.dest_x = RAM[SM8521_DMX2];
438   m_dma.source_y = m_p_ram[SM8521_DMY1];
439   m_dma.source_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40;
440   m_dma.dest_x = m_p_ram[SM8521_DMX2];
452441   m_dma.dest_x_current = m_dma.dest_x;
453   m_dma.dest_y = RAM[SM8521_DMY2];
454   m_dma.dest_width = ( RAM[SM8521_LCH] & 0x20 ) ? 50 : 40;
455   m_dma.palette[0] = RAM[SM8521_DMPL] & 0x03;
456   m_dma.palette[1] = ( RAM[SM8521_DMPL] >> 2 ) & 3;
457   m_dma.palette[2] = ( RAM[SM8521_DMPL] >> 4 ) & 3;
458   m_dma.palette[3] = RAM[SM8521_DMPL] >> 6;
442   m_dma.dest_y = m_p_ram[SM8521_DMY2];
443   m_dma.dest_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40;
444   m_dma.palette[0] = m_p_ram[SM8521_DMPL] & 0x03;
445   m_dma.palette[1] = ( m_p_ram[SM8521_DMPL] >> 2 ) & 3;
446   m_dma.palette[2] = ( m_p_ram[SM8521_DMPL] >> 4 ) & 3;
447   m_dma.palette[3] = m_p_ram[SM8521_DMPL] >> 6;
459448   m_dma.source_mask = 0x1FFF;
460449   m_dma.dest_mask = 0x1FFF;
461//  logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", m_dma.width_x, m_dma.width_y, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, m_dma.transfer_mode, RAM[SM8521_DMVP] );
450//  logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", m_dma.width_x, m_dma.width_y, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, m_dma.transfer_mode, m_p_ram[SM8521_DMVP] );
462451//  logerror( "   Palette: %d, %d, %d, %d\n", m_dma.palette[0], m_dma.palette[1], m_dma.palette[2], m_dma.palette[3] );
463452   switch( m_dma.transfer_mode )
464453   {
465454   case 0x00:
466455      /* VRAM->VRAM */
467      m_dma.source_bank = &m_p_videoram[(RAM[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
468      m_dma.dest_bank = &m_p_videoram[(RAM[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
456      m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
457      m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
469458      break;
470459   case 0x02:
471460      /* ROM->VRAM */
472//      logerror( "DMA DMBR = %X\n", RAM[SM8521_DMBR] );
461//      logerror( "DMA DMBR = %X\n", m_p_ram[SM8521_DMBR] );
473462      m_dma.source_width = 64;
474463      m_dma.source_mask = 0x3FFF;
475      if (RAM[SM8521_DMBR] < 16)
476         m_dma.source_bank = m_region_kernel->base() + (RAM[SM8521_DMBR] << 14);
464      if (m_p_ram[SM8521_DMBR] < 16)
465         m_dma.source_bank = m_region_kernel->base() + (m_p_ram[SM8521_DMBR] << 14);
477466      else
478467      if (m_cart_ptr)
479         m_dma.source_bank = m_cart_ptr + (RAM[SM8521_DMBR] << 14);
468         m_dma.source_bank = m_cart_ptr + (m_p_ram[SM8521_DMBR] << 14);
480469
481      m_dma.dest_bank = &m_p_videoram[(RAM[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
470      m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
482471      break;
483472   case 0x04:
484473      /* Extend RAM->VRAM */
485474      m_dma.source_width = 64;
486475      m_dma.source_bank = &m_p_nvram[0x0000];
487      m_dma.dest_bank = &m_p_videoram[(RAM[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
476      m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000];
488477      break;
489478   case 0x06:
490479      /* VRAM->Extend RAM */
491      m_dma.source_bank = &m_p_videoram[(RAM[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
480      m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000];
492481      m_dma.dest_width = 64;
493482      m_dma.dest_bank = &m_p_nvram[0x0000];
494483      break;
r242082r242083
507496   {
508497      for( x_count = 0; x_count <= m_dma.width_x; x_count++ )
509498      {
510         int source_pixel = 0;
511         int dest_pixel = 0;
512         int src_addr = m_dma.source_current & m_dma.source_mask;
513         int dest_addr = m_dma.dest_current & m_dma.dest_mask;
499         UINT16 src_addr = m_dma.source_current & m_dma.source_mask;
500         UINT16 dest_addr = m_dma.dest_current & m_dma.dest_mask;
501         UINT8 dest_adj = (3 - (m_dma.dest_x_current & 3)) << 1;
502         UINT8 src_adj = (3 - (m_dma.source_x_current & 3)) << 1;
503         
514504         /* handle DMA for 1 pixel */
515         /* Read pixel data */
516         switch ( m_dma.source_x_current & 0x03 )
517         {
518         case 0x00: source_pixel = m_dma.source_bank[src_addr] >> 6; break;
519         case 0x01: source_pixel = ( m_dma.source_bank[src_addr] >> 4 ) & 3; break;
520         case 0x02: source_pixel = ( m_dma.source_bank[src_addr] >> 2 ) & 3; break;
521         case 0x03: source_pixel = m_dma.source_bank[src_addr] & 3;      break;
522         }
505         // Get new pixel
506         UINT8 source_pixel = (m_dma.source_bank[src_addr] >> src_adj) & 3;
523507
524         if ( !m_dma.overwrite_mode && source_pixel == 0 )
508         // If overwrite mode, write new pixel
509         if ( m_dma.overwrite_mode || source_pixel)
525510         {
526            switch ( m_dma.dest_x_current & 0x03 )
527            {
528            case 0x00: dest_pixel = m_dma.dest_bank[dest_addr] >> 6; break;
529            case 0x01: dest_pixel = ( m_dma.dest_bank[dest_addr] >> 4 ) & 3; break;
530            case 0x02: dest_pixel = ( m_dma.dest_bank[dest_addr] >> 2 ) & 3; break;
531            case 0x03: dest_pixel = m_dma.dest_bank[dest_addr] & 3;      break;
532            }
533            source_pixel = dest_pixel;
511            // Get 4 pixels and remove the one about to be replaced
512            UINT8 other_pixels = m_dma.dest_bank[dest_addr] & ~(3 << dest_adj);
513            // Get palette of new pixel and place into the hole
514            m_dma.dest_bank[dest_addr] = other_pixels | (m_dma.palette[ source_pixel ] << dest_adj);
534515         }
535516
536         /* Translate pixel data using DMA palette. */
537         /* Not sure if this should be done before the compound stuff - WP */
538         source_pixel = m_dma.palette[ source_pixel ];
539         /* Write pixel data */
540         switch( m_dma.dest_x_current & 0x03 )
541         {
542         case 0x00:
543            m_dma.dest_bank[dest_addr] = ( m_dma.dest_bank[dest_addr] & 0x3F ) | ( source_pixel << 6 );
544            break;
545         case 0x01:
546            m_dma.dest_bank[dest_addr] = ( m_dma.dest_bank[dest_addr] & 0xCF ) | ( source_pixel << 4 );
547            break;
548         case 0x02:
549            m_dma.dest_bank[dest_addr] = ( m_dma.dest_bank[dest_addr] & 0xF3 ) | ( source_pixel << 2 );
550            break;
551         case 0x03:
552            m_dma.dest_bank[dest_addr] = ( m_dma.dest_bank[dest_addr] & 0xFC ) | source_pixel;
553            break;
554         }
555
556517         /* Advance a pixel */
557518         if ( m_dma.decrement_x )
558519         {
r242082r242083
588549
589550WRITE8_MEMBER( gamecom_state::gamecom_update_timers )
590551{
591   UINT8 * RAM = m_region_maincpu->base();
592552   if ( m_timer[0].enabled )
593553   {
594554      m_timer[0].state_count += data;
595555      while ( m_timer[0].state_count >= m_timer[0].state_limit )
596556      {
597557         m_timer[0].state_count -= m_timer[0].state_limit;
598         RAM[SM8521_TM0D]++;
599         if ( RAM[SM8521_TM0D] >= m_timer[0].check_value )
558         m_p_ram[SM8521_TM0D]++;
559         if ( m_p_ram[SM8521_TM0D] >= m_timer[0].check_value )
600560         {
601            RAM[SM8521_TM0D] = 0;
561            m_p_ram[SM8521_TM0D] = 0;
602562            m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE );
603563         }
604564      }
r242082r242083
609569      while ( m_timer[1].state_count >= m_timer[1].state_limit )
610570      {
611571         m_timer[1].state_count -= m_timer[1].state_limit;
612         RAM[SM8521_TM1D]++;
613         if ( RAM[SM8521_TM1D] >= m_timer[1].check_value )
572         m_p_ram[SM8521_TM1D]++;
573         if ( m_p_ram[SM8521_TM1D] >= m_timer[1].check_value )
614574         {
615            RAM[SM8521_TM1D] = 0;
575            m_p_ram[SM8521_TM1D] = 0;
616576            m_maincpu->set_input_line(sm8500_cpu_device::TIM1_INT, ASSERT_LINE );
617577         }
618578      }
trunk/src/mess/video/gamecom.c
r242082r242083
77TIMER_CALLBACK_MEMBER(gamecom_state::gamecom_scanline)
88   {
99   // draw line
10   if ( m_scanline == 0 )
11      m_base_address = ( m_p_ram[SM8521_LCDC] & 0x40 ) ? 0x2000 : 0x0000;
10   m_base_address = ( m_p_ram[SM8521_LCDC] & 0x40 ) ? 0x2000 : 0x0000;
1211
1312   if ( ~m_p_ram[SM8521_LCDC] & 0x80 )
1413   {

https://github.com/mamedev/mame/commit/64f77ced7c219dd7b2a37a37a8f8808c9f72057e

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