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| r33426 Monday 17th November, 2014 at 22:03:54 UTC by Alex W. Jackson |
|---|
| Touching all the candy again: [Alex Jackson] Fixed an annoying inconsistency between memory_share and memory_region: the width() method of the former returned the width in bits (8, 16, 32 or 64) while the width() method of the latter returned the width in bytes (1, 2, 4 or 8). Now both classes have a bitwidth() method and a bytewidth() method. Updated all callers to use whichever one was more appropriate. Removed the implicit-cast-to-any-integer-pointer ability of memory_regions, which was rather unsafe (if you weren't careful with your * operators and casts it was easy to accidentally get a pointer to the memory_region object itself instead of to the data, with no warning from the compiler... or at least I kept doing it) Updated all devices and drivers that were accessing regions that way to use a region_ptr_finder when possible, and otherwise to call base() explicitly. |
| [src/emu] | devfind.c digfx.c emupal.c memarray.c memory.c memory.h romload.c |
| [src/emu/bus/ti99_peb] | tn_usbsm.c tn_usbsm.h |
| [src/emu/debug] | debugcpu.c dvmemory.c |
| [src/emu/machine] | at28c16.c eeprom.c er2055.c i2cmem.c nvram.c rp5h01.c timekpr.c tms6100.c tms6100.h x2212.c |
| [src/emu/sound] | 2608intf.c 2610intf.c 8950intf.c aica.c c140.c c140.h es8712.c es8712.h gaelco.c ics2115.c ics2115.h k007232.c k007232.h k053260.c k054539.c n63701x.c n63701x.h namco.c nile.c okim6376.c okim6376.h qsound.c qsound.h s14001a.c s14001a.h scsp.c segapcm.c segapcm.h sp0256.c sp0256.h tc8830f.c tms5110.c upd7759.c x1_010.c x1_010.h ymf271.c ymz280b.c ymz770.c zsg2.c zsg2.h |
| [src/emu/video] | hd44780.c |
| [src/mame/drivers] | cps3.c sigmab52.c |
| [src/mame/machine] | decocass_tape.c |
| [src/mess/audio] | alesis.c |
| [src/mess/drivers] | alphasma.c apexc.c gamate.c gba.c geniusiq.c gp2x.c pc100.c pc88va.c sgi_ip2.c supracan.c svmu.c ti89.c ti99_4p.c tsispch.c x68k.c |
| [src/mess/includes] | alesis.h gba.h ti89.h |
| r241937 | r241938 | |
|---|---|---|
| 41 | 41 | |
| 42 | 42 | #include "tn_usbsm.h" |
| 43 | 43 | |
| 44 | #define BUFFER_TAG "ram" | |
| 45 | 44 | #define STRATA_TAG "strata" |
| 46 | 45 | |
| 47 | 46 | enum |
| r241937 | r241938 | |
| 54 | 53 | |
| 55 | 54 | nouspikel_usb_smartmedia_device::nouspikel_usb_smartmedia_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 56 | 55 | : ti_expansion_card_device(mconfig, TI99_USBSM, "Nouspikel USB/Smartmedia card", tag, owner, clock, "ti99_usbsm", __FILE__), |
| 56 | m_smartmedia(*this, "smartmedia"), | |
| 57 | 57 | m_flash(*this, STRATA_TAG) |
| 58 | 58 | { |
| 59 | 59 | } |
| r241937 | r241938 | |
| 273 | 273 | |
| 274 | 274 | void nouspikel_usb_smartmedia_device::device_start() |
| 275 | 275 | { |
| 276 | m_ram = (UINT16*)(*memregion(BUFFER_TAG)); | |
| 277 | /* auto_alloc_array(device->machine(), UINT16, 0x100000/2); */ | |
| 278 | m_smartmedia = subdevice<smartmedia_image_device>("smartmedia"); | |
| 276 | m_ram.resize(0x80000/2); | |
| 279 | 277 | } |
| 280 | 278 | |
| 281 | 279 | void nouspikel_usb_smartmedia_device::device_reset() |
| r241937 | r241938 | |
| 304 | 302 | m_cru_base = ioport("CRUUSBSM")->read(); |
| 305 | 303 | } |
| 306 | 304 | |
| 307 | ROM_START( tn_usbsm ) | |
| 308 | ROM_REGION16_BE(0x80000, BUFFER_TAG, 0) /* RAM buffer 512 KiB */ | |
| 309 | ROM_FILL(0x0000, 0x80000, 0x0000) | |
| 310 | ROM_END | |
| 311 | ||
| 312 | 305 | INPUT_PORTS_START( tn_usbsm ) |
| 313 | 306 | PORT_START( "CRUUSBSM" ) |
| 314 | 307 | PORT_DIPNAME( 0x1f00, 0x1600, "USB/Smartmedia CRU base" ) |
| r241937 | r241938 | |
| 336 | 329 | |
| 337 | 330 | MACHINE_CONFIG_FRAGMENT( tn_usbsm ) |
| 338 | 331 | MCFG_DEVICE_ADD("smartmedia", SMARTMEDIA, 0) |
| 339 | MCFG_STRATAFLASH_ADD( | |
| 332 | MCFG_STRATAFLASH_ADD(STRATA_TAG) | |
| 340 | 333 | MACHINE_CONFIG_END |
| 341 | 334 | |
| 342 | 335 | machine_config_constructor nouspikel_usb_smartmedia_device::device_mconfig_additions() const |
| r241937 | r241938 | |
| 344 | 337 | return MACHINE_CONFIG_NAME( tn_usbsm ); |
| 345 | 338 | } |
| 346 | 339 | |
| 347 | const rom_entry *nouspikel_usb_smartmedia_device::device_rom_region() const | |
| 348 | { | |
| 349 | return ROM_NAME( tn_usbsm ); | |
| 350 | } | |
| 351 | ||
| 352 | 340 | ioport_constructor nouspikel_usb_smartmedia_device::device_input_ports() const |
| 353 | 341 | { |
| 354 | 342 | return INPUT_PORTS_NAME(tn_usbsm); |
| r241937 | r241938 | |
|---|---|---|
| 34 | 34 | protected: |
| 35 | 35 | virtual void device_start(void); |
| 36 | 36 | virtual void device_reset(void); |
| 37 | virtual const rom_entry *device_rom_region() const; | |
| 38 | 37 | virtual machine_config_constructor device_mconfig_additions() const; |
| 39 | 38 | virtual ioport_constructor device_input_ports() const; |
| 40 | 39 | |
| 41 | 40 | private: |
| 42 | 41 | |
| 43 | smartmedia_image_device* m_smartmedia; | |
| 44 | ||
| 45 | 42 | int m_feeprom_page; |
| 46 | 43 | int m_sram_page; |
| 47 | 44 | int m_cru_register; |
| r241937 | r241938 | |
| 54 | 51 | |
| 55 | 52 | UINT16 m_input_latch; |
| 56 | 53 | UINT16 m_output_latch; |
| 57 | UINT16 | |
| 54 | dynamic_array<UINT16> m_ram; | |
| 58 | 55 | |
| 59 | | |
| 56 | required_device<smartmedia_image_device> m_smartmedia; | |
| 60 | 57 | required_device<strataflash_device> m_flash; |
| 61 | 58 | }; |
| 62 | 59 |
| r241937 | r241938 | |
|---|---|---|
| 1271 | 1271 | else if (address < region->bytes()) |
| 1272 | 1272 | { |
| 1273 | 1273 | /* lowmask specified which address bits are within the databus width */ |
| 1274 | UINT32 lowmask = region->width() - 1; | |
| 1274 | UINT32 lowmask = region->bytewidth() - 1; | |
| 1275 | 1275 | UINT8 *base = region->base() + (address & ~lowmask); |
| 1276 | 1276 | |
| 1277 | 1277 | /* if we have a valid base, return the appropriate byte */ |
| r241937 | r241938 | |
| 1453 | 1453 | else if (address < region->bytes()) |
| 1454 | 1454 | { |
| 1455 | 1455 | /* lowmask specified which address bits are within the databus width */ |
| 1456 | UINT32 lowmask = region->width() - 1; | |
| 1456 | UINT32 lowmask = region->bytewidth() - 1; | |
| 1457 | 1457 | UINT8 *base = region->base() + (address & ~lowmask); |
| 1458 | 1458 | |
| 1459 | 1459 | /* if we have a valid base, set the appropriate byte */ |
| r241937 | r241938 | |
|---|---|---|
| 59 | 59 | : debug_view_source(name), |
| 60 | 60 | m_space(NULL), |
| 61 | 61 | m_memintf(NULL), |
| 62 | m_base(region), | |
| 62 | m_base(region.base()), | |
| 63 | 63 | m_length(region.bytes()), |
| 64 | m_offsetxor(NATIVE_ENDIAN_VALUE_LE_BE(region.width() - 1, 0)), | |
| 64 | m_offsetxor(NATIVE_ENDIAN_VALUE_LE_BE(region.bytewidth() - 1, 0)), | |
| 65 | 65 | m_endianness(region.endianness()), |
| 66 | m_prefsize(MIN(region.width(), 8)) | |
| 66 | m_prefsize(MIN(region.bytewidth(), 8)) | |
| 67 | 67 | { |
| 68 | 68 | } |
| 69 | 69 |
| r241937 | r241938 | |
|---|---|---|
| 48 | 48 | return NULL; |
| 49 | 49 | |
| 50 | 50 | // check the width and warn if not correct |
| 51 | if (region->width() != width) | |
| 51 | if (region->bytewidth() != width) | |
| 52 | 52 | { |
| 53 | 53 | if (required) |
| 54 | osd_printf_warning("Region '%s' found but is width %d, not %d as requested\n", m_tag, region->width() | |
| 54 | osd_printf_warning("Region '%s' found but is width %d, not %d as requested\n", m_tag, region->bitwidth(), width*8); | |
| 55 | 55 | return NULL; |
| 56 | 56 | } |
| 57 | 57 | |
| r241937 | r241938 | |
| 73 | 73 | return NULL; |
| 74 | 74 | |
| 75 | 75 | // check the width and warn if not correct |
| 76 | if (width != 0 && share->width() != width) | |
| 76 | if (width != 0 && share->bitwidth() != width) | |
| 77 | 77 | { |
| 78 | 78 | if (required) |
| 79 | osd_printf_warning("Shared ptr '%s' found but is width %d, not %d as requested\n", m_tag, share->width(), width); | |
| 79 | osd_printf_warning("Shared ptr '%s' found but is width %d, not %d as requested\n", m_tag, share->bitwidth(), width); | |
| 80 | 80 | return NULL; |
| 81 | 81 | } |
| 82 | 82 |
| r241937 | r241938 | |
|---|---|---|
| 149 | 149 | assert(share != NULL); |
| 150 | 150 | region_length = 8 * share->bytes(); |
| 151 | 151 | region_base = reinterpret_cast<UINT8 *>(share->ptr()); |
| 152 | region_width = share->width() | |
| 152 | region_width = share->bytewidth(); | |
| 153 | 153 | region_endianness = share->endianness(); |
| 154 | 154 | } |
| 155 | 155 | else |
| r241937 | r241938 | |
| 158 | 158 | assert(region != NULL); |
| 159 | 159 | region_length = 8 * region->bytes(); |
| 160 | 160 | region_base = region->base(); |
| 161 | region_width = region->width(); | |
| 161 | region_width = region->bytewidth(); | |
| 162 | 162 | region_endianness = region->endianness(); |
| 163 | 163 | } |
| 164 | 164 | } |
| r241937 | r241938 | |
|---|---|---|
| 428 | 428 | if (m_membits_supplied) |
| 429 | 429 | { |
| 430 | 430 | // forcing width only makes sense when narrower than the native bus width |
| 431 | assert_always(m_membits < share->width(), "Improper use of MCFG_PALETTE_MEMBITS"); | |
| 431 | assert_always(m_membits < share->bitwidth(), "Improper use of MCFG_PALETTE_MEMBITS"); | |
| 432 | 432 | m_paletteram.set_membits(m_membits); |
| 433 | 433 | if (share_ext != NULL) |
| 434 | 434 | m_paletteram_ext.set_membits(m_membits); |
| r241937 | r241938 | |
|---|---|---|
| 125 | 125 | fatalerror( "at28c16 region '%s' wrong size (expected size = 0x%X)\n", tag(), AT28C16_DATA_BYTES ); |
| 126 | 126 | } |
| 127 | 127 | |
| 128 | if( m_region->width() != 1 ) | |
| 128 | if( m_region->bytewidth() != 1 ) | |
| 129 | 129 | { |
| 130 | 130 | fatalerror( "at28c16 region '%s' needs to be an 8-bit region\n", tag() ); |
| 131 | 131 | } |
| 132 | 132 | |
| 133 | UINT8 *default_data = m_region->base(); | |
| 134 | ||
| 133 | 135 | for( offs_t offs = 0; offs < AT28C16_DATA_BYTES; offs++ ) |
| 134 | { | |
| 135 | m_addrspace[ 0 ]->write_byte( offs, m_region->u8( offs ) ); | |
| 136 | } | |
| 136 | m_addrspace[ 0 ]->write_byte( offs, default_data[offs] ); | |
| 137 | 137 | } |
| 138 | 138 | } |
| 139 | 139 |
| r241937 | r241938 | |
|---|---|---|
| 293 | 293 | { |
| 294 | 294 | if (m_region->bytes() != eeprom_bytes) |
| 295 | 295 | fatalerror("eeprom region '%s' wrong size (expected size = 0x%X)\n", tag(), eeprom_bytes); |
| 296 | if (m_data_bits == 8 && m_region->width() != 1) | |
| 296 | if (m_data_bits == 8 && m_region->bytewidth() != 1) | |
| 297 | 297 | fatalerror("eeprom region '%s' needs to be an 8-bit region\n", tag()); |
| 298 | if (m_data_bits == 16 && (m_region->width() != 2 || m_region->endianness() != ENDIANNESS_BIG)) | |
| 298 | if (m_data_bits == 16 && (m_region->bytewidth() != 2 || m_region->endianness() != ENDIANNESS_BIG)) | |
| 299 | 299 | fatalerror("eeprom region '%s' needs to be a 16-bit big-endian region\n", tag()); |
| 300 | 300 | osd_printf_verbose("Loading data from EEPROM region '%s'\n", tag()); |
| 301 | 301 | |
| 302 | for (offs_t offs = 0; offs < eeprom_length; offs++) | |
| 303 | if (m_data_bits == 8) | |
| 304 | m_addrspace[0]->write_byte(offs, m_region->u8(offs)); | |
| 305 | else | |
| 306 | m_addrspace[0]->write_word(offs * 2, m_region->u16(offs)); | |
| 302 | if (m_data_bits == 8) | |
| 303 | { | |
| 304 | UINT8 *default_data = m_region->base(); | |
| 305 | for (offs_t offs = 0; offs < eeprom_length; offs++) | |
| 306 | m_addrspace[0]->write_byte(offs, default_data[offs]); | |
| 307 | } | |
| 308 | else | |
| 309 | { | |
| 310 | UINT16 *default_data = (UINT16 *)(m_region->base()); | |
| 311 | for (offs_t offs = 0; offs < eeprom_length; offs++) | |
| 312 | m_addrspace[0]->write_word(offs * 2, default_data[offs]); | |
| 313 | } | |
| 307 | 314 | } |
| 308 | 315 | } |
| 309 | 316 |
| r241937 | r241938 | |
|---|---|---|
| 85 | 85 | if (m_region != NULL) |
| 86 | 86 | { |
| 87 | 87 | if (m_region->bytes() != SIZE_DATA) |
| 88 | fatalerror("er2055 region '%s' wrong size (expected size = 0x100)\n", tag()); | |
| 89 | if (m_region->width() != 1) | |
| 88 | fatalerror("er2055 region '%s' wrong size (expected size = 0x40)\n", tag()); | |
| 89 | if (m_region->bytewidth() != 1) | |
| 90 | 90 | fatalerror("er2055 region '%s' needs to be an 8-bit region\n", tag()); |
| 91 | 91 | |
| 92 | UINT8 *default_data = m_region->base(); | |
| 92 | 93 | for (int byte = 0; byte < SIZE_DATA; byte++) |
| 93 | m_addrspace[0]->write_byte(byte, | |
| 94 | m_addrspace[0]->write_byte(byte, default_data[byte]); | |
| 94 | 95 | } |
| 95 | 96 | } |
| 96 | 97 |
| r241937 | r241938 | |
|---|---|---|
| 186 | 186 | fatalerror( "i2cmem region '%s' wrong size (expected size = 0x%X)\n", tag(), i2cmem_bytes ); |
| 187 | 187 | } |
| 188 | 188 | |
| 189 | if( m_region->width() != 1 ) | |
| 189 | if( m_region->bytewidth() != 1 ) | |
| 190 | 190 | { |
| 191 | 191 | fatalerror( "i2cmem region '%s' needs to be an 8-bit region\n", tag() ); |
| 192 | 192 | } |
| 193 | 193 | |
| 194 | UINT8 *default_data = m_region->base(); | |
| 194 | 195 | for( offs_t offs = 0; offs < i2cmem_bytes; offs++ ) |
| 195 | { | |
| 196 | m_addrspace[ 0 ]->write_byte( offs, m_region->u8( offs ) ); | |
| 197 | } | |
| 196 | m_addrspace[ 0 ]->write_byte( offs, default_data[offs] ); | |
| 198 | 197 | } |
| 199 | 198 | } |
| 200 | 199 |
| r241937 | r241938 | |
|---|---|---|
| 83 | 83 | // region always wins |
| 84 | 84 | if (m_region != NULL) |
| 85 | 85 | { |
| 86 | memcpy(m_base, | |
| 86 | memcpy(m_base, m_region->base(), m_length); | |
| 87 | 87 | return; |
| 88 | 88 | } |
| 89 | 89 |
| r241937 | r241938 | |
|---|---|---|
| 51 | 51 | |
| 52 | 52 | void rp5h01_device::device_start() |
| 53 | 53 | { |
| 54 | m_data = | |
| 54 | m_data = region()->base(); | |
| 55 | 55 | if (m_data == NULL) |
| 56 | 56 | m_data = initial_data; |
| 57 | 57 | else |
| r241937 | r241938 | |
|---|---|---|
| 228 | 228 | m_century = make_bcd( systime.local_time.year / 100 ); |
| 229 | 229 | m_data.resize( m_size ); |
| 230 | 230 | |
| 231 | m_default_data = | |
| 231 | m_default_data = region()->base(); | |
| 232 | 232 | if (m_default_data) |
| 233 | 233 | { |
| 234 | 234 | assert( region()->bytes() == m_size ); |
| r241937 | r241938 | |
|---|---|---|
| 77 | 77 | const device_type TMS6100 = &device_creator<tms6100_device>; |
| 78 | 78 | |
| 79 | 79 | tms6100_device::tms6100_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) |
| 80 | : device_t(mconfig, type, name, tag, owner, clock, shortname, source) | |
| 80 | : device_t(mconfig, type, name, tag, owner, clock, shortname, source), | |
| 81 | m_rom(*this, DEVICE_SELF) | |
| 81 | 82 | { |
| 82 | 83 | } |
| 83 | 84 | |
| 84 | 85 | tms6100_device::tms6100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 85 | : device_t(mconfig, TMS6100, "TMS6100", tag, owner, clock, "tms6100", __FILE__) | |
| 86 | : device_t(mconfig, TMS6100, "TMS6100", tag, owner, clock, "tms6100", __FILE__), | |
| 87 | m_rom(*this, DEVICE_SELF) | |
| 86 | 88 | { |
| 87 | 89 | } |
| 88 | 90 | |
| r241937 | r241938 | |
| 109 | 111 | |
| 110 | 112 | void tms6100_device::device_start() |
| 111 | 113 | { |
| 112 | m_rom = *region(); | |
| 113 | ||
| 114 | 114 | // save device variables |
| 115 | 115 | save_item(NAME(m_addr_bits)); |
| 116 | 116 | save_item(NAME(m_address)); |
| r241937 | r241938 | |
|---|---|---|
| 25 | 25 | virtual void device_reset(); |
| 26 | 26 | private: |
| 27 | 27 | // internal state |
| 28 | required_region_ptr<UINT8> m_rom; | |
| 28 | 29 | UINT32 m_address; |
| 29 | 30 | UINT32 m_address_latch; |
| 30 | 31 | UINT8 m_loadptr; |
| r241937 | r241938 | |
| 35 | 36 | UINT8 m_data; |
| 36 | 37 | UINT8 m_state; |
| 37 | 38 | |
| 38 | const UINT8 *m_rom; | |
| 39 | ||
| 40 | 39 | }; |
| 41 | 40 | |
| 42 | 41 | extern const device_type TMS6100; |
| r241937 | r241938 | |
|---|---|---|
| 128 | 128 | { |
| 129 | 129 | if (m_region->bytes() != SIZE_DATA) |
| 130 | 130 | fatalerror("x2212 region '%s' wrong size (expected size = 0x100)\n", tag()); |
| 131 | if (m_region->width() != 1) | |
| 131 | if (m_region->bytewidth() != 1) | |
| 132 | 132 | fatalerror("x2212 region '%s' needs to be an 8-bit region\n", tag()); |
| 133 | 133 | |
| 134 | UINT8 *default_data = m_region->base(); | |
| 134 | 135 | for (int byte = 0; byte < SIZE_DATA; byte++) |
| 135 | m_e2prom->write_byte(byte, | |
| 136 | m_e2prom->write_byte(byte, default_data[byte]); | |
| 136 | 137 | } |
| 137 | 138 | } |
| 138 | 139 |
| r241937 | r241938 | |
|---|---|---|
| 96 | 96 | |
| 97 | 97 | void memory_array::set(const memory_share &share, int bpe) |
| 98 | 98 | { |
| 99 | set(share.ptr(), share.bytes(), share.width(), share.endianness(), bpe); | |
| 99 | set(share.ptr(), share.bytes(), share.bitwidth(), share.endianness(), bpe); | |
| 100 | 100 | } |
| 101 | 101 | |
| 102 | 102 | void memory_array::set(const memory_array &array) |
| r241937 | r241938 | |
|---|---|---|
| 4131 | 4131 | m_next(NULL), |
| 4132 | 4132 | m_name(name), |
| 4133 | 4133 | m_buffer(length), |
| 4134 | m_width(width), | |
| 4135 | m_endianness(endian) | |
| 4134 | m_endianness(endian), | |
| 4135 | m_bitwidth(width * 8), | |
| 4136 | m_bytewidth(width) | |
| 4136 | 4137 | { |
| 4137 | 4138 | assert(width == 1 || width == 2 || width == 4 || width == 8); |
| 4138 | 4139 | } |
| r241937 | r241938 | |
|---|---|---|
| 646 | 646 | : m_next(NULL), |
| 647 | 647 | m_ptr(ptr), |
| 648 | 648 | m_bytes(bytes), |
| 649 | m_width(width), | |
| 650 | m_endianness(endianness) { } | |
| 649 | m_endianness(endianness), | |
| 650 | m_bitwidth(width), | |
| 651 | m_bytewidth(width <= 8 ? 1 : width <= 16 ? 2 : width <= 32 ? 4 : 8) | |
| 652 | { } | |
| 651 | 653 | |
| 652 | 654 | // getters |
| 653 | 655 | memory_share *next() const { return m_next; } |
| 654 | 656 | void *ptr() const { if (this == NULL) return NULL; return m_ptr; } |
| 655 | 657 | size_t bytes() const { return m_bytes; } |
| 656 | UINT8 width() const { return m_width; } | |
| 657 | 658 | endianness_t endianness() const { return m_endianness; } |
| 659 | UINT8 bitwidth() const { return m_bitwidth; } | |
| 660 | UINT8 bytewidth() const { return m_bytewidth; } | |
| 658 | 661 | |
| 659 | 662 | // setters |
| 660 | 663 | void set_ptr(void *ptr) { m_ptr = ptr; } |
| r241937 | r241938 | |
| 664 | 667 | memory_share * m_next; // next share in the list |
| 665 | 668 | void * m_ptr; // pointer to the memory backing the region |
| 666 | 669 | size_t m_bytes; // size of the shared region in bytes |
| 667 | UINT8 m_width; // width of the shared region | |
| 668 | 670 | endianness_t m_endianness; // endianness of the memory |
| 671 | UINT8 m_bitwidth; // width of the shared region in bits | |
| 672 | UINT8 m_bytewidth; // width in bytes, rounded up to a power of 2 | |
| 673 | ||
| 669 | 674 | }; |
| 670 | 675 | |
| 671 | 676 | |
| r241937 | r241938 | |
| 694 | 699 | |
| 695 | 700 | // flag expansion |
| 696 | 701 | endianness_t endianness() const { return m_endianness; } |
| 697 | UINT8 width() const { return m_width; } | |
| 702 | UINT8 bitwidth() const { return m_bitwidth; } | |
| 703 | UINT8 bytewidth() const { return m_bytewidth; } | |
| 698 | 704 | |
| 699 | 705 | // data access |
| 700 | 706 | UINT8 &u8(offs_t offset = 0) { return m_buffer[offset]; } |
| r241937 | r241938 | |
| 702 | 708 | UINT32 &u32(offs_t offset = 0) { return reinterpret_cast<UINT32 *>(base())[offset]; } |
| 703 | 709 | UINT64 &u64(offs_t offset = 0) { return reinterpret_cast<UINT64 *>(base())[offset]; } |
| 704 | 710 | |
| 705 | // allow passing a region for any common pointer | |
| 706 | operator void *() { return (this != NULL) ? reinterpret_cast<void *>(base()) : NULL; } | |
| 707 | operator INT8 *() { return (this != NULL) ? reinterpret_cast<INT8 *>(base()) : NULL; } | |
| 708 | operator UINT8 *() { return (this != NULL) ? reinterpret_cast<UINT8 *>(base()) : NULL; } | |
| 709 | operator INT16 *() { return (this != NULL) ? reinterpret_cast<INT16 *>(base()) : NULL; } | |
| 710 | operator UINT16 *() { return (this != NULL) ? reinterpret_cast<UINT16 *>(base()) : NULL; } | |
| 711 | operator INT32 *() { return (this != NULL) ? reinterpret_cast<INT32 *>(base()) : NULL; } | |
| 712 | operator UINT32 *() { return (this != NULL) ? reinterpret_cast<UINT32 *>(base()) : NULL; } | |
| 713 | operator INT64 *() { return (this != NULL) ? reinterpret_cast<INT64 *>(base()) : NULL; } | |
| 714 | operator UINT64 *() { return (this != NULL) ? reinterpret_cast<UINT64 *>(base()) : NULL; } | |
| 715 | ||
| 716 | 711 | private: |
| 717 | 712 | // internal data |
| 718 | 713 | running_machine & m_machine; |
| 719 | 714 | memory_region * m_next; |
| 720 | 715 | astring m_name; |
| 721 | 716 | dynamic_buffer m_buffer; |
| 722 | UINT8 m_width; | |
| 723 | 717 | endianness_t m_endianness; |
| 718 | UINT8 m_bitwidth; | |
| 719 | UINT8 m_bytewidth; | |
| 724 | 720 | }; |
| 725 | 721 | |
| 726 | 722 |
| r241937 | r241938 | |
|---|---|---|
| 536 | 536 | if (region == NULL) |
| 537 | 537 | return; |
| 538 | 538 | |
| 539 | LOG(("+ datawidth=%d little=%d\n", region->width(), region->endianness() == ENDIANNESS_LITTLE)); | |
| 539 | LOG(("+ datawidth=%dbit endian=%s\n", region->bitwidth(), | |
| 540 | region->endianness() == ENDIANNESS_LITTLE ? "little" : "big")); | |
| 540 | 541 | |
| 541 | 542 | /* if the region is inverted, do that now */ |
| 542 | 543 | if (invert) |
| r241937 | r241938 | |
| 547 | 548 | } |
| 548 | 549 | |
| 549 | 550 | /* swap the endianness if we need to */ |
| 550 | if (region->width() > 1 && region->endianness() != ENDIANNESS_NATIVE) | |
| 551 | if (region->bytewidth() > 1 && region->endianness() != ENDIANNESS_NATIVE) | |
| 551 | 552 | { |
| 552 | 553 | LOG(("+ Byte swapping region\n")); |
| 553 | int datawidth = region->width(); | |
| 554 | int datawidth = region->bytewidth(); | |
| 554 | 555 | for (i = 0, base = region->base(); i < region->bytes(); i += datawidth) |
| 555 | 556 | { |
| 556 | 557 | UINT8 temp[8]; |
| r241937 | r241938 | |
|---|---|---|
| 142 | 142 | /* stream system initialize */ |
| 143 | 143 | m_stream = machine().sound().stream_alloc(*this,0,2,rate, stream_update_delegate(FUNC(ym2608_device::stream_generate),this)); |
| 144 | 144 | /* setup adpcm buffers */ |
| 145 | pcmbufa = | |
| 145 | pcmbufa = region()->base(); | |
| 146 | 146 | pcmsizea = region()->bytes(); |
| 147 | 147 | |
| 148 | 148 | /* initialize YM2608 */ |
| r241937 | r241938 | |
|---|---|---|
| 154 | 154 | /* stream system initialize */ |
| 155 | 155 | m_stream = machine().sound().stream_alloc(*this,0,2,rate, stream_update_delegate(FUNC(ym2610_device::stream_generate),this)); |
| 156 | 156 | /* setup adpcm buffers */ |
| 157 | pcmbufa = | |
| 157 | pcmbufa = region()->base(); | |
| 158 | 158 | pcmsizea = region()->bytes(); |
| 159 | 159 | name.printf("%s.deltat", tag()); |
| 160 | 160 | pcmbufb = (void *)(machine().root_device().memregion(name)->base()); |
| r241937 | r241938 | |
|---|---|---|
| 149 | 149 | assert_always(m_chip != NULL, "Error creating Y8950 chip"); |
| 150 | 150 | |
| 151 | 151 | /* ADPCM ROM data */ |
| 152 | y8950_set_delta_t_memory(m_chip, | |
| 152 | y8950_set_delta_t_memory(m_chip, region()->base(), region()->bytes()); | |
| 153 | 153 | |
| 154 | 154 | m_stream = machine().sound().stream_alloc(*this,0,1,rate); |
| 155 | 155 | /* port and keyboard handler */ |
| r241937 | r241938 | |
|---|---|---|
| 413 | 413 | |
| 414 | 414 | // get AICA RAM |
| 415 | 415 | { |
| 416 | m_AICARAM = | |
| 416 | m_AICARAM = region()->base(); | |
| 417 | 417 | if (m_AICARAM) |
| 418 | 418 | { |
| 419 | 419 | m_AICARAM += m_roffset; |
| r241937 | r241938 | |
|---|---|---|
| 110 | 110 | |
| 111 | 111 | m_stream = stream_alloc(0, 2, m_sample_rate); |
| 112 | 112 | |
| 113 | m_pRom=*region(); | |
| 113 | m_pRom = (INT8 *)region()->base(); | |
| 114 | 114 | |
| 115 | 115 | /* make decompress pcm table */ //2000.06.26 CAB |
| 116 | 116 | { |
| r241937 | r241938 | |
| 195 | 195 | sz=ed-st; |
| 196 | 196 | |
| 197 | 197 | /* Retrieve base pointer to the sample data */ |
| 198 | pSampleData= | |
| 198 | pSampleData = m_pRom + find_sample(st, v->bank, i); | |
| 199 | 199 | |
| 200 | 200 | /* Fetch back previous data pointers */ |
| 201 | 201 | offset=v->ptoffset; |
| r241937 | r241938 | |
| 409 | 409 | |
| 410 | 410 | void c140_device::set_base(void *base) |
| 411 | 411 | { |
| 412 | m_pRom = base; | |
| 412 | m_pRom = (INT8 *)base; | |
| 413 | 413 | } |
| 414 | 414 | |
| 415 | 415 |
| r241937 | r241938 | |
|---|---|---|
| 108 | 108 | INT16 *m_mixer_buffer_right; |
| 109 | 109 | |
| 110 | 110 | int m_baserate; |
| 111 | | |
| 111 | INT8 *m_pRom; | |
| 112 | 112 | UINT8 m_REG[0x200]; |
| 113 | 113 | |
| 114 | 114 | INT16 m_pcmtbl[8]; //2000.06.26 CAB |
| r241937 | r241938 | |
|---|---|---|
| 40 | 40 | es8712_device::es8712_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 41 | 41 | : device_t(mconfig, ES8712, "ES8712", tag, owner, clock, "es8712", __FILE__), |
| 42 | 42 | device_sound_interface(mconfig, *this), |
| 43 | m_rom(*this, DEVICE_SELF), | |
| 43 | 44 | m_playing(0), |
| 44 | 45 | m_base_offset(0), |
| 45 | 46 | m_sample(0), |
| r241937 | r241938 | |
| 50 | 51 | m_end(0), |
| 51 | 52 | m_repeat(0), |
| 52 | 53 | m_bank_offset(0), |
| 53 | m_region_base(NULL), | |
| 54 | 54 | m_stream(NULL) |
| 55 | 55 | { |
| 56 | 56 | } |
| r241937 | r241938 | |
| 69 | 69 | m_repeat = 0; |
| 70 | 70 | |
| 71 | 71 | m_bank_offset = 0; |
| 72 | m_region_base = *region(); | |
| 73 | 72 | |
| 74 | 73 | /* generate the name and create the stream */ |
| 75 | 74 | m_stream = stream_alloc(0, 1, clock()); |
| r241937 | r241938 | |
| 155 | 154 | /* if this chip is active */ |
| 156 | 155 | if (m_playing) |
| 157 | 156 | { |
| 158 | UINT8 *base = m_r | |
| 157 | UINT8 *base = &m_rom[m_bank_offset + m_base_offset]; | |
| 159 | 158 | int sample = m_sample; |
| 160 | 159 | int signal = m_signal; |
| 161 | 160 | int count = m_count; |
| r241937 | r241938 | |
|---|---|---|
| 51 | 51 | void es8712_state_save_register(); |
| 52 | 52 | |
| 53 | 53 | private: |
| 54 | required_region_ptr<UINT8> m_rom; | |
| 55 | ||
| 54 | 56 | UINT8 m_playing; /* 1 if we're actively playing */ |
| 55 | 57 | |
| 56 | 58 | UINT32 m_base_offset; /* pointer to the base memory location */ |
| r241937 | r241938 | |
| 65 | 67 | UINT8 m_repeat; /* Repeat current sample when 1 */ |
| 66 | 68 | |
| 67 | 69 | INT32 m_bank_offset; |
| 68 | UINT8 *m_region_base; /* pointer to the base of the region */ | |
| 69 | 70 | sound_stream *m_stream; /* which stream are we playing on? */ |
| 70 | 71 | }; |
| 71 | 72 |
| r241937 | r241938 | |
|---|---|---|
| 240 | 240 | { |
| 241 | 241 | m_stream = stream_alloc(0, 2, 8000); |
| 242 | 242 | |
| 243 | m_snd_data = (UINT8 *)machine().root_device().memregion(m_data_tag)->base(); | |
| 244 | if (m_snd_data == NULL) | |
| 245 | m_snd_data = *region(); | |
| 243 | m_snd_data = owner()->memregion(m_data_tag)->base(); | |
| 246 | 244 | |
| 247 | 245 | /* init volume table */ |
| 248 | 246 | for (int vol = 0; vol < GAELCO_VOLUME_LEVELS; vol++){ |
| r241937 | r241938 | |
|---|---|---|
| 20 | 20 | ics2115_device::ics2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 21 | 21 | : device_t(mconfig, ICS2115, "ICS2115", tag, owner, clock, "ics2115", __FILE__), |
| 22 | 22 | device_sound_interface(mconfig, *this), |
| 23 | m_rom(*this, DEVICE_SELF), | |
| 23 | 24 | m_irq_cb(*this) |
| 24 | 25 | { |
| 25 | 26 | } |
| 26 | 27 | |
| 27 | 28 | void ics2115_device::device_start() |
| 28 | 29 | { |
| 29 | m_rom = *region(); | |
| 30 | 30 | m_timer[0].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ics2115_device::timer_cb_0),this), this); |
| 31 | 31 | m_timer[1].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ics2115_device::timer_cb_1),this), this); |
| 32 | 32 | m_stream = machine().sound().stream_alloc(*this, 0, 2, 33075); |
| r241937 | r241938 | |
|---|---|---|
| 115 | 115 | virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples); |
| 116 | 116 | |
| 117 | 117 | // internal state |
| 118 | required_region_ptr<UINT8> m_rom; | |
| 118 | 119 | devcb_write_line m_irq_cb; |
| 119 | 120 | |
| 120 | UINT8 *m_rom; | |
| 121 | 121 | INT16 m_ulaw[256]; |
| 122 | 122 | UINT16 m_volume[4096]; |
| 123 | 123 | static const int volume_bits = 15; |
| r241937 | r241938 | |
|---|---|---|
| 148 | 148 | k007232_device::k007232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 149 | 149 | : device_t(mconfig, K007232, "K007232 PCM Controller", tag, owner, clock, "k007232", __FILE__), |
| 150 | 150 | device_sound_interface(mconfig, *this), |
| 151 | m_rom(*this, DEVICE_SELF), | |
| 151 | 152 | m_port_write_handler(*this) |
| 152 | 153 | { |
| 153 | 154 | } |
| r241937 | r241938 | |
| 159 | 160 | void k007232_device::device_start() |
| 160 | 161 | { |
| 161 | 162 | /* Set up the chips */ |
| 162 | m_pcmbuf[0] = *region(); | |
| 163 | m_pcmbuf[1] = *region(); | |
| 164 | 163 | m_pcmlimit = region()->bytes(); |
| 165 | 164 | |
| 166 | 165 | m_port_write_handler.resolve(); |
| r241937 | r241938 | |
| 381 | 380 | addr = m_start[i] + ((m_addr[i]>>BASE_SHIFT)&0x000fffff); |
| 382 | 381 | while (old_addr <= addr) |
| 383 | 382 | { |
| 384 | if( (m_ | |
| 383 | if( (m_rom[old_addr] & 0x80) || old_addr >= m_pcmlimit ) | |
| 385 | 384 | { |
| 386 | 385 | /* end of sample */ |
| 387 | 386 | |
| r241937 | r241938 | |
| 413 | 412 | |
| 414 | 413 | m_addr[i] += m_step[i]; |
| 415 | 414 | |
| 416 | out = (m_ | |
| 415 | out = (m_rom[addr] & 0x7f) - 0x40; | |
| 417 | 416 | |
| 418 | 417 | outputs[0][j] += out * volA; |
| 419 | 418 | outputs[1][j] += out * volB; |
| r241937 | r241938 | |
|---|---|---|
| 48 | 48 | |
| 49 | 49 | private: |
| 50 | 50 | // internal state |
| 51 | required_region_ptr<UINT8> m_rom; | |
| 52 | ||
| 51 | 53 | UINT8 m_vol[KDAC_A_PCM_MAX][2]; /* volume for the left and right channel */ |
| 52 | 54 | UINT32 m_addr[KDAC_A_PCM_MAX]; |
| 53 | 55 | UINT32 m_start[KDAC_A_PCM_MAX]; |
| r241937 | r241938 | |
| 56 | 58 | int m_play[KDAC_A_PCM_MAX]; |
| 57 | 59 | |
| 58 | 60 | UINT8 m_wreg[0x10]; /* write data */ |
| 59 | UINT8 * m_pcmbuf[2]; /* Channel A & B pointers */ | |
| 60 | 61 | |
| 61 | 62 | UINT32 m_pcmlimit; |
| 62 | 63 |
| r241937 | r241938 | |
|---|---|---|
| 92 | 92 | void k053260_device::device_start() |
| 93 | 93 | { |
| 94 | 94 | memory_region *ROM = (m_rgnoverride) ? owner()->memregion(m_rgnoverride) : region(); |
| 95 | m_rom = | |
| 95 | m_rom = ROM->base(); | |
| 96 | 96 | m_rom_size = ROM->bytes(); |
| 97 | 97 | |
| 98 | 98 | m_stream = stream_alloc( 0, 2, clock() / CLOCKS_PER_SAMPLE ); |
| r241937 | r241938 | |
|---|---|---|
| 308 | 308 | cur_ptr = 0; |
| 309 | 309 | memset(ram, 0, 0x4000); |
| 310 | 310 | |
| 311 | memory_region *reg = (m_rgnoverride != NULL) ? machine().root_device().memregion(m_rgnoverride) : region(); | |
| 312 | rom = *reg; | |
| 311 | memory_region *reg = (m_rgnoverride != NULL) ? owner()->memregion(m_rgnoverride) : region(); | |
| 312 | rom = reg->base(); | |
| 313 | 313 | rom_size = reg->bytes(); |
| 314 | 314 | rom_mask = 0xffffffffU; |
| 315 | 315 | for(int i=0; i<32; i++) |
| r241937 | r241938 | |
|---|---|---|
| 32 | 32 | namco_63701x_device::namco_63701x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 33 | 33 | : device_t(mconfig, NAMCO_63701X, "Namco 63701X", tag, owner, clock, "namco_63701x", __FILE__), |
| 34 | 34 | device_sound_interface(mconfig, *this), |
| 35 | m_stream(NULL), | |
| 36 | m_rom(NULL) | |
| 35 | m_rom(*this, DEVICE_SELF), | |
| 36 | m_stream(NULL) | |
| 37 | 37 | { |
| 38 | 38 | } |
| 39 | 39 | |
| r241937 | r241938 | |
| 44 | 44 | |
| 45 | 45 | void namco_63701x_device::device_start() |
| 46 | 46 | { |
| 47 | m_rom = *region(); | |
| 48 | 47 | m_stream = stream_alloc(0, 2, clock()/1000); |
| 49 | 48 | } |
| 50 | 49 |
| r241937 | r241938 | |
|---|---|---|
| 56 | 56 | DECLARE_WRITE8_MEMBER(namco_63701x_w); |
| 57 | 57 | |
| 58 | 58 | private: |
| 59 | required_region_ptr<UINT8> m_rom; | |
| 59 | 60 | voice_63701x m_voices[2]; |
| 60 | 61 | sound_stream *m_stream; /* channel assigned by the mixer */ |
| 61 | UINT8 *m_rom; /* pointer to sample ROM */ | |
| 62 | 62 | }; |
| 63 | 63 | |
| 64 | 64 | extern const device_type NAMCO_63701X; |
| r241937 | r241938 | |
|---|---|---|
| 93 | 93 | logerror("Namco: freq fractional bits = %d: internal freq = %d, output freq = %d\n", m_f_fracbits, m_namco_clock, m_sample_rate); |
| 94 | 94 | |
| 95 | 95 | /* build the waveform table */ |
| 96 | build_decoded_waveform( | |
| 96 | build_decoded_waveform(region()->base()); | |
| 97 | 97 | |
| 98 | 98 | /* get stream channels */ |
| 99 | 99 | if (m_stereo) |
| r241937 | r241938 | |
|---|---|---|
| 66 | 66 | |
| 67 | 67 | void nile_device::device_start() |
| 68 | 68 | { |
| 69 | m_sound_ram = | |
| 69 | m_sound_ram = region()->base(); | |
| 70 | 70 | m_stream = stream_alloc(0, 2, 44100); |
| 71 | 71 | } |
| 72 | 72 |
| r241937 | r241938 | |
|---|---|---|
| 113 | 113 | okim6376_device::okim6376_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 114 | 114 | : device_t(mconfig, OKIM6376, "OKI6376", tag, owner, clock, "okim6376", __FILE__), |
| 115 | 115 | device_sound_interface(mconfig, *this), |
| 116 | m_region_base(*this, DEVICE_SELF), | |
| 116 | 117 | //m_command[OKIM6376_VOICES], |
| 117 | 118 | m_latch(0), |
| 118 | 119 | //m_stage[OKIM6376_VOICES], |
| 119 | m_region_base(0), | |
| 120 | 120 | m_stream(NULL), |
| 121 | 121 | m_master_clock(0), |
| 122 | 122 | m_divisor(0), |
| r241937 | r241938 | |
| 156 | 156 | m_stage[0] = 0; |
| 157 | 157 | m_stage[1] = 0; |
| 158 | 158 | m_latch = 0; |
| 159 | m_region_base = *region(); | |
| 160 | 159 | m_master_clock = clock(); |
| 161 | 160 | m_divisor = divisor_table[0]; |
| 162 | 161 | m_nar = 1; |
| r241937 | r241938 | |
|---|---|---|
| 48 | 48 | |
| 49 | 49 | private: |
| 50 | 50 | // internal state |
| 51 | required_region_ptr<UINT8> m_region_base; /* pointer to the base of the region */ | |
| 52 | ||
| 51 | 53 | #define OKIM6376_VOICES 2 |
| 52 | 54 | struct ADPCMVoice m_voice[OKIM6376_VOICES]; |
| 53 | 55 | INT32 m_command[OKIM6376_VOICES]; |
| 54 | 56 | INT32 m_latch; /* Command data is held before transferring to either channel */ |
| 55 | 57 | UINT8 m_stage[OKIM6376_VOICES];/* If a sample is playing, flag that we have a command staged */ |
| 56 | UINT8 *m_region_base; /* pointer to the base of the region */ | |
| 57 | 58 | sound_stream *m_stream; /* which stream are we playing on? */ |
| 58 | 59 | UINT32 m_master_clock; /* master clock frequency */ |
| 59 | 60 | UINT8 m_divisor; /* can be 8,10,16, and is read out of ROM data */ |
| r241937 | r241938 | |
|---|---|---|
| 68 | 68 | qsound_device::qsound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 69 | 69 | : device_t(mconfig, QSOUND, "Q-Sound", tag, owner, clock, "qsound", __FILE__), |
| 70 | 70 | device_sound_interface(mconfig, *this), |
| 71 | m_cpu(*this, "qsound"), | |
| 72 | m_sample_rom(*this, DEVICE_SELF), | |
| 71 | 73 | m_data(0), |
| 72 | m_stream(NULL), | |
| 73 | m_sample_rom_length(0), | |
| 74 | m_sample_rom(NULL), | |
| 75 | m_cpu(NULL) | |
| 74 | m_stream(NULL) | |
| 76 | 75 | { |
| 77 | 76 | } |
| 78 | 77 | |
| r241937 | r241938 | |
| 105 | 104 | |
| 106 | 105 | void qsound_device::device_start() |
| 107 | 106 | { |
| 108 | // find our CPU | |
| 109 | m_cpu = subdevice<dsp16_device>("qsound"); | |
| 110 | ||
| 111 | m_sample_rom = (INT8*)*region(); | |
| 112 | m_sample_rom_length = region()->bytes(); | |
| 113 | ||
| 114 | 107 | m_stream = stream_alloc(0, 2, clock() / 166); // /166 clock divider? |
| 115 | 108 | |
| 116 | 109 | // create pan table |
| r241937 | r241938 | |
|---|---|---|
| 62 | 62 | UINT32 step_ptr; // current offset counter |
| 63 | 63 | } m_channel[16]; |
| 64 | 64 | |
| 65 | required_device<dsp16_device> m_cpu; | |
| 66 | required_region_ptr<INT8> m_sample_rom; | |
| 67 | ||
| 65 | 68 | int m_pan_table[33]; // pan volume table |
| 66 | 69 | UINT16 m_data; // register latch data |
| 67 | 70 | sound_stream *m_stream; // audio stream |
| 68 | UINT32 m_sample_rom_length; | |
| 69 | INT8 *m_sample_rom; // Q-Sound sample ROM | |
| 70 | dsp16_device *m_cpu; | |
| 71 | 71 | |
| 72 | inline INT8 read_sample(UINT32 offset) { return m_sample_rom[offset | |
| 72 | inline INT8 read_sample(UINT32 offset) { return m_sample_rom[offset & m_sample_rom.mask()]; } | |
| 73 | 73 | void write_data(UINT8 address, UINT16 data); |
| 74 | 74 | }; |
| 75 | 75 |
| r241937 | r241938 | |
|---|---|---|
| 577 | 577 | s14001a_device::s14001a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 578 | 578 | : device_t(mconfig, S14001A, "S14001A", tag, owner, clock, "s14001a", __FILE__), |
| 579 | 579 | device_sound_interface(mconfig, *this), |
| 580 | m_SpeechRom(*this, DEVICE_SELF), | |
| 580 | 581 | m_stream(NULL), |
| 581 | 582 | m_WordInput(0), |
| 582 | 583 | m_LatchedWord(0), |
| r241937 | r241938 | |
| 596 | 597 | m_OldDelta(0x02), |
| 597 | 598 | m_DACOutput(SILENCE), |
| 598 | 599 | m_audioout(0), |
| 599 | m_SpeechRom(NULL), | |
| 600 | 600 | m_VSU1000_amp(0) |
| 601 | 601 | { |
| 602 | 602 | } |
| r241937 | r241938 | |
| 628 | 628 | m_filtervals[i] = SILENCE; |
| 629 | 629 | } |
| 630 | 630 | |
| 631 | m_SpeechRom = *region(); | |
| 632 | ||
| 633 | 631 | m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() ? clock() : machine().sample_rate()); |
| 634 | 632 | } |
| 635 | 633 |
| r241937 | r241938 | |
|---|---|---|
| 35 | 35 | |
| 36 | 36 | private: |
| 37 | 37 | // internal state |
| 38 | required_region_ptr<UINT8> m_SpeechRom; | |
| 38 | 39 | sound_stream * m_stream; |
| 39 | 40 | |
| 40 | 41 | UINT8 m_WordInput; // value on word input bus |
| r241937 | r241938 | |
| 55 | 56 | UINT8 m_OldDelta; // 2-bit old delta value |
| 56 | 57 | UINT8 m_DACOutput; // 4-bit DAC Accumulator/output |
| 57 | 58 | UINT8 m_audioout; // filtered audio output |
| 58 | UINT8 *m_SpeechRom; // array to hold rom contents, mame will not need this, will use a pointer | |
| 59 | 59 | INT16 m_filtervals[8]; |
| 60 | 60 | UINT8 m_VSU1000_amp; // amplitude setting on VSU-1000 board |
| 61 | 61 |
| r241937 | r241938 | |
|---|---|---|
| 509 | 509 | m_Master=0; |
| 510 | 510 | } |
| 511 | 511 | |
| 512 | m_SCSPRAM = | |
| 512 | m_SCSPRAM = region()->base(); | |
| 513 | 513 | if (m_SCSPRAM) |
| 514 | 514 | { |
| 515 | 515 | m_SCSPRAM_LENGTH = region()->bytes(); |
| r241937 | r241938 | |
|---|---|---|
| 17 | 17 | segapcm_device::segapcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 18 | 18 | : device_t(mconfig, SEGAPCM, "Sega PCM", tag, owner, clock, "segapcm", __FILE__), |
| 19 | 19 | device_sound_interface(mconfig, *this), |
| 20 | m_rom(*this, DEVICE_SELF), | |
| 20 | 21 | m_ram(NULL), |
| 21 | m_rom(NULL), | |
| 22 | 22 | m_bank(0), |
| 23 | 23 | m_bankshift(0), |
| 24 | 24 | m_bankmask(0), |
| 25 | m_rgnmask(0), | |
| 26 | 25 | m_stream(NULL) |
| 27 | 26 | { |
| 28 | 27 | } |
| r241937 | r241938 | |
| 34 | 33 | |
| 35 | 34 | void segapcm_device::device_start() |
| 36 | 35 | { |
| 37 | int mask, rom_mask | |
| 36 | int mask, rom_mask; | |
| 38 | 37 | |
| 39 | m_rom = *region(); | |
| 40 | 38 | m_ram = auto_alloc_array(machine(), UINT8, 0x800); |
| 41 | 39 | |
| 42 | 40 | memset(m_ram, 0xff, 0x800); |
| r241937 | r241938 | |
| 46 | 44 | if (!mask) |
| 47 | 45 | mask = BANK_MASK7 >> 16; |
| 48 | 46 | |
| 49 | len = region()->bytes(); | |
| 50 | m_rgnmask = len - 1; | |
| 47 | for(rom_mask = 1; rom_mask < m_rom.length(); rom_mask *= 2); | |
| 51 | 48 | |
| 52 | for(rom_mask = 1; rom_mask < len; rom_mask *= 2); | |
| 53 | ||
| 54 | 49 | rom_mask--; |
| 55 | 50 | |
| 56 | 51 | m_bankmask = mask & (rom_mask >> m_bankshift); |
| r241937 | r241938 | |
| 124 | 119 | } |
| 125 | 120 | |
| 126 | 121 | /* fetch the sample */ |
| 127 | v = rom[(addr >> 8) & m_r | |
| 122 | v = rom[(addr >> 8) & m_rom.mask()] - 0x80; | |
| 128 | 123 | |
| 129 | 124 | /* apply panning and advance */ |
| 130 | 125 | outputs[0][i] += v * regs[2]; |
| r241937 | r241938 | |
|---|---|---|
| 53 | 53 | virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples); |
| 54 | 54 | |
| 55 | 55 | private: |
| 56 | required_region_ptr<UINT8> m_rom; | |
| 56 | 57 | UINT8* m_ram; |
| 57 | 58 | UINT8 m_low[16]; |
| 58 | const UINT8* m_rom; | |
| 59 | 59 | int m_bank; |
| 60 | 60 | int m_bankshift; |
| 61 | 61 | int m_bankmask; |
| 62 | int m_rgnmask; | |
| 63 | 62 | sound_stream* m_stream; |
| 64 | 63 | }; |
| 65 | 64 |
| r241937 | r241938 | |
|---|---|---|
| 96 | 96 | sp0256_device::sp0256_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 97 | 97 | : device_t(mconfig, SP0256, "SP0256", tag, owner, clock, "sp0256", __FILE__), |
| 98 | 98 | device_sound_interface(mconfig, *this), |
| 99 | m_rom(*this, DEVICE_SELF), | |
| 99 | 100 | m_drq_cb(*this), |
| 100 | 101 | m_sby_cb(*this) |
| 101 | 102 | { |
| r241937 | r241938 | |
| 139 | 140 | /* -------------------------------------------------------------------- */ |
| 140 | 141 | /* Setup the ROM. */ |
| 141 | 142 | /* -------------------------------------------------------------------- */ |
| 142 | m_rom = *region(); | |
| 143 | 143 | // the rom is not supposed to be reversed first; according to Joe Zbiciak. |
| 144 | 144 | // see http://forums.bannister.org/ubbthreads.php?ubb=showflat&Number=72385#Post72385 |
| 145 | 145 | // TODO: because of this, check if the bitrev functions are even used anywhere else |
| r241937 | r241938 | |
|---|---|---|
| 99 | 99 | private: |
| 100 | 100 | UINT32 getb(int len); |
| 101 | 101 | void micro(); |
| 102 | ||
| 102 | required_region_ptr<UINT8> m_rom; /* 64K ROM. */ | |
| 103 | 103 | sound_stream *m_stream; /* MAME core sound stream */ |
| 104 | 104 | devcb_write_line m_drq_cb; /* Data request callback */ |
| 105 | 105 | devcb_write_line m_sby_cb; /* Standby callback */ |
| r241937 | r241938 | |
| 128 | 128 | UINT32 m_fifo_bitp; /* FIFO bit-pointer (for partial decles). */ |
| 129 | 129 | UINT16 m_fifo[64]; /* The 64-decle FIFO. */ |
| 130 | 130 | |
| 131 | UINT8 *m_rom; /* 64K ROM. */ | |
| 132 | ||
| 133 | 131 | emu_timer *m_lrq_timer; |
| 134 | 132 | }; |
| 135 | 133 |
| r241937 | r241938 | |
|---|---|---|
| 47 | 47 | // create the stream |
| 48 | 48 | m_stream = stream_alloc(0, 1, clock() / 0x10); |
| 49 | 49 | |
| 50 | m_mem_base = | |
| 50 | m_mem_base = region()->base(); | |
| 51 | 51 | m_mem_mask = region()->bytes() - 1; |
| 52 | 52 | |
| 53 | 53 | // register for savestates |
| r241937 | r241938 | |
|---|---|---|
| 822 | 822 | |
| 823 | 823 | void tms5110_device::device_start() |
| 824 | 824 | { |
| 825 | m_table = | |
| 825 | m_table = region()->base(); | |
| 826 | 826 | |
| 827 | 827 | set_variant(TMS5110_IS_5110A); |
| 828 | 828 | |
| r241937 | r241938 | |
| 1203 | 1203 | m_pdc_cb.resolve_safe(); |
| 1204 | 1204 | m_ctl_cb.resolve_safe(); |
| 1205 | 1205 | |
| 1206 | m_rom = | |
| 1206 | m_rom = region()->base(); | |
| 1207 | 1207 | assert_always(m_rom != NULL, "Error creating TMSPROM chip: No rom region found"); |
| 1208 | m_prom = | |
| 1208 | m_prom = owner()->memregion(m_prom_region)->base(); | |
| 1209 | 1209 | assert_always(m_prom != NULL, "Error creating TMSPROM chip: No prom region found"); |
| 1210 | 1210 | |
| 1211 | 1211 | m_romclk_timer = timer_alloc(0); |
| r241937 | r241938 | |
|---|---|---|
| 238 | 238 | |
| 239 | 239 | /* compute the ROM base or allocate a timer */ |
| 240 | 240 | m_romoffset = 0; |
| 241 | m_rom = m_rombase = | |
| 241 | m_rom = m_rombase = region()->base(); | |
| 242 | 242 | if (m_rombase == NULL) |
| 243 | 243 | { |
| 244 | 244 | assert(type() == UPD7759); // other chips do not support slave mode |
| r241937 | r241938 | |
| 313 | 313 | |
| 314 | 314 | /* compute the ROM base or allocate a timer */ |
| 315 | 315 | m_romoffset = 0; |
| 316 | m_rom = m_rombase = | |
| 316 | m_rom = m_rombase = region()->base(); | |
| 317 | 317 | if (m_rombase == NULL) |
| 318 | 318 | { |
| 319 | 319 | m_rommask = 0; |
| r241937 | r241938 | |
|---|---|---|
| 85 | 85 | x1_010_device::x1_010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 86 | 86 | : device_t(mconfig, X1_010, "X1-010", tag, owner, clock, "x1_010", __FILE__), |
| 87 | 87 | device_sound_interface(mconfig, *this), |
| 88 | m_region(*this, DEVICE_SELF), | |
| 88 | 89 | m_rate(0), |
| 89 | 90 | m_adr(0), |
| 90 | 91 | m_stream(NULL), |
| 91 | m_region(NULL), | |
| 92 | 92 | m_sound_enable(0), |
| 93 | 93 | m_base_clock(0) |
| 94 | 94 | { |
| r241937 | r241938 | |
| 106 | 106 | { |
| 107 | 107 | int i; |
| 108 | 108 | |
| 109 | m_region = *region(); | |
| 110 | 109 | m_base_clock = clock(); |
| 111 | 110 | m_rate = clock() / 1024; |
| 112 | 111 | |
| r241937 | r241938 | |
| 193 | 192 | register INT8 *start, *end, data; |
| 194 | 193 | register UINT8 *env; |
| 195 | 194 | register UINT32 smp_offs, smp_step, env_offs, env_step, delta; |
| 196 | const UINT8 *snd1 = m_region; | |
| 197 | 195 | |
| 198 | 196 | // mixer buffer zero clear |
| 199 | 197 | memset( outputs[0], 0, samples*sizeof(*outputs[0]) ); |
| r241937 | r241938 | |
| 207 | 205 | stream_sample_t *bufL = outputs[0]; |
| 208 | 206 | stream_sample_t *bufR = outputs[1]; |
| 209 | 207 | if( (reg->status&2) == 0 ) { // PCM sampling |
| 210 | start = (INT8 *)(reg->start *0x1000+snd1); | |
| 211 | end = (INT8 *)((0x100-reg->end)*0x1000+snd1); | |
| 208 | start = m_region + reg->start*0x1000; | |
| 209 | end = m_region + (0x100-reg->end)*0x1000; | |
| 212 | 210 | volL = ((reg->volume>>4)&0xf)*VOL_BASE; |
| 213 | 211 | volR = ((reg->volume>>0)&0xf)*VOL_BASE; |
| 214 | 212 | smp_offs = m_smp_offset[ch]; |
| r241937 | r241938 | |
|---|---|---|
| 33 | 33 | // internal state |
| 34 | 34 | |
| 35 | 35 | /* Variables only used here */ |
| 36 | required_region_ptr<INT8> m_region; // ROM | |
| 36 | 37 | int m_rate; // Output sampling rate (Hz) |
| 37 | 38 | int m_adr; // address |
| 38 | 39 | sound_stream * m_stream; // Stream handle |
| 39 | const UINT8 *m_region; // region name | |
| 40 | 40 | int m_sound_enable; // sound output enable/disable |
| 41 | 41 | UINT8 m_reg[0x2000]; // X1-010 Register & wave form area |
| 42 | 42 | UINT8 m_HI_WORD_BUF[0x2000]; // X1-010 16bit access ram check avoidance work |
| r241937 | r241938 | |
|---|---|---|
| 1710 | 1710 | m_timA = timer_alloc(0); |
| 1711 | 1711 | m_timB = timer_alloc(1); |
| 1712 | 1712 | |
| 1713 | m_mem_base = | |
| 1713 | m_mem_base = region()->base(); | |
| 1714 | 1714 | m_mem_size = region()->bytes(); |
| 1715 | 1715 | m_irq_handler.resolve(); |
| 1716 | 1716 |
| r241937 | r241938 | |
|---|---|---|
| 581 | 581 | |
| 582 | 582 | /* initialize the rest of the structure */ |
| 583 | 583 | m_master_clock = (double)clock() / 384.0; |
| 584 | m_mem_base = | |
| 584 | m_mem_base = region()->base(); | |
| 585 | 585 | m_mem_size = region()->bytes(); |
| 586 | 586 | m_irq_handler.resolve(); |
| 587 | 587 |
| r241937 | r241938 | |
|---|---|---|
| 49 | 49 | { |
| 50 | 50 | // create the stream |
| 51 | 51 | m_stream = machine().sound().stream_alloc(*this, 0, 2, 16000); |
| 52 | m_rom_base = | |
| 52 | m_rom_base = region()->base(); | |
| 53 | 53 | m_rom_limit = region()->bytes() * 8; |
| 54 | 54 | |
| 55 | 55 | for (int i = 0; i < 8; i++) |
| r241937 | r241938 | |
|---|---|---|
| 71 | 71 | zsg2_device::zsg2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 72 | 72 | : device_t(mconfig, ZSG2, "ZSG-2", tag, owner, clock, "zsg2", __FILE__), |
| 73 | 73 | device_sound_interface(mconfig, *this), |
| 74 | m_mem_base(*this, DEVICE_SELF), | |
| 74 | 75 | m_read_address(0), |
| 75 | 76 | m_ext_read_handler(*this) |
| 76 | 77 | { |
| r241937 | r241938 | |
| 89 | 90 | |
| 90 | 91 | m_stream = stream_alloc(0, 2, clock() / 192); |
| 91 | 92 | |
| 92 | m_mem_base = *region(); | |
| 93 | m_mem_size = region()->bytes(); | |
| 94 | m_mem_blocks = m_mem_size / 4; | |
| 93 | m_mem_blocks = m_mem_base.length(); | |
| 95 | 94 | |
| 96 | 95 | m_mem_copy = auto_alloc_array_clear(machine(), UINT32, m_mem_blocks); |
| 97 | 96 | m_full_samples = auto_alloc_array_clear(machine(), INT16, m_mem_blocks * 4 + 4); // +4 is for empty block |
| r241937 | r241938 | |
|---|---|---|
| 65 | 65 | }; |
| 66 | 66 | |
| 67 | 67 | zchan m_chan[48]; |
| 68 | UINT32 m_read_address; | |
| 69 | 68 | |
| 70 | UINT32 *m_mem_base; | |
| 69 | required_region_ptr<UINT32> m_mem_base; | |
| 70 | UINT32 m_read_address; | |
| 71 | 71 | UINT32 *m_mem_copy; |
| 72 | UINT32 m_mem_size; | |
| 73 | 72 | UINT32 m_mem_blocks; |
| 74 | 73 | INT16 *m_full_samples; |
| 75 | 74 |
| r241937 | r241938 | |
|---|---|---|
| 87 | 87 | void hd44780_device::device_start() |
| 88 | 88 | { |
| 89 | 89 | if (region()) |
| 90 | m_cgrom = | |
| 90 | m_cgrom = region()->base(); | |
| 91 | 91 | else |
| 92 | m_cgrom = | |
| 92 | m_cgrom = memregion("cgrom")->base(); | |
| 93 | 93 | |
| 94 | 94 | m_busy_timer = timer_alloc(TIMER_BUSY); |
| 95 | 95 | m_blink_timer = timer_alloc(TIMER_BLINKING); |
| r241937 | r241938 | |
|---|---|---|
| 741 | 741 | void cps3_state::cps3_decrypt_bios() |
| 742 | 742 | { |
| 743 | 743 | int i; |
| 744 | UINT32 *coderegion = (UINT32*)memregion(" | |
| 744 | UINT32 *coderegion = (UINT32*)memregion("bios")->base(); | |
| 745 | 745 | |
| 746 | m_decrypted_bios = (UINT32*)memregion(" | |
| 746 | m_decrypted_bios = (UINT32*)memregion("bios")->base(); | |
| 747 | 747 | |
| 748 | 748 | for (i=0;i<0x80000;i+=4) |
| 749 | 749 | { |
| r241937 | r241938 | |
| 1365 | 1365 | /* BIOS ROM */ |
| 1366 | 1366 | if (address < 0x80000) |
| 1367 | 1367 | { |
| 1368 | direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, | |
| 1368 | direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, m_decrypted_bios); | |
| 1369 | 1369 | return ~0; |
| 1370 | 1370 | } |
| 1371 | 1371 | /* RAM */ |
| r241937 | r241938 | |
| 2183 | 2183 | |
| 2184 | 2184 | /* there are more unknown writes, but you get the idea */ |
| 2185 | 2185 | static ADDRESS_MAP_START( cps3_map, AS_PROGRAM, 32, cps3_state ) |
| 2186 | AM_RANGE(0x00000000, 0x0007ffff) AM_ROM AM_REGION(" | |
| 2186 | AM_RANGE(0x00000000, 0x0007ffff) AM_ROM AM_REGION("bios", 0) // Bios ROM | |
| 2187 | 2187 | AM_RANGE(0x02000000, 0x0207ffff) AM_RAM AM_SHARE("mainram") // Main RAM |
| 2188 | 2188 | |
| 2189 | 2189 | AM_RANGE(0x03000000, 0x030003ff) AM_RAM // 'FRAM' (SFIII memory test mode ONLY) |
| r241937 | r241938 | |
| 2642 | 2642 | /* CD sets - use CD BIOS roms */ |
| 2643 | 2643 | |
| 2644 | 2644 | ROM_START( redearth ) |
| 2645 | ROM_REGION32_BE( 0x080000, " | |
| 2645 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2646 | 2646 | ROM_LOAD( "redearth_euro.29f400.u2", 0x000000, 0x080000, CRC(02e0f336) SHA1(acc37e830dfeb9674f5a0fb24f4cc23217ae4ff5) ) |
| 2647 | 2647 | |
| 2648 | 2648 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2650 | 2650 | ROM_END |
| 2651 | 2651 | |
| 2652 | 2652 | ROM_START( redearthr1 ) |
| 2653 | ROM_REGION32_BE( 0x080000, " | |
| 2653 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2654 | 2654 | ROM_LOAD( "redearth_euro.29f400.u2", 0x000000, 0x080000, CRC(02e0f336) SHA1(acc37e830dfeb9674f5a0fb24f4cc23217ae4ff5) ) |
| 2655 | 2655 | |
| 2656 | 2656 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2658 | 2658 | ROM_END |
| 2659 | 2659 | |
| 2660 | 2660 | ROM_START( warzard ) |
| 2661 | ROM_REGION32_BE( 0x080000, " | |
| 2661 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2662 | 2662 | ROM_LOAD( "warzard_japan.29f400.u2", 0x000000, 0x080000, CRC(f8e2f0c6) SHA1(93d6a986f44c211fff014e55681eca4d2a2774d6) ) |
| 2663 | 2663 | |
| 2664 | 2664 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2666 | 2666 | ROM_END |
| 2667 | 2667 | |
| 2668 | 2668 | ROM_START( warzardr1 ) |
| 2669 | ROM_REGION32_BE( 0x080000, " | |
| 2669 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2670 | 2670 | ROM_LOAD( "warzard_japan.29f400.u2", 0x000000, 0x080000, CRC(f8e2f0c6) SHA1(93d6a986f44c211fff014e55681eca4d2a2774d6) ) |
| 2671 | 2671 | |
| 2672 | 2672 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2675 | 2675 | |
| 2676 | 2676 | |
| 2677 | 2677 | ROM_START( sfiii ) |
| 2678 | ROM_REGION32_BE( 0x080000, " | |
| 2678 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2679 | 2679 | ROM_LOAD( "sfiii_euro.29f400.u2", 0x000000, 0x080000, CRC(27699ddc) SHA1(d8b525cd27e584560b129598df31fd2c5b2a682a) ) |
| 2680 | 2680 | |
| 2681 | 2681 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2683 | 2683 | ROM_END |
| 2684 | 2684 | |
| 2685 | 2685 | ROM_START( sfiiiu ) |
| 2686 | ROM_REGION32_BE( 0x080000, " | |
| 2686 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2687 | 2687 | ROM_LOAD( "sfiii_usa_region_b1.29f400.u2", 0x000000, 0x080000, CRC(fb172a8e) SHA1(48ebf59910f246835f7dc0c588da30f7a908072f) ) |
| 2688 | 2688 | |
| 2689 | 2689 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2691 | 2691 | ROM_END |
| 2692 | 2692 | |
| 2693 | 2693 | ROM_START( sfiiia ) |
| 2694 | ROM_REGION32_BE( 0x080000, " | |
| 2694 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2695 | 2695 | ROM_LOAD( "sfiii_asia_region_bd.29f400.u2", 0x000000, 0x080000, CRC(cbd28de7) SHA1(9c15ecb73b9587d20850e62e8683930a45caa01b) ) |
| 2696 | 2696 | |
| 2697 | 2697 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2699 | 2699 | ROM_END |
| 2700 | 2700 | |
| 2701 | 2701 | ROM_START( sfiiij ) |
| 2702 | ROM_REGION32_BE( 0x080000, " | |
| 2702 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2703 | 2703 | ROM_LOAD( "sfiii_japan.29f400.u2", 0x000000, 0x080000, CRC(74205250) SHA1(c3e83ace7121d32da729162662ec6b5285a31211) ) |
| 2704 | 2704 | |
| 2705 | 2705 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2707 | 2707 | ROM_END |
| 2708 | 2708 | |
| 2709 | 2709 | ROM_START( sfiiih ) |
| 2710 | ROM_REGION32_BE( 0x080000, " | |
| 2710 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2711 | 2711 | ROM_LOAD( "sfiii_hispanic.29f400.u2", 0x000000, 0x080000, CRC(d2b3cd48) SHA1(00ebb270c24a66515c97e35331de54ff5358000e) ) |
| 2712 | 2712 | |
| 2713 | 2713 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2716 | 2716 | |
| 2717 | 2717 | |
| 2718 | 2718 | ROM_START( sfiii2 ) |
| 2719 | ROM_REGION32_BE( 0x080000, " | |
| 2719 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2720 | 2720 | ROM_LOAD( "sfiii2_usa.29f400.u2", 0x000000, 0x080000, CRC(75dd72e0) SHA1(5a12d6ea6734df5de00ecee6f9ef470749d2f242) ) |
| 2721 | 2721 | |
| 2722 | 2722 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2724 | 2724 | ROM_END |
| 2725 | 2725 | |
| 2726 | 2726 | ROM_START( sfiii2j ) |
| 2727 | ROM_REGION32_BE( 0x080000, " | |
| 2727 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2728 | 2728 | ROM_LOAD( "sfiii2_japan.29f400.u2", 0x000000, 0x080000, CRC(faea0a3e) SHA1(a03cd63bcf52e4d57f7a598c8bc8e243694624ec) ) |
| 2729 | 2729 | |
| 2730 | 2730 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2733 | 2733 | |
| 2734 | 2734 | |
| 2735 | 2735 | ROM_START( jojo ) |
| 2736 | ROM_REGION32_BE( 0x080000, " | |
| 2736 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2737 | 2737 | ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) |
| 2738 | 2738 | |
| 2739 | 2739 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2741 | 2741 | ROM_END |
| 2742 | 2742 | |
| 2743 | 2743 | ROM_START( jojor1 ) |
| 2744 | ROM_REGION32_BE( 0x080000, " | |
| 2744 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2745 | 2745 | ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) |
| 2746 | 2746 | |
| 2747 | 2747 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2749 | 2749 | ROM_END |
| 2750 | 2750 | |
| 2751 | 2751 | ROM_START( jojor2 ) |
| 2752 | ROM_REGION32_BE( 0x080000, " | |
| 2752 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2753 | 2753 | ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) |
| 2754 | 2754 | |
| 2755 | 2755 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2757 | 2757 | ROM_END |
| 2758 | 2758 | |
| 2759 | 2759 | ROM_START( jojoj ) |
| 2760 | ROM_REGION32_BE( 0x080000, " | |
| 2760 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2761 | 2761 | ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) |
| 2762 | 2762 | |
| 2763 | 2763 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2765 | 2765 | ROM_END |
| 2766 | 2766 | |
| 2767 | 2767 | ROM_START( jojojr1 ) |
| 2768 | ROM_REGION32_BE( 0x080000, " | |
| 2768 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2769 | 2769 | ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) |
| 2770 | 2770 | |
| 2771 | 2771 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2773 | 2773 | ROM_END |
| 2774 | 2774 | |
| 2775 | 2775 | ROM_START( jojojr2 ) |
| 2776 | ROM_REGION32_BE( 0x080000, " | |
| 2776 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2777 | 2777 | ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) |
| 2778 | 2778 | |
| 2779 | 2779 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2782 | 2782 | |
| 2783 | 2783 | |
| 2784 | 2784 | ROM_START( sfiii3 ) |
| 2785 | ROM_REGION32_BE( 0x080000, " | |
| 2785 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2786 | 2786 | ROM_LOAD( "sfiii3_euro.29f400.u2", 0x000000, 0x080000, CRC(30bbf293) SHA1(f094c2eeaf4f6709060197aca371a4532346bf78) ) |
| 2787 | 2787 | |
| 2788 | 2788 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2790 | 2790 | ROM_END |
| 2791 | 2791 | |
| 2792 | 2792 | ROM_START( sfiii3r1 ) |
| 2793 | ROM_REGION32_BE( 0x080000, " | |
| 2793 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2794 | 2794 | ROM_LOAD( "sfiii3_euro.29f400.u2", 0x000000, 0x080000, CRC(30bbf293) SHA1(f094c2eeaf4f6709060197aca371a4532346bf78) ) |
| 2795 | 2795 | |
| 2796 | 2796 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2798 | 2798 | ROM_END |
| 2799 | 2799 | |
| 2800 | 2800 | ROM_START( sfiii3u ) |
| 2801 | ROM_REGION32_BE( 0x080000, " | |
| 2801 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2802 | 2802 | ROM_LOAD( "sfiii3_usa.29f400.u2", 0x000000, 0x080000, CRC(ecc545c1) SHA1(e39083820aae914fd8b80c9765129bedb745ceba) ) |
| 2803 | 2803 | |
| 2804 | 2804 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2806 | 2806 | ROM_END |
| 2807 | 2807 | |
| 2808 | 2808 | ROM_START( sfiii3ur1 ) |
| 2809 | ROM_REGION32_BE( 0x080000, " | |
| 2809 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2810 | 2810 | ROM_LOAD( "sfiii3_usa.29f400.u2", 0x000000, 0x080000, CRC(ecc545c1) SHA1(e39083820aae914fd8b80c9765129bedb745ceba) ) |
| 2811 | 2811 | |
| 2812 | 2812 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2815 | 2815 | |
| 2816 | 2816 | |
| 2817 | 2817 | ROM_START( jojoba ) |
| 2818 | ROM_REGION32_BE( 0x080000, " | |
| 2818 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2819 | 2819 | ROM_LOAD( "jojoba_japan.29f400.u2", 0x000000, 0x080000, CRC(3085478c) SHA1(055eab1fc42816f370a44b17fd7e87ffcb10e8b7) ) |
| 2820 | 2820 | |
| 2821 | 2821 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2823 | 2823 | ROM_END |
| 2824 | 2824 | |
| 2825 | 2825 | ROM_START( jojobar1 ) |
| 2826 | ROM_REGION32_BE( 0x080000, " | |
| 2826 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2827 | 2827 | ROM_LOAD( "jojoba_japan.29f400.u2", 0x000000, 0x080000, CRC(3085478c) SHA1(055eab1fc42816f370a44b17fd7e87ffcb10e8b7) ) |
| 2828 | 2828 | |
| 2829 | 2829 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 2837 | 2837 | /* NO CD sets - use NO CD BIOS roms - don't require the CD image to boot */ |
| 2838 | 2838 | |
| 2839 | 2839 | ROM_START( sfiiin ) |
| 2840 | ROM_REGION32_BE( 0x080000, " | |
| 2840 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2841 | 2841 | ROM_LOAD( "sfiii_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(ca2b715f) SHA1(86319987f9af4afd272a2488e73de8382743cb37) ) // this is a different VERSION of the bios compared to all other sets, not just an alt region code |
| 2842 | 2842 | |
| 2843 | 2843 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 2891 | 2891 | |
| 2892 | 2892 | |
| 2893 | 2893 | ROM_START( sfiiina ) |
| 2894 | ROM_REGION32_BE( 0x080000, " | |
| 2894 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2895 | 2895 | ROM_LOAD( "sfiii_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(73e32463) SHA1(45d144e533e4b20cc5a744ca4f618e288430c601) ) // sldh |
| 2896 | 2896 | |
| 2897 | 2897 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 2944 | 2944 | ROM_END |
| 2945 | 2945 | |
| 2946 | 2946 | ROM_START( sfiii2n ) |
| 2947 | ROM_REGION32_BE( 0x080000, " | |
| 2947 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 2948 | 2948 | ROM_LOAD( "sfiii2_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(fd297c0d) SHA1(4323deda2789f104b53f32a663196ec16de73215) ) |
| 2949 | 2949 | |
| 2950 | 2950 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3018 | 3018 | ROM_END |
| 3019 | 3019 | |
| 3020 | 3020 | ROM_START( jojon ) |
| 3021 | ROM_REGION32_BE( 0x080000, " | |
| 3021 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3022 | 3022 | ROM_LOAD( "jojo_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(05b4f953) SHA1(c746c7bb5359acc9adced817cb4870b1912eaefd) ) |
| 3023 | 3023 | |
| 3024 | 3024 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3080 | 3080 | ROM_END |
| 3081 | 3081 | |
| 3082 | 3082 | ROM_START( jojonr1 ) |
| 3083 | ROM_REGION32_BE( 0x080000, " | |
| 3083 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3084 | 3084 | ROM_LOAD( "jojo_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(05b4f953) SHA1(c746c7bb5359acc9adced817cb4870b1912eaefd) ) |
| 3085 | 3085 | |
| 3086 | 3086 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3142 | 3142 | ROM_END |
| 3143 | 3143 | |
| 3144 | 3144 | ROM_START( jojonr2 ) |
| 3145 | ROM_REGION32_BE( 0x080000, " | |
| 3145 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3146 | 3146 | ROM_LOAD( "jojo_asia_nocd.29f400.u2", 0x000000, 0x080000, CRC(05b4f953) SHA1(c746c7bb5359acc9adced817cb4870b1912eaefd) ) |
| 3147 | 3147 | |
| 3148 | 3148 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3204 | 3204 | ROM_END |
| 3205 | 3205 | |
| 3206 | 3206 | ROM_START( sfiii3n ) |
| 3207 | ROM_REGION32_BE( 0x080000, " | |
| 3207 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3208 | 3208 | ROM_LOAD( "sfiii3_japan_nocd.29f400.u2", 0x000000, 0x080000, CRC(1edc6366) SHA1(60b4b9adeb030a33059d74fdf03873029e465b52) ) |
| 3209 | 3209 | |
| 3210 | 3210 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3295 | 3295 | ROM_END |
| 3296 | 3296 | |
| 3297 | 3297 | ROM_START( sfiii3nr1 ) |
| 3298 | ROM_REGION32_BE( 0x080000, " | |
| 3298 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3299 | 3299 | ROM_LOAD( "sfiii3_japan_nocd.29f400.u2", 0x000000, 0x080000, CRC(1edc6366) SHA1(60b4b9adeb030a33059d74fdf03873029e465b52) ) |
| 3300 | 3300 | |
| 3301 | 3301 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3386 | 3386 | ROM_END |
| 3387 | 3387 | |
| 3388 | 3388 | ROM_START( jojoban ) |
| 3389 | ROM_REGION32_BE( 0x080000, " | |
| 3389 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3390 | 3390 | ROM_LOAD( "jojoba_japan_nocd.29f400.u2", 0x000000, 0x080000, CRC(4dab19f5) SHA1(ba07190e7662937fc267f07285c51e99a45c061e) ) |
| 3391 | 3391 | |
| 3392 | 3392 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3460 | 3460 | ROM_END |
| 3461 | 3461 | |
| 3462 | 3462 | ROM_START( jojobanr1 ) |
| 3463 | ROM_REGION32_BE( 0x080000, " | |
| 3463 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3464 | 3464 | ROM_LOAD( "jojoba_japan_nocd.29f400.u2", 0x000000, 0x080000, CRC(4dab19f5) SHA1(ba07190e7662937fc267f07285c51e99a45c061e) ) |
| 3465 | 3465 | |
| 3466 | 3466 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3534 | 3534 | ROM_END |
| 3535 | 3535 | |
| 3536 | 3536 | ROM_START( jojobane ) |
| 3537 | ROM_REGION32_BE( 0x080000, " | |
| 3537 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3538 | 3538 | ROM_LOAD( "jojoba_euro_nocd.29f400.u2", 0x000000, 0x080000, CRC(1ee2d679) SHA1(9e129b454a376606b3f7e8aec64de425cf9c635c) ) |
| 3539 | 3539 | |
| 3540 | 3540 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3608 | 3608 | ROM_END |
| 3609 | 3609 | |
| 3610 | 3610 | ROM_START( jojobaner1 ) |
| 3611 | ROM_REGION32_BE( 0x080000, " | |
| 3611 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3612 | 3612 | ROM_LOAD( "jojoba_euro_nocd.29f400.u2", 0x000000, 0x080000, CRC(1ee2d679) SHA1(9e129b454a376606b3f7e8aec64de425cf9c635c) ) |
| 3613 | 3613 | |
| 3614 | 3614 | ROM_REGION( 0x200000, "simm1.0", 0 ) |
| r241937 | r241938 | |
| 3684 | 3684 | /* Bootlegs for use with modified security carts */ |
| 3685 | 3685 | |
| 3686 | 3686 | ROM_START( cps3boot ) // for cart with standard SH2 |
| 3687 | ROM_REGION32_BE( 0x080000, " | |
| 3687 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3688 | 3688 | ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) |
| 3689 | 3689 | |
| 3690 | 3690 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3692 | 3692 | ROM_END |
| 3693 | 3693 | |
| 3694 | 3694 | ROM_START( cps3booto ) // for cart with standard SH2 |
| 3695 | ROM_REGION32_BE( 0x080000, " | |
| 3695 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3696 | 3696 | ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) |
| 3697 | 3697 | |
| 3698 | 3698 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3700 | 3700 | ROM_END |
| 3701 | 3701 | |
| 3702 | 3702 | ROM_START( cps3bs32 ) // for cart with standard SH2 |
| 3703 | ROM_REGION32_BE( 0x080000, " | |
| 3703 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3704 | 3704 | ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) |
| 3705 | 3705 | |
| 3706 | 3706 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3708 | 3708 | ROM_END |
| 3709 | 3709 | |
| 3710 | 3710 | ROM_START( cps3bs32a ) // for cart with standard SH2 |
| 3711 | ROM_REGION32_BE( 0x080000, " | |
| 3711 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3712 | 3712 | ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) |
| 3713 | 3713 | |
| 3714 | 3714 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3716 | 3716 | ROM_END |
| 3717 | 3717 | |
| 3718 | 3718 | ROM_START( cps3boota ) // for cart with dead custom SH2 (or 2nd Impact CPU which is the same as a dead one) |
| 3719 | ROM_REGION32_BE( 0x080000, " | |
| 3719 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3720 | 3720 | ROM_LOAD( "no-battery_bios_29f400_for_dead_security_cart.u2", 0x000000, 0x080000, CRC(0fd56fb3) SHA1(5a8bffc07eb7da73cf4bca6718df72e471296bfd) ) |
| 3721 | 3721 | |
| 3722 | 3722 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3725 | 3725 | |
| 3726 | 3726 | |
| 3727 | 3727 | ROM_START( cps3bootoa ) // for cart with dead custom SH2 (or 2nd Impact CPU which is the same as a dead one) |
| 3728 | ROM_REGION32_BE( 0x080000, " | |
| 3728 | ROM_REGION32_BE( 0x080000, "bios", 0 ) /* bios region */ | |
| 3729 | 3729 | ROM_LOAD( "no-battery_bios_29f400_for_dead_security_cart.u2", 0x000000, 0x080000, CRC(0fd56fb3) SHA1(5a8bffc07eb7da73cf4bca6718df72e471296bfd) ) |
| 3730 | 3730 | |
| 3731 | 3731 | DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) |
| r241937 | r241938 | |
| 3750 | 3750 | OCEANIA 7 |
| 3751 | 3751 | ASIA NCD 8 |
| 3752 | 3752 | |
| 3753 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3753 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3754 | 3754 | rom[0x1fed8/4]^=0x00000001; // clear region to 0 (invalid) |
| 3755 | 3755 | rom[0x1fed8/4]^=0x00000008; // region 8 - ASIA NO CD - doesn't actually skip the CD |
| 3756 | 3756 | // test on startup, only during game, must be another flag |
| r241937 | r241938 | |
| 3775 | 3775 | |
| 3776 | 3776 | // bios rom also lists korea, but game rom does not. |
| 3777 | 3777 | |
| 3778 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3778 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3779 | 3779 | rom[0x1fec8/4]^=0x00000001; // region (clear region) |
| 3780 | 3780 | rom[0x1fec8/4]^=0x00000008; // region |
| 3781 | 3781 | rom[0x1fecc/4]^=0x01000000; // nocd - this ONLY skips the cd check in the bios test |
| r241937 | r241938 | |
| 3797 | 3797 | OCEANIA 7 |
| 3798 | 3798 | ASIA 8 |
| 3799 | 3799 | |
| 3800 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3800 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3801 | 3801 | rom[0x1fec8/4]^=0x00000001; // region (clear region) |
| 3802 | 3802 | rom[0x1fec8/4]^=0x00000008; // region |
| 3803 | 3803 | rom[0x1fecc/4]^=0x01000000; // nocd - this ONLY skips the cd check in the bios test |
| r241937 | r241938 | |
| 3821 | 3821 | |
| 3822 | 3822 | DEVELOPMENT VERSION add 0x70 mask! |
| 3823 | 3823 | |
| 3824 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3824 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3825 | 3825 | rom[0x1fec8/4]^=0x00000001; // region hack (clear jpn) |
| 3826 | 3826 | |
| 3827 | 3827 | rom[0x1fec8/4]^=0x00000004; // region |
| r241937 | r241938 | |
| 3842 | 3842 | BRAZIL 6 |
| 3843 | 3843 | OCEANIA 7 |
| 3844 | 3844 | |
| 3845 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3845 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3846 | 3846 | rom[0x1fec8/4]^=0x00000004; // region (clear region) |
| 3847 | 3847 | rom[0x1fec8/4]^=0x00000001; // region |
| 3848 | 3848 | rom[0x1fecc/4]^=0x01000000; // nocd |
| r241937 | r241938 | |
| 3864 | 3864 | |
| 3865 | 3865 | DEVELOPMENT VERSION add 0x70 mask! |
| 3866 | 3866 | |
| 3867 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( " | |
| 3867 | UINT32 *rom = (UINT32*)machine.root_device().memregion ( "bios" )->base(); | |
| 3868 | 3868 | rom[0x1fec8/4]^=0x00000001; // region (clear jpn) |
| 3869 | 3869 | rom[0x1fec8/4]^=0x00000002; // region |
| 3870 | 3870 | rom[0x1fec8/4]^=0x00000070; // DEV mode |
| r241937 | r241938 | |
|---|---|---|
| 546 | 546 | |
| 547 | 547 | void sigmab52_state::machine_start() |
| 548 | 548 | { |
| 549 | UINT8 *rom = (UINT8*)*memregion("maincpu"); | |
| 550 | m_bank1->configure_entries(0, 2, rom, 0x4000); | |
| 549 | m_bank1->configure_entries(0, 2, memregion("maincpu")->base(), 0x4000); | |
| 551 | 550 | } |
| 552 | 551 | |
| 553 | 552 | void sigmab52_state::machine_reset() |
| r241937 | r241938 | |
|---|---|---|
| 91 | 91 | m_tape_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(decocass_tape_device::tape_clock_callback), this)); |
| 92 | 92 | if (region() == NULL) |
| 93 | 93 | return; |
| 94 | UINT8 *regionbase = | |
| 94 | UINT8 *regionbase = region()->base(); | |
| 95 | 95 | |
| 96 | 96 | /* scan for the first non-empty block in the image */ |
| 97 | 97 | for (offs = region()->bytes() - 1; offs >= 0; offs--) |
| r241937 | r241938 | |
| 290 | 290 | UINT8 decocass_tape_device::get_status_bits() |
| 291 | 291 | { |
| 292 | 292 | UINT8 tape_bits = 0; |
| 293 | UINT8 *tape_data = region()->base(); | |
| 293 | 294 | |
| 294 | 295 | /* bit 0x20 is the BOT/EOT signal, which is also set in the leader/trailer area */ |
| 295 | 296 | if (m_region == REGION_LEADER || m_region == REGION_BOT || m_region == REGION_EOT || m_region == REGION_TRAILER) |
| r241937 | r241938 | |
| 320 | 321 | |
| 321 | 322 | /* data block bytes are data */ |
| 322 | 323 | else if (m_bytenum >= BYTE_DATA_0 && m_bytenum <= BYTE_DATA_255) |
| 323 | byteval = | |
| 324 | byteval = tape_data[blocknum * 256 + (m_bytenum - BYTE_DATA_0)]; | |
| 324 | 325 | |
| 325 | 326 | /* CRC MSB */ |
| 326 | 327 | else if (m_bytenum == BYTE_CRC16_MSB) |
| r241937 | r241938 | |
|---|---|---|
| 36 | 36 | |
| 37 | 37 | alesis_dm3ag_device::alesis_dm3ag_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 38 | 38 | : device_t(mconfig, ALESIS_DM3AG, "Alesis DM3AG", tag, owner, clock, "alesis_dm3ag", __FILE__), |
| 39 | m_dac(*this, "dac") | |
| 39 | m_dac(*this, "dac"), | |
| 40 | m_samples(*this, DEVICE_SELF) | |
| 40 | 41 | { |
| 41 | 42 | } |
| 42 | 43 | |
| r241937 | r241938 | |
| 55 | 56 | |
| 56 | 57 | void alesis_dm3ag_device::device_start() |
| 57 | 58 | { |
| 58 | m_samples = (INT8*)(*region()); | |
| 59 | 59 | m_dac_update_timer = timer_alloc(TIMER_DAC_UPDATE); |
| 60 | 60 | } |
| 61 | 61 |
| r241937 | r241938 | |
|---|---|---|
| 15 | 15 | #include "emu.h" |
| 16 | 16 | #include "cpu/mc68hc11/mc68hc11.h" |
| 17 | 17 | #include "machine/nvram.h" |
| 18 | #include "machine/ram.h" | |
| 18 | 19 | #include "video/hd44780.h" |
| 19 | 20 | #include "rendlay.h" |
| 20 | 21 | |
| r241937 | r241938 | |
| 27 | 28 | m_lcdc0(*this, "ks0066_0"), |
| 28 | 29 | m_lcdc1(*this, "ks0066_1"), |
| 29 | 30 | m_nvram(*this, "nvram"), |
| 31 | m_ram(*this, RAM_TAG), | |
| 30 | 32 | m_rambank(*this, "rambank"), |
| 31 | 33 | m_keyboard(*this, "COL"), |
| 32 | 34 | m_battery_status(*this, "BATTERY") |
| r241937 | r241938 | |
| 36 | 38 | required_device<hd44780_device> m_lcdc0; |
| 37 | 39 | required_device<hd44780_device> m_lcdc1; |
| 38 | 40 | required_device<nvram_device> m_nvram; |
| 41 | required_device<ram_device> m_ram; | |
| 39 | 42 | required_memory_bank m_rambank; |
| 40 | 43 | required_ioport_array<16> m_keyboard; |
| 41 | 44 | required_ioport m_battery_status; |
| r241937 | r241938 | |
| 396 | 399 | |
| 397 | 400 | void alphasmart_state::machine_start() |
| 398 | 401 | { |
| 399 | UINT8* ram = | |
| 402 | UINT8* ram = m_ram->pointer(); | |
| 400 | 403 | |
| 401 | 404 | m_rambank->configure_entries(0, 4, ram, 0x8000); |
| 402 | 405 | m_nvram->set_base(ram, 0x8000*4); |
| r241937 | r241938 | |
| 424 | 427 | MCFG_KS0066_F05_ADD("ks0066_1") |
| 425 | 428 | MCFG_HD44780_LCD_SIZE(2, 40) |
| 426 | 429 | |
| 430 | MCFG_RAM_ADD(RAM_TAG) | |
| 431 | MCFG_RAM_DEFAULT_SIZE("128K") | |
| 432 | ||
| 427 | 433 | /* video hardware */ |
| 428 | 434 | MCFG_SCREEN_ADD("screen", LCD) |
| 429 | 435 | MCFG_SCREEN_REFRESH_RATE(50) |
| r241937 | r241938 | |
| 449 | 455 | ROM_START( asmapro ) |
| 450 | 456 | ROM_REGION( 0x8000, "maincpu", 0 ) |
| 451 | 457 | ROM_LOAD( "alphasmartpro212.rom", 0x0000, 0x8000, CRC(896ddf1c) SHA1(c3c6a421c9ced92db97431d04b4a3f09a39de716) ) // Checksum 8D24 on label |
| 452 | ||
| 453 | ROM_REGION( 0x20000, "mainram", ROMREGION_ERASE ) | |
| 454 | 458 | ROM_END |
| 455 | 459 | |
| 456 | 460 | ROM_START( asma2k ) |
| r241937 | r241938 | |
| 467 | 471 | |
| 468 | 472 | ROM_REGION( 0x8000, "spellcheck", 0 ) |
| 469 | 473 | ROM_LOAD( "spellcheck.bin", 0x0000, 0x8000, NO_DUMP ) |
| 470 | ||
| 471 | ROM_REGION( 0x20000, "mainram", ROMREGION_ERASE ) | |
| 472 | 474 | ROM_END |
| 473 | 475 | |
| 474 | 476 |
| r241937 | r241938 | |
|---|---|---|
| 117 | 117 | fread( machine().root_device().memregion("maincpu")->base(), 0x1000); |
| 118 | 118 | #ifdef LSB_FIRST |
| 119 | 119 | { /* fix endianness */ |
| 120 | UINT32 *RAM; | |
| 121 | int i; | |
| 120 | UINT32 *RAM = (UINT32 *)(machine().root_device().memregion("maincpu")->base()); | |
| 122 | 121 | |
| 123 | RAM = (UINT32 *)(*machine().root_device().memregion("maincpu")); | |
| 124 | ||
| 125 | for (i=0; i < 0x0400; i++) | |
| 122 | for (int i=0; i < 0x0400; i++) | |
| 126 | 123 | RAM[i] = BIG_ENDIANIZE_INT32(RAM[i]); |
| 127 | 124 | } |
| 128 | 125 | #endif |
| r241937 | r241938 | |
| 141 | 138 | fseek(0, SEEK_SET); |
| 142 | 139 | #ifdef LSB_FIRST |
| 143 | 140 | { /* fix endianness */ |
| 144 | UINT32 *RAM; | |
| 145 | int i; | |
| 141 | UINT32 *RAM = (UINT32 *)(machine().root_device().memregion("maincpu")->base()); | |
| 146 | 142 | |
| 147 | RAM = (UINT32 *)(*machine().root_device().memregion("maincpu")); | |
| 148 | ||
| 149 | for (i=0; i < /*0x2000*/0x0400; i++) | |
| 143 | for (int i=0; i < /*0x2000*/0x0400; i++) | |
| 150 | 144 | RAM[i] = BIG_ENDIANIZE_INT32(RAM[i]); |
| 151 | 145 | } |
| 152 | 146 | #endif |
| r241937 | r241938 | |
|---|---|---|
| 109 | 109 | |
| 110 | 110 | WRITE8_MEMBER( gamate_state::bios_w ) |
| 111 | 111 | { |
| 112 | UINT8 *memory = | |
| 112 | UINT8 *memory = memregion("maincpu")->base(); //memory_region (REGION_CPU1); | |
| 113 | 113 | |
| 114 | 114 | unsigned short stack=m_maincpu->sp();//cpu_get_reg(M6502_S)|0x100; |
| 115 | 115 | unsigned short address= memory[stack+1]|(memory[stack+2]<<8); |
| r241937 | r241938 | |
|---|---|---|
| 1885 | 1885 | |
| 1886 | 1886 | READ32_MEMBER(gba_state::gba_bios_r) |
| 1887 | 1887 | { |
| 1888 | UINT32 *rom = | |
| 1888 | UINT32 *rom = m_region_maincpu; | |
| 1889 | 1889 | if (m_bios_hack->read()) |
| 1890 | 1890 | { |
| 1891 | 1891 | // partially patch out logo and checksum checks |
| r241937 | r241938 | |
|---|---|---|
| 256 | 256 | : driver_device(mconfig, type, tag), |
| 257 | 257 | m_maincpu(*this, "maincpu"), |
| 258 | 258 | m_cart(*this, "cartslot"), |
| 259 | m_rom(*this, "maincpu"), | |
| 259 | 260 | m_vram(*this, "vram"), |
| 260 | 261 | m_mouse_gfx(*this, "mouse_gfx"), |
| 261 | 262 | m_cart_state(IQ128_NO_CART) |
| r241937 | r241938 | |
| 263 | 264 | |
| 264 | 265 | required_device<cpu_device> m_maincpu; |
| 265 | 266 | required_device<generic_slot_device> m_cart; |
| 267 | required_region_ptr<UINT16> m_rom; | |
| 266 | 268 | required_shared_ptr<UINT16> m_vram; |
| 267 | 269 | required_shared_ptr<UINT16> m_mouse_gfx; |
| 268 | 270 | |
| r241937 | r241938 | |
| 420 | 422 | |
| 421 | 423 | WRITE16_MEMBER(geniusiq_state::gfx_idx_w) |
| 422 | 424 | { |
| 423 | UINT16 *gfx = | |
| 425 | UINT16 *gfx = m_rom + ((m_gfx_base + (data & 0xff)*32)>>1); | |
| 424 | 426 | |
| 425 | 427 | // first 16 bits are used to define the character size |
| 426 | 428 | UINT8 gfx_heigh = (gfx[0]>>0) & 0xff; |
| r241937 | r241938 | |
|---|---|---|
| 31 | 31 | m_ram(*this, "ram"){ } |
| 32 | 32 | |
| 33 | 33 | required_device<cpu_device> m_maincpu; |
| 34 | required_ | |
| 34 | required_region_ptr<UINT32> m_maincpu_region; | |
| 35 | 35 | DECLARE_READ32_MEMBER(gp2x_lcdc_r); |
| 36 | 36 | DECLARE_WRITE32_MEMBER(gp2x_lcdc_w); |
| 37 | 37 | DECLARE_READ32_MEMBER(nand_r); |
| r241937 | r241938 | |
| 203 | 203 | |
| 204 | 204 | READ32_MEMBER( gp2x_state::nand_r ) |
| 205 | 205 | { |
| 206 | UINT32 *ROM = | |
| 206 | UINT32 *ROM = m_maincpu_region; | |
| 207 | 207 | UINT32 ret; |
| 208 | 208 | |
| 209 | 209 | if (offset == 0) |
| r241937 | r241938 | |
|---|---|---|
| 68 | 68 | public: |
| 69 | 69 | pc100_state(const machine_config &mconfig, device_type type, const char *tag) |
| 70 | 70 | : driver_device(mconfig, type, tag), |
| 71 | m_maincpu(*this, "maincpu"), | |
| 72 | m_beeper(*this, "beeper"), | |
| 71 | 73 | m_rtc(*this, "rtc"), |
| 74 | m_palette(*this, "palette"), | |
| 72 | 75 | m_palram(*this, "palram"), |
| 73 | m_maincpu(*this, "maincpu"), | |
| 74 | m_beeper(*this, "beeper"), | |
| 75 | m_rtc_portc(0), | |
| 76 | m_palette(*this, "palette") | |
| 76 | m_kanji_rom(*this, "kanji"), | |
| 77 | m_vram(*this, "vram"), | |
| 78 | m_rtc_portc(0) | |
| 77 | 79 | { |
| 78 | 80 | } |
| 79 | 81 | |
| 82 | required_device<cpu_device> m_maincpu; | |
| 83 | required_device<beep_device> m_beeper; | |
| 80 | 84 | required_device<msm58321_device> m_rtc; |
| 85 | required_device<palette_device> m_palette; | |
| 81 | 86 | required_shared_ptr<UINT16> m_palram; |
| 87 | required_region_ptr<UINT16> m_kanji_rom; | |
| 88 | required_region_ptr<UINT16> m_vram; | |
| 82 | 89 | |
| 83 | 90 | DECLARE_READ16_MEMBER(pc100_vram_r); |
| 84 | 91 | DECLARE_WRITE16_MEMBER(pc100_vram_w); |
| r241937 | r241938 | |
| 100 | 107 | DECLARE_WRITE8_MEMBER(rtc_porta_w); |
| 101 | 108 | DECLARE_READ8_MEMBER(rtc_portc_r); |
| 102 | 109 | DECLARE_WRITE8_MEMBER(rtc_portc_w); |
| 103 | UINT16 *m_kanji_rom; | |
| 104 | UINT16 *m_vram; | |
| 105 | 110 | UINT16 m_kanji_addr; |
| 106 | 111 | UINT8 m_timer_mode; |
| 107 | 112 | |
| r241937 | r241938 | |
| 123 | 128 | TIMER_DEVICE_CALLBACK_MEMBER(pc100_100hz_irq); |
| 124 | 129 | TIMER_DEVICE_CALLBACK_MEMBER(pc100_50hz_irq); |
| 125 | 130 | TIMER_DEVICE_CALLBACK_MEMBER(pc100_10hz_irq); |
| 126 | required_device<cpu_device> m_maincpu; | |
| 127 | required_device<beep_device> m_beeper; | |
| 128 | 131 | |
| 132 | ||
| 129 | 133 | WRITE_LINE_MEMBER(rtc_portc_0_w) { m_rtc_portc = (m_rtc_portc & ~(1 << 0)) | ((state & 1) << 0); } |
| 130 | 134 | WRITE_LINE_MEMBER(rtc_portc_1_w) { m_rtc_portc = (m_rtc_portc & ~(1 << 1)) | ((state & 1) << 1); } |
| 131 | 135 | WRITE_LINE_MEMBER(rtc_portc_2_w) { m_rtc_portc = (m_rtc_portc & ~(1 << 2)) | ((state & 1) << 2); } |
| 132 | 136 | WRITE_LINE_MEMBER(rtc_portc_3_w) { m_rtc_portc = (m_rtc_portc & ~(1 << 3)) | ((state & 1) << 3); } |
| 133 | 137 | UINT8 m_rtc_portc; |
| 134 | required_device<palette_device> m_palette; | |
| 135 | 138 | }; |
| 136 | 139 | |
| 137 | 140 | void pc100_state::video_start() |
| r241937 | r241938 | |
| 410 | 413 | |
| 411 | 414 | void pc100_state::machine_start() |
| 412 | 415 | { |
| 413 | m_kanji_rom = (UINT16 *)(*memregion("kanji")); | |
| 414 | m_vram = (UINT16 *)(*memregion("vram")); | |
| 415 | 416 | } |
| 416 | 417 | |
| 417 | 418 | void pc100_state::machine_reset() |
| r241937 | r241938 | |
| 523 | 524 | |
| 524 | 525 | /* ROM definition */ |
| 525 | 526 | ROM_START( pc100 ) |
| 526 | ROM_REGION( 0x8000, "ipl", ROMREGION_ERASEFF ) | |
| 527 | ROM_REGION16_LE( 0x8000, "ipl", ROMREGION_ERASEFF ) | |
| 527 | 528 | ROM_LOAD( "ipl.rom", 0x0000, 0x8000, CRC(fd54a80e) SHA1(605a1b598e623ba2908a14a82454b9d32ea3c331)) |
| 528 | 529 | |
| 529 | ROM_REGION( 0x20000, "kanji", ROMREGION_ERASEFF ) | |
| 530 | ROM_REGION16_LE( 0x20000, "kanji", ROMREGION_ERASEFF ) | |
| 530 | 531 | ROM_LOAD( "kanji.rom", 0x0000, 0x20000, BAD_DUMP CRC(29298591) SHA1(d10174553ceea556fc53fc4e685d939524a4f64b)) |
| 531 | 532 | |
| 532 | ROM_REGION( 0x20000*4, "vram", ROMREGION_ERASEFF ) | |
| 533 | ROM_REGION16_LE( 0x20000*4, "vram", ROMREGION_ERASEFF ) | |
| 533 | 534 | ROM_END |
| 534 | 535 | |
| 535 | 536 | /* Driver */ |
| r241937 | r241938 | |
|---|---|---|
| 193 | 193 | |
| 194 | 194 | void pc88va_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 195 | 195 | { |
| 196 | UINT16 *tvram = (UINT16 *)( | |
| 196 | UINT16 *tvram = (UINT16 *)(memregion("tvram")->base()); | |
| 197 | 197 | int offs,i; |
| 198 | 198 | |
| 199 | 199 | offs = m_tsp.spr_offset; |
| r241937 | r241938 | |
| 569 | 569 | return 0xffff; |
| 570 | 570 | case 1: // TVRAM |
| 571 | 571 | { |
| 572 | UINT16 *tvram = (UINT16 *)( | |
| 572 | UINT16 *tvram = (UINT16 *)(memregion("tvram")->base()); | |
| 573 | 573 | |
| 574 | 574 | if(((offset*2) & 0x30000) == 0) |
| 575 | 575 | return tvram[offset]; |
| r241937 | r241938 | |
| 578 | 578 | } |
| 579 | 579 | case 4: |
| 580 | 580 | { |
| 581 | UINT16 *gvram = (UINT16 *)( | |
| 581 | UINT16 *gvram = (UINT16 *)(memregion("gvram")->base()); | |
| 582 | 582 | |
| 583 | 583 | return gvram[offset]; |
| 584 | 584 | } |
| 585 | 585 | case 8: // kanji ROM |
| 586 | 586 | case 9: |
| 587 | 587 | { |
| 588 | UINT16 *knj_ram = (UINT16 *)( | |
| 588 | UINT16 *knj_ram = (UINT16 *)(memregion("kanji")->base()); | |
| 589 | 589 | UINT32 knj_offset; |
| 590 | 590 | |
| 591 | 591 | knj_offset = (offset + (((m_bank_reg & 0x100) >> 8)*0x20000)); |
| r241937 | r241938 | |
| 600 | 600 | case 0xc: // Dictionary ROM |
| 601 | 601 | case 0xd: |
| 602 | 602 | { |
| 603 | UINT16 *dic_rom = (UINT16 *)( | |
| 603 | UINT16 *dic_rom = (UINT16 *)(memregion("dictionary")->base()); | |
| 604 | 604 | UINT32 dic_offset; |
| 605 | 605 | |
| 606 | 606 | dic_offset = (offset + (((m_bank_reg & 0x100) >> 8)*0x20000)); |
| r241937 | r241938 | |
| 620 | 620 | break; |
| 621 | 621 | case 1: // TVRAM |
| 622 | 622 | { |
| 623 | UINT16 *tvram = (UINT16 *)( | |
| 623 | UINT16 *tvram = (UINT16 *)(memregion("tvram")->base()); | |
| 624 | 624 | |
| 625 | 625 | if(((offset*2) & 0x30000) == 0) |
| 626 | 626 | COMBINE_DATA(&tvram[offset]); |
| r241937 | r241938 | |
| 628 | 628 | break; |
| 629 | 629 | case 4: // TVRAM |
| 630 | 630 | { |
| 631 | UINT16 *gvram = (UINT16 *)( | |
| 631 | UINT16 *gvram = (UINT16 *)(memregion("gvram")->base()); | |
| 632 | 632 | |
| 633 | 633 | COMBINE_DATA(&gvram[offset]); |
| 634 | 634 | } |
| r241937 | r241938 | |
| 636 | 636 | case 8: // kanji ROM, backup RAM at 0xb0000 - 0xb3fff |
| 637 | 637 | case 9: |
| 638 | 638 | { |
| 639 | UINT16 *knj_ram = (UINT16 *)( | |
| 639 | UINT16 *knj_ram = (UINT16 *)(memregion("kanji")->base()); | |
| 640 | 640 | UINT32 knj_offset; |
| 641 | 641 | |
| 642 | 642 | knj_offset = ((offset) + (((m_bank_reg & 0x100) >> 8)*0x20000)); |
| r241937 | r241938 | |
| 1213 | 1213 | |
| 1214 | 1214 | READ8_MEMBER(pc88va_state::backupram_dsw_r) |
| 1215 | 1215 | { |
| 1216 | UINT16 *knj_ram = (UINT16 *)( | |
| 1216 | UINT16 *knj_ram = (UINT16 *)(memregion("kanji")->base()); | |
| 1217 | 1217 | |
| 1218 | 1218 | if(offset == 0) |
| 1219 | 1219 | return knj_ram[(0x50000 + 0x1fc2) / 2] & 0xff; |
| r241937 | r241938 | |
|---|---|---|
| 374 | 374 | static ADDRESS_MAP_START(sgi_ip2_map, AS_PROGRAM, 32, sgi_ip2_state ) |
| 375 | 375 | AM_RANGE(0x00000000, 0x00ffffff) AM_RAM AM_SHARE("mainram") |
| 376 | 376 | AM_RANGE(0x02100000, 0x0210ffff) AM_RAM AM_SHARE("bss") // ??? I don't understand the need for this... |
| 377 | AM_RANGE(0x30000000, 0x30017fff) AM_ROM AM_REGION("u | |
| 377 | AM_RANGE(0x30000000, 0x30017fff) AM_ROM AM_REGION("maincpu", 0) | |
| 378 | 378 | AM_RANGE(0x30800000, 0x30800003) AM_READWRITE8(sgi_ip2_m_but_r, sgi_ip2_m_but_w, 0xffffffff) |
| 379 | 379 | AM_RANGE(0x31000000, 0x31000003) AM_READWRITE16(sgi_ip2_m_quad_r, sgi_ip2_m_quad_w, 0xffffffff) |
| 380 | 380 | AM_RANGE(0x31800000, 0x31800003) AM_READ16(sgi_ip2_swtch_r, 0xffffffff) |
| r241937 | r241938 | |
| 491 | 491 | |
| 492 | 492 | DRIVER_INIT_MEMBER(sgi_ip2_state,sgi_ip2) |
| 493 | 493 | { |
| 494 | UINT32 *src = (UINT32*)( | |
| 494 | UINT32 *src = (UINT32*)(memregion("maincpu")->base()); | |
| 495 | 495 | UINT32 *dst = m_mainram; |
| 496 | 496 | memcpy(dst, src, 8); |
| 497 | 497 | |
| r241937 | r241938 | |
| 505 | 505 | ***************************************************************************/ |
| 506 | 506 | |
| 507 | 507 | ROM_START( sgi_ip2 ) |
| 508 | ROM_REGION32_BE(0x18000, "u | |
| 508 | ROM_REGION32_BE(0x18000, "maincpu", 0) | |
| 509 | 509 | ROM_LOAD( "sgi-ip2-u91.nolabel.od", 0x00000, 0x8000, CRC(32e1f6b5) SHA1(2bd928c3fe2e364b9a38189158e9bad0e5271a59) ) |
| 510 | 510 | ROM_LOAD( "sgi-ip2-u92.nolabel.od", 0x08000, 0x8000, CRC(13dbfdb3) SHA1(3361fb62f7a8c429653700bccfc3e937f7508182) ) |
| 511 | 511 | ROM_LOAD( "sgi-ip2-u93.ip2.2-008.od", 0x10000, 0x8000, CRC(bf967590) SHA1(1aac48e4f5531a25c5482f64de5cd3c7a9931f11) ) |
| r241937 | r241938 | |
|---|---|---|
| 120 | 120 | m_maincpu(*this, "maincpu"), |
| 121 | 121 | m_soundcpu(*this, "soundcpu"), |
| 122 | 122 | m_cart(*this, "cartslot"), |
| 123 | m_vram(*this, "vram"), | |
| 123 | 124 | m_soundram(*this, "soundram"), |
| 124 | 125 | m_gfxdecode(*this, "gfxdecode"), |
| 125 | 126 | m_palette(*this, "palette") |
| r241937 | r241938 | |
| 130 | 131 | required_device<cpu_device> m_maincpu; |
| 131 | 132 | required_device<cpu_device> m_soundcpu; |
| 132 | 133 | required_device<generic_slot_device> m_cart; |
| 134 | ||
| 135 | required_shared_ptr<UINT16> m_vram; | |
| 136 | required_shared_ptr<UINT8> m_soundram; | |
| 137 | ||
| 133 | 138 | DECLARE_READ16_MEMBER(_68k_soundram_r); |
| 134 | 139 | DECLARE_WRITE16_MEMBER(_68k_soundram_w); |
| 135 | 140 | DECLARE_READ8_MEMBER(_6502_soundmem_r); |
| r241937 | r241938 | |
| 143 | 148 | DECLARE_WRITE16_MEMBER(sound_w); |
| 144 | 149 | DECLARE_READ16_MEMBER(video_r); |
| 145 | 150 | DECLARE_WRITE16_MEMBER(video_w); |
| 146 | DECLARE_READ16_MEMBER(vram_r); | |
| 147 | 151 | DECLARE_WRITE16_MEMBER(vram_w); |
| 148 | 152 | DECLARE_WRITE16_MEMBER(paletteram_w); |
| 149 | 153 | acan_dma_regs_t m_acan_dma_regs; |
| 150 | 154 | acan_sprdma_regs_t m_acan_sprdma_regs; |
| 151 | 155 | |
| 152 | 156 | UINT16 m_m6502_reset; |
| 153 | required_shared_ptr<UINT8> m_soundram; | |
| 154 | 157 | UINT8 m_soundlatch; |
| 155 | 158 | UINT8 m_soundcpu_irq_src; |
| 156 | 159 | UINT8 m_sound_irq_enable_reg; |
| r241937 | r241938 | |
| 161 | 164 | emu_timer *m_hbl_timer; |
| 162 | 165 | emu_timer *m_line_on_timer; |
| 163 | 166 | emu_timer *m_line_off_timer; |
| 164 | UINT16 *m_vram; | |
| 165 | UINT16 *m_vram_swapped; | |
| 166 | UINT8 *m_vram_addr_swapped; | |
| 167 | 167 | |
| 168 | dynamic_buffer m_vram_addr_swapped; | |
| 169 | ||
| 168 | 170 | UINT16 *m_pram; |
| 169 | 171 | |
| 170 | 172 | UINT16 m_sprite_count; |
| r241937 | r241938 | |
| 428 | 430 | { |
| 429 | 431 | m_sprite_final_bitmap.allocate(1024, 1024, BITMAP_FORMAT_IND16); |
| 430 | 432 | |
| 431 | m_vram = (UINT16*)(*memregion("ram_gfx")); | |
| 432 | m_vram_swapped = (UINT16*)(*memregion("ram_gfx2")); | |
| 433 | m_vram_addr_swapped = (UINT8*)(*memregion("ram_gfx3")); // hack for 1bpp layer at startup | |
| 433 | m_vram_addr_swapped.resize(0x20000); // hack for 1bpp layer at startup | |
| 434 | m_gfxdecode->gfx(4)->set_source(m_vram_addr_swapped); | |
| 435 | m_gfxdecode->gfx(4)->set_xormask(0); | |
| 434 | 436 | |
| 435 | 437 | m_tilemap_sizes[0][0] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(supracan_state::get_supracan_tilemap0_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); |
| 436 | 438 | m_tilemap_sizes[0][1] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(supracan_state::get_supracan_tilemap0_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); |
| r241937 | r241938 | |
| 1095 | 1097 | m_vram_addr_swapped[swapped_offset] = byte; |
| 1096 | 1098 | } |
| 1097 | 1099 | |
| 1098 | ||
| 1099 | READ16_MEMBER( supracan_state::vram_r ) | |
| 1100 | { | |
| 1101 | return m_vram[offset]; | |
| 1102 | } | |
| 1103 | ||
| 1104 | ||
| 1105 | 1100 | WRITE16_MEMBER( supracan_state::vram_w ) |
| 1106 | 1101 | { |
| 1107 | 1102 | COMBINE_DATA(&m_vram[offset]); |
| 1108 | 1103 | |
| 1109 | // store a byteswapped vesrion for easier gfx-decode | |
| 1110 | data = m_vram[offset]; | |
| 1111 | data = ((data & 0x00ff)<<8) | ((data & 0xff00)>>8); | |
| 1112 | m_vram_swapped[offset] = data; | |
| 1113 | ||
| 1114 | 1104 | // hack for 1bpp layer at startup |
| 1115 | write_swapped_byte(offset*2+1, (data & 0xff00)>>8); | |
| 1116 | write_swapped_byte(offset*2, (data & 0x00ff)); | |
| 1105 | write_swapped_byte(offset*2, (data & 0xff00)>>8); | |
| 1106 | write_swapped_byte(offset*2+1, (data & 0x00ff)); | |
| 1117 | 1107 | |
| 1118 | 1108 | // mark tiles of each depth as dirty |
| 1119 | 1109 | m_gfxdecode->gfx(0)->mark_dirty((offset*2)/(64)); |
| r241937 | r241938 | |
| 1137 | 1127 | |
| 1138 | 1128 | AM_RANGE( 0xf00000, 0xf001ff ) AM_READWRITE(video_r, video_w) |
| 1139 | 1129 | AM_RANGE( 0xf00200, 0xf003ff ) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 1140 | AM_RANGE( 0xf40000, 0xf5ffff ) AM_R | |
| 1130 | AM_RANGE( 0xf40000, 0xf5ffff ) AM_RAM_WRITE(vram_w) AM_SHARE("vram") | |
| 1141 | 1131 | AM_RANGE( 0xfc0000, 0xfdffff ) AM_MIRROR(0x30000) AM_RAM /* System work ram */ |
| 1142 | 1132 | ADDRESS_MAP_END |
| 1143 | 1133 | |
| r241937 | r241938 | |
| 1863 | 1853 | |
| 1864 | 1854 | |
| 1865 | 1855 | static GFXDECODE_START( supracan ) |
| 1866 | GFXDECODE_ENTRY( "ram_gfx2", 0, supracan_gfx8bpp, 0, 1 ) | |
| 1867 | GFXDECODE_ENTRY( "ram_gfx2", 0, supracan_gfx4bpp, 0, 0x10 ) | |
| 1868 | GFXDECODE_ENTRY( "ram_gfx2", 0, supracan_gfx2bpp, 0, 0x40 ) | |
| 1869 | GFXDECODE_ENTRY( "ram_gfx2", 0, supracan_gfx1bpp, 0, 0x80 ) | |
| 1870 | GFXDECODE_ENTRY( "ram_gfx3", 0, supracan_gfx1bpp_alt, 0, 0x80 ) | |
| 1856 | GFXDECODE_RAM( "vram", 0, supracan_gfx8bpp, 0, 1 ) | |
| 1857 | GFXDECODE_RAM( "vram", 0, supracan_gfx4bpp, 0, 0x10 ) | |
| 1858 | GFXDECODE_RAM( "vram", 0, supracan_gfx2bpp, 0, 0x40 ) | |
| 1859 | GFXDECODE_RAM( "vram", 0, supracan_gfx1bpp, 0, 0x80 ) | |
| 1860 | GFXDECODE_RAM( "vram", 0, supracan_gfx1bpp_alt, 0, 0x80 ) | |
| 1871 | 1861 | GFXDECODE_END |
| 1872 | 1862 | |
| 1873 | 1863 | INTERRUPT_GEN_MEMBER(supracan_state::supracan_irq) |
| r241937 | r241938 | |
| 1931 | 1921 | |
| 1932 | 1922 | |
| 1933 | 1923 | ROM_START( supracan ) |
| 1934 | ROM_REGION( 0x20000, "ram_gfx", ROMREGION_ERASEFF ) | |
| 1935 | ROM_REGION( 0x20000, "ram_gfx2", ROMREGION_ERASEFF ) | |
| 1936 | ROM_REGION( 0x20000, "ram_gfx3", ROMREGION_ERASEFF ) | |
| 1937 | 1924 | ROM_END |
| 1938 | 1925 | |
| 1939 | 1926 |
| r241937 | r241938 | |
|---|---|---|
| 29 | 29 | : driver_device(mconfig, type, tag), |
| 30 | 30 | m_maincpu(*this, "maincpu"), |
| 31 | 31 | m_flash(*this, "flash"), |
| 32 | m_speaker(*this, "speaker") | |
| 32 | m_speaker(*this, "speaker"), | |
| 33 | m_bios(*this, "bios") | |
| 33 | 34 | { } |
| 34 | 35 | |
| 35 | 36 | required_device<lc8670_cpu_device> m_maincpu; |
| 36 | 37 | required_device<intelfsh8_device> m_flash; |
| 37 | 38 | required_device<speaker_sound_device> m_speaker; |
| 39 | required_region_ptr<UINT8> m_bios; | |
| 38 | 40 | |
| 39 | 41 | DECLARE_PALETTE_INIT(svmu); |
| 40 | 42 | virtual void machine_reset(); |
| r241937 | r241938 | |
| 48 | 50 | DECLARE_QUICKLOAD_LOAD_MEMBER( svmu ); |
| 49 | 51 | |
| 50 | 52 | private: |
| 51 | UINT8 * m_bios; | |
| 52 | 53 | UINT8 m_page; |
| 53 | 54 | }; |
| 54 | 55 | |
| r241937 | r241938 | |
| 145 | 146 | |
| 146 | 147 | void svmu_state::machine_reset() |
| 147 | 148 | { |
| 148 | m_bios = (UINT8*)(*memregion("bios")); | |
| 149 | 149 | m_page = 0; |
| 150 | 150 | } |
| 151 | 151 |
| r241937 | r241938 | |
|---|---|---|
| 426 | 426 | |
| 427 | 427 | void ti68k_state::machine_start() |
| 428 | 428 | { |
| 429 | m_rom_base = (UINT16 *)(*memregion("flash")); | |
| 430 | 429 | int i; |
| 431 | 430 | |
| 432 | 431 | m_flash_mem = !((m_rom_base[0x32] & 0x0f) != 0); |
| r241937 | r241938 | |
|---|---|---|
| 51 | 51 | #define TMS9901_TAG "tms9901" |
| 52 | 52 | #define SGCPU_TAG "sgcpu" |
| 53 | 53 | |
| 54 | #define SAMSMEM_TAG "samsmem" | |
| 55 | #define PADMEM_TAG "padmem" | |
| 56 | ||
| 57 | 54 | #define VERBOSE 1 |
| 58 | 55 | #define LOG logerror |
| 59 | 56 | |
| r241937 | r241938 | |
| 127 | 124 | UINT16 *m_rom6b; |
| 128 | 125 | |
| 129 | 126 | // AMS RAM (1 Mib) |
| 130 | UINT16 | |
| 127 | dynamic_array<UINT16> m_ram; | |
| 131 | 128 | |
| 132 | 129 | // Scratch pad ram (1 KiB) |
| 133 | UINT16 | |
| 130 | dynamic_array<UINT16> m_scratchpad; | |
| 134 | 131 | |
| 135 | 132 | // First joystick. 6 for TI-99/4A |
| 136 | 133 | int m_firstjoy; |
| r241937 | r241938 | |
| 814 | 811 | |
| 815 | 812 | void ti99_4p_state::machine_start() |
| 816 | 813 | { |
| 817 | m_ram = (UINT16*)(*memregion(SAMSMEM_TAG)); | |
| 818 | m_scratchpad = (UINT16*)(*memregion(PADMEM_TAG)); | |
| 814 | m_ram.resize(0x80000/2); | |
| 815 | m_scratchpad.resize(0x400/2); | |
| 819 | 816 | |
| 820 | 817 | m_peribox->senila(CLEAR_LINE); |
| 821 | 818 | m_peribox->senilb(CLEAR_LINE); |
| r241937 | r241938 | |
| 824 | 821 | |
| 825 | 822 | m_ready_line = m_ready_line_dmux = ASSERT_LINE; |
| 826 | 823 | |
| 827 | UINT16 *rom = (UINT16*)( | |
| 824 | UINT16 *rom = (UINT16*)(memregion("maincpu")->base()); | |
| 828 | 825 | m_rom0 = rom + 0x2000; |
| 829 | 826 | m_dsr = rom + 0x6000; |
| 830 | 827 | m_rom6a = rom + 0x3000; |
| r241937 | r241938 | |
| 915 | 912 | ROM_REGION16_BE(0x10000, "maincpu", 0) |
| 916 | 913 | ROM_LOAD16_BYTE("sgcpu_hb.bin", 0x0000, 0x8000, CRC(aa100730) SHA1(35e585b2dcd3f2a0005bebb15ede6c5b8c787366) ) /* system ROMs */ |
| 917 | 914 | ROM_LOAD16_BYTE("sgcpu_lb.bin", 0x0001, 0x8000, CRC(2a5dc818) SHA1(dec141fe2eea0b930859cbe1ebd715ac29fa8ecb) ) /* system ROMs */ |
| 918 | ROM_REGION16_BE(0x080000, SAMSMEM_TAG, 0) | |
| 919 | ROM_FILL(0x000000, 0x080000, 0x0000) | |
| 920 | ROM_REGION16_BE(0x0400, PADMEM_TAG, 0) | |
| 921 | ROM_FILL(0x000000, 0x0400, 0x0000) | |
| 922 | 915 | ROM_END |
| 923 | 916 | |
| 924 | 917 | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ |
| r241937 | r241938 | |
|---|---|---|
| 241 | 241 | |
| 242 | 242 | DRIVER_INIT_MEMBER(tsispch_state,prose2k) |
| 243 | 243 | { |
| 244 | UINT8 *dspsrc = (UINT8 *)(*memregion("dspprgload")); | |
| 245 | UINT32 *dspprg = (UINT32 *)(*memregion("dspprg")); | |
| 244 | UINT8 *dspsrc = (UINT8 *)(memregion("dspprgload")->base()); | |
| 245 | UINT32 *dspprg = (UINT32 *)(memregion("dspprg")->base()); | |
| 246 | 246 | fprintf(stderr,"driver init\n"); |
| 247 | 247 | // unpack 24 bit 7720 data into 32 bit space and shuffle it so it can run as 7725 code |
| 248 | 248 | // data format as-is in dspsrc: (L = always 0, X = doesn't matter) |
| r241937 | r241938 | |
|---|---|---|
| 1541 | 1541 | { |
| 1542 | 1542 | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 1543 | 1543 | /* Install RAM handlers */ |
| 1544 | m_spriteram = (UINT16*)( | |
| 1544 | m_spriteram = (UINT16*)(memregion("user1")->base()); | |
| 1545 | 1545 | space.install_readwrite_bank(0x000000,m_ram->size()-1,0xffffffff,0,"bank1"); |
| 1546 | 1546 | membank("bank1")->set_base(m_ram->pointer()); |
| 1547 | 1547 |
| r241937 | r241938 | |
|---|---|---|
| 45 | 45 | private: |
| 46 | 46 | static const device_timer_id TIMER_DAC_UPDATE = 1; |
| 47 | 47 | required_device<dac_device> m_dac; |
| 48 | required_region_ptr<INT8> m_samples; | |
| 48 | 49 | |
| 49 | 50 | emu_timer * m_dac_update_timer; |
| 50 | INT8 * m_samples; | |
| 51 | 51 | bool m_output_active; |
| 52 | 52 | int m_count; |
| 53 | 53 | int m_shift; |
| r241937 | r241938 | |
|---|---|---|
| 268 | 268 | void draw_modes(int mode, int submode, int y, UINT32* line0, UINT32* line1, UINT32* line2, UINT32* line3, UINT32* lineOBJ, UINT32* lineOBJWin, UINT32* lineMix, int bpp); |
| 269 | 269 | |
| 270 | 270 | protected: |
| 271 | required_ | |
| 271 | required_region_ptr<UINT32> m_region_maincpu; | |
| 272 | 272 | required_ioport m_io_inputs; |
| 273 | 273 | required_ioport m_bios_hack; |
| 274 | 274 | }; |
| r241937 | r241938 | |
|---|---|---|
| 18 | 18 | : driver_device(mconfig, type, tag), |
| 19 | 19 | m_maincpu(*this, "maincpu"), |
| 20 | 20 | m_flash(*this, "flash"), |
| 21 | m_rom_base(*this, "flash"), | |
| 21 | 22 | m_io_bit0(*this, "BIT0"), |
| 22 | 23 | m_io_bit1(*this, "BIT1"), |
| 23 | 24 | m_io_bit2(*this, "BIT2"), |
| r241937 | r241938 | |
| 30 | 31 | |
| 31 | 32 | required_device<cpu_device> m_maincpu; |
| 32 | 33 | required_device<sharp_unk128mbit_device> m_flash; |
| 34 | required_region_ptr<UINT16> m_rom_base; | |
| 33 | 35 | required_ioport m_io_bit0; |
| 34 | 36 | required_ioport m_io_bit1; |
| 35 | 37 | required_ioport m_io_bit2; |
| r241937 | r241938 | |
| 47 | 49 | bool m_flash_mem; |
| 48 | 50 | UINT32 m_initial_pc; |
| 49 | 51 | |
| 50 | UINT16 *m_rom_base; | |
| 51 | ||
| 52 | 52 | // keyboard |
| 53 | 53 | UINT16 m_kb_mask; |
| 54 | 54 | UINT8 m_on_key; |
| https://github.com/mamedev/mame/commit/d68a3a45b3dfc13f92096c0b7d58a49a2ef75f68 |
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