trunk/src/emu/cpu/upd7810/upd7810.c
| r241825 | r241826 | |
| 862 | 862 | } |
| 863 | 863 | } |
| 864 | 864 | |
| 865 | | void upd7810_device::upd7810_co0_output_change() |
| 866 | | { |
| 867 | | /* Output LV0 Content to CO0 */ |
| 868 | | CO0 = LV0; |
| 869 | | |
| 870 | | /* LV0 Level Inversion */ |
| 871 | | if (EOM & 0x02) |
| 872 | | LV0 ^= 1; |
| 873 | | |
| 874 | | m_co0_func(CO0); |
| 875 | | } |
| 876 | | void upd7810_device::upd7810_co1_output_change() |
| 877 | | { |
| 878 | | /* Output LV1 Content to CO1 */ |
| 879 | | CO1 = LV1; |
| 880 | | |
| 881 | | /* LV1 Level Inversion */ |
| 882 | | if (EOM & 0x20) |
| 883 | | LV1 ^= 1; |
| 884 | | |
| 885 | | m_co1_func(CO1); |
| 886 | | } |
| 887 | | |
| 888 | 865 | void upd7810_device::upd7810_write_EOM() |
| 889 | 866 | { |
| 890 | | switch (EOM & 0x0c) |
| 867 | if (EOM & 0x01) /* output LV0 content */ |
| 891 | 868 | { |
| 892 | | case 0x04: /* To Reset LV0 */ |
| 893 | | LV0 = 0; |
| 894 | | EOM &= 0xfb; /* LRE0 is reset to 0 */ |
| 895 | | break; |
| 896 | | case 0x08: /* To Set LV0 */ |
| 897 | | LV0 = 1; |
| 898 | | EOM &= 0xf7; /* LRE1 is reset to 0 */ |
| 899 | | break; |
| 869 | switch (EOM & 0x0e) |
| 870 | { |
| 871 | case 0x02: /* toggle CO0 */ |
| 872 | CO0 ^= 1; |
| 873 | break; |
| 874 | case 0x04: /* reset CO0 */ |
| 875 | CO0 = 0; |
| 876 | EOM &= 0xfb; /* LRE0 is reset t0 0 */ |
| 877 | break; |
| 878 | case 0x08: /* set CO0 */ |
| 879 | CO0 = 1; |
| 880 | EOM &= 0xf7; /* LRE1 is reset t0 0 */ |
| 881 | break; |
| 882 | } |
| 883 | EOM &= 0xfe; /* LO0 is reset t0 0 */ |
| 884 | m_co0_func(CO0); |
| 900 | 885 | } |
| 901 | | /* Output LV0 Content */ |
| 902 | | if (EOM & 0x01) { |
| 903 | | upd7810_co0_output_change(); |
| 904 | | EOM &= 0xfe; /* LO0 is reset to 0 */ |
| 905 | | } |
| 906 | | |
| 907 | | switch (EOM & 0xc0) |
| 886 | if (EOM & 0x10) /* output LV1 content */ |
| 908 | 887 | { |
| 909 | | case 0x40: /* To Reset LV1 */ |
| 910 | | LV1 = 0; |
| 911 | | EOM &= 0xbf; /* LRE2 is reset to 0 */ |
| 912 | | break; |
| 913 | | case 0x80: /* To Set LV1 */ |
| 914 | | LV1 = 1; |
| 915 | | EOM &= 0x7f; /* LRE3 is reset to 0 */ |
| 916 | | break; |
| 888 | switch (EOM & 0xe0) |
| 889 | { |
| 890 | case 0x20: /* toggle CO1 */ |
| 891 | CO1 ^= 1; |
| 892 | break; |
| 893 | case 0x40: /* reset CO1 */ |
| 894 | CO1 = 0; |
| 895 | EOM &= 0xbf; /* LRE2 is reset t0 0 */ |
| 896 | break; |
| 897 | case 0x80: /* set CO1 */ |
| 898 | CO1 = 1; |
| 899 | EOM &= 0x7f; /* LRE3 is reset t0 0 */ |
| 900 | break; |
| 901 | } |
| 902 | EOM &= 0xef; /* LO1 is reset t0 0 */ |
| 903 | m_co1_func(CO1); |
| 917 | 904 | } |
| 918 | | /* Output LV1 Content */ |
| 919 | | if (EOM & 0x10) { |
| 920 | | upd7810_co1_output_change(); |
| 921 | | EOM &= 0xef; /* LO1 is reset to 0 */ |
| 922 | | } |
| 923 | 905 | } |
| 924 | 906 | |
| 925 | 907 | void upd7810_device::upd7810_write_TXB() |
| r241825 | r241826 | |
| 1349 | 1331 | ((0x20 == (ETMM & 0x30)) && (ETM0 == ECNT)) || /* set CO0 if ECNT == ETM0 or at falling CI input */ |
| 1350 | 1332 | ((0x30 == (ETMM & 0x30)) && (ETM0 == ECNT || ETM1 == ECNT))) /* latch CO0 if ECNT == ETM0 or ECNT == ETM1 */ |
| 1351 | 1333 | { |
| 1352 | | upd7810_co0_output_change(); |
| 1334 | if (EOM & 0x02) { |
| 1335 | /* toggle CO0 */ |
| 1336 | CO0 ^= 1; |
| 1337 | m_co0_func(CO0); |
| 1338 | } |
| 1353 | 1339 | } |
| 1354 | 1340 | /* Conditions When ECNT Causes a CO1 Output Change */ |
| 1355 | 1341 | if (((0x00 == (ETMM & 0xc0)) && (ETM1 == ECNT)) || /* set CO1 if ECNT == ETM1 */ |
| r241825 | r241826 | |
| 1357 | 1343 | ((0x80 == (ETMM & 0xc0)) && (ETM1 == ECNT)) || /* set CO1 if ECNT == ETM1 or at falling CI input */ |
| 1358 | 1344 | ((0xc0 == (ETMM & 0xc0)) && (ETM0 == ECNT || ETM1 == ECNT))) /* latch CO1 if ECNT == ETM0 or ECNT == ETM1 */ |
| 1359 | 1345 | { |
| 1360 | | upd7810_co1_output_change(); |
| 1346 | if (EOM & 0x20) { |
| 1347 | /* toggle CO1 */ |
| 1348 | CO1 ^= 1; |
| 1349 | m_co1_func(CO1); |
| 1350 | } |
| 1361 | 1351 | } |
| 1362 | 1352 | /* How and When ECNT is Cleared */ |
| 1363 | 1353 | switch (ETMM & 0x0c) |
| r241825 | r241826 | |
| 1617 | 1607 | save_item(NAME(m_ti)); |
| 1618 | 1608 | save_item(NAME(m_to)); |
| 1619 | 1609 | save_item(NAME(m_ci)); |
| 1620 | | save_item(NAME(m_lv0)); |
| 1621 | | save_item(NAME(m_lv1)); |
| 1622 | 1610 | save_item(NAME(m_co0)); |
| 1623 | 1611 | save_item(NAME(m_co1)); |
| 1624 | 1612 | save_item(NAME(m_irr)); |
| r241825 | r241826 | |
| 1689 | 1677 | state_add( UPD7810_TI, "TI", m_ti).formatstr("%3u"); |
| 1690 | 1678 | state_add( UPD7810_TO, "TO", m_to).formatstr("%3u"); |
| 1691 | 1679 | state_add( UPD7810_CI, "CI", m_ci).formatstr("%3u"); |
| 1692 | | state_add( UPD7810_LV0, "LV0", m_lv0).formatstr("%3u"); |
| 1693 | | state_add( UPD7810_LV1, "LV1", m_lv1).formatstr("%3u"); |
| 1694 | 1680 | state_add( UPD7810_CO0, "CO0", m_co0).formatstr("%3u"); |
| 1695 | 1681 | state_add( UPD7810_CO1, "CO1", m_co1).formatstr("%3u"); |
| 1696 | 1682 | |
| r241825 | r241826 | |
| 1808 | 1794 | m_ti = 0; |
| 1809 | 1795 | m_to = 0; |
| 1810 | 1796 | m_ci = 0; |
| 1811 | | m_lv0 = 0; |
| 1812 | | m_lv1 = 0; |
| 1813 | 1797 | m_co0 = 0; |
| 1814 | 1798 | m_co1 = 0; |
| 1815 | 1799 | m_irr = 0; |
trunk/src/mame/drivers/peplus.c
| r241825 | r241826 | |
| 1674 | 1674 | % Range: 86.8-88.8% Optimum: 90.8% Hit Frequency: 49.1% |
| 1675 | 1675 | Programs Available: PP0042, X000042P |
| 1676 | 1676 | */ |
| 1677 | | ROM_REGION( 0x10000, "maincpu", 0 ) /* 10/22/91 @IGT */ |
| 1678 | | ROM_LOAD( "pp0042_768-761.u68", 0x00000, 0x10000, CRC(424def20) SHA1(4a0c142d907c0651eef3eb0de57e6212ec268005) ) /* Game Version: 768, Library Version: 761, Video Lib Ver: 761 */ |
| 1677 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 1678 | ROM_LOAD( "pp0042_768-761.u68", 0x00000, 0x10000, CRC(424def20) SHA1(4a0c142d907c0651eef3eb0de57e6212ec268005) ) /* Game Version: 768, Library Version: 761 */ |
| 1679 | 1679 | |
| 1680 | 1680 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| 1681 | 1681 | ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) ) |
| r241825 | r241826 | |
| 2047 | 2047 | Programs Available: PP0060, X000060P & PP0420 - Non Double-up Only |
| 2048 | 2048 | */ |
| 2049 | 2049 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2050 | | ROM_LOAD( "pp0060_a45-a74.u68", 0x00000, 0x10000, CRC(5d9e6c2f) SHA1(e1199a1fa57d84223ca87ea5b6ce4fda9afa0e1f) ) /* Game Version: A45, Library Version: A74 */ |
| 2050 | ROM_LOAD( "pp0060_a6h-a8h.u68", 0x00000, 0x10000, CRC(81963084) SHA1(2493bb040b9d0ea5cfe77f8d07546d3a3ac3716a) ) /* Game Version: A6H, Library Version: A8H */ |
| 2051 | 2051 | |
| 2052 | 2052 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| 2053 | | ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) ) |
| 2054 | | ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) ) |
| 2055 | | ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) ) |
| 2056 | | ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) ) |
| 2053 | ROM_LOAD( "mro-cg2002.u72", 0x00000, 0x8000, CRC(d9d03979) SHA1(9729cbb2e5472eb652f8f549dd85047abe11cae0) ) |
| 2054 | ROM_LOAD( "mgo-cg2002.u73", 0x08000, 0x8000, CRC(ad5bd2cd) SHA1(e5dacd2827f14dd9811311552b7e3816a36b9284) ) |
| 2055 | ROM_LOAD( "mbo-cg2002.u74", 0x10000, 0x8000, CRC(7362f7f3) SHA1(fce4ce2cdd836e37382d39d8b167019cfc4c6166) ) |
| 2056 | ROM_LOAD( "mxo-cg2002.u75", 0x18000, 0x8000, CRC(4560fdec) SHA1(63ec67afd378a06d74084bba72fbbe9be12e24d3) ) |
| 2057 | 2057 | |
| 2058 | 2058 | ROM_REGION( 0x100, "proms", 0 ) |
| 2059 | 2059 | ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */ |
| r241825 | r241826 | |
| 2068 | 2068 | Programs Available: PP0060, X000060P & PP0420 - Non Double-up Only |
| 2069 | 2069 | */ |
| 2070 | 2070 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2071 | | ROM_LOAD( "pp0060_979-a0c.u68", 0x00000, 0x10000, CRC(adedfcfd) SHA1(f974a9c51d4e53c2c44a4c5214d39557d3a36d99) ) /* Game Version: 979, Library Version: A0C */ |
| 2071 | ROM_LOAD( "pp0060_a45-a74.u68", 0x00000, 0x10000, CRC(5d9e6c2f) SHA1(e1199a1fa57d84223ca87ea5b6ce4fda9afa0e1f) ) /* Game Version: A45, Library Version: A74 */ |
| 2072 | 2072 | |
| 2073 | 2073 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| 2074 | 2074 | ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) ) |
| r241825 | r241826 | |
| 2080 | 2080 | ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */ |
| 2081 | 2081 | ROM_END |
| 2082 | 2082 | |
| 2083 | | ROM_START( pepp0060b ) /* Normal board : Standard Draw Poker (PP0060) - Cruise version - Tournament Mode capable */ |
| 2083 | ROM_START( pepp0060b ) /* Normal board : Standard Draw Poker (PP0060) */ |
| 2084 | 2084 | /* |
| 2085 | 2085 | PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus) |
| 2086 | 2086 | ---------------------------------------------------------- |
| r241825 | r241826 | |
| 2088 | 2088 | % Range: 91.0-93.0% Optimum: 95.0% Hit Frequency: 45.5% |
| 2089 | 2089 | Programs Available: PP0060, X000060P & PP0420 - Non Double-up Only |
| 2090 | 2090 | */ |
| 2091 | | ROM_REGION( 0x10000, "maincpu", 0 ) /* 11/13/97 @IGT CRUIS */ |
| 2092 | | ROM_LOAD( "pp0060_a6h-a8h.u68", 0x00000, 0x10000, CRC(81963084) SHA1(2493bb040b9d0ea5cfe77f8d07546d3a3ac3716a) ) /* Game Version: A6H, Library Version: A8H */ |
| 2091 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2092 | ROM_LOAD( "pp0060_979-a0c.u68", 0x00000, 0x10000, CRC(adedfcfd) SHA1(f974a9c51d4e53c2c44a4c5214d39557d3a36d99) ) /* Game Version: 979, Library Version: A0C */ |
| 2093 | 2093 | |
| 2094 | 2094 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| 2095 | | ROM_LOAD( "mro-cg2002.u72", 0x00000, 0x8000, CRC(d9d03979) SHA1(9729cbb2e5472eb652f8f549dd85047abe11cae0) ) /* 08/30/94 @IGT CRUIS */ |
| 2096 | | ROM_LOAD( "mgo-cg2002.u73", 0x08000, 0x8000, CRC(ad5bd2cd) SHA1(e5dacd2827f14dd9811311552b7e3816a36b9284) ) |
| 2097 | | ROM_LOAD( "mbo-cg2002.u74", 0x10000, 0x8000, CRC(7362f7f3) SHA1(fce4ce2cdd836e37382d39d8b167019cfc4c6166) ) |
| 2098 | | ROM_LOAD( "mxo-cg2002.u75", 0x18000, 0x8000, CRC(4560fdec) SHA1(63ec67afd378a06d74084bba72fbbe9be12e24d3) ) |
| 2095 | ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) ) |
| 2096 | ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) ) |
| 2097 | ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) ) |
| 2098 | ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) ) |
| 2099 | 2099 | |
| 2100 | 2100 | ROM_REGION( 0x100, "proms", 0 ) |
| 2101 | 2101 | ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */ |
| r241825 | r241826 | |
| 2230 | 2230 | % Range: 93.8-95.8% Optimum: 97.8% Hit Frequency: 45.3% |
| 2231 | 2231 | Programs Available: PP0116 |
| 2232 | 2232 | */ |
| 2233 | |
| 2233 | 2234 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2234 | 2235 | ROM_LOAD( "pp0116_554-544.u68", 0x00000, 0x8000, CRC(27aba06b) SHA1(7976a2b2577c28e332091cbbcb4c7d53ffbea827) ) /* Game Version: 554, Library Version: 544, Video Lib Ver: 544 */ |
| 2235 | 2236 | ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */ |
| r241825 | r241826 | |
| 2252 | 2253 | % Range: 95.5-97.5% Optimum: 99.5% Hit Frequency: 45.5% |
| 2253 | 2254 | Programs Available: PP0118 |
| 2254 | 2255 | */ |
| 2256 | |
| 2255 | 2257 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2256 | 2258 | ROM_LOAD( "pp0118_554-544.u68", 0x00000, 0x8000, CRC(4025cb30) SHA1(742bfba5dbd8a3e38665045f84fd90e19e94d1f5) ) /* Game Version: 554, Library Version: 544, Video Lib Ver: 544 */ |
| 2257 | 2259 | ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */ |
| r241825 | r241826 | |
| 2278 | 2280 | Same payout as P59A (PP0124 / X000124P, Deuces Wild Poker) just swapping Sevens for Deuces |
| 2279 | 2281 | |
| 2280 | 2282 | */ |
| 2283 | |
| 2281 | 2284 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 2282 | 2285 | ROM_LOAD( "pp0120_576-569.u68", 0x00000, 0x8000, CRC(4491be19) SHA1(cf8146a6ade1abb2e1ac9f0f3923e2be865f2fec) ) /* Game Version: 576, Library Version: 569, Video Lib Ver: 569 */ |
| 2283 | 2286 | ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */ |
| r241825 | r241826 | |
| 2816 | 2819 | ROM_LOAD( "pp0219_689-654.u68", 0x00000, 0x10000, CRC(2cd5cd21) SHA1(614264f0e346146420b44ebe9dc93b0799a70b5d) ) /* Game Version: 689, Library Version: 654 */ |
| 2817 | 2820 | |
| 2818 | 2821 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| 2819 | | ROM_LOAD( "mro-cg904.u72", 0x00000, 0x8000, CRC(75bac43f) SHA1(8e7bfba95aa6e027cdaf0d1535e5c630ee2f56d3) ) /* 02/26/90 @IGT INT */ |
| 2822 | ROM_LOAD( "mro-cg904.u72", 0x00000, 0x8000, CRC(75bac43f) SHA1(8e7bfba95aa6e027cdaf0d1535e5c630ee2f56d3) ) |
| 2820 | 2823 | ROM_LOAD( "mgo-cg904.u73", 0x08000, 0x8000, CRC(1222d844) SHA1(854eb790d5b5a5cfe8148e8b95e3ba3f06f33dce) ) |
| 2821 | 2824 | ROM_LOAD( "mbo-cg904.u74", 0x10000, 0x8000, CRC(0bf0168f) SHA1(254cef934a0d30c5a18a0b4773bb364fc21f8113) ) |
| 2822 | 2825 | ROM_LOAD( "mxo-cg904.u75", 0x18000, 0x8000, CRC(ff648f12) SHA1(58f8247a997e1b0b69bafed428d30822adef339e) ) |
| r241825 | r241826 | |
| 3380 | 3383 | % Range: 89.8-91.8% Optimum: 93.8% Hit Frequency: 37.6% |
| 3381 | 3384 | Programs Available: PP0458, X000458P & PP0429 - Non Double-up Only |
| 3382 | 3385 | */ |
| 3383 | | ROM_REGION( 0x10000, "maincpu", 0 ) /* 05/17/93 @IGT INT */ |
| 3386 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 3384 | 3387 | ROM_LOAD( "pp0429_896-914.u68", 0x00000, 0x10000, CRC(f6de62b2) SHA1(6cc9c5dd83afbe0724b4c3905e231b50925b649a) ) /* Game Version: 896, Library Version: 914 */ |
| 3385 | 3388 | |
| 3386 | 3389 | ROM_REGION( 0x020000, "gfx1", 0 ) |
| r241825 | r241826 | |
| 8906 | 8909 | GAMEL(1987, pepp0059a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0059) Two Pair or Better (set 2)", 0, layout_pe_poker ) |
| 8907 | 8910 | GAMEL(1987, pepp0060, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 1)", 0, layout_pe_poker ) |
| 8908 | 8911 | GAMEL(1987, pepp0060a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 2)", 0, layout_pe_poker ) |
| 8909 | | GAMEL(1987, pepp0060b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (Cruise)", 0, layout_pe_poker ) |
| 8912 | GAMEL(1987, pepp0060b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 3)", 0, layout_pe_poker ) |
| 8910 | 8913 | GAMEL(1987, pepp0063, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0063) 10's or Better", 0, layout_pe_poker ) |
| 8911 | 8914 | GAMEL(1987, pepp0064, pepp0053, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0064) Joker Poker", 0, layout_pe_poker ) |
| 8912 | 8915 | GAMEL(1987, pepp0065, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0065) Joker Poker (Aces or Better)", 0, layout_pe_poker ) |