trunk/src/mess/drivers/pc9801.c
r241788 | r241789 | |
16 | 16 | - EGC |
17 | 17 | - rewrite using slot devices |
18 | 18 | - some later SWs put "Invalid command byte 05" (Absolutely Mahjong on Epson logo) |
19 | | - Basic games are mostly untested, but I think that upd7220 fails on those (Adventureland, Xevious) |
20 | 19 | - investigate on POR bit |
21 | | - 2dd bios tries to use dma channel 2 |
| 20 | - test 2dd more |
22 | 21 | |
23 | 22 | TODO (PC-9801RS): |
24 | 23 | - extra features; |
r241788 | r241789 | |
456 | 455 | m_ide(*this, "ide"), |
457 | 456 | m_video_ram_1(*this, "video_ram_1"), |
458 | 457 | m_video_ram_2(*this, "video_ram_2"), |
| 458 | m_ext_gvram(*this, "ext_gvram"), |
459 | 459 | m_beeper(*this, "beeper"), |
460 | 460 | m_ram(*this, RAM_TAG), |
461 | 461 | m_gfxdecode(*this, "gfxdecode"), |
r241788 | r241789 | |
483 | 483 | optional_device<ata_interface_device> m_ide; |
484 | 484 | required_shared_ptr<UINT8> m_video_ram_1; |
485 | 485 | required_shared_ptr<UINT8> m_video_ram_2; |
| 486 | optional_shared_ptr<UINT8> m_ext_gvram; |
486 | 487 | required_device<beep_device> m_beeper; |
487 | 488 | optional_device<ram_device> m_ram; |
488 | 489 | required_device<gfxdecode_device> m_gfxdecode; |
r241788 | r241789 | |
493 | 494 | UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
494 | 495 | |
495 | 496 | UINT8 *m_ipl_rom; |
496 | | UINT8 *m_sound_bios; |
497 | | UINT8 *m_work_ram; |
498 | | UINT8 *m_ext_work_ram; |
499 | 497 | UINT8 *m_char_rom; |
500 | 498 | UINT8 *m_kanji_rom; |
501 | | UINT8 *m_ide_rom; |
502 | | UINT8 m_ide_bank[2]; |
503 | 499 | |
504 | | UINT8 m_portb_tmp; |
505 | 500 | UINT8 m_dma_offset[4]; |
506 | 501 | int m_dack; |
507 | 502 | |
r241788 | r241789 | |
530 | 525 | UINT8 m_access_ctrl; // DMA related |
531 | 526 | UINT8 m_rom_bank; |
532 | 527 | UINT8 m_fdc_ctrl; |
533 | | UINT32 m_ram_size; |
534 | 528 | UINT8 m_ex_video_ff[128]; |
535 | 529 | struct { |
536 | 530 | UINT8 pal_entry; |
r241788 | r241789 | |
547 | 541 | |
548 | 542 | /* PC9821 specific */ |
549 | 543 | UINT8 m_sdip[24], m_sdip_bank; |
550 | | UINT8 *m_ide_ram; |
551 | | UINT8 *m_unk_rom; |
552 | | UINT8 *m_ext_gvram; |
553 | 544 | UINT8 m_pc9821_window_bank; |
554 | | UINT8 m_joy_sel; |
555 | 545 | UINT8 m_ext2_ff; |
556 | 546 | UINT8 m_sys_type; |
557 | 547 | |
558 | 548 | DECLARE_WRITE_LINE_MEMBER( write_uart_clock ); |
559 | 549 | DECLARE_WRITE8_MEMBER(rtc_dmapg_w); |
560 | 550 | DECLARE_WRITE8_MEMBER(nmi_ctrl_w); |
561 | | DECLARE_WRITE8_MEMBER(pc9801_vrtc_mask_w); |
| 551 | DECLARE_WRITE8_MEMBER(vrtc_mask_w); |
562 | 552 | DECLARE_WRITE8_MEMBER(pc9801_video_ff_w); |
563 | 553 | DECLARE_READ8_MEMBER(txt_scrl_r); |
564 | 554 | DECLARE_WRITE8_MEMBER(txt_scrl_w); |
r241788 | r241789 | |
580 | 570 | inline void m_pc9801rs_grcg_w(UINT32 offset,int vbank,int vrambank,UINT8 data); |
581 | 571 | inline void m_pc9801rs_grcg_w(UINT32 offset,int vbank,UINT8 data) { m_pc9801rs_grcg_w(offset, vbank, m_vram_bank, data); } |
582 | 572 | DECLARE_CUSTOM_INPUT_MEMBER(system_type_r); |
583 | | DECLARE_READ8_MEMBER(pc9801ux_gvram_r); |
584 | | DECLARE_WRITE8_MEMBER(pc9801ux_gvram_w); |
585 | | DECLARE_READ8_MEMBER(pc9801ux_gvram0_r); |
586 | | DECLARE_WRITE8_MEMBER(pc9801ux_gvram0_w); |
| 573 | DECLARE_READ8_MEMBER(grcg_gvram_r); |
| 574 | DECLARE_WRITE8_MEMBER(grcg_gvram_w); |
| 575 | DECLARE_READ8_MEMBER(grcg_gvram0_r); |
| 576 | DECLARE_WRITE8_MEMBER(grcg_gvram0_w); |
587 | 577 | DECLARE_READ8_MEMBER(upd7220_grcg_r); |
588 | 578 | DECLARE_WRITE8_MEMBER(upd7220_grcg_w); |
589 | 579 | UINT32 pc9801_286_a20(bool state); |
r241788 | r241789 | |
600 | 590 | int m_sasi_data_enable; |
601 | 591 | UINT8 m_sasi_ctrl; |
602 | 592 | |
603 | | DECLARE_READ8_MEMBER(pc9801rs_wram_r); |
604 | | DECLARE_WRITE8_MEMBER(pc9801rs_wram_w); |
605 | | DECLARE_READ8_MEMBER(pc9801rs_ex_wram_r); |
606 | | DECLARE_WRITE8_MEMBER(pc9801rs_ex_wram_w); |
607 | 593 | DECLARE_READ8_MEMBER(pc9801rs_ipl_r); |
608 | 594 | DECLARE_READ8_MEMBER(pc9801rs_knjram_r); |
609 | 595 | DECLARE_WRITE8_MEMBER(pc9801rs_knjram_w); |
r241788 | r241789 | |
612 | 598 | DECLARE_WRITE8_MEMBER(pc9801rs_f0_w); |
613 | 599 | DECLARE_READ8_MEMBER(pc9801rs_memory_r); |
614 | 600 | DECLARE_WRITE8_MEMBER(pc9801rs_memory_w); |
615 | | DECLARE_READ8_MEMBER(pc9801rs_soundrom_r); |
616 | | DECLARE_READ8_MEMBER(pc9801rs_scsirom_r); |
617 | 601 | DECLARE_READ8_MEMBER(pc9810rs_fdc_ctrl_r); |
618 | 602 | DECLARE_WRITE8_MEMBER(pc9810rs_fdc_ctrl_w); |
619 | 603 | DECLARE_READ8_MEMBER(pc9801rs_2hd_r); |
r241788 | r241789 | |
629 | 613 | DECLARE_WRITE8_MEMBER(pc9801rs_access_ctrl_w); |
630 | 614 | DECLARE_WRITE8_MEMBER(pc9801rs_nmi_w); |
631 | 615 | DECLARE_READ8_MEMBER(pc9801rs_midi_r); |
632 | | DECLARE_READ8_MEMBER(pc9821_memory_r); |
633 | | DECLARE_WRITE8_MEMBER(pc9821_memory_w); |
| 616 | // DECLARE_READ8_MEMBER(winram_r); |
| 617 | // DECLARE_WRITE8_MEMBER(winram_w); |
634 | 618 | // DECLARE_READ8_MEMBER(pc9801_ext_opna_r); |
635 | 619 | // DECLARE_WRITE8_MEMBER(pc9801_ext_opna_w); |
636 | 620 | DECLARE_READ8_MEMBER(pic_r); |
r241788 | r241789 | |
662 | 646 | DECLARE_WRITE8_MEMBER(sdip_a_w); |
663 | 647 | DECLARE_WRITE8_MEMBER(sdip_b_w); |
664 | 648 | |
665 | | DECLARE_READ8_MEMBER(pc9801rs_ide_r); |
666 | | DECLARE_READ8_MEMBER(pc9821_ideram_r); |
667 | | DECLARE_WRITE8_MEMBER(pc9821_ideram_w); |
668 | | DECLARE_READ8_MEMBER(pc9821_ext_gvram_r); |
669 | | DECLARE_WRITE8_MEMBER(pc9821_ext_gvram_w); |
670 | 649 | DECLARE_READ8_MEMBER(pc9821_window_bank_r); |
671 | 650 | DECLARE_WRITE8_MEMBER(pc9821_window_bank_w); |
672 | 651 | DECLARE_READ16_MEMBER(pc9821_timestamp_r); |
r241788 | r241789 | |
703 | 682 | DECLARE_WRITE_LINE_MEMBER(pc9801_dack1_w); |
704 | 683 | DECLARE_WRITE_LINE_MEMBER(pc9801_dack2_w); |
705 | 684 | DECLARE_WRITE_LINE_MEMBER(pc9801_dack3_w); |
706 | | DECLARE_READ8_MEMBER(ppi_sys_portc_r); |
707 | 685 | DECLARE_WRITE8_MEMBER(ppi_sys_portc_w); |
708 | | DECLARE_READ8_MEMBER(ppi_fdd_porta_r); |
709 | | DECLARE_READ8_MEMBER(ppi_fdd_portb_r); |
710 | | DECLARE_READ8_MEMBER(ppi_fdd_portc_r); |
711 | | DECLARE_WRITE8_MEMBER(ppi_fdd_portc_w); |
712 | 686 | |
713 | 687 | DECLARE_WRITE_LINE_MEMBER(fdc_2dd_irq); |
714 | 688 | DECLARE_WRITE_LINE_MEMBER(pc9801rs_fdc_irq); |
r241788 | r241789 | |
748 | 722 | |
749 | 723 | void pc9801_state::video_start() |
750 | 724 | { |
751 | | //pc9801_state *state = machine.driver_data<pc9801_state>(); |
752 | | |
753 | 725 | m_tvram = auto_alloc_array(machine(), UINT8, 0x4000); |
754 | 726 | |
755 | 727 | // find memory regions |
r241788 | r241789 | |
797 | 769 | pen = m_ext_gvram[(address*8+xi)+(m_vram_disp*0x40000)]; |
798 | 770 | |
799 | 771 | bitmap.pix32(res_y*2+0, res_x) = palette[pen + 0x20]; |
800 | | if(machine().first_screen()->visible_area().contains(res_x, res_y*2+1)) |
| 772 | if(m_screen->visible_area().contains(res_x, res_y*2+1)) |
801 | 773 | bitmap.pix32(res_y*2+1, res_x) = palette[pen + 0x20]; |
802 | 774 | } |
803 | 775 | } |
r241788 | r241789 | |
1005 | 977 | m_nmi_ff = (offset & 2) >> 1; |
1006 | 978 | } |
1007 | 979 | |
1008 | | WRITE8_MEMBER(pc9801_state::pc9801_vrtc_mask_w) |
| 980 | WRITE8_MEMBER(pc9801_state::vrtc_mask_w) |
1009 | 981 | { |
1010 | | if((offset & 1) == 0) |
1011 | | { |
1012 | | m_vrtc_irq_mask = 1; |
1013 | | } |
1014 | | else // odd |
1015 | | { |
1016 | | logerror("Write to undefined port [%02x] <- %02x\n",offset+0x64,data); |
1017 | | } |
| 982 | m_vrtc_irq_mask = 1; |
1018 | 983 | } |
1019 | 984 | |
1020 | 985 | WRITE8_MEMBER(pc9801_state::pc9801_video_ff_w) |
r241788 | r241789 | |
1433 | 1398 | |
1434 | 1399 | READ8_MEMBER(pc9801_state::ide_hack_r) |
1435 | 1400 | { |
| 1401 | address_space &ram = m_maincpu->space(AS_PROGRAM); |
1436 | 1402 | // this makes the ide driver not do 512 to 256 byte sector translation, the 9821 looks for bit 6 of offset 0xac403 of the kanji ram to set this, the rs unknown |
1437 | | m_work_ram[0x457] |= 0xc0; |
| 1403 | ram.write_byte(0x457, ram.read_byte(0x457) | 0xc0); |
1438 | 1404 | return 0xff; |
1439 | 1405 | } |
1440 | 1406 | |
r241788 | r241789 | |
1574 | 1540 | AM_RANGE(0x0050, 0x0057) AM_DEVREADWRITE8("ppi8255_fdd", i8255_device, read, write, 0xff00) |
1575 | 1541 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(nmi_ctrl_w,0x00ff) // NMI FF / i8255 floppy port (2d?) |
1576 | 1542 | AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("upd7220_chr", upd7220_device, read, write, 0x00ff) //upd7220 character ports / <undefined> |
1577 | | AM_RANGE(0x0064, 0x0065) AM_WRITE8(pc9801_vrtc_mask_w,0xffff) |
| 1543 | AM_RANGE(0x0064, 0x0065) AM_WRITE8(vrtc_mask_w,0x00ff) |
1578 | 1544 | AM_RANGE(0x0068, 0x0069) AM_WRITE8(pc9801_video_ff_w,0xffff) //mode FF / <undefined> |
1579 | 1545 | // AM_RANGE(0x006c, 0x006f) border color / <undefined> |
1580 | 1546 | AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00) |
r241788 | r241789 | |
1594 | 1560 | * |
1595 | 1561 | ************************************/ |
1596 | 1562 | |
1597 | | READ8_MEMBER(pc9801_state::pc9801rs_ide_r) { return m_ide_rom[offset]; } |
1598 | | |
1599 | | READ8_MEMBER(pc9801_state::pc9801rs_wram_r) { return m_work_ram[offset]; } |
1600 | | WRITE8_MEMBER(pc9801_state::pc9801rs_wram_w) { m_work_ram[offset] = data; } |
1601 | | |
1602 | | READ8_MEMBER(pc9801_state::pc9801rs_ex_wram_r) { return m_ext_work_ram[offset]; } |
1603 | | WRITE8_MEMBER(pc9801_state::pc9801rs_ex_wram_w) { m_ext_work_ram[offset] = data; } |
1604 | | |
1605 | 1563 | READ8_MEMBER(pc9801_state::pc9801rs_ipl_r) { return m_ipl_rom[(offset & 0x1ffff)+(m_rom_bank*0x20000)]; } |
1606 | 1564 | |
1607 | 1565 | /* TODO: it's possible that the offset calculation is actually linear. */ |
r241788 | r241789 | |
1745 | 1703 | txt_scrl_w(space,offset,data); |
1746 | 1704 | } |
1747 | 1705 | |
1748 | | READ8_MEMBER(pc9801_state::pc9801rs_soundrom_r) |
1749 | | { |
1750 | | return m_sound_bios[offset]; |
1751 | | } |
1752 | | |
1753 | | READ8_MEMBER(pc9801_state::pc9801rs_memory_r) |
1754 | | { |
1755 | | if(m_gate_a20 == 0) |
1756 | | offset &= 0xfffff; |
1757 | | |
1758 | | if ( offset <= 0x0009ffff) { return pc9801rs_wram_r(space,offset); } |
1759 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { return pc9801_tvram_r(space,offset-0xa0000); } |
1760 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { return pc9801rs_knjram_r(space,offset & 0xfff); } |
1761 | | else if(offset >= 0x000a8000 && offset <= 0x000affff) { return m_pc9801rs_grcg_r(offset & 0x7fff,1); } |
1762 | | else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,2); } |
1763 | | else if(offset >= 0x000b8000 && offset <= 0x000bffff) { return m_pc9801rs_grcg_r(offset & 0x7fff,3); } |
1764 | | else if(offset >= 0x000cc000 && offset <= 0x000cffff) { return pc9801rs_soundrom_r(space,offset & 0x3fff);} |
1765 | | else if(offset >= 0x000d8000 && offset <= 0x000d9fff) { return pc9801rs_ide_r(space,offset & 0x1fff); } |
1766 | | else if(offset >= 0x000da000 && offset <= 0x000dbfff) { return pc9821_ideram_r(space,offset & 0x1fff); } |
1767 | | else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,0); } |
1768 | | else if(offset >= 0x000e0000 && offset <= 0x000fffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
1769 | | else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { return pc9801rs_ex_wram_r(space,offset-0x00100000); } |
1770 | | else if(offset >= 0xfffe0000 && offset <= 0xffffffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
1771 | | |
1772 | | // logerror("%08x\n",offset); |
1773 | | return 0x00; |
1774 | | } |
1775 | | |
1776 | | |
1777 | | WRITE8_MEMBER(pc9801_state::pc9801rs_memory_w) |
1778 | | { |
1779 | | if(m_gate_a20 == 0) |
1780 | | offset &= 0xfffff; |
1781 | | |
1782 | | if ( offset <= 0x0009ffff) { pc9801rs_wram_w(space,offset,data); } |
1783 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); } |
1784 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); } |
1785 | | else if(offset >= 0x000a8000 && offset <= 0x000affff) { m_pc9801rs_grcg_w(offset & 0x7fff,1,data); } |
1786 | | else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,2,data); } |
1787 | | else if(offset >= 0x000b8000 && offset <= 0x000bffff) { m_pc9801rs_grcg_w(offset & 0x7fff,3,data); } |
1788 | | else if(offset >= 0x000da000 && offset <= 0x000dbfff) { pc9821_ideram_w(space,offset & 0x1fff,data); } |
1789 | | else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,0,data); } |
1790 | | else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { pc9801rs_ex_wram_w(space,offset-0x00100000,data); } |
1791 | | //else |
1792 | | // logerror("%08x %08x\n",offset,data); |
1793 | | } |
1794 | | |
1795 | 1706 | READ8_MEMBER(pc9801_state::pc9810rs_fdc_ctrl_r) |
1796 | 1707 | { |
1797 | 1708 | return (m_fdc_ctrl & 3) | 0xf0 | 8 | 4; |
r241788 | r241789 | |
2003 | 1914 | ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data); |
2004 | 1915 | } |
2005 | 1916 | |
2006 | | READ8_MEMBER(pc9801_state::pc9801ux_gvram_r) |
| 1917 | READ8_MEMBER(pc9801_state::grcg_gvram_r) |
2007 | 1918 | { |
2008 | 1919 | return m_pc9801rs_grcg_r(offset & 0x7fff,(offset>>15)+1); |
2009 | 1920 | } |
2010 | 1921 | |
2011 | | WRITE8_MEMBER(pc9801_state::pc9801ux_gvram_w) |
| 1922 | WRITE8_MEMBER(pc9801_state::grcg_gvram_w) |
2012 | 1923 | { |
2013 | 1924 | m_pc9801rs_grcg_w(offset & 0x7fff,(offset>>15)+1,data); |
2014 | 1925 | } |
2015 | 1926 | |
2016 | | READ8_MEMBER(pc9801_state::pc9801ux_gvram0_r) |
| 1927 | READ8_MEMBER(pc9801_state::grcg_gvram0_r) |
2017 | 1928 | { |
2018 | 1929 | return m_pc9801rs_grcg_r(offset & 0x7fff,0); |
2019 | 1930 | } |
2020 | 1931 | |
2021 | | WRITE8_MEMBER(pc9801_state::pc9801ux_gvram0_w) |
| 1932 | WRITE8_MEMBER(pc9801_state::grcg_gvram0_w) |
2022 | 1933 | { |
2023 | 1934 | m_pc9801rs_grcg_w(offset & 0x7fff,0,data); |
2024 | 1935 | } |
r241788 | r241789 | |
2027 | 1938 | AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("wram") |
2028 | 1939 | AM_RANGE(0x0a0000, 0x0a3fff) AM_READWRITE8(pc9801_tvram_r, pc9801_tvram_w, 0xffff) |
2029 | 1940 | AM_RANGE(0x0a4000, 0x0a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffff) |
2030 | | AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE8(pc9801ux_gvram_r, pc9801ux_gvram_w, 0xffff) |
2031 | | AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE8(pc9801ux_gvram0_r,pc9801ux_gvram0_w, 0xffff) |
| 1941 | AM_RANGE(0x0a8000, 0x0bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffff) |
| 1942 | AM_RANGE(0x0e0000, 0x0e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffff) |
2032 | 1943 | AM_RANGE(0x0e0000, 0x0fffff) AM_READ8(pc9801rs_ipl_r, 0xffff) |
2033 | 1944 | ADDRESS_MAP_END |
2034 | 1945 | |
r241788 | r241789 | |
2051 | 1962 | ADDRESS_MAP_END |
2052 | 1963 | |
2053 | 1964 | static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 16, pc9801_state ) |
2054 | | AM_RANGE(0x00000000, 0xffffffff) AM_READWRITE8(pc9801rs_memory_r,pc9801rs_memory_w,0xffff) |
| 1965 | AM_RANGE(0x0d8000, 0x0d9fff) AM_ROM AM_REGION("ide",0) |
| 1966 | AM_RANGE(0x0da000, 0x0dbfff) AM_RAM // ide ram |
| 1967 | AM_RANGE(0xee0000, 0xefffff) AM_READ8(pc9801rs_ipl_r, 0xffff) |
| 1968 | AM_RANGE(0xfe0000, 0xffffff) AM_READ8(pc9801rs_ipl_r, 0xffff) |
| 1969 | AM_IMPORT_FROM(pc9801ux_map) |
2055 | 1970 | ADDRESS_MAP_END |
2056 | 1971 | |
2057 | 1972 | static ADDRESS_MAP_START( pc9801rs_io, AS_IO, 16, pc9801_state ) |
r241788 | r241789 | |
2071 | 1986 | * |
2072 | 1987 | ************************************/ |
2073 | 1988 | |
2074 | | /* Note: not hooking this up causes "MEMORY ERROR" at POST */ |
2075 | | READ8_MEMBER(pc9801_state::pc9821_ideram_r) { return m_ide_ram[offset]; } |
2076 | | WRITE8_MEMBER(pc9801_state::pc9821_ideram_w) { m_ide_ram[offset] = data; } |
2077 | | |
2078 | | READ8_MEMBER(pc9801_state::pc9821_ext_gvram_r) { return m_ext_gvram[offset]; } |
2079 | | WRITE8_MEMBER(pc9801_state::pc9821_ext_gvram_w) { m_ext_gvram[offset] = data; } |
2080 | | |
2081 | | |
2082 | | READ8_MEMBER(pc9801_state::pc9821_memory_r) |
2083 | | { |
2084 | | if(m_gate_a20 == 0) |
2085 | | offset &= 0xfffff; |
2086 | | |
2087 | | if(offset >= 0x00080000 && offset <= 0x0009ffff) |
2088 | | offset = (offset & 0x1ffff) | (m_pc9821_window_bank & 0xfe) * 0x10000; |
2089 | | |
2090 | | /* TODO: window bank at 0xa0000 - 0xbffff */ |
2091 | | |
2092 | | if ( offset <= 0x0009ffff) { return pc9801rs_wram_r(space,offset); } |
2093 | | // else if(offset >= 0x00080000 && offset <= 0x0009ffff) { return pc9821_winram_r(space,offset & 0x1ffff); } |
2094 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { return pc9801_tvram_r(space,offset-0xa0000); } |
2095 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { return pc9801rs_knjram_r(space,offset & 0xfff); } |
2096 | | else if(offset >= 0x000a8000 && offset <= 0x000affff) { return m_pc9801rs_grcg_r(offset & 0x7fff,1); } |
2097 | | else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,2); } |
2098 | | else if(offset >= 0x000b8000 && offset <= 0x000bffff) { return m_pc9801rs_grcg_r(offset & 0x7fff,3); } |
2099 | | else if(offset >= 0x000cc000 && offset <= 0x000cffff) { return pc9801rs_soundrom_r(space,offset & 0x3fff);} |
2100 | | else if(offset >= 0x000d8000 && offset <= 0x000d9fff) { return pc9801rs_ide_r(space,offset & 0x1fff); } |
2101 | | else if(offset >= 0x000da000 && offset <= 0x000dbfff) { return pc9821_ideram_r(space,offset & 0x1fff); } |
2102 | | else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { return m_pc9801rs_grcg_r(offset & 0x7fff,0); } |
2103 | | else if(offset >= 0x000e0000 && offset <= 0x000fffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
2104 | | else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { return pc9801rs_ex_wram_r(space,offset-0x00100000); } |
2105 | | else if(offset >= 0x00f00000 && offset <= 0x00f9ffff) { return pc9821_ext_gvram_r(space,offset-0x00f00000); } |
2106 | | else if(offset >= 0xfffe0000 && offset <= 0xffffffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
2107 | | |
2108 | | //logerror("%08x\n",offset); |
2109 | | return 0x00; |
2110 | | } |
2111 | | |
2112 | | |
2113 | | WRITE8_MEMBER(pc9801_state::pc9821_memory_w) |
2114 | | { |
2115 | | if(m_gate_a20 == 0) |
2116 | | offset &= 0xfffff; |
2117 | | |
2118 | | if(offset >= 0x00080000 && offset <= 0x0009ffff) |
2119 | | offset = (offset & 0x1ffff) | (m_pc9821_window_bank & 0xfe) * 0x10000; |
2120 | | |
2121 | | /* TODO: window bank at 0xa0000 - 0xbffff */ |
2122 | | |
2123 | | if ( offset <= 0x0009ffff) { pc9801rs_wram_w(space,offset,data); } |
2124 | | // else if(offset >= 0x00080000 && offset <= 0x0009ffff) { pc9821_winram_w(space,offset & 0x1ffff,data); } |
2125 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); } |
2126 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); } |
2127 | | else if(offset >= 0x000a8000 && offset <= 0x000affff) { m_pc9801rs_grcg_w(offset & 0x7fff,1,data); } |
2128 | | else if(offset >= 0x000b0000 && offset <= 0x000b7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,2,data); } |
2129 | | else if(offset >= 0x000b8000 && offset <= 0x000bffff) { m_pc9801rs_grcg_w(offset & 0x7fff,3,data); } |
2130 | | else if(offset >= 0x000cc000 && offset <= 0x000cffff) { /* TODO: shadow ROM */ } |
2131 | | else if(offset >= 0x000d8000 && offset <= 0x000d9fff) { /* TODO: shadow ROM */ } |
2132 | | else if(offset >= 0x000da000 && offset <= 0x000dbfff) { pc9821_ideram_w(space,offset & 0x1fff,data); } |
2133 | | else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { m_pc9801rs_grcg_w(offset & 0x7fff,0,data); } |
2134 | | else if(offset >= 0x000e8000 && offset <= 0x000fffff) { /* TODO: shadow ROM */ } |
2135 | | else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { pc9801rs_ex_wram_w(space,offset-0x00100000,data); } |
2136 | | else if(offset >= 0x00f00000 && offset <= 0x00f9ffff) { pc9821_ext_gvram_w(space,offset-0x00f00000,data); } |
2137 | | //else |
2138 | | // logerror("%08x %08x\n",offset,data); |
2139 | | |
2140 | | } |
2141 | | |
2142 | 1989 | WRITE8_MEMBER(pc9801_state::pc9821_video_ff_w) |
2143 | 1990 | { |
2144 | 1991 | if(offset == 2) |
r241788 | r241789 | |
2306 | 2153 | m_ext2_ff = data; |
2307 | 2154 | } |
2308 | 2155 | |
| 2156 | /*READ8_MEMBER(pc9801_state::winram_r) |
| 2157 | { |
| 2158 | offset = (offset & 0x1ffff) | (m_pc9821_window_bank & 0xfe) * 0x10000; |
| 2159 | return |
| 2160 | } |
| 2161 | |
| 2162 | |
| 2163 | WRITE8_MEMBER(pc9801_state::winram_w) |
| 2164 | { |
| 2165 | offset = (offset & 0x1ffff) | (m_pc9821_window_bank & 0xfe) * 0x10000; |
| 2166 | }*/ |
| 2167 | |
2309 | 2168 | static ADDRESS_MAP_START( pc9821_map, AS_PROGRAM, 32, pc9801_state ) |
2310 | | AM_RANGE(0x00000000, 0xffffffff) AM_READWRITE8(pc9821_memory_r,pc9821_memory_w,0xffffffff) |
| 2169 | AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("wram") |
| 2170 | //AM_RANGE(0x00080000, 0x0009ffff) AM_READWRITE8(winram_r, winram_w, 0xffffffff) |
| 2171 | AM_RANGE(0x000a0000, 0x000a3fff) AM_READWRITE8(pc9801_tvram_r, pc9801_tvram_w, 0xffffffff) |
| 2172 | AM_RANGE(0x000a4000, 0x000a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffffffff) |
| 2173 | AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE8(grcg_gvram_r, grcg_gvram_w, 0xffffffff) |
| 2174 | AM_RANGE(0x000cc000, 0x000cdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS |
| 2175 | AM_RANGE(0x000d8000, 0x000d9fff) AM_ROM AM_REGION("ide",0) |
| 2176 | AM_RANGE(0x000da000, 0x000dbfff) AM_RAM // ide ram |
| 2177 | AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE8(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff) |
| 2178 | AM_RANGE(0x000e0000, 0x000fffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff) |
| 2179 | AM_RANGE(0x00f00000, 0x00f9ffff) AM_RAM AM_SHARE("ext_gvram") |
| 2180 | AM_RANGE(0xffee0000, 0xffefffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff) |
| 2181 | AM_RANGE(0xfffe0000, 0xffffffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff) |
2311 | 2182 | ADDRESS_MAP_END |
2312 | 2183 | |
2313 | 2184 | static ADDRESS_MAP_START( pc9821_io, AS_IO, 32, pc9801_state ) |
r241788 | r241789 | |
2321 | 2192 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(pc9801rs_nmi_w, 0xffffffff) |
2322 | 2193 | AM_RANGE(0x005c, 0x005f) AM_READ16(pc9821_timestamp_r,0xffffffff) AM_WRITENOP // artic |
2323 | 2194 | AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("upd7220_chr", upd7220_device, read, write, 0x00ff00ff) //upd7220 character ports / <undefined> |
2324 | | AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffffffff) |
| 2195 | AM_RANGE(0x0064, 0x0067) AM_WRITE8(vrtc_mask_w, 0x000000ff) |
2325 | 2196 | AM_RANGE(0x0068, 0x006b) AM_WRITE8(pc9821_video_ff_w, 0xffffffff) //mode FF / <undefined> |
2326 | 2197 | AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00ff00) |
2327 | 2198 | AM_RANGE(0x0070, 0x007f) AM_READWRITE8(grcg_r, grcg_w, 0x00ff00ff) //display registers "GRCG" / i8253 pit |
r241788 | r241789 | |
2703 | 2574 | { |
2704 | 2575 | /* floppy terminal count */ |
2705 | 2576 | m_fdc_2hd->tc_w(state); |
2706 | | // TODO: 2dd? |
| 2577 | if(m_fdc_2dd) |
| 2578 | m_fdc_2dd->tc_w(state); |
2707 | 2579 | |
2708 | 2580 | // logerror("TC %02x\n",state); |
2709 | 2581 | } |
r241788 | r241789 | |
2756 | 2628 | m_beeper->set_state(!(data & 0x08)); |
2757 | 2629 | } |
2758 | 2630 | |
2759 | | READ8_MEMBER(pc9801_state::ppi_sys_portc_r) |
2760 | | { |
2761 | | return 0xa0; // 0x80 cpu triple fault reset flag? |
2762 | | } |
2763 | | |
2764 | | READ8_MEMBER(pc9801_state::ppi_fdd_porta_r) |
2765 | | { |
2766 | | return 0xff; |
2767 | | } |
2768 | | |
2769 | | READ8_MEMBER(pc9801_state::ppi_fdd_portb_r) |
2770 | | { |
2771 | | return 0xff; //upd765_status_r(machine().device("upd765_2dd"),space, 0); |
2772 | | } |
2773 | | |
2774 | | READ8_MEMBER(pc9801_state::ppi_fdd_portc_r) |
2775 | | { |
2776 | | return 0xff; //upd765_data_r(machine().device("upd765_2dd"),space, 0); |
2777 | | } |
2778 | | |
2779 | | WRITE8_MEMBER(pc9801_state::ppi_fdd_portc_w) |
2780 | | { |
2781 | | //upd765_data_w(machine().device("upd765_2dd"),space, 0,data); |
2782 | | } |
2783 | | |
2784 | 2631 | READ8_MEMBER(pc9801_state::ppi_mouse_porta_r) |
2785 | 2632 | { |
2786 | 2633 | UINT8 res; |
r241788 | r241789 | |
2910 | 2757 | m_rtc->oe_w(1); |
2911 | 2758 | |
2912 | 2759 | m_ipl_rom = memregion("ipl")->base(); |
2913 | | m_sound_bios = memregion("sound_bios")->base(); |
2914 | 2760 | |
2915 | 2761 | save_item(NAME(m_sasi_data)); |
2916 | 2762 | save_item(NAME(m_sasi_data_enable)); |
r241788 | r241789 | |
2930 | 2776 | { |
2931 | 2777 | MACHINE_START_CALL_MEMBER(pc9801_common); |
2932 | 2778 | |
2933 | | m_work_ram = m_ram->pointer(); |
2934 | | m_ext_work_ram = m_ram->pointer() + 0xa0000; |
| 2779 | int ram_size = m_ram->size() - 0xa0000; |
2935 | 2780 | |
2936 | | m_ram_size = m_ram->size() - 0xa0000; |
2937 | | |
2938 | | // TODO: rs and 9821 also |
2939 | | if(!strncmp(machine().system().name, "pc9801ux", 8)) |
| 2781 | address_space& space = m_maincpu->space(AS_PROGRAM); |
| 2782 | membank("wram")->set_base(m_ram->pointer()); |
| 2783 | if(ram_size) |
2940 | 2784 | { |
2941 | | address_space& space = m_maincpu->space(AS_PROGRAM); |
2942 | | membank("wram")->set_base(m_ram->pointer()); |
2943 | | if(m_ram_size) |
2944 | | { |
2945 | | space.install_read_bank(0x100000, 0x100000 + m_ram_size - 1, "ext_wram"); |
2946 | | space.install_write_bank(0x100000, 0x100000 + m_ram_size - 1, "ext_wram"); |
2947 | | membank("ext_wram")->set_base(m_ram->pointer() + 0xa0000); |
2948 | | } |
| 2785 | space.install_read_bank(0x100000, 0x100000 + ram_size - 1, "ext_wram"); |
| 2786 | space.install_write_bank(0x100000, 0x100000 + ram_size - 1, "ext_wram"); |
| 2787 | membank("ext_wram")->set_base(m_ram->pointer() + 0xa0000); |
2949 | 2788 | } |
2950 | 2789 | |
2951 | | m_ide_rom = memregion("ide")->base(); |
2952 | | m_ide_ram = auto_alloc_array(machine(), UINT8, 0x2000); |
2953 | 2790 | m_sys_type = 0x80 >> 6; |
2954 | | save_pointer(NAME(m_ide_ram), 0x2000); |
2955 | 2791 | } |
2956 | 2792 | |
2957 | 2793 | MACHINE_START_MEMBER(pc9801_state,pc9801bx2) |
r241788 | r241789 | |
2966 | 2802 | { |
2967 | 2803 | MACHINE_START_CALL_MEMBER(pc9801rs); |
2968 | 2804 | |
2969 | | m_ext_gvram = auto_alloc_array(machine(), UINT8, 0xa0000); |
2970 | | |
2971 | 2805 | save_pointer(NAME(m_sdip), 24); |
2972 | | save_pointer(NAME(m_ext_gvram), 0xa0000); |
2973 | 2806 | } |
2974 | 2807 | |
2975 | 2808 | MACHINE_START_MEMBER(pc9801_state,pc9821ap2) |
r241788 | r241789 | |
3036 | 2869 | m_access_ctrl = 0; |
3037 | 2870 | m_keyb_press = 0xff; // temp kludge, for PC-9821 booting |
3038 | 2871 | // m_has_opna = ioport("SOUND_CONFIG")->read() & 1; |
3039 | | memset(m_work_ram, 0, sizeof(UINT8) * 0xa0000); |
3040 | 2872 | m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20); |
3041 | 2873 | } |
3042 | 2874 | |
r241788 | r241789 | |
3165 | 2997 | MCFG_DEVICE_ADD("ppi8255_sys", I8255, 0) |
3166 | 2998 | MCFG_I8255_IN_PORTA_CB(IOPORT("DSW2")) |
3167 | 2999 | MCFG_I8255_IN_PORTB_CB(IOPORT("DSW1")) |
3168 | | MCFG_I8255_IN_PORTC_CB(READ8(pc9801_state, ppi_sys_portc_r)) |
| 3000 | MCFG_I8255_IN_PORTC_CB(CONSTANT(0xa0)) // 0x80 cpu triple fault reset flag? |
3169 | 3001 | MCFG_I8255_OUT_PORTC_CB(WRITE8(pc9801_state, ppi_sys_portc_w)) |
3170 | 3002 | |
3171 | 3003 | MCFG_DEVICE_ADD("ppi8255_prn", I8255, 0) |
r241788 | r241789 | |
3185 | 3017 | MCFG_FLOPPY_DRIVE_ADD("upd765_2hd:1", pc9801_floppies, "525hd", pc9801_state::floppy_formats) |
3186 | 3018 | |
3187 | 3019 | MCFG_DEVICE_ADD("ppi8255_fdd", I8255, 0) |
3188 | | MCFG_I8255_IN_PORTA_CB(READ8(pc9801_state, ppi_fdd_porta_r)) |
3189 | | MCFG_I8255_IN_PORTB_CB(READ8(pc9801_state, ppi_fdd_portb_r)) |
3190 | | MCFG_I8255_IN_PORTC_CB(READ8(pc9801_state, ppi_fdd_portc_r)) |
3191 | | MCFG_I8255_OUT_PORTC_CB(WRITE8(pc9801_state, ppi_fdd_portc_w)) |
| 3020 | MCFG_I8255_IN_PORTA_CB(CONSTANT(0xff)) |
| 3021 | MCFG_I8255_IN_PORTB_CB(CONSTANT(0xff)) //upd765_status_r(machine().device("upd765_2dd"),space, 0); |
| 3022 | MCFG_I8255_IN_PORTC_CB(CONSTANT(0xff)) //upd765_data_r(machine().device("upd765_2dd"),space, 0); |
| 3023 | //MCFG_I8255_OUT_PORTC_CB(WRITE8(pc9801_state, ppi_fdd_portc_w)) //upd765_data_w(machine().device("upd765_2dd"),space, 0,data); |
3192 | 3024 | |
3193 | 3025 | MCFG_SOFTWARE_LIST_ADD("disk_list","pc98") |
3194 | 3026 | |
r241788 | r241789 | |
3249 | 3081 | MCFG_PALETTE_INIT_OWNER(pc9801_state,pc9801) |
3250 | 3082 | MACHINE_CONFIG_END |
3251 | 3083 | |
3252 | | #if 0 |
3253 | 3084 | static MACHINE_CONFIG_DERIVED( pc9801vm, pc9801 ) |
3254 | 3085 | MCFG_CPU_REPLACE("maincpu",V30,10000000) |
3255 | | MCFG_CPU_PROGRAM_MAP(pc9801_map) |
3256 | | MCFG_CPU_IO_MAP(pc9801_io) |
| 3086 | MCFG_CPU_PROGRAM_MAP(pc9801ux_map) |
| 3087 | MCFG_CPU_IO_MAP(pc9801ux_io) |
3257 | 3088 | MCFG_CPU_VBLANK_INT_DRIVER("screen", pc9801_state, pc9801_vrtc_irq) |
| 3089 | |
| 3090 | MCFG_MACHINE_START_OVERRIDE(pc9801_state,pc9801_common) |
| 3091 | MCFG_MACHINE_RESET_OVERRIDE(pc9801_state,pc9801_common) |
3258 | 3092 | MACHINE_CONFIG_END |
3259 | | #endif |
3260 | 3093 | |
3261 | 3094 | static MACHINE_CONFIG_START( pc9801rs, pc9801_state ) |
3262 | 3095 | MCFG_CPU_ADD("maincpu", I386SX, MAIN_CLOCK_X1*8) // unknown clock. |
r241788 | r241789 | |
3422 | 3255 | ROM_LOAD( "font_ux.rom", 0x000000, 0x046800, BAD_DUMP CRC(19a76eeb) SHA1(96a006e8515157a624599c2b53a581ae0dd560fd) ) |
3423 | 3256 | |
3424 | 3257 | LOAD_KANJI_ROMS |
3425 | | LOAD_IDE_ROM |
| 3258 | // LOAD_IDE_ROM |
3426 | 3259 | ROM_END |
3427 | 3260 | |
3428 | 3261 | /* |
3429 | 3262 | RX - 80286 12 (no V30?) |
3430 | 3263 | |
3431 | | IPL is for a 386 model, is same as RS below |
| 3264 | IPL is from ux |
3432 | 3265 | */ |
3433 | 3266 | |
3434 | 3267 | ROM_START( pc9801rx ) |
3435 | 3268 | ROM_REGION( 0x60000, "ipl", ROMREGION_ERASEFF ) |
3436 | | ROM_LOAD( "itf_rs.rom", 0x18000, 0x08000, BAD_DUMP CRC(c1815325) SHA1(a2fb11c000ed7c976520622cfb7940ed6ddc904e) ) |
| 3269 | ROM_LOAD( "itf_ux.rom", 0x18000, 0x08000, BAD_DUMP CRC(c7942563) SHA1(61bb210d64c7264be939b11df1e9cd14ffeee3c9) ) |
3437 | 3270 | ROM_LOAD( "bios_rx.rom", 0x28000, 0x018000, BAD_DUMP CRC(0a682b93) SHA1(76a7360502fa0296ea93b4c537174610a834d367) ) |
3438 | 3271 | |
3439 | 3272 | ROM_REGION( 0x10000, "sound_bios", 0 ) |
r241788 | r241789 | |
3443 | 3276 | ROM_LOAD( "font_rx.rom", 0x000000, 0x046800, CRC(456d9fc7) SHA1(78ba9960f135372825ab7244b5e4e73a810002ff) ) |
3444 | 3277 | |
3445 | 3278 | LOAD_KANJI_ROMS |
3446 | | LOAD_IDE_ROM |
| 3279 | // LOAD_IDE_ROM |
3447 | 3280 | ROM_END |
3448 | 3281 | |
3449 | 3282 | /* |
r241788 | r241789 | |
3513 | 3346 | |
3514 | 3347 | ROM_START( pc9801vm ) |
3515 | 3348 | ROM_REGION( 0x60000, "ipl", ROMREGION_ERASEFF ) |
3516 | | ROM_LOAD( "itf_rs.rom", 0x18000, 0x08000, CRC(c1815325) SHA1(a2fb11c000ed7c976520622cfb7940ed6ddc904e) ) |
| 3349 | ROM_LOAD( "itf_ux.rom", 0x18000, 0x08000, BAD_DUMP CRC(c7942563) SHA1(61bb210d64c7264be939b11df1e9cd14ffeee3c9) ) |
3517 | 3350 | ROM_LOAD( "bios_vm.rom", 0x28000, 0x018000, CRC(2e2d7cee) SHA1(159549f845dc70bf61955f9469d2281a0131b47f) ) |
3518 | 3351 | |
3519 | 3352 | ROM_REGION( 0x10000, "sound_bios", 0 ) |
r241788 | r241789 | |
3523 | 3356 | ROM_LOAD( "font_vm.rom", 0x000000, 0x046800, BAD_DUMP CRC(456d9fc7) SHA1(78ba9960f135372825ab7244b5e4e73a810002ff) ) |
3524 | 3357 | |
3525 | 3358 | LOAD_KANJI_ROMS |
3526 | | LOAD_IDE_ROM |
| 3359 | // LOAD_IDE_ROM |
3527 | 3360 | ROM_END |
3528 | 3361 | |
3529 | 3362 | /* |
r241788 | r241789 | |
3661 | 3494 | ROM_LOAD( "itf.rom", 0x18000, 0x08000, BAD_DUMP CRC(dd4c7bb8) SHA1(cf3aa193df2722899066246bccbed03f2e79a74a) ) |
3662 | 3495 | ROM_LOAD( "bios_xs.rom", 0x28000, 0x018000, BAD_DUMP CRC(0a682b93) SHA1(76a7360502fa0296ea93b4c537174610a834d367) ) |
3663 | 3496 | |
3664 | | ROM_REGION( 0x10000, "soundcpu", 0 ) |
| 3497 | ROM_REGION( 0x10000, "sound_bios", 0 ) |
3665 | 3498 | ROM_LOAD( "sound_xs.rom", 0x000000, 0x004000, CRC(80eabfde) SHA1(e09c54152c8093e1724842c711aed6417169db23) ) |
3666 | 3499 | |
3667 | 3500 | ROM_REGION( 0x80000, "chargen", 0 ) |
r241788 | r241789 | |
3775 | 3608 | COMP( 1983, pc9801f, 0, 0, pc9801, pc9801, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801F", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
3776 | 3609 | |
3777 | 3610 | /* TODO: ANYTHING below there needs REDUMPING! */ |
3778 | | COMP( 1989, pc9801rs, 0, 0, pc9801rs, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801RS", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) //TODO: not sure about the exact model |
3779 | | COMP( 1985, pc9801vm, pc9801rs,0, pc9801rs, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801VM", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
3780 | | COMP( 1987, pc9801ux, pc9801rs,0, pc9801ux, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801UX", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
3781 | | COMP( 1988, pc9801rx, pc9801rs,0, pc9801ux, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801RX", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
| 3611 | COMP( 1989, pc9801rs, 0 ,0, pc9801rs, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801RS", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) //TODO: not sure about the exact model |
| 3612 | COMP( 1985, pc9801vm, pc9801ux,0, pc9801vm, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801VM", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
| 3613 | COMP( 1987, pc9801ux, 0 ,0, pc9801ux, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801UX", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
| 3614 | COMP( 1988, pc9801rx, pc9801ux,0, pc9801ux, pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801RX", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
3782 | 3615 | COMP( 1993, pc9801bx2, pc9801rs,0, pc9801bx2,pc9801rs, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9801BX2/U2", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |
3783 | 3616 | COMP( 1994, pc9821, 0, 0, pc9821, pc9821, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9821 (98MATE)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) //TODO: not sure about the exact model |
3784 | 3617 | COMP( 1993, pc9821as, pc9821, 0, pc9821, pc9821, pc9801_state, pc9801_kanji, "Nippon Electronic Company", "PC-9821 (98MATE A)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND) |