trunk/src/emu/cpu/arm7/arm7drc.inc
r241772 | r241773 | |
41 | 41 | DEBUGGING |
42 | 42 | ***************************************************************************/ |
43 | 43 | |
44 | | #define LOG_UML (0) |
45 | 44 | #define LOG_NATIVE (0) |
46 | 45 | |
47 | 46 | #define SINGLE_INSTRUCTION_MODE (0) |
r241772 | r241773 | |
154 | 153 | m_impstate.cache = cache; |
155 | 154 | |
156 | 155 | /* initialize the UML generator */ |
157 | | if (LOG_UML) |
158 | | flags |= DRCUML_OPTION_LOG_UML; |
159 | 156 | if (LOG_NATIVE) |
160 | 157 | flags |= DRCUML_OPTION_LOG_NATIVE; |
161 | 158 | m_impstate.drcuml = new drcuml_state(*this, *cache, flags, 1, 32, 1); |
r241772 | r241773 | |
355 | 352 | /* get a description of this sequence */ |
356 | 353 | // TODO FIXME |
357 | 354 | const opcode_desc *desclist = NULL; //m_impstate.drcfe->describe_code(pc); // TODO |
358 | | // if (LOG_UML || LOG_NATIVE) |
| 355 | // if (drcuml->logging() || LOG_NATIVE) |
359 | 356 | // log_opcode_desc(drcuml, desclist, 0); |
360 | 357 | |
361 | 358 | /* if we get an error back, flush the cache and try again */ |
r241772 | r241773 | |
374 | 371 | UINT32 nextpc; |
375 | 372 | |
376 | 373 | /* add a code log entry */ |
377 | | if (LOG_UML) |
| 374 | if (drcuml->logging()) |
378 | 375 | block->append_comment("-------------------------"); // comment |
379 | 376 | |
380 | 377 | /* determine the last instruction in this sequence */ |
r241772 | r241773 | |
1209 | 1206 | void arm7_cpu_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) |
1210 | 1207 | { |
1211 | 1208 | const opcode_desc *curdesc; |
1212 | | if (LOG_UML) |
| 1209 | if (m_impstate.drcuml->logging()) |
1213 | 1210 | { |
1214 | 1211 | block->append_comment("[Validation for %08X]", seqhead->pc); // comment |
1215 | 1212 | } |
r241772 | r241773 | |
1278 | 1275 | |
1279 | 1276 | /* add an entry for the log */ |
1280 | 1277 | // TODO FIXME |
1281 | | // if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
| 1278 | // if (m_impstate.drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
1282 | 1279 | // log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); |
1283 | 1280 | |
1284 | 1281 | /* set the PC map variable */ |
trunk/src/emu/cpu/drcuml.c
r241772 | r241773 | |
121 | 121 | drcuml_state::drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits) |
122 | 122 | : m_device(device), |
123 | 123 | m_cache(cache), |
124 | | m_beintf((device.machine().options().drc_use_c()) ? |
| 124 | m_beintf(device.machine().options().drc_use_c() ? |
125 | 125 | *static_cast<drcbe_interface *>(auto_alloc(device.machine(), drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits))) : |
126 | 126 | *static_cast<drcbe_interface *>(auto_alloc(device.machine(), drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits)))), |
127 | 127 | m_umllog(NULL) |
128 | 128 | { |
129 | 129 | // if we're to log, create the logfile |
130 | | if (flags & DRCUML_OPTION_LOG_UML) |
| 130 | if (device.machine().options().drc_log_uml()) |
131 | 131 | m_umllog = fopen("drcuml.asm", "w"); |
132 | 132 | } |
133 | 133 | |
trunk/src/emu/cpu/mips/mips3drc.c
r241772 | r241773 | |
275 | 275 | |
276 | 276 | /* get a description of this sequence */ |
277 | 277 | desclist = m_drcfe->describe_code(pc); |
278 | | if (LOG_UML || LOG_NATIVE) |
| 278 | if (drcuml->logging() || LOG_NATIVE) |
279 | 279 | log_opcode_desc(drcuml, desclist, 0); |
280 | 280 | |
281 | 281 | /* if we get an error back, flush the cache and try again */ |
r241772 | r241773 | |
294 | 294 | UINT32 nextpc; |
295 | 295 | |
296 | 296 | /* add a code log entry */ |
297 | | if (LOG_UML) |
| 297 | if (drcuml->logging()) |
298 | 298 | block->append_comment("-------------------------"); // comment |
299 | 299 | |
300 | 300 | /* determine the last instruction in this sequence */ |
r241772 | r241773 | |
1070 | 1070 | void mips3_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) |
1071 | 1071 | { |
1072 | 1072 | const opcode_desc *curdesc; |
1073 | | if (LOG_UML) |
| 1073 | if (m_drcuml->logging()) |
1074 | 1074 | block->append_comment("[Validation for %08X]", seqhead->pc); // comment |
1075 | 1075 | |
1076 | 1076 | /* loose verify or single instruction: just compare and fail */ |
r241772 | r241773 | |
1147 | 1147 | int hotnum; |
1148 | 1148 | |
1149 | 1149 | /* add an entry for the log */ |
1150 | | if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
| 1150 | if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
1151 | 1151 | log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); |
1152 | 1152 | |
1153 | 1153 | /* set the PC map variable */ |
r241772 | r241773 | |
3129 | 3129 | |
3130 | 3130 | void mips3_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op) |
3131 | 3131 | { |
3132 | | #if (LOG_UML) |
3133 | | char buffer[100]; |
3134 | | dasmmips3(buffer, pc, op); |
3135 | | block->append_comment("%08X: %s", pc, buffer); // comment |
3136 | | #endif |
| 3132 | if (m_drcuml->logging()) |
| 3133 | { |
| 3134 | char buffer[100]; |
| 3135 | dasmmips3(buffer, pc, op); |
| 3136 | block->append_comment("%08X: %s", pc, buffer); // comment |
| 3137 | } |
3137 | 3138 | } |
3138 | 3139 | |
3139 | 3140 | |
r241772 | r241773 | |
3263 | 3264 | char buffer[100]; |
3264 | 3265 | |
3265 | 3266 | /* disassemle the current instruction and output it to the log */ |
3266 | | #if (LOG_UML || LOG_NATIVE) |
3267 | | if (desclist->flags & OPFLAG_VIRTUAL_NOOP) |
3268 | | strcpy(buffer, "<virtual nop>"); |
| 3267 | if (drcuml->logging() || LOG_NATIVE) |
| 3268 | { |
| 3269 | if (desclist->flags & OPFLAG_VIRTUAL_NOOP) |
| 3270 | strcpy(buffer, "<virtual nop>"); |
| 3271 | else |
| 3272 | dasmmips3(buffer, desclist->pc, desclist->opptr.l[0]); |
| 3273 | } |
3269 | 3274 | else |
3270 | | dasmmips3(buffer, desclist->pc, desclist->opptr.l[0]); |
3271 | | #else |
3272 | | strcpy(buffer, "???"); |
3273 | | #endif |
| 3275 | strcpy(buffer, "???"); |
3274 | 3276 | drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer); |
3275 | 3277 | |
3276 | 3278 | /* output register states */ |
trunk/src/emu/cpu/powerpc/ppcdrc.c
r241772 | r241773 | |
368 | 368 | |
369 | 369 | /* get a description of this sequence */ |
370 | 370 | desclist = m_drcfe->describe_code(pc); |
371 | | if (LOG_UML || LOG_NATIVE) |
| 371 | if (m_drcuml->logging() || LOG_NATIVE) |
372 | 372 | log_opcode_desc(m_drcuml, desclist, 0); |
373 | 373 | |
374 | 374 | bool succeeded = false; |
r241772 | r241773 | |
386 | 386 | UINT32 nextpc; |
387 | 387 | |
388 | 388 | /* add a code log entry */ |
389 | | if (LOG_UML) |
| 389 | if (m_drcuml->logging()) |
390 | 390 | block->append_comment("-------------------------"); // comment |
391 | 391 | |
392 | 392 | /* determine the last instruction in this sequence */ |
r241772 | r241773 | |
1587 | 1587 | void ppc_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) |
1588 | 1588 | { |
1589 | 1589 | const opcode_desc *curdesc; |
1590 | | if (LOG_UML) |
| 1590 | if (m_drcuml->logging()) |
1591 | 1591 | block->append_comment("[Validation for %08X]", seqhead->pc); // comment |
1592 | 1592 | |
1593 | 1593 | /* loose verify or single instruction: just compare and fail */ |
r241772 | r241773 | |
1644 | 1644 | int hotnum; |
1645 | 1645 | |
1646 | 1646 | /* add an entry for the log */ |
1647 | | if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
| 1647 | if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
1648 | 1648 | log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); |
1649 | 1649 | |
1650 | 1650 | /* set the PC map variable */ |
r241772 | r241773 | |
3712 | 3712 | void ppc_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op) |
3713 | 3713 | { |
3714 | 3714 | char buffer[100]; |
3715 | | if (LOG_UML) |
| 3715 | if (m_drcuml->logging()) |
3716 | 3716 | { |
3717 | 3717 | ppc_dasm_one(buffer, pc, op); |
3718 | 3718 | block->append_comment("%08X: %s", pc, buffer); // comment |
r241772 | r241773 | |
3895 | 3895 | char buffer[100]; |
3896 | 3896 | |
3897 | 3897 | /* disassemle the current instruction and output it to the log */ |
3898 | | if (LOG_UML || LOG_NATIVE) |
| 3898 | if (drcuml->logging() || LOG_NATIVE) |
3899 | 3899 | { |
3900 | 3900 | if (desclist->flags & OPFLAG_VIRTUAL_NOOP) |
3901 | 3901 | strcpy(buffer, "<virtual nop>"); |
trunk/src/emu/cpu/rsp/rsp.c
r241772 | r241773 | |
121 | 121 | , m_program_config("program", ENDIANNESS_BIG, 32, 32) |
122 | 122 | , m_cache(CACHE_SIZE + sizeof(internal_rsp_state)) |
123 | 123 | , m_drcuml(NULL) |
124 | | // , m_drcuml(*this, m_cache, ( RSP_LOG_UML ? DRCUML_OPTION_LOG_UML : 0 ) | ( RSP_LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 8, 32, 2) |
| 124 | // , m_drcuml(*this, m_cache, ( RSP_LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 8, 32, 2) |
125 | 125 | , m_drcfe(NULL) |
126 | 126 | , m_drcoptions(0) |
127 | 127 | , m_cache_dirty(TRUE) |
r241772 | r241773 | |
432 | 432 | |
433 | 433 | /* initialize the UML generator */ |
434 | 434 | UINT32 drc_flags = 0; |
435 | | if (RSP_LOG_UML) |
436 | | { |
437 | | drc_flags |= DRCUML_OPTION_LOG_UML; |
438 | | } |
439 | 435 | if (RSP_LOG_NATIVE) |
440 | 436 | { |
441 | 437 | drc_flags |= DRCUML_OPTION_LOG_NATIVE; |
trunk/src/emu/cpu/rsp/rspdrc.c
r241772 | r241773 | |
7122 | 7122 | UINT32 nextpc; |
7123 | 7123 | |
7124 | 7124 | /* add a code log entry */ |
7125 | | if (RSP_LOG_UML) |
| 7125 | if (drcuml->logging()) |
7126 | 7126 | block->append_comment("-------------------------"); // comment |
7127 | 7127 | |
7128 | 7128 | /* determine the last instruction in this sequence */ |
r241772 | r241773 | |
7403 | 7403 | void rsp_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) |
7404 | 7404 | { |
7405 | 7405 | const opcode_desc *curdesc; |
7406 | | if (RSP_LOG_UML) |
| 7406 | if (m_drcuml->logging()) |
7407 | 7407 | { |
7408 | 7408 | block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment |
7409 | 7409 | } |
r241772 | r241773 | |
7470 | 7470 | offs_t expc; |
7471 | 7471 | |
7472 | 7472 | /* add an entry for the log */ |
7473 | | if (RSP_LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
| 7473 | if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
7474 | 7474 | log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); |
7475 | 7475 | |
7476 | 7476 | /* set the PC map variable */ |
r241772 | r241773 | |
9246 | 9246 | |
9247 | 9247 | void rsp_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op) |
9248 | 9248 | { |
9249 | | #if (RSP_LOG_UML) |
9250 | | char buffer[100]; |
9251 | | rsp_dasm_one(buffer, pc, op); |
9252 | | block->append_comment("%08X: %s", pc, buffer); // comment |
9253 | | #endif |
| 9249 | if (m_drcuml->logging()) |
| 9250 | { |
| 9251 | char buffer[100]; |
| 9252 | rsp_dasm_one(buffer, pc, op); |
| 9253 | block->append_comment("%08X: %s", pc, buffer); // comment |
| 9254 | } |
9254 | 9255 | } |
trunk/src/emu/cpu/sh2/sh2.c
r241772 | r241773 | |
115 | 115 | DEBUGGING |
116 | 116 | ***************************************************************************/ |
117 | 117 | |
118 | | #define LOG_UML (0) // log UML assembly |
119 | 118 | #define LOG_NATIVE (0) // log native assembly |
120 | 119 | |
121 | 120 | #define DISABLE_FAST_REGISTERS (0) // set to 1 to turn off usage of register caching |
r241772 | r241773 | |
170 | 169 | , m_cpu_type(CPU_TYPE_SH2) |
171 | 170 | , m_cache(CACHE_SIZE + sizeof(internal_sh2_state)) |
172 | 171 | , m_drcuml(NULL) |
173 | | // , m_drcuml(*this, m_cache, ( LOG_UML ? DRCUML_OPTION_LOG_UML : 0 ) | ( LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 1, 32, 1) |
| 172 | // , m_drcuml(*this, m_cache, ( LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 1, 32, 1) |
174 | 173 | , m_drcfe(NULL) |
175 | 174 | , m_drcoptions(0) |
176 | 175 | , m_sh2_state(NULL) |
r241772 | r241773 | |
207 | 206 | , m_cpu_type(cpu_type) |
208 | 207 | , m_cache(CACHE_SIZE + sizeof(internal_sh2_state)) |
209 | 208 | , m_drcuml(NULL) |
210 | | // , m_drcuml(*this, m_cache, ( LOG_UML ? DRCUML_OPTION_LOG_UML : 0 ) | ( LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 1, 32, 1) |
| 209 | // , m_drcuml(*this, m_cache, ( LOG_NATIVE ? DRCUML_OPTION_LOG_NATIVE : 0 ), 1, 32, 1) |
211 | 210 | , m_drcfe(NULL) |
212 | 211 | , m_drcoptions(0) |
213 | 212 | , m_sh2_state(NULL) |
r241772 | r241773 | |
2561 | 2560 | |
2562 | 2561 | /* initialize the UML generator */ |
2563 | 2562 | UINT32 flags = 0; |
2564 | | if (LOG_UML) |
2565 | | flags |= DRCUML_OPTION_LOG_UML; |
2566 | 2563 | if (LOG_NATIVE) |
2567 | 2564 | flags |= DRCUML_OPTION_LOG_NATIVE; |
2568 | 2565 | m_drcuml = auto_alloc(machine(), drcuml_state(*this, m_cache, flags, 1, 32, 1)); |
trunk/src/emu/cpu/sh2/sh2drc.c
r241772 | r241773 | |
675 | 675 | |
676 | 676 | /* get a description of this sequence */ |
677 | 677 | desclist = m_drcfe->describe_code(pc); |
678 | | if (LOG_UML || LOG_NATIVE) |
| 678 | if (drcuml->logging() || LOG_NATIVE) |
679 | 679 | log_opcode_desc(drcuml, desclist, 0); |
680 | 680 | |
681 | 681 | bool succeeded = false; |
r241772 | r241773 | |
693 | 693 | UINT32 nextpc; |
694 | 694 | |
695 | 695 | /* add a code log entry */ |
696 | | if (LOG_UML) |
| 696 | if (drcuml->logging()) |
697 | 697 | block->append_comment("-------------------------"); // comment |
698 | 698 | |
699 | 699 | /* determine the last instruction in this sequence */ |
r241772 | r241773 | |
1174 | 1174 | char buffer[100]; |
1175 | 1175 | |
1176 | 1176 | /* disassemle the current instruction and output it to the log */ |
1177 | | #if (LOG_UML || LOG_NATIVE) |
1178 | | if (desclist->flags & OPFLAG_VIRTUAL_NOOP) |
1179 | | strcpy(buffer, "<virtual nop>"); |
| 1177 | if (drcuml->logging() || LOG_NATIVE) |
| 1178 | { |
| 1179 | if (desclist->flags & OPFLAG_VIRTUAL_NOOP) |
| 1180 | strcpy(buffer, "<virtual nop>"); |
| 1181 | else |
| 1182 | DasmSH2(buffer, desclist->pc, desclist->opptr.w[0]); |
| 1183 | } |
1180 | 1184 | else |
1181 | | DasmSH2(buffer, desclist->pc, desclist->opptr.w[0]); |
1182 | | #else |
1183 | | strcpy(buffer, "???"); |
1184 | | #endif |
| 1185 | strcpy(buffer, "???"); |
1185 | 1186 | drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer); |
1186 | 1187 | |
1187 | 1188 | /* output register states */ |
r241772 | r241773 | |
1206 | 1207 | |
1207 | 1208 | void sh2_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op) |
1208 | 1209 | { |
1209 | | #if (LOG_UML) |
1210 | | char buffer[100]; |
1211 | | DasmSH2(buffer, pc, op); |
1212 | | block->append_comment("%08X: %s", pc, buffer); // comment |
1213 | | #endif |
| 1210 | if (m_drcuml->logging()) |
| 1211 | { |
| 1212 | char buffer[100]; |
| 1213 | DasmSH2(buffer, pc, op); |
| 1214 | block->append_comment("%08X: %s", pc, buffer); // comment |
| 1215 | } |
1214 | 1216 | } |
1215 | 1217 | |
1216 | 1218 | /*------------------------------------------------- |
r241772 | r241773 | |
1299 | 1301 | void sh2_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) |
1300 | 1302 | { |
1301 | 1303 | const opcode_desc *curdesc; |
1302 | | if (LOG_UML) |
| 1304 | if (m_drcuml->logging()) |
1303 | 1305 | block->append_comment("[Validation for %08X]", seqhead->pc); // comment |
1304 | 1306 | |
1305 | 1307 | /* loose verify or single instruction: just compare and fail */ |
r241772 | r241773 | |
1356 | 1358 | offs_t expc; |
1357 | 1359 | |
1358 | 1360 | /* add an entry for the log */ |
1359 | | if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
| 1361 | if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) |
1360 | 1362 | log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); |
1361 | 1363 | |
1362 | 1364 | /* set the PC map variable */ |
trunk/src/emu/emuopts.c
r241772 | r241773 | |
157 | 157 | { NULL, NULL, OPTION_HEADER, "CORE MISC OPTIONS" }, |
158 | 158 | { OPTION_DRC, "1", OPTION_BOOLEAN, "enable DRC cpu core if available" }, |
159 | 159 | { OPTION_DRC_USE_C, "0", OPTION_BOOLEAN, "force DRC use C backend" }, |
| 160 | { OPTION_DRC_LOG_UML, "0", OPTION_BOOLEAN, "write DRC UML disassembly log" }, |
160 | 161 | { OPTION_BIOS, NULL, OPTION_STRING, "select the system BIOS to use" }, |
161 | 162 | { OPTION_CHEAT ";c", "0", OPTION_BOOLEAN, "enable cheat subsystem" }, |
162 | 163 | { OPTION_SKIP_GAMEINFO, "0", OPTION_BOOLEAN, "skip displaying the information screen at startup" }, |
trunk/src/emu/emuopts.h
r241772 | r241773 | |
160 | 160 | // core misc options |
161 | 161 | #define OPTION_DRC "drc" |
162 | 162 | #define OPTION_DRC_USE_C "drc_use_c" |
| 163 | #define OPTION_DRC_LOG_UML "drc_log_uml" |
163 | 164 | #define OPTION_BIOS "bios" |
164 | 165 | #define OPTION_CHEAT "cheat" |
165 | 166 | #define OPTION_SKIP_GAMEINFO "skip_gameinfo" |
r241772 | r241773 | |
320 | 321 | // core misc options |
321 | 322 | bool drc() const { return bool_value(OPTION_DRC); } |
322 | 323 | bool drc_use_c() const { return bool_value(OPTION_DRC_USE_C); } |
| 324 | bool drc_log_uml() const { return bool_value(OPTION_DRC_LOG_UML); } |
323 | 325 | const char *bios() const { return value(OPTION_BIOS); } |
324 | 326 | bool cheat() const { return bool_value(OPTION_CHEAT); } |
325 | 327 | bool skip_gameinfo() const { return bool_value(OPTION_SKIP_GAMEINFO); } |