trunk/src/emu/cpu/upd7810/upd7810.c
| r241764 | r241765 | |
| 1313 | 1313 | IRR |= INTFE0; |
| 1314 | 1314 | if (ETM1 == ECNT) |
| 1315 | 1315 | IRR |= INTFE1; |
| 1316 | | /* How and When ECNT is Cleared */ |
| 1317 | | switch (ETMM & 0x0c) |
| 1318 | | { |
| 1319 | | case 0x00: /* clear ECNT */ |
| 1320 | | break; |
| 1321 | | case 0x04: /* free running */ |
| 1322 | | if (0 == ECNT) |
| 1323 | | ITF |= INTOV; /* set overflow flag if counter wrapped */ |
| 1324 | | break; |
| 1325 | | case 0x08: /* reset at falling edge of CI or TO */ |
| 1326 | | break; |
| 1327 | | case 0x0c: /* reset if ECNT == ETM1 */ |
| 1328 | | if (ETM1 == ECNT) |
| 1329 | | ECNT = 0; |
| 1330 | | break; |
| 1331 | | } |
| 1332 | 1316 | /* Conditions When ECNT Causes a CO0 Output Change */ |
| 1333 | 1317 | if (((0x00 == (ETMM & 0x30)) && (ETM0 == ECNT)) || /* set CO0 if ECNT == ETM0 */ |
| 1334 | 1318 | /* ((0x10 == (ETMM & 0x30)) prohibited */ |
| r241764 | r241765 | |
| 1367 | 1351 | break; |
| 1368 | 1352 | } |
| 1369 | 1353 | } |
| 1354 | /* How and When ECNT is Cleared */ |
| 1355 | switch (ETMM & 0x0c) |
| 1356 | { |
| 1357 | case 0x00: /* clear ECNT */ |
| 1358 | break; |
| 1359 | case 0x04: /* free running */ |
| 1360 | if (0 == ECNT) |
| 1361 | ITF |= INTOV; /* set overflow flag if counter wrapped */ |
| 1362 | break; |
| 1363 | case 0x08: /* reset at falling edge of CI or TO */ |
| 1364 | break; |
| 1365 | case 0x0c: /* reset if ECNT == ETM1 */ |
| 1366 | if (ETM1 == ECNT) |
| 1367 | ECNT = 0; |
| 1368 | break; |
| 1369 | } |
| 1370 | 1370 | } |
| 1371 | 1371 | } |
| 1372 | 1372 | |