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r33168 Monday 3rd November, 2014 at 15:33:40 UTC by Dirk Best
px4: clean ups
[src/mess/drivers]px4.c

trunk/src/mess/drivers/px4.c
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1919#include "machine/ram.h"
2020#include "machine/nvram.h"
2121#include "sound/speaker.h"
22
2322#include "bus/generic/slot.h"
2423#include "bus/generic/carts.h"
2524#include "px4.lh"
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3130
3231#define VERBOSE 1
3332
34// interrupt sources
35#define INT0_7508   0x01
36#define INT1_ART    0x02
37#define INT2_ICF    0x04
38#define INT3_OVF    0x08
39#define INT4_EXT    0x10
4033
41// 7508 interrupt sources
42#define UPD7508_INT_ALARM       0x02
43#define UPD7508_INT_POWER_FAIL  0x04
44#define UPD7508_INT_7508_RESET  0x08
45#define UPD7508_INT_Z80_RESET   0x10
46#define UPD7508_INT_ONE_SECOND  0x20
47
48// art (asynchronous receiver transmitter)
49#define ART_TXRDY   0x01    // output buffer empty
50#define ART_RXRDY   0x02    // data byte received
51#define ART_TXEMPTY 0x04    // transmit buffer empty
52#define ART_PE      0x08    // parity error
53#define ART_OE      0x10    // overrun error
54#define ART_FE      0x20    // framing error
55
56
5734//**************************************************************************
5835//  MACROS
5936//**************************************************************************
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6744//  TYPE DEFINITIONS
6845//**************************************************************************
6946
70class px4_state : public driver_device,
71               public device_serial_interface
47class px4_state : public driver_device,   public device_serial_interface
7248{
7349public:
7450   px4_state(const machine_config &mconfig, device_type type, const char *tag) :
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8258   m_speaker(*this, "speaker"),
8359   m_sio(*this, "sio"),
8460   m_rs232(*this, "rs232"),
85   m_caps1(*this, "capsule1"),
86   m_caps2(*this, "capsule2"),
87   m_rdsocket(*this, "ramdisk_socket"),
61   m_caps1(*this, "capsule1"),   m_caps2(*this, "capsule2"),
62   m_caps1_rom(NULL), m_caps2_rom(NULL),
63   m_ctrl1(0), m_icrb(0), m_bankr(0),
8864   m_isr(0), m_ier(0), m_str(0), m_sior(0xbf),
65   m_frc_value(0), m_frc_latch(0),
66   m_vadr(0), m_yoff(0),
67   m_receive_timer(NULL), m_transmit_timer(NULL),
8968   m_artdir(0xff), m_artdor(0xff), m_artsr(0), m_artcr(0),
9069   m_swr(0),
9170   m_one_sec_int_enabled(true), m_alarm_int_enabled(true), m_key_int_enabled(true),
92   m_ramdisk_address(0),
93   m_ear_last_state(0)
71   m_key_status(0), m_interrupt_status(0),
72   m_ear_last_state(0),
73   m_sio_pin(0), m_serial_rx(0), m_rs232_dcd(0), m_rs232_cts(0),
74   m_centronics_busy(0), m_centronics_perror(0)
9475   { }
9576
77   DECLARE_DRIVER_INIT( px4 );
78
79   DECLARE_PALETTE_INIT( px4 );
80   UINT32 screen_update_px4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
81
82   DECLARE_READ8_MEMBER( icrlc_r );
83   DECLARE_WRITE8_MEMBER( ctrl1_w );
84   DECLARE_READ8_MEMBER( icrhc_r );
85   DECLARE_WRITE8_MEMBER( cmdr_w );
86   DECLARE_READ8_MEMBER( icrlb_r );
87   DECLARE_WRITE8_MEMBER( ctrl2_w );
88   DECLARE_READ8_MEMBER( icrhb_r );
89   DECLARE_READ8_MEMBER( isr_r );
90   DECLARE_WRITE8_MEMBER( ier_w );
91   DECLARE_READ8_MEMBER( str_r );
92   DECLARE_WRITE8_MEMBER( bankr_w );
93   DECLARE_READ8_MEMBER( sior_r );
94   DECLARE_WRITE8_MEMBER( sior_w );
95   DECLARE_WRITE8_MEMBER( vadr_w );
96   DECLARE_WRITE8_MEMBER( yoff_w );
97   DECLARE_WRITE8_MEMBER( fr_w );
98   DECLARE_WRITE8_MEMBER( spur_w );
99   DECLARE_READ8_MEMBER( ctgif_r );
100   DECLARE_WRITE8_MEMBER( ctgif_w );
101   DECLARE_READ8_MEMBER( artdir_r );
102   DECLARE_WRITE8_MEMBER( artdor_w );
103   DECLARE_READ8_MEMBER( artsr_r );
104   DECLARE_WRITE8_MEMBER( artmr_w );
105   DECLARE_READ8_MEMBER( iostr_r );
106   DECLARE_WRITE8_MEMBER( artcr_w );
107   DECLARE_WRITE8_MEMBER( swr_w );
108   DECLARE_WRITE8_MEMBER( ioctlr_w );
109
110   DECLARE_INPUT_CHANGED_MEMBER( key_callback );
111
112   TIMER_DEVICE_CALLBACK_MEMBER( ext_cassette_read );
113   TIMER_DEVICE_CALLBACK_MEMBER( frc_tick );
114   TIMER_DEVICE_CALLBACK_MEMBER( upd7508_1sec_callback );
115
116   // serial
117   DECLARE_WRITE_LINE_MEMBER( sio_rx_w );
118   DECLARE_WRITE_LINE_MEMBER( sio_pin_w );
119   DECLARE_WRITE_LINE_MEMBER( rs232_rx_w );
120   DECLARE_WRITE_LINE_MEMBER( rs232_dcd_w );
121   DECLARE_WRITE_LINE_MEMBER( rs232_dsr_w );
122   DECLARE_WRITE_LINE_MEMBER( rs232_cts_w );
123   TIMER_CALLBACK_MEMBER( transmit_data );
124   TIMER_CALLBACK_MEMBER( receive_data );
125
126   // centronics
127   DECLARE_WRITE_LINE_MEMBER( centronics_busy_w ) { m_centronics_busy = state; }
128   DECLARE_WRITE_LINE_MEMBER( centronics_perror_w ) { m_centronics_perror = state; }
129
130protected:
131   // driver_device overrides
132   virtual void machine_start();
133   virtual void machine_reset();
134
135   // device_serial_interface overrides
136   virtual void tra_callback();
137   virtual void tra_complete();
138   virtual void rcv_callback();
139   virtual void rcv_complete();
140
141   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
142
143private:
144   // z80 interrupt sources
145   enum
146   {
147      INT0_7508 = 0x01,
148      INT1_ART  = 0x02,
149      INT2_ICF  = 0x04,
150      INT3_OVF  = 0x08,
151      INT4_EXT  = 0x10
152   };
153
154   // 7508 interrupt sources
155   enum
156   {
157      UPD7508_INT_ALARM      = 0x02,
158      UPD7508_INT_POWER_FAIL = 0x04,
159      UPD7508_INT_7508_RESET = 0x08,
160      UPD7508_INT_Z80_RESET  = 0x10,
161      UPD7508_INT_ONE_SECOND = 0x20
162   };
163
164   // art (asynchronous receiver transmitter)
165   enum
166   {
167      ART_TXRDY   = 0x01, // output buffer empty
168      ART_RXRDY   = 0x02, // data byte received
169      ART_TXEMPTY = 0x04, // transmit buffer empty
170      ART_PE      = 0x08, // parity error
171      ART_OE      = 0x10, // overrun error
172      ART_FE      = 0x20  // framing error
173   };
174
175   void gapnit_interrupt();
176
177   DECLARE_WRITE_LINE_MEMBER( serial_rx_w );
178   void txd_w(int data);
179
180   void install_rom_capsule(address_space &space, int size, memory_region *mem);
181
96182   // internal devices
97183   required_device<cpu_device> m_z80;
98184   required_device<ram_device> m_ram;
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104190   required_device<rs232_port_device> m_rs232;
105191   required_device<generic_slot_device> m_caps1;
106192   required_device<generic_slot_device> m_caps2;
107   optional_device<generic_slot_device> m_rdsocket;
108193
109194   memory_region *m_caps1_rom;
110195   memory_region *m_caps2_rom;
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126211   UINT8 m_vadr;
127212   UINT8 m_yoff;
128213
129   void gapnit_interrupt();
130
131214   // gapnio
132215   emu_timer *m_receive_timer;
133216   emu_timer *m_transmit_timer;
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137220   UINT8 m_artcr;
138221   UINT8 m_swr;
139222
140   void txd_w(int data);
141
142223   // 7508 internal
143224   bool m_one_sec_int_enabled;
144225   bool m_alarm_int_enabled;
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147228   UINT8 m_key_status;
148229   UINT8 m_interrupt_status;
149230
150   // external ramdisk
151   offs_t m_ramdisk_address;
152   UINT8 *m_ramdisk;
153
154231   // external cassette/barcode reader
155232   int m_ear_last_state;
156233
157   void install_rom_capsule(address_space &space, int size, memory_region *mem);
234   // serial
235   int m_sio_pin;
236   int m_serial_rx;
237   int m_rs232_dcd;
238   int m_rs232_cts;
158239
159   // device_serial_interface overrides
160   virtual void tra_callback();
161   virtual void tra_complete();
162   virtual void rcv_callback();
163   virtual void rcv_complete();
240   // centronics
241   int m_centronics_busy;
242   int m_centronics_perror;
243};
164244
165   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
245class px4p_state : public px4_state
246{
247public:
248   px4p_state(const machine_config &mconfig, device_type type, const char *tag) :
249   px4_state(mconfig, type, tag),
250   m_rdnvram(*this, "rdnvram"),
251   m_rdsocket(*this, "ramdisk_socket"),
252   m_ramdisk_address(0),
253   m_ramdisk(NULL)
254   { }
166255
167   DECLARE_WRITE_LINE_MEMBER( sio_rx_w );
168   DECLARE_WRITE_LINE_MEMBER( sio_pin_w );
256   DECLARE_DRIVER_INIT( px4p );
169257
170   DECLARE_WRITE_LINE_MEMBER( rs232_rx_w );
171   DECLARE_WRITE_LINE_MEMBER( rs232_dcd_w );
172   DECLARE_WRITE_LINE_MEMBER( rs232_dsr_w );
173   DECLARE_WRITE_LINE_MEMBER( rs232_cts_w );
258   DECLARE_PALETTE_INIT( px4p );
174259
175   int m_sio_pin;
260   DECLARE_WRITE8_MEMBER( ramdisk_address_w );
261   DECLARE_READ8_MEMBER( ramdisk_data_r );
262   DECLARE_WRITE8_MEMBER( ramdisk_data_w );
263   DECLARE_READ8_MEMBER( ramdisk_control_r );
176264
177   int m_serial_rx;
178   int m_rs232_dcd;
179   int m_rs232_cts;
180
181   DECLARE_READ8_MEMBER(px4_icrlc_r);
182   DECLARE_WRITE8_MEMBER(px4_ctrl1_w);
183   DECLARE_READ8_MEMBER(px4_icrhc_r);
184   DECLARE_WRITE8_MEMBER(px4_cmdr_w);
185   DECLARE_READ8_MEMBER(px4_icrlb_r);
186   DECLARE_WRITE8_MEMBER(px4_ctrl2_w);
187   DECLARE_READ8_MEMBER(px4_icrhb_r);
188   DECLARE_READ8_MEMBER(px4_isr_r);
189   DECLARE_WRITE8_MEMBER(px4_ier_w);
190   DECLARE_READ8_MEMBER(px4_str_r);
191   DECLARE_WRITE8_MEMBER(px4_bankr_w);
192   DECLARE_READ8_MEMBER(px4_sior_r);
193   DECLARE_WRITE8_MEMBER(px4_sior_w);
194   DECLARE_WRITE8_MEMBER(px4_vadr_w);
195   DECLARE_WRITE8_MEMBER(px4_yoff_w);
196   DECLARE_WRITE8_MEMBER(px4_fr_w);
197   DECLARE_WRITE8_MEMBER(px4_spur_w);
198   DECLARE_READ8_MEMBER(px4_ctgif_r);
199   DECLARE_WRITE8_MEMBER(px4_ctgif_w);
200   DECLARE_READ8_MEMBER(px4_artdir_r);
201   DECLARE_WRITE8_MEMBER(px4_artdor_w);
202   DECLARE_READ8_MEMBER(px4_artsr_r);
203   DECLARE_WRITE8_MEMBER(px4_artmr_w);
204   DECLARE_READ8_MEMBER(px4_iostr_r);
205   DECLARE_WRITE8_MEMBER(px4_artcr_w);
206   DECLARE_WRITE8_MEMBER(px4_swr_w);
207   DECLARE_WRITE8_MEMBER(px4_ioctlr_w);
208   DECLARE_WRITE8_MEMBER(px4_ramdisk_address_w);
209   DECLARE_READ8_MEMBER(px4_ramdisk_data_r);
210   DECLARE_WRITE8_MEMBER(px4_ramdisk_data_w);
211   DECLARE_READ8_MEMBER(px4_ramdisk_control_r);
212   DECLARE_DRIVER_INIT(px4);
213   DECLARE_DRIVER_INIT(px4p);
265protected:
266   // driver_device overrides
214267   virtual void machine_start();
215   virtual void machine_reset();
216   DECLARE_PALETTE_INIT(px4);
217   DECLARE_MACHINE_START(px4_ramdisk);
218   DECLARE_PALETTE_INIT(px4p);
219   UINT32 screen_update_px4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
220   DECLARE_INPUT_CHANGED_MEMBER(key_callback);
221   TIMER_DEVICE_CALLBACK_MEMBER( ext_cassette_read );
222   TIMER_CALLBACK_MEMBER(transmit_data);
223   TIMER_CALLBACK_MEMBER(receive_data);
224   TIMER_DEVICE_CALLBACK_MEMBER(frc_tick);
225   TIMER_DEVICE_CALLBACK_MEMBER(upd7508_1sec_callback);
226268
227   int m_centronics_busy;
228   int m_centronics_perror;
229   DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
230   DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
269private:
270   required_device<nvram_device> m_rdnvram;
271   required_device<generic_slot_device> m_rdsocket;
231272
232private:
233   DECLARE_WRITE_LINE_MEMBER( serial_rx_w );
273   offs_t m_ramdisk_address;
274   UINT8 *m_ramdisk;
234275};
235276
236277
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310351}
311352
312353// input capture register low command trigger
313READ8_MEMBER( px4_state::px4_icrlc_r )
354READ8_MEMBER( px4_state::icrlc_r )
314355{
315356   if (VERBOSE)
316      logerror("%s: px4_icrlc_r\n", machine().describe_context());
357      logerror("%s: icrlc_r\n", machine().describe_context());
317358
318359   // latch value
319360   m_frc_latch = m_frc_value;
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322363}
323364
324365// control register 1
325WRITE8_MEMBER( px4_state::px4_ctrl1_w )
366WRITE8_MEMBER( px4_state::ctrl1_w )
326367{
327368   const int rcv_rates[] = { 110, 150, 300, 600, 1200, 2400, 4800, 9600, 75, 1200, 19200, 38400, 200 };
328369   const int tra_rates[] = { 110, 150, 300, 600, 1200, 2400, 4800, 9600, 1200, 75, 19200, 38400, 200 };
329370
330371   if (VERBOSE)
331      logerror("%s: px4_ctrl1_w (0x%02x)\n", machine().describe_context(), data);
372      logerror("%s: ctrl1_w (0x%02x)\n", machine().describe_context(), data);
332373
333374   // baudrate generator
334375   int baud = data >> 4;
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346387}
347388
348389// input capture register high command trigger
349READ8_MEMBER( px4_state::px4_icrhc_r )
390READ8_MEMBER( px4_state::icrhc_r )
350391{
351392   if (VERBOSE)
352      logerror("%s: px4_icrhc_r\n", machine().describe_context());
393      logerror("%s: icrhc_r\n", machine().describe_context());
353394
354395   return (m_frc_latch >> 8) & 0xff;
355396}
356397
357398// command register
358WRITE8_MEMBER( px4_state::px4_cmdr_w )
399WRITE8_MEMBER( px4_state::cmdr_w )
359400{
360401   if (0)
361      logerror("%s: px4_cmdr_w (0x%02x)\n", machine().describe_context(), data);
402      logerror("%s: cmdr_w (0x%02x)\n", machine().describe_context(), data);
362403
363404   // clear overflow interrupt?
364405   if (BIT(data, 2))
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369410}
370411
371412// input capture register low barcode trigger
372READ8_MEMBER( px4_state::px4_icrlb_r )
413READ8_MEMBER( px4_state::icrlb_r )
373414{
374415   if (VERBOSE)
375      logerror("%s: px4_icrlb_r\n", machine().describe_context());
416      logerror("%s: icrlb_r\n", machine().describe_context());
376417
377418   return m_icrb & 0xff;
378419}
379420
380421// control register 2
381WRITE8_MEMBER( px4_state::px4_ctrl2_w )
422WRITE8_MEMBER( px4_state::ctrl2_w )
382423{
383424   if (VERBOSE)
384      logerror("%s: px4_ctrl2_w (0x%02x)\n", machine().describe_context(), data);
425      logerror("%s: ctrl2_w (0x%02x)\n", machine().describe_context(), data);
385426
386427   // bit 0, MIC, cassette output
387428   m_ext_cas->output( BIT(data, 0) ? -1.0 : +1.0);
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400441}
401442
402443// input capture register high barcode trigger
403READ8_MEMBER( px4_state::px4_icrhb_r )
444READ8_MEMBER( px4_state::icrhb_r )
404445{
405446   if (VERBOSE)
406      logerror("%s: px4_icrhb_r\n", machine().describe_context());
447      logerror("%s: icrhb_r\n", machine().describe_context());
407448
408449   // clear icf interrupt
409450   m_isr &= ~INT2_ICF;
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413454}
414455
415456// interrupt status register
416READ8_MEMBER( px4_state::px4_isr_r )
457READ8_MEMBER( px4_state::isr_r )
417458{
418459   if (VERBOSE)
419      logerror("%s: px4_isr_r\n", machine().describe_context());
460      logerror("%s: isr_r\n", machine().describe_context());
420461
421462   return m_isr;
422463}
423464
424465// interrupt enable register
425WRITE8_MEMBER( px4_state::px4_ier_w )
466WRITE8_MEMBER( px4_state::ier_w )
426467{
427468   if (0)
428      logerror("%s: px4_ier_w (0x%02x)\n", machine().describe_context(), data);
469      logerror("%s: ier_w (0x%02x)\n", machine().describe_context(), data);
429470
430471   m_ier = data;
431472   gapnit_interrupt();
432473}
433474
434475// status register
435READ8_MEMBER( px4_state::px4_str_r )
476READ8_MEMBER( px4_state::str_r )
436477{
437478   UINT8 data = 0;
438479
439480   if (0)
440      logerror("%s: px4_str_r\n", machine().describe_context());
481      logerror("%s: str_r\n", machine().describe_context());
441482
442483   data |= (m_ext_cas)->input() > 0 ? 1 : 0;
443484   data |= 1 << 1;   // BCRD, barcode reader input
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467508}
468509
469510// bank register
470WRITE8_MEMBER( px4_state::px4_bankr_w )
511WRITE8_MEMBER( px4_state::bankr_w )
471512{
472513   address_space &space_program = m_z80->space(AS_PROGRAM);
473514
474515   if (0)
475      logerror("%s: px4_bankr_w (0x%02x)\n", machine().describe_context(), data);
516      logerror("%s: bankr_w (0x%02x)\n", machine().describe_context(), data);
476517
477518   m_bankr = data;
478519
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505546}
506547
507548// serial io register
508READ8_MEMBER( px4_state::px4_sior_r )
549READ8_MEMBER( px4_state::sior_r )
509550{
510551   if (0)
511      logerror("%s: px4_sior_r 0x%02x\n", machine().describe_context(), m_sior);
552      logerror("%s: sior_r 0x%02x\n", machine().describe_context(), m_sior);
512553
513554   return m_sior;
514555}
515556
516557// serial io register
517WRITE8_MEMBER( px4_state::px4_sior_w )
558WRITE8_MEMBER( px4_state::sior_w )
518559{
519560   if (0)
520      logerror("%s: px4_sior_w (0x%02x)\n", machine().describe_context(), data);
561      logerror("%s: sior_w (0x%02x)\n", machine().describe_context(), data);
521562
522563   m_sior = data;
523564
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644685//**************************************************************************
645686
646687// vram start address register
647WRITE8_MEMBER( px4_state::px4_vadr_w )
688WRITE8_MEMBER( px4_state::vadr_w )
648689{
649690   if (VERBOSE)
650      logerror("%s: px4_vadr_w (0x%02x)\n", machine().describe_context(), data);
691      logerror("%s: vadr_w (0x%02x)\n", machine().describe_context(), data);
651692
652693   m_vadr = data;
653694}
654695
655696// y offset register
656WRITE8_MEMBER( px4_state::px4_yoff_w )
697WRITE8_MEMBER( px4_state::yoff_w )
657698{
658699   if (VERBOSE)
659      logerror("%s: px4_yoff_w (0x%02x)\n", machine().describe_context(), data);
700      logerror("%s: yoff_w (0x%02x)\n", machine().describe_context(), data);
660701
661702   m_yoff = data;
662703}
663704
664705// frame register
665WRITE8_MEMBER( px4_state::px4_fr_w )
706WRITE8_MEMBER( px4_state::fr_w )
666707{
667708   if (VERBOSE)
668      logerror("%s: px4_fr_w (0x%02x)\n", machine().describe_context(), data);
709      logerror("%s: fr_w (0x%02x)\n", machine().describe_context(), data);
669710}
670711
671712// speed-up register
672WRITE8_MEMBER( px4_state::px4_spur_w )
713WRITE8_MEMBER( px4_state::spur_w )
673714{
674715   if (VERBOSE)
675      logerror("%s: px4_spur_w (0x%02x)\n", machine().describe_context(), data);
716      logerror("%s: spur_w (0x%02x)\n", machine().describe_context(), data);
676717}
677718
678719
r241679r241680
728769   if (ART_TX_ENABLED)
729770   {
730771      if (ART_BREAK)
731      {
732         // transmit break
733         txd_w(0);
734      }
772         txd_w(0); // transmit break
735773      else
736      {
737         // transmit data
738         txd_w(transmit_register_get_data_bit());
739      }
774         txd_w(transmit_register_get_data_bit()); // transmit data
740775   }
741776   else
742   {
743      // transmit mark
744      txd_w(1);
745   }
777      txd_w(1); // transmit mark
746778}
747779
748780void px4_state::tra_complete()
r241679r241680
763795void px4_state::rcv_callback()
764796{
765797   if (ART_RX_ENABLED)
766   {
767      // receive data
768      receive_register_update_bit(m_serial_rx);
769   }
798      receive_register_update_bit(m_serial_rx); // receive data
770799}
771800
772801void px4_state::rcv_complete()
r241679r241680
800829}
801830
802831// cartridge interface
803READ8_MEMBER( px4_state::px4_ctgif_r )
832READ8_MEMBER( px4_state::ctgif_r )
804833{
805834   if (VERBOSE)
806      logerror("%s: px4_ctgif_r @ 0x%02x\n", machine().describe_context(), offset);
835      logerror("%s: ctgif_r @ 0x%02x\n", machine().describe_context(), offset);
807836
808837   return 0x00;
809838}
810839
811840// cartridge interface
812WRITE8_MEMBER( px4_state::px4_ctgif_w )
841WRITE8_MEMBER( px4_state::ctgif_w )
813842{
814843   if (VERBOSE)
815      logerror("%s: px4_ctgif_w (0x%02x @ 0x%02x)\n", machine().describe_context(), data, offset);
844      logerror("%s: ctgif_w (0x%02x @ 0x%02x)\n", machine().describe_context(), data, offset);
816845}
817846
818847// art data input register
819READ8_MEMBER( px4_state::px4_artdir_r )
848READ8_MEMBER( px4_state::artdir_r )
820849{
821850   if (VERBOSE)
822      logerror("%s: px4_artdir_r (%02x)\n", machine().describe_context(), m_artdir);
851      logerror("%s: artdir_r (%02x)\n", machine().describe_context(), m_artdir);
823852
824853   // clear ready
825854   m_artsr &= ~ART_RXRDY;
r241679r241680
832861}
833862
834863// art data output register
835WRITE8_MEMBER( px4_state::px4_artdor_w )
864WRITE8_MEMBER( px4_state::artdor_w )
836865{
837866   if (VERBOSE)
838      logerror("%s: px4_artdor_w (0x%02x)\n", machine().describe_context(), data);
867      logerror("%s: artdor_w (0x%02x)\n", machine().describe_context(), data);
839868
840869   m_artdor = data;
841870
r241679r241680
853882}
854883
855884// art status register
856READ8_MEMBER( px4_state::px4_artsr_r )
885READ8_MEMBER( px4_state::artsr_r )
857886{
858887   if (0)
859      logerror("%s: px4_artsr_r (%02x)\n", machine().describe_context(), m_artsr);
888      logerror("%s: artsr_r (%02x)\n", machine().describe_context(), m_artsr);
860889
861890   return m_artsr;
862891}
863892
864893// art mode register
865WRITE8_MEMBER( px4_state::px4_artmr_w )
894WRITE8_MEMBER( px4_state::artmr_w )
866895{
867896   int data_bit_count = BIT(data, 2) ? 8 : 7;
868897   parity_t parity = BIT(data, 4) ? (BIT(data, 5) ? PARITY_EVEN : PARITY_ODD) : PARITY_NONE;
r241679r241680
874903   set_data_frame(1, data_bit_count, parity, stop_bits);
875904}
876905
877WRITE_LINE_MEMBER( px4_state::write_centronics_busy )
878{
879   m_centronics_busy = state;
880}
881
882WRITE_LINE_MEMBER( px4_state::write_centronics_perror )
883{
884   m_centronics_perror = state;
885}
886
887906// io status register
888READ8_MEMBER( px4_state::px4_iostr_r )
907READ8_MEMBER( px4_state::iostr_r )
889908{
890909   UINT8 data = 0;
891910
r241679r241680
907926   data |= 0 << 7;   // bit 7, caud - audio input from cartridge
908927
909928   if (0)
910      logerror("%s: px4_iostr_r: rx = %d, dcd = %d, cts = %d\n", machine().describe_context(), BIT(data, 3), BIT(data, 4), BIT(data, 5));
929      logerror("%s: iostr_r: rx = %d, dcd = %d, cts = %d\n", machine().describe_context(), BIT(data, 3), BIT(data, 4), BIT(data, 5));
911930
912931   return data;
913932}
914933
915934// art command register
916WRITE8_MEMBER( px4_state::px4_artcr_w )
935WRITE8_MEMBER( px4_state::artcr_w )
917936{
918937   if (VERBOSE)
919      logerror("%s: px4_artcr_w (0x%02x)\n", machine().describe_context(), data);
938      logerror("%s: artcr_w (0x%02x)\n", machine().describe_context(), data);
920939
921940   m_artcr = data;
922941
r241679r241680
930949}
931950
932951// switch register
933WRITE8_MEMBER( px4_state::px4_swr_w )
952WRITE8_MEMBER( px4_state::swr_w )
934953{
935954   if (VERBOSE)
936955   {
r241679r241680
944963}
945964
946965// io control register
947WRITE8_MEMBER( px4_state::px4_ioctlr_w )
966WRITE8_MEMBER( px4_state::ioctlr_w )
948967{
949968   if (VERBOSE)
950      logerror("%s: px4_ioctlr_w (0x%02x)\n", machine().describe_context(), data);
969      logerror("%s: ioctlr_w (0x%02x)\n", machine().describe_context(), data);
951970
952971   m_centronics->write_strobe(!BIT(data, 0));
953972   m_centronics->write_init(BIT(data, 1));
r241679r241680
10251044//  EXTERNAL RAM-DISK
10261045//**************************************************************************
10271046
1028WRITE8_MEMBER( px4_state::px4_ramdisk_address_w )
1047WRITE8_MEMBER( px4p_state::ramdisk_address_w )
10291048{
10301049   switch (offset)
10311050   {
r241679r241680
10351054   }
10361055}
10371056
1038READ8_MEMBER( px4_state::px4_ramdisk_data_r )
1057READ8_MEMBER( px4p_state::ramdisk_data_r )
10391058{
10401059   UINT8 ret = 0xff;
10411060
r241679r241680
10551074   return ret;
10561075}
10571076
1058WRITE8_MEMBER( px4_state::px4_ramdisk_data_w )
1077WRITE8_MEMBER( px4p_state::ramdisk_data_w )
10591078{
10601079   if (m_ramdisk_address < 0x20000)
10611080      m_ramdisk[m_ramdisk_address] = data;
r241679r241680
10631082   m_ramdisk_address = (m_ramdisk_address & 0xffff00) | ((m_ramdisk_address & 0xff) + 1);
10641083}
10651084
1066READ8_MEMBER( px4_state::px4_ramdisk_control_r )
1085READ8_MEMBER( px4p_state::ramdisk_control_r )
10671086{
10681087   // bit 7 determines the presence of a ram-disk
10691088   return 0x7f;
r241679r241680
11271146   membank("bank2")->set_base(m_ram->pointer() + 0x8000);
11281147}
11291148
1130DRIVER_INIT_MEMBER( px4_state, px4p )
1149DRIVER_INIT_MEMBER( px4p_state, px4p )
11311150{
11321151   DRIVER_INIT_CALL(px4);
11331152
r241679r241680
11491168   transmit_register_reset();
11501169}
11511170
1152MACHINE_START_MEMBER( px4_state, px4_ramdisk )
1171void px4p_state::machine_start()
11531172{
11541173   px4_state::machine_start();
1155   machine().device<nvram_device>("nvram")->set_base(m_ramdisk, 0x20000);
1174   m_rdnvram->set_base(m_ramdisk, 0x20000);
11561175}
11571176
11581177
r241679r241680
11691188   ADDRESS_MAP_UNMAP_HIGH
11701189   ADDRESS_MAP_GLOBAL_MASK(0xff)
11711190   // gapnit, 0x00-0x07
1172   AM_RANGE(0x00, 0x00) AM_READWRITE(px4_icrlc_r, px4_ctrl1_w)
1173   AM_RANGE(0x01, 0x01) AM_READWRITE(px4_icrhc_r, px4_cmdr_w)
1174   AM_RANGE(0x02, 0x02) AM_READWRITE(px4_icrlb_r, px4_ctrl2_w)
1175   AM_RANGE(0x03, 0x03) AM_READ(px4_icrhb_r)
1176   AM_RANGE(0x04, 0x04) AM_READWRITE(px4_isr_r, px4_ier_w)
1177   AM_RANGE(0x05, 0x05) AM_READWRITE(px4_str_r, px4_bankr_w)
1178   AM_RANGE(0x06, 0x06) AM_READWRITE(px4_sior_r, px4_sior_w)
1191   AM_RANGE(0x00, 0x00) AM_READWRITE( icrlc_r, ctrl1_w )
1192   AM_RANGE(0x01, 0x01) AM_READWRITE( icrhc_r, cmdr_w )
1193   AM_RANGE(0x02, 0x02) AM_READWRITE( icrlb_r, ctrl2_w )
1194   AM_RANGE(0x03, 0x03) AM_READ( icrhb_r )
1195   AM_RANGE(0x04, 0x04) AM_READWRITE( isr_r, ier_w )
1196   AM_RANGE(0x05, 0x05) AM_READWRITE( str_r, bankr_w )
1197   AM_RANGE(0x06, 0x06) AM_READWRITE( sior_r, sior_w )
11791198   AM_RANGE(0x07, 0x07) AM_NOP
11801199   // gapndl, 0x08-0x0f
1181   AM_RANGE(0x08, 0x08) AM_WRITE(px4_vadr_w)
1182   AM_RANGE(0x09, 0x09) AM_WRITE(px4_yoff_w)
1183   AM_RANGE(0x0a, 0x0a) AM_WRITE(px4_fr_w)
1184   AM_RANGE(0x0b, 0x0b) AM_WRITE(px4_spur_w)
1200   AM_RANGE(0x08, 0x08) AM_WRITE( vadr_w )
1201   AM_RANGE(0x09, 0x09) AM_WRITE( yoff_w )
1202   AM_RANGE(0x0a, 0x0a) AM_WRITE( fr_w )
1203   AM_RANGE(0x0b, 0x0b) AM_WRITE( spur_w )
11851204   AM_RANGE(0x0c, 0x0f) AM_NOP
11861205   // gapnio, 0x10-0x1f
1187   AM_RANGE(0x10, 0x13) AM_READWRITE(px4_ctgif_r, px4_ctgif_w)
1188   AM_RANGE(0x14, 0x14) AM_READWRITE(px4_artdir_r, px4_artdor_w)
1189   AM_RANGE(0x15, 0x15) AM_READWRITE(px4_artsr_r, px4_artmr_w)
1190   AM_RANGE(0x16, 0x16) AM_READWRITE(px4_iostr_r, px4_artcr_w)
1206   AM_RANGE(0x10, 0x13) AM_READWRITE( ctgif_r, ctgif_w )
1207   AM_RANGE(0x14, 0x14) AM_READWRITE( artdir_r, artdor_w )
1208   AM_RANGE(0x15, 0x15) AM_READWRITE( artsr_r, artmr_w )
1209   AM_RANGE(0x16, 0x16) AM_READWRITE( iostr_r, artcr_w )
11911210   AM_RANGE(0x17, 0x17) AM_DEVWRITE("cent_data_out", output_latch_device, write)
1192   AM_RANGE(0x18, 0x18) AM_WRITE(px4_swr_w)
1193   AM_RANGE(0x19, 0x19) AM_WRITE(px4_ioctlr_w)
1211   AM_RANGE(0x18, 0x18) AM_WRITE( swr_w )
1212   AM_RANGE(0x19, 0x19) AM_WRITE( ioctlr_w )
11941213   AM_RANGE(0x1a, 0x1f) AM_NOP
11951214ADDRESS_MAP_END
11961215
1197static ADDRESS_MAP_START( px4p_io, AS_IO, 8, px4_state )
1216static ADDRESS_MAP_START( px4p_io, AS_IO, 8, px4p_state )
11981217   AM_IMPORT_FROM(px4_io)
1199   AM_RANGE(0x90, 0x92) AM_WRITE(px4_ramdisk_address_w)
1200   AM_RANGE(0x93, 0x93) AM_READWRITE(px4_ramdisk_data_r, px4_ramdisk_data_w)
1201   AM_RANGE(0x94, 0x94) AM_READ(px4_ramdisk_control_r)
1218   AM_RANGE(0x90, 0x92) AM_WRITE(ramdisk_address_w )
1219   AM_RANGE(0x93, 0x93) AM_READWRITE(ramdisk_data_r, ramdisk_data_w )
1220   AM_RANGE(0x94, 0x94) AM_READ(ramdisk_control_r)
12021221ADDRESS_MAP_END
12031222
12041223
r241679r241680
13611380//  PALETTE
13621381//**************************************************************************
13631382
1364PALETTE_INIT_MEMBER(px4_state, px4)
1383PALETTE_INIT_MEMBER( px4_state, px4 )
13651384{
13661385   palette.set_pen_color(0, rgb_t(138, 146, 148));
13671386   palette.set_pen_color(1, rgb_t(92, 83, 88));
13681387}
13691388
1370PALETTE_INIT_MEMBER(px4_state, px4p)
1389PALETTE_INIT_MEMBER( px4p_state, px4p )
13711390{
13721391   palette.set_pen_color(0, rgb_t(149, 157, 130));
13731392   palette.set_pen_color(1, rgb_t(92, 83, 88));
r241679r241680
14111430
14121431   // centronics printer
14131432   MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer")
1414   MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(px4_state, write_centronics_busy))
1415   MCFG_CENTRONICS_PERROR_HANDLER(WRITELINE(px4_state, write_centronics_perror))
1433   MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(px4_state, centronics_busy_w))
1434   MCFG_CENTRONICS_PERROR_HANDLER(WRITELINE(px4_state, centronics_perror_w))
14161435
14171436   MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
14181437
r241679r241680
14431462   MCFG_SOFTWARE_LIST_ADD("epson_cpm_list", "epson_cpm")
14441463MACHINE_CONFIG_END
14451464
1446static MACHINE_CONFIG_DERIVED( px4p, px4 )
1465static MACHINE_CONFIG_DERIVED_CLASS( px4p, px4, px4p_state )
14471466   MCFG_CPU_MODIFY("maincpu")
14481467   MCFG_CPU_IO_MAP(px4p_io)
14491468
1450   MCFG_MACHINE_START_OVERRIDE(px4_state, px4_ramdisk)
1451   MCFG_NVRAM_ADD_0FILL("nvram")
1469   MCFG_NVRAM_ADD_0FILL("rdnvram")
14521470
14531471   MCFG_PALETTE_MODIFY("palette")
1454   MCFG_PALETTE_INIT_OWNER(px4_state, px4p)
1472   MCFG_PALETTE_INIT_OWNER(px4p_state, px4p)
14551473
14561474   MCFG_GENERIC_CARTSLOT_ADD("ramdisk_socket", generic_plain_slot, "px4_cart")
14571475MACHINE_CONFIG_END
r241679r241680
14841502//  GAME DRIVERS
14851503//**************************************************************************
14861504
1487//    YEAR  NAME  PARENT  COMPAT  MACHINE  INPUT      CLASS      INIT  COMPANY  FULLNAME  FLAGS
1488COMP( 1985, px4,  0,      0,      px4,     px4_h450a, px4_state, px4,  "Epson", "PX-4",   0 )
1489COMP( 1985, px4p, px4,    0,      px4p,    px4_h450a, px4_state, px4p, "Epson", "PX-4+",  0 )
1505//    YEAR  NAME  PARENT  COMPAT  MACHINE  INPUT      CLASS       INIT  COMPANY  FULLNAME  FLAGS
1506COMP( 1985, px4,  0,      0,      px4,     px4_h450a, px4_state,  px4,  "Epson", "PX-4",   0 )
1507COMP( 1985, px4p, px4,    0,      px4p,    px4_h450a, px4p_state, px4p, "Epson", "PX-4+",  0 )

https://github.com/mamedev/mame/commit/6bcf6d8e9baa8bdbcfa4104d8c58d78d0afcf1a4

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