trunk/src/emu/cpu/upd7810/upd7810.c
r241595 | r241596 | |
1524 | 1524 | if (ANM & 0x01) |
1525 | 1525 | { |
1526 | 1526 | /* select mode */ |
1527 | | while (m_adcnt > m_adtot) |
| 1527 | if (m_shdone == 0) |
1528 | 1528 | { |
1529 | | UINT8 cr = 0; |
1530 | | m_adcnt -= m_adtot; |
1531 | 1529 | switch (m_adin) |
1532 | 1530 | { |
1533 | | case 0: cr = m_an0_func(); break; |
1534 | | case 1: cr = m_an1_func(); break; |
1535 | | case 2: cr = m_an2_func(); break; |
1536 | | case 3: cr = m_an3_func(); break; |
1537 | | case 4: cr = m_an4_func(); break; |
1538 | | case 5: cr = m_an5_func(); break; |
1539 | | case 6: cr = m_an6_func(); break; |
1540 | | case 7: cr = m_an7_func(); break; |
| 1531 | case 0: m_tmpcr = m_an0_func(); break; |
| 1532 | case 1: m_tmpcr = m_an1_func(); break; |
| 1533 | case 2: m_tmpcr = m_an2_func(); break; |
| 1534 | case 3: m_tmpcr = m_an3_func(); break; |
| 1535 | case 4: m_tmpcr = m_an4_func(); break; |
| 1536 | case 5: m_tmpcr = m_an5_func(); break; |
| 1537 | case 6: m_tmpcr = m_an6_func(); break; |
| 1538 | case 7: m_tmpcr = m_an7_func(); break; |
1541 | 1539 | } |
| 1540 | m_shdone = 1; |
| 1541 | } |
| 1542 | if (m_adcnt > m_adtot) |
| 1543 | { |
| 1544 | m_adcnt -= m_adtot; |
1542 | 1545 | switch (m_adout) |
1543 | 1546 | { |
1544 | | case 0: CR0 = cr; break; |
1545 | | case 1: CR1 = cr; break; |
1546 | | case 2: CR2 = cr; break; |
1547 | | case 3: CR3 = cr; break; |
| 1547 | case 0: CR0 = m_tmpcr; break; |
| 1548 | case 1: CR1 = m_tmpcr; break; |
| 1549 | case 2: CR2 = m_tmpcr; break; |
| 1550 | case 3: CR3 = m_tmpcr; break; |
1548 | 1551 | } |
1549 | 1552 | m_adout = (m_adout + 1) & 0x03; |
1550 | 1553 | if (m_adout == 0) |
1551 | 1554 | IRR |= INTFAD; |
| 1555 | m_shdone = 0; |
1552 | 1556 | } |
1553 | 1557 | } |
1554 | 1558 | else |
1555 | 1559 | { |
1556 | 1560 | /* scan mode */ |
1557 | | while (m_adcnt > m_adtot) |
| 1561 | if (m_shdone == 0) |
1558 | 1562 | { |
1559 | | UINT8 cr = 0; |
1560 | | m_adcnt -= m_adtot; |
1561 | 1563 | switch (m_adin | m_adrange) |
1562 | 1564 | { |
1563 | | case 0: cr = m_an0_func(); break; |
1564 | | case 1: cr = m_an1_func(); break; |
1565 | | case 2: cr = m_an2_func(); break; |
1566 | | case 3: cr = m_an3_func(); break; |
1567 | | case 4: cr = m_an4_func(); break; |
1568 | | case 5: cr = m_an5_func(); break; |
1569 | | case 6: cr = m_an6_func(); break; |
1570 | | case 7: cr = m_an7_func(); break; |
| 1565 | case 0: m_tmpcr = m_an0_func(); break; |
| 1566 | case 1: m_tmpcr = m_an1_func(); break; |
| 1567 | case 2: m_tmpcr = m_an2_func(); break; |
| 1568 | case 3: m_tmpcr = m_an3_func(); break; |
| 1569 | case 4: m_tmpcr = m_an4_func(); break; |
| 1570 | case 5: m_tmpcr = m_an5_func(); break; |
| 1571 | case 6: m_tmpcr = m_an6_func(); break; |
| 1572 | case 7: m_tmpcr = m_an7_func(); break; |
1571 | 1573 | } |
| 1574 | m_shdone = 1; |
| 1575 | } |
| 1576 | if (m_adcnt > m_adtot) |
| 1577 | { |
| 1578 | m_adcnt -= m_adtot; |
1572 | 1579 | switch (m_adout) |
1573 | 1580 | { |
1574 | | case 0: CR0 = cr; break; |
1575 | | case 1: CR1 = cr; break; |
1576 | | case 2: CR2 = cr; break; |
1577 | | case 3: CR3 = cr; break; |
| 1581 | case 0: CR0 = m_tmpcr; break; |
| 1582 | case 1: CR1 = m_tmpcr; break; |
| 1583 | case 2: CR2 = m_tmpcr; break; |
| 1584 | case 3: CR3 = m_tmpcr; break; |
1578 | 1585 | } |
1579 | 1586 | m_adin = (m_adin + 1) & 0x07; |
1580 | 1587 | m_adout = (m_adout + 1) & 0x03; |
1581 | 1588 | if (m_adout == 0) |
1582 | 1589 | IRR |= INTFAD; |
| 1590 | m_shdone = 0; |
1583 | 1591 | } |
1584 | 1592 | } |
1585 | 1593 | |
r241595 | r241596 | |
1902 | 1910 | m_edges = 0; |
1903 | 1911 | m_adcnt = 0; |
1904 | 1912 | m_adtot = 0; |
| 1913 | m_tmpcr = 0; |
| 1914 | m_shdone = 0; |
1905 | 1915 | m_adout = 0; |
1906 | 1916 | m_adin = 0; |
1907 | 1917 | m_adrange = 0; |
trunk/src/emu/cpu/upd7810/upd7810.h
r241595 | r241596 | |
308 | 308 | UINT8 m_edges; /* rising/falling edge flag for serial I/O */ |
309 | 309 | UINT16 m_adcnt; /* A/D converter cycle count */ |
310 | 310 | UINT8 m_adtot; /* A/D converter total cycles per conversion */ |
| 311 | UINT8 m_tmpcr; /* temporary analog digital conversion register */ |
| 312 | int m_shdone; /* A/D converter sample and hold done */ |
311 | 313 | int m_adout; /* currently selected A/D converter output register */ |
312 | 314 | int m_adin; /* currently selected A/D converter input */ |
313 | 315 | int m_adrange;/* in scan mode, A/D converter range (AN0-AN3 or AN4-AN7) */ |