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r33009 Monday 27th October, 2014 at 17:50:29 UTC by Miodrag Milanović
fix line endings
[src/mame/drivers]jackie.c peplus.c

trunk/src/mame/drivers/jackie.c
r241520r241521
264264}
265265
266266
267void jackie_state::show_out()
268{
269#ifdef MAME_DEBUG
270//  popmessage("%02x %02x %02x", m_out[0], m_out[1], m_out[2]);
271   popmessage("520: %04x %04x %04x %04x %04x\n560: %04x %04x %04x %04x %04x\n5A0: %04x %04x %04x %04x %04x",
272      m_unk_reg[0][0],m_unk_reg[0][1],m_unk_reg[0][2],m_unk_reg[0][3],m_unk_reg[0][4],
273      m_unk_reg[1][0],m_unk_reg[1][1],m_unk_reg[1][2],m_unk_reg[1][3],m_unk_reg[1][4],
267void jackie_state::show_out()
268{
269#ifdef MAME_DEBUG
270//  popmessage("%02x %02x %02x", m_out[0], m_out[1], m_out[2]);
271   popmessage("520: %04x %04x %04x %04x %04x\n560: %04x %04x %04x %04x %04x\n5A0: %04x %04x %04x %04x %04x",
272      m_unk_reg[0][0],m_unk_reg[0][1],m_unk_reg[0][2],m_unk_reg[0][3],m_unk_reg[0][4],
273      m_unk_reg[1][0],m_unk_reg[1][1],m_unk_reg[1][2],m_unk_reg[1][3],m_unk_reg[1][4],
274274      m_unk_reg[2][0],m_unk_reg[2][1],m_unk_reg[2][2],m_unk_reg[2][3],m_unk_reg[2][4]
275275   );
276276#endif
trunk/src/mame/drivers/peplus.c
r241520r241521
203203   {
204204      TIMER_ASSERT_LP
205205   };
206 
207   peplus_state(const machine_config &mconfig, device_type type, const char *tag)
208      : driver_device(mconfig, type, tag),
209      m_maincpu(*this, "maincpu"),
210      m_crtc(*this, "crtc"),
211      m_i2cmem(*this, "i2cmem"),
212      m_screen(*this, "screen"),
213      m_gfxdecode(*this, "gfxdecode"),
214      m_palette(*this, "palette"),
215      m_cmos_ram(*this, "cmos"),
216      m_program_ram(*this, "prograram"),
217      m_s3000_ram(*this, "s3000_ram"),
218      m_s5000_ram(*this, "s5000_ram"),
206
207   peplus_state(const machine_config &mconfig, device_type type, const char *tag)
208      : driver_device(mconfig, type, tag),
209      m_maincpu(*this, "maincpu"),
210      m_crtc(*this, "crtc"),
211      m_i2cmem(*this, "i2cmem"),
212      m_screen(*this, "screen"),
213      m_gfxdecode(*this, "gfxdecode"),
214      m_palette(*this, "palette"),
215      m_cmos_ram(*this, "cmos"),
216      m_program_ram(*this, "prograram"),
217      m_s3000_ram(*this, "s3000_ram"),
218      m_s5000_ram(*this, "s5000_ram"),
219219      m_videoram(*this, "videoram"),
220220      m_s7000_ram(*this, "s7000_ram"),
221      m_sb000_ram(*this, "sb000_ram"),
222      m_sd000_ram(*this, "sd000_ram"),
223      m_sf000_ram(*this, "sf000_ram"),
224      m_io_port(*this, "io_port")
225   {
226   }
227 
228   required_device<cpu_device> m_maincpu;
229   required_device<r6545_1_device> m_crtc;
230   required_device<i2cmem_device> m_i2cmem;
231   required_device<screen_device> m_screen;
232   required_device<gfxdecode_device> m_gfxdecode;
233   required_device<palette_device> m_palette;
234   
235   required_shared_ptr<UINT8> m_cmos_ram;
236   required_shared_ptr<UINT8> m_program_ram;
237   required_shared_ptr<UINT8> m_s3000_ram;
221      m_sb000_ram(*this, "sb000_ram"),
222      m_sd000_ram(*this, "sd000_ram"),
223      m_sf000_ram(*this, "sf000_ram"),
224      m_io_port(*this, "io_port")
225   {
226   }
227
228   required_device<cpu_device> m_maincpu;
229   required_device<r6545_1_device> m_crtc;
230   required_device<i2cmem_device> m_i2cmem;
231   required_device<screen_device> m_screen;
232   required_device<gfxdecode_device> m_gfxdecode;
233   required_device<palette_device> m_palette;
234   
235   required_shared_ptr<UINT8> m_cmos_ram;
236   required_shared_ptr<UINT8> m_program_ram;
237   required_shared_ptr<UINT8> m_s3000_ram;
238238   required_shared_ptr<UINT8> m_s5000_ram;
239239   required_shared_ptr<UINT8> m_videoram;
240240   required_shared_ptr<UINT8> m_s7000_ram;
241241   required_shared_ptr<UINT8> m_sb000_ram;
242   required_shared_ptr<UINT8> m_sd000_ram;
243   required_shared_ptr<UINT8> m_sf000_ram;
244   required_shared_ptr<UINT8> m_io_port;
245   
246   tilemap_t *m_bg_tilemap;
247   UINT8 m_wingboard;
248   UINT8 m_doorcycle;
242   required_shared_ptr<UINT8> m_sd000_ram;
243   required_shared_ptr<UINT8> m_sf000_ram;
244   required_shared_ptr<UINT8> m_io_port;
245   
246   tilemap_t *m_bg_tilemap;
247   UINT8 m_wingboard;
248   UINT8 m_doorcycle;
249249   UINT16 door_wait;
250250   UINT8 m_jumper_e16_e17;
251251   UINT16 m_vid_address;
r241520r241521
267267   UINT8 m_bv_last_enable_state;
268268   UINT8 m_bv_enable_state;
269269   UINT8 m_bv_enable_count;
270   UINT8 m_bv_data_bit;
271   UINT8 m_bv_loop_count;
272   UINT16 id023_data;
273   
274   DECLARE_WRITE8_MEMBER(peplus_bgcolor_w);
275   DECLARE_WRITE8_MEMBER(peplus_crtc_display_w);
276   DECLARE_WRITE8_MEMBER(peplus_duart_w);
277   DECLARE_WRITE8_MEMBER(peplus_cmos_w);
278   DECLARE_WRITE8_MEMBER(peplus_output_bank_a_w);
279   DECLARE_WRITE8_MEMBER(peplus_output_bank_b_w);
280   DECLARE_WRITE8_MEMBER(peplus_output_bank_c_w);
281   DECLARE_READ8_MEMBER(peplus_duart_r);
282   DECLARE_READ8_MEMBER(peplus_bgcolor_r);
283   DECLARE_READ8_MEMBER(peplus_dropdoor_r);
284   DECLARE_READ8_MEMBER(peplus_watchdog_r);
270   UINT8 m_bv_data_bit;
271   UINT8 m_bv_loop_count;
272   UINT16 id023_data;
273   
274   DECLARE_WRITE8_MEMBER(peplus_bgcolor_w);
275   DECLARE_WRITE8_MEMBER(peplus_crtc_display_w);
276   DECLARE_WRITE8_MEMBER(peplus_duart_w);
277   DECLARE_WRITE8_MEMBER(peplus_cmos_w);
278   DECLARE_WRITE8_MEMBER(peplus_output_bank_a_w);
279   DECLARE_WRITE8_MEMBER(peplus_output_bank_b_w);
280   DECLARE_WRITE8_MEMBER(peplus_output_bank_c_w);
281   DECLARE_READ8_MEMBER(peplus_duart_r);
282   DECLARE_READ8_MEMBER(peplus_bgcolor_r);
283   DECLARE_READ8_MEMBER(peplus_dropdoor_r);
284   DECLARE_READ8_MEMBER(peplus_watchdog_r);
285285   DECLARE_CUSTOM_INPUT_MEMBER(peplus_input_r);
286286   DECLARE_WRITE8_MEMBER(peplus_crtc_mode_w);
287287   DECLARE_WRITE_LINE_MEMBER(crtc_vsync);
r241520r241521
296296   MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr);
297297   virtual void machine_reset();
298298   virtual void video_start();
299   UINT32 screen_update_peplus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
300   void peplus_load_superdata(const char *bank_name);
301   DECLARE_PALETTE_INIT(peplus);
302   void handle_lightpen();
303 
304protected:
305   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
299   UINT32 screen_update_peplus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
300   void peplus_load_superdata(const char *bank_name);
301   DECLARE_PALETTE_INIT(peplus);
302   void handle_lightpen();
303
304protected:
305   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
306306};
307307
308308static const UINT8  id_022[8] = { 0x00, 0x01, 0x04, 0x09, 0x13, 0x16, 0x18, 0x00 };
r241520r241521
382382
383383void peplus_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
384384{
385   switch (id)
386   {
387   case TIMER_ASSERT_LP:
388      m_crtc->assert_light_pen_input();
389      break;
390   default:
391      assert_always(FALSE, "Unknown id in peplus_state::device_timer");
385   switch (id)
386   {
387   case TIMER_ASSERT_LP:
388      m_crtc->assert_light_pen_input();
389      break;
390   default:
391      assert_always(FALSE, "Unknown id in peplus_state::device_timer");
392392   }
393}
394 
395 
396void peplus_state::handle_lightpen()
397{
398   int x_val = ioport("TOUCH_X")->read_safe(0x00);
399   int y_val = ioport("TOUCH_Y")->read_safe(0x00);
400   const rectangle &vis_area = m_screen->visible_area();
401   int xt, yt;
402 
403   xt = x_val * vis_area.width() / 1024 + vis_area.min_x;
404   yt = y_val * vis_area.height() / 1024 + vis_area.min_y;
405 
406   timer_set(m_screen->time_until_pos(yt, xt), TIMER_ASSERT_LP, 0);
407}
408 
409WRITE_LINE_MEMBER(peplus_state::crtc_vsync)
410{
411   m_maincpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
412   handle_lightpen();
413}
414 
415WRITE8_MEMBER(peplus_state::peplus_crtc_display_w)
393}
394
395
396void peplus_state::handle_lightpen()
416397{
398   int x_val = ioport("TOUCH_X")->read_safe(0x00);
399   int y_val = ioport("TOUCH_Y")->read_safe(0x00);
400   const rectangle &vis_area = m_screen->visible_area();
401   int xt, yt;
402
403   xt = x_val * vis_area.width() / 1024 + vis_area.min_x;
404   yt = y_val * vis_area.height() / 1024 + vis_area.min_y;
405
406   timer_set(m_screen->time_until_pos(yt, xt), TIMER_ASSERT_LP, 0);
407}
408
409WRITE_LINE_MEMBER(peplus_state::crtc_vsync)
410{
411   m_maincpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
412   handle_lightpen();
413}
414
415WRITE8_MEMBER(peplus_state::peplus_crtc_display_w)
416{
417417   UINT8 *videoram = m_videoram;
418418   videoram[m_vid_address] = data;
419419   m_palette_ram[m_vid_address] = m_io_port[1];
420420   m_palette_ram2[m_vid_address] = m_io_port[3];
421421
422   m_bg_tilemap->mark_tile_dirty(m_vid_address);
423 
424   /* An access here triggers a device read !*/
425   m_crtc->register_r(space, 0);
426}
427 
428WRITE8_MEMBER(peplus_state::peplus_duart_w)
422   m_bg_tilemap->mark_tile_dirty(m_vid_address);
423
424   /* An access here triggers a device read !*/
425   m_crtc->register_r(space, 0);
426}
427
428WRITE8_MEMBER(peplus_state::peplus_duart_w)
429429{
430430   // Used for Slot Accounting System Communication
431431}
r241520r241521
441441      peplus_load_superdata(bank_name);
442442   }
443443
444   m_cmos_ram[offset] = data;
445}
446 
447WRITE8_MEMBER(peplus_state::peplus_output_bank_a_w)
448{
449   output_set_value("pe_bnka0",(data >> 0) & 1); /* Coin Lockout */
444   m_cmos_ram[offset] = data;
445}
446
447WRITE8_MEMBER(peplus_state::peplus_output_bank_a_w)
448{
449   output_set_value("pe_bnka0",(data >> 0) & 1); /* Coin Lockout */
450450   output_set_value("pe_bnka1",(data >> 1) & 1); /* Diverter */
451451   output_set_value("pe_bnka2",(data >> 2) & 1); /* Bell */
452452   output_set_value("pe_bnka3",(data >> 3) & 1); /* N/A */
r241520r241521
495495
496496
497497/****************
498* Read Handlers *
499****************/
500 
501READ8_MEMBER(peplus_state::peplus_duart_r)
502{
503   // Used for Slot Accounting System Communication
504   return 0x00;
505}
506 
507/* Last Color in Every Palette is bgcolor */
508READ8_MEMBER(peplus_state::peplus_bgcolor_r)
509{
498* Read Handlers *
499****************/
500
501READ8_MEMBER(peplus_state::peplus_duart_r)
502{
503   // Used for Slot Accounting System Communication
504   return 0x00;
505}
506
507/* Last Color in Every Palette is bgcolor */
508READ8_MEMBER(peplus_state::peplus_bgcolor_r)
509{
510510   return m_palette->pen_color(15); // Return bgcolor from First Palette
511511}
512512
r241520r241521
969969static ADDRESS_MAP_START( peplus_map, AS_PROGRAM, 8, peplus_state )
970970   AM_RANGE(0x0000, 0xffff) AM_ROM AM_SHARE("prograram")
971971ADDRESS_MAP_END
972 
973static ADDRESS_MAP_START( peplus_iomap, AS_IO, 8, peplus_state )
974   // Battery-backed RAM (0x1000-0x01fff Extended RAM for Superboards Only)
975   AM_RANGE(0x0000, 0x1fff) AM_RAM_WRITE(peplus_cmos_w) AM_SHARE("cmos")
976 
977   // CRT Controller
978   AM_RANGE(0x2008, 0x2008) AM_WRITE(peplus_crtc_mode_w)
972
973static ADDRESS_MAP_START( peplus_iomap, AS_IO, 8, peplus_state )
974   // Battery-backed RAM (0x1000-0x01fff Extended RAM for Superboards Only)
975   AM_RANGE(0x0000, 0x1fff) AM_RAM_WRITE(peplus_cmos_w) AM_SHARE("cmos")
976
977   // CRT Controller
978   AM_RANGE(0x2008, 0x2008) AM_WRITE(peplus_crtc_mode_w)
979979   AM_RANGE(0x2080, 0x2080) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w)
980980   AM_RANGE(0x2081, 0x2081) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
981   AM_RANGE(0x2083, 0x2083) AM_DEVREAD("crtc", mc6845_device, register_r) AM_WRITE(peplus_crtc_display_w)
982 
983   // Superboard Data
984   AM_RANGE(0x3000, 0x3fff) AM_RAM AM_SHARE("s3000_ram")
985 
986   // Sound and Dipswitches
987   AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("aysnd", ay8910_device, address_w)
988   AM_RANGE(0x4004, 0x4004) AM_READ_PORT("SW1")/* likely ay8910 input port, not direct */ AM_DEVWRITE("aysnd", ay8910_device, data_w)
989 
990   // Superboard Data
991   AM_RANGE(0x5000, 0x5fff) AM_RAM AM_SHARE("s5000_ram")
992 
993   // Background Color Latch
994   AM_RANGE(0x6000, 0x6000) AM_READ(peplus_bgcolor_r) AM_WRITE(peplus_bgcolor_w)
981   AM_RANGE(0x2083, 0x2083) AM_DEVREAD("crtc", mc6845_device, register_r) AM_WRITE(peplus_crtc_display_w)
995982
983   // Superboard Data
984   AM_RANGE(0x3000, 0x3fff) AM_RAM AM_SHARE("s3000_ram")
985
986   // Sound and Dipswitches
987   AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("aysnd", ay8910_device, address_w)
988   AM_RANGE(0x4004, 0x4004) AM_READ_PORT("SW1")/* likely ay8910 input port, not direct */ AM_DEVWRITE("aysnd", ay8910_device, data_w)
989
990   // Superboard Data
991   AM_RANGE(0x5000, 0x5fff) AM_RAM AM_SHARE("s5000_ram")
992
993   // Background Color Latch
994   AM_RANGE(0x6000, 0x6000) AM_READ(peplus_bgcolor_r) AM_WRITE(peplus_bgcolor_w)
995
996996   // Bogus Location for Video RAM
997   AM_RANGE(0x06001, 0x06400) AM_RAM AM_SHARE("videoram")
998 
999   // Superboard Data
1000   AM_RANGE(0x7000, 0x7fff) AM_RAM AM_SHARE("s7000_ram")
1001 
1002   // Input Bank A, Output Bank C
1003   AM_RANGE(0x8000, 0x8000) AM_READ(peplus_input_bank_a_r) AM_WRITE(peplus_output_bank_c_w)
997   AM_RANGE(0x06001, 0x06400) AM_RAM AM_SHARE("videoram")
1004998
999   // Superboard Data
1000   AM_RANGE(0x7000, 0x7fff) AM_RAM AM_SHARE("s7000_ram")
1001
1002   // Input Bank A, Output Bank C
1003   AM_RANGE(0x8000, 0x8000) AM_READ(peplus_input_bank_a_r) AM_WRITE(peplus_output_bank_c_w)
1004
10051005   // Drop Door, I2C EEPROM Writes
10061006   AM_RANGE(0x9000, 0x9000) AM_READ(peplus_dropdoor_r) AM_WRITE(i2c_nvram_w)
10071007
10081008   // Input Banks B & C, Output Bank B
1009   AM_RANGE(0xa000, 0xa000) AM_READ(peplus_input0_r) AM_WRITE(peplus_output_bank_b_w)
1010 
1011   // Superboard Data
1012   AM_RANGE(0xb000, 0xbfff) AM_RAM AM_SHARE("sb000_ram")
1013 
1014   // Output Bank A
1015   AM_RANGE(0xc000, 0xc000) AM_READ(peplus_watchdog_r) AM_WRITE(peplus_output_bank_a_w)
1016 
1017   // Superboard Data
1018   AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("sd000_ram")
1019 
1020   // DUART
1021   AM_RANGE(0xe000, 0xe00f) AM_READWRITE(peplus_duart_r, peplus_duart_w)
1022 
1023   // Superboard Data
1024   AM_RANGE(0xf000, 0xffff) AM_RAM AM_SHARE("sf000_ram")
1025 
1026   /* Ports start here */
1027   AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_RAM AM_SHARE("io_port")
1028ADDRESS_MAP_END
1029 
1030 
1009   AM_RANGE(0xa000, 0xa000) AM_READ(peplus_input0_r) AM_WRITE(peplus_output_bank_b_w)
1010
1011   // Superboard Data
1012   AM_RANGE(0xb000, 0xbfff) AM_RAM AM_SHARE("sb000_ram")
1013
1014   // Output Bank A
1015   AM_RANGE(0xc000, 0xc000) AM_READ(peplus_watchdog_r) AM_WRITE(peplus_output_bank_a_w)
1016
1017   // Superboard Data
1018   AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("sd000_ram")
1019
1020   // DUART
1021   AM_RANGE(0xe000, 0xe00f) AM_READWRITE(peplus_duart_r, peplus_duart_w)
1022
1023   // Superboard Data
1024   AM_RANGE(0xf000, 0xffff) AM_RAM AM_SHARE("sf000_ram")
1025
1026   /* Ports start here */
1027   AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_RAM AM_SHARE("io_port")
1028ADDRESS_MAP_END
1029
1030
10311031/*************************
10321032*      Input ports       *
10331033*************************/

https://github.com/mamedev/mame/commit/ff6a09c72f59f6898aa2d15fadf2d3213f566869

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