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r32815 Sunday 19th October, 2014 at 08:14:45 UTC by Alex Jackson
amiga: use memarray for chip RAM and regular array for custom registers (instead of shared_ptr for both) [Alex Jackson]

[src/emu/machine]	akiko.c amigafdc.c
[src/emu/sound]	amiga.c
[src/mame/drivers]	alg.c arcadia.c cubo.c mquake.c upscope.c
[src/mame/includes]	amiga.h
[src/mame/machine]	amiga.c
[src/mame/video]	amiga.c amigaaga.c
[src/mess/drivers]	amiga.c

trunk/src/mame/machine/amiga.c

r32814	r32815
134	134
135	135	/*************************************
136	136	*
137		*  Chipmem 16/32 bit access
138		*
139		*************************************/
140
141		static UINT16 amiga_chip_ram16_r(amiga_state *state, offs_t offset)
142		{
143		// logerror("chip ram read %08x\n", offset);
144		return (offset < state->m_chip_ram.bytes()) ? state->m_chip_ram[offset/2] : 0xffff;
145		}
146
147		static UINT16 amiga_chip_ram32_r(amiga_state *state, offs_t offset)
148		{
149		if (offset < state->m_chip_ram.bytes())
150		{
151		UINT32 *amiga_chip_ram32 = reinterpret_cast<UINT32 *>(state->m_chip_ram.target());
152		UINT32  dat = amiga_chip_ram32[offset / 4];
153
154		if ( offset & 2 )
155		return (dat & 0xffff);
156
157		return (dat >> 16);
158		}
159
160		return 0xffff;
161		}
162
163		static void amiga_chip_ram16_w(amiga_state *state, offs_t offset, UINT16 data)
164		{
165		if (offset < state->m_chip_ram.bytes())
166		state->m_chip_ram[offset/2] = data;
167		}
168
169		static void amiga_chip_ram32_w(amiga_state *state, offs_t offset, UINT16 data)
170		{
171		if (offset < state->m_chip_ram.bytes())
172		{
173		UINT32 *amiga_chip_ram32 = reinterpret_cast<UINT32 *>(state->m_chip_ram.target());
174		UINT32  dat = amiga_chip_ram32[offset / 4];
175
176		if ( offset & 2 )
177		{
178		dat &= 0xffff0000;
179		dat |= data;
180		}
181		else
182		{
183		dat &= 0x0000ffff;
184		dat |= ((UINT32)data) << 16;
185		}
186
187		amiga_chip_ram32[offset / 4] = dat;
188		}
189		}
190
191
192		void amiga_chip_ram_w8(amiga_state *state, offs_t offset, UINT8 data)
193		{
194		UINT16 dat;
195
196		dat = (*state->m_chip_ram_r)(state, offset);
197		if (offset & 0x01)
198		{
199		dat &= 0xff00;
200		dat |= data;
201		}
202		else
203		{
204		dat &= 0x00ff;
205		dat |= ((UINT16)data) << 8;
206		}
207		(*state->m_chip_ram_w)(state, offset, dat);
208		}
209
210
211
212		/*************************************
213		*
214	137	*  Machine reset
215	138	*
216	139	*************************************/
r32814	r32815
220	143	// add callback for RESET instruction
221	144	m_maincpu->set_reset_callback(write_line_delegate(FUNC(amiga_state::m68k_reset), this));
222	145
223		switch (m_maincpu->space(AS_PROGRAM).data_width())
224		{
225		case 16:
226		m_chip_ram_r = amiga_chip_ram16_r;
227		m_chip_ram_w = amiga_chip_ram16_w;
228		break;
229		case 32:
230		m_chip_ram_r = amiga_chip_ram32_r;
231		m_chip_ram_w = amiga_chip_ram32_w;
232		break;
233		default:
234		fatalerror("Invalid data bus width\n");
235		}
	146	// set up chip RAM access
	147	memory_share *share = memshare("chip_ram");
	148	if (share == NULL)
	149	fatalerror("Unable to find Amiga chip RAM\n");
	150	m_chip_ram.set(*share, 2);
	151	m_chip_ram_mask = (m_chip_ram.bytes() - 1) & ~1;
236	152
237		m_chip_ram_mask = m_chip_ram.mask() & ~1;
238		m_chip_ram_mirror = ~m_chip_ram.mask() & 0x1fffff;
239
240		// setup the timers
	153	// set up the timers
241	154	m_irq_timer = timer_alloc(TIMER_AMIGA_IRQ);
242	155	m_blitter_timer = timer_alloc(TIMER_AMIGA_BLITTER);
243	156	m_serial_timer = timer_alloc(TIMER_SERIAL);
r32814	r32815
536	449	if (CUSTOM_REG(REG_BLTCON0) & 0x0800)
537	450	{
538	451	//CUSTOM_REG(REG_BLTADAT) = state->m_maincpu->space(AS_PROGRAM).read_word(CUSTOM_REG_LONG(REG_BLTAPTH));
539		CUSTOM_REG(REG_BLTADAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTAPTH));
	452	CUSTOM_REG(REG_BLTADAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTAPTH));
540	453	CUSTOM_REG_LONG(REG_BLTAPTH) += 2;
541	454	}
542	455
543	456	/* fetch data for B */
544	457	if (CUSTOM_REG(REG_BLTCON0) & 0x0400)
545	458	{
546		CUSTOM_REG(REG_BLTBDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTBPTH));
	459	CUSTOM_REG(REG_BLTBDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTBPTH));
547	460	CUSTOM_REG_LONG(REG_BLTBPTH) += 2;
548	461	}
549	462
550	463	/* fetch data for C */
551	464	if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
552	465	{
553		CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
	466	CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
554	467	CUSTOM_REG_LONG(REG_BLTCPTH) += 2;
555	468	}
556	469
r32814	r32815
606	519	/* write to the destination */
607	520	if (CUSTOM_REG(REG_BLTCON0) & 0x0100)
608	521	{
609		(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
	522	state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
610	523	CUSTOM_REG_LONG(REG_BLTDPTH) += 2;
611	524	}
612	525	}
r32814	r32815
661	574	/* fetch data for A */
662	575	if (CUSTOM_REG(REG_BLTCON0) & 0x0800)
663	576	{
664		CUSTOM_REG(REG_BLTADAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTAPTH));
	577	CUSTOM_REG(REG_BLTADAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTAPTH));
665	578	CUSTOM_REG_LONG(REG_BLTAPTH) -= 2;
666	579	}
667	580
668	581	/* fetch data for B */
669	582	if (CUSTOM_REG(REG_BLTCON0) & 0x0400)
670	583	{
671		CUSTOM_REG(REG_BLTBDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTBPTH));
	584	CUSTOM_REG(REG_BLTBDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTBPTH));
672	585	CUSTOM_REG_LONG(REG_BLTBPTH) -= 2;
673	586	}
674	587
675	588	/* fetch data for C */
676	589	if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
677	590	{
678		CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
	591	CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
679	592	CUSTOM_REG_LONG(REG_BLTCPTH) -= 2;
680	593	}
681	594
r32814	r32815
748	661	/* write to the destination */
749	662	if (CUSTOM_REG(REG_BLTCON0) & 0x0100)
750	663	{
751		(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
	664	state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
752	665	CUSTOM_REG_LONG(REG_BLTDPTH) -= 2;
753	666	}
754	667	}
r32814	r32815
840	753
841	754	/* fetch data for C */
842	755	if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
843		CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
	756	CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
844	757
845	758	/* rotate the A data according to the shift */
846	759	tempa = CUSTOM_REG(REG_BLTADAT) >> (CUSTOM_REG(REG_BLTCON0) >> 12);
r32814	r32815
891	804	blitsum |= tempd;
892	805
893	806	/* write to the destination */
894		(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
	807	state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
895	808
896	809	/* always increment along the major axis */
897	810	if (CUSTOM_REG(REG_BLTCON1) & 0x0010)

trunk/src/mame/includes/amiga.h

r32814	r32815
326	326	public:
327	327	amiga_state(const machine_config &mconfig, device_type type, const char *tag) :
328	328	driver_device(mconfig, type, tag),
329		m_chip_ram(*this, "chip_ram", 0),
330		m_custom_regs(*this, "custom_regs", 0),
331	329	m_agnus_id(AGNUS_NTSC),
332	330	m_denise_id(DENISE),
333	331	m_maincpu(*this, "maincpu"),
r32814	r32815
353	351	m_p2_mouse_x(*this, "p2_mouse_x"),
354	352	m_p2_mouse_y(*this, "p2_mouse_y"),
355	353	m_chip_ram_mask(0),
356		m_chip_ram_mirror(0),
357	354	m_cia_0_irq(0),
358	355	m_cia_1_irq(0),
359	356	m_pot0x(0), m_pot1x(0), m_pot0y(0), m_pot1y(0),
r32814	r32815
373	370	m_rx_previous(1)
374	371	{ }
375	372
	373	/* chip RAM access */
	374	UINT16 chip_ram_r(offs_t byteoffs)
	375	{
	376	return EXPECTED(byteoffs < m_chip_ram.bytes()) ? m_chip_ram.read(byteoffs >> 1) : 0xffff;
	377	}
	378	void chip_ram_w(offs_t byteoffs, UINT16 data)
	379	{
	380	if (EXPECTED(byteoffs < m_chip_ram.bytes()))
	381	m_chip_ram.write(byteoffs >> 1, data);
	382	}
376	383
377		UINT16 (*m_chip_ram_r)(amiga_state *state, offs_t offset);
378		void (*m_chip_ram_w)(amiga_state *state, offs_t offset, UINT16 data);
379
380
381	384	/* sprite states */
382	385	UINT8 m_sprite_comparitor_enable_mask;
383	386	UINT8 m_sprite_dma_reload_mask;
r32814	r32815
486	489	HBLANK = 186
487	490	};
488	491
489		required_shared_ptr<UINT16> m_chip_ram;
490		required_shared_ptr<UINT16> m_custom_regs;
491
492	492	emu_timer *m_blitter_timer;
493	493
494	494	UINT16 m_agnus_id;
495	495	UINT16 m_denise_id;
496	496
	497	UINT16 m_custom_regs[256];
	498
497	499	void custom_chip_w(UINT16 offset, UINT16 data, UINT16 mem_mask = 0xffff)
498	500	{
499	501	custom_chip_w(m_maincpu->space(AS_PROGRAM), offset, data, mem_mask);
r32814	r32815
577	579	optional_ioport m_p2_mouse_x;
578	580	optional_ioport m_p2_mouse_y;
579	581
	582	memory_array m_chip_ram;
580	583	UINT32 m_chip_ram_mask;
581		UINT32 m_chip_ram_mirror;
582	584
583	585	int m_cia_0_irq;
584	586	int m_cia_1_irq;
r32814	r32815
663	665
664	666	extern const char *const amiga_custom_names[0x100];
665	667
666		void amiga_chip_ram_w8(amiga_state *state, offs_t offset, UINT8 data);
667	668
668
669	669	/*----------- defined in video/amiga.c -----------*/
670	670
671	671	extern const UINT16 amiga_expand_byte[256];

trunk/src/mame/video/amiga.c

r32814	r32815
240	240	}
241	241
242	242	/* fetch the first data word */
243		word0 = (*state->m_chip_ram_r)(state, state->m_copper_pc);
	243	word0 = state->chip_ram_r(state->m_copper_pc);
244	244	state->m_copper_pc += 2;
245	245	xpos += COPPER_CYCLES_TO_PIXELS(1);
246	246
247	247	/* fetch the second data word */
248		word1 = (*state->m_chip_ram_r)(state, state->m_copper_pc);
	248	word1 = state->chip_ram_r(state->m_copper_pc);
249	249	state->m_copper_pc += 2;
250	250	xpos += COPPER_CYCLES_TO_PIXELS(1);
251	251
r32814	r32815
381	381
382	382	INLINE void fetch_sprite_data(amiga_state *state, int scanline, int sprite)
383	383	{
384		CUSTOM_REG(REG_SPR0DATA + 4 * sprite) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
385		CUSTOM_REG(REG_SPR0DATB + 4 * sprite) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	384	CUSTOM_REG(REG_SPR0DATA + 4 * sprite) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	385	CUSTOM_REG(REG_SPR0DATB + 4 * sprite) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
386	386	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
387	387	if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X\n", scanline, sprite, CUSTOM_REG(REG_SPR0DATA + 4 * sprite), CUSTOM_REG(REG_SPR0DATB + 4 * sprite));
388	388	}
r32814	r32815
411	411	state->m_sprite_dma_reload_mask &= ~bitmask;
412	412
413	413	/* fetch data into the control words */
414		CUSTOM_REG(REG_SPR0POS + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
415		CUSTOM_REG(REG_SPR0CTL + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
	414	CUSTOM_REG(REG_SPR0POS + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
	415	CUSTOM_REG(REG_SPR0CTL + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
416	416	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) += 4;
417	417	if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: pos=%04X ctl=%04X\n", scanline, num, CUSTOM_REG(REG_SPR0POS + 4 * num), CUSTOM_REG(REG_SPR0CTL + 4 * num));
418	418	}
r32814	r32815
586	586
587	587	INLINE void fetch_bitplane_data(amiga_state *state, int plane)
588	588	{
589		CUSTOM_REG(REG_BPL1DAT + plane) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
	589	CUSTOM_REG(REG_BPL1DAT + plane) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
590	590	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
591	591	}
592	592

trunk/src/mame/video/amigaaga.c

r32814	r32815
92	92	switch((CUSTOM_REG(REG_FMODE) >> 2) & 0x03)
93	93	{
94	94	case 0:
95		state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
96		state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	95	state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	96	state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
97	97	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
98	98	state->m_aga_sprite_fetched_words = 1;
99	99	if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X\n", scanline, sprite, state->m_aga_sprdata[sprite][0], state->m_aga_sprdatb[sprite][0]);
100	100	break;
101	101	case 1:
102	102	case 2:
103		state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
104		state->m_aga_sprdata[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	103	state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	104	state->m_aga_sprdata[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
105	105	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
106		state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
107		state->m_aga_sprdatb[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	106	state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	107	state->m_aga_sprdatb[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
108	108	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
109	109	state->m_aga_sprite_fetched_words = 2;
110	110	if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X %04X-%04X\n", scanline, sprite, state->m_aga_sprdata[sprite][0], state->m_aga_sprdatb[sprite][0], state->m_aga_sprdata[sprite][1], state->m_aga_sprdatb[sprite][1] );
111	111	break;
112	112	case 3:
113		state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
114		state->m_aga_sprdata[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	113	state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	114	state->m_aga_sprdata[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
115	115	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
116		state->m_aga_sprdata[sprite][2] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
117		state->m_aga_sprdata[sprite][3] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	116	state->m_aga_sprdata[sprite][2] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	117	state->m_aga_sprdata[sprite][3] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
118	118	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
119		state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
120		state->m_aga_sprdatb[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	119	state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	120	state->m_aga_sprdatb[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
121	121	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
122		state->m_aga_sprdatb[sprite][2] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
123		state->m_aga_sprdatb[sprite][3] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
	122	state->m_aga_sprdatb[sprite][2] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
	123	state->m_aga_sprdatb[sprite][3] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
124	124	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
125	125	state->m_aga_sprite_fetched_words = 4;
126	126	if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X %04X-%04X %04X-%04X %04X-%04X\n",
r32814	r32815
158	158	state->m_sprite_dma_reload_mask &= ~bitmask;
159	159
160	160	/* fetch data into the control words */
161		CUSTOM_REG(REG_SPR0POS + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
162		CUSTOM_REG(REG_SPR0CTL + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
	161	CUSTOM_REG(REG_SPR0POS + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
	162	CUSTOM_REG(REG_SPR0CTL + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
163	163	CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) += 4;
164	164	/* fetch additional words */
165	165	switch((CUSTOM_REG(REG_FMODE) >> 2) & 0x03)
r32814	r32815
376	376	switch (CUSTOM_REG(REG_FMODE) & 0x03)
377	377	{
378	378	case 0:
379		aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
	379	aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
380	380	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
381	381	break;
382	382	case 1:
383	383	case 2:
384		aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 16;
	384	aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 16;
385	385	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
386		aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)));
	386	aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)));
387	387	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
388	388	break;
389	389	case 3:
390		aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 48;
	390	aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 48;
391	391	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
392		aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 32;
	392	aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 32;
393	393	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
394		aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 16;
	394	aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 16;
395	395	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
396		aga_bpldat[plane] |= (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
	396	aga_bpldat[plane] |= (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
397	397	CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
398	398	break;
399	399	}

trunk/src/mame/drivers/cubo.c

r32814	r32815
360	360
361	361	typedef void (cubo_state::*input_hack_func)();
362	362	input_hack_func m_input_hack;
363
	363	void chip_ram_w8_hack(offs_t byteoffs, UINT8 data);
364	364	void cndypuzl_input_hack();
365	365	void haremchl_input_hack();
366	366	void lsrquiz_input_hack();
r32814	r32815
415	415	AM_RANGE(0x800010, 0x800013) AM_READ_PORT("DIPSW2")
416	416	AM_RANGE(0xb80000, 0xb8003f) AM_DEVREADWRITE("akiko", akiko_device, read, write)
417	417	AM_RANGE(0xbf0000, 0xbfffff) AM_READWRITE16(cia_r, gayle_cia_w, 0xffffffff)
418		AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
	418	AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
419	419	AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("kickstart", 0x80000)
420	420	AM_RANGE(0xa00000, 0xf7ffff) AM_NOP
421	421	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)
r32814	r32815
1170	1170	*
1171	1171	*************************************/
1172	1172
	1173	void cubo_state::chip_ram_w8_hack(offs_t byteoffs, UINT8 data)
	1174	{
	1175	UINT16 word = chip_ram_r(byteoffs);
	1176
	1177	if (byteoffs & 1)
	1178	word = (word & 0xff00) | data;
	1179	else
	1180	word = (word & 0x00ff) | (((UINT16)data) << 8);
	1181
	1182	chip_ram_w(byteoffs, word);
	1183	}
	1184
1173	1185	void cubo_state::cndypuzl_input_hack()
1174	1186	{
1175	1187	if (m_maincpu->pc < m_chip_ram.bytes())
1176	1188	{
1177	1189	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1178		(*m_chip_ram_w)(this, r_A5 - 0x7ebe, 0x0000);
	1190	chip_ram_w(r_A5 - 0x7ebe, 0x0000);
1179	1191	}
1180	1192	}
1181	1193
r32814	r32815
1190	1202	if (m_maincpu->pc < m_chip_ram.bytes())
1191	1203	{
1192	1204	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1193		UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7f00 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7f00 + 2));
1194		amiga_chip_ram_w8(this, r_A2 + 0x1f, 0x00);
	1205	UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7f00 + 0) << 16) | (chip_ram_r(r_A5 - 0x7f00 + 2));
	1206	chip_ram_w8_hack(r_A2 + 0x1f, 0x00);
1195	1207	}
1196	1208	}
1197	1209
r32814	r32815
1206	1218	if (m_maincpu->pc < m_chip_ram.bytes())
1207	1219	{
1208	1220	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1209		UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fe0 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fe0 + 2));
1210		amiga_chip_ram_w8(this, r_A2 + 0x13, 0x00);
	1221	UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fe0 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fe0 + 2));
	1222	chip_ram_w8_hack(r_A2 + 0x13, 0x00);
1211	1223	}
1212	1224	}
1213	1225
r32814	r32815
1223	1235	if (m_maincpu->pc < m_chip_ram.bytes())
1224	1236	{
1225	1237	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1226		UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fdc + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fdc + 2));
1227		amiga_chip_ram_w8(this, r_A2 + 0x17, 0x00);
	1238	UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fdc + 0) << 16) | (chip_ram_r(r_A5 - 0x7fdc + 2));
	1239	chip_ram_w8_hack(r_A2 + 0x17, 0x00);
1228	1240	}
1229	1241	}
1230	1242
r32814	r32815
1239	1251	if (m_maincpu->pc < m_chip_ram.bytes())
1240	1252	{
1241	1253	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1242		UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fa2 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fa2 + 2));
1243		amiga_chip_ram_w8(this, r_A2 + 0x24, 0x00);
	1254	UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fa2 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fa2 + 2));
	1255	chip_ram_w8_hack(r_A2 + 0x24, 0x00);
1244	1256	}
1245	1257	}
1246	1258
r32814	r32815
1255	1267	if (m_maincpu->pc < m_chip_ram.bytes())
1256	1268	{
1257	1269	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1258		(*m_chip_ram_w)(this, r_A5 - 0x7ed8, 0x0000);
	1270	chip_ram_w(r_A5 - 0x7ed8, 0x0000);
1259	1271	}
1260	1272	}
1261	1273
r32814	r32815
1270	1282	if (m_maincpu->pc < m_chip_ram.bytes())
1271	1283	{
1272	1284	UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
1273		amiga_chip_ram_w8(this, r_A5 - 0x7eca, 0x00);
	1285	chip_ram_w8_hack(r_A5 - 0x7eca, 0x00);
1274	1286	}
1275	1287	}
1276	1288

trunk/src/mame/drivers/upscope.c

r32814	r32815
216	216	AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
217	217	AM_RANGE(0xd80000, 0xddffff) AM_NOP
218	218	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
219		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	219	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
220	220	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
221	221	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
222	222	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

trunk/src/mame/drivers/mquake.c

r32814	r32815
126	126	AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
127	127	AM_RANGE(0xd80000, 0xddffff) AM_NOP
128	128	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
129		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	129	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
130	130	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
131	131	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
132	132	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

trunk/src/mame/drivers/arcadia.c

r32814	r32815
194	194	AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
195	195	AM_RANGE(0xd80000, 0xddffff) AM_NOP
196	196	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
197		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	197	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
198	198	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
199	199	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
200	200	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

trunk/src/mame/drivers/alg.c

r32814	r32815
168	168	AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
169	169	AM_RANGE(0xd80000, 0xddffff) AM_NOP
170	170	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
171		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	171	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
172	172	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
173	173	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
174	174	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

trunk/src/emu/machine/amigafdc.c

r32814	r32815
74	74	void amiga_fdc::dma_write(UINT16 value)
75	75	{
76	76	amiga_state *state = machine().driver_data<amiga_state>();
77		(*state->m_chip_ram_w)(state, dskpt, value);
	77	state->chip_ram_w(dskpt, value);
78	78
79	79	dskpt += 2;
80	80	dsklen--;
r32814	r32815
88	88	UINT16 amiga_fdc::dma_read()
89	89	{
90	90	amiga_state *state = machine().driver_data<amiga_state>();
91		UINT16 res = (*state->m_chip_ram_r)(state, dskpt);
	91	UINT16 res = state->chip_ram_r(dskpt);
92	92
93	93	dskpt += 2;
94	94	dsklen--;

trunk/src/emu/machine/akiko.c

r32814	r32815
510	510	data <<= 8;
511	511	data |= buf[i+1];
512	512
513		(*amiga->m_chip_ram_w)( amiga, m_cdrom_address[0] + (index*4096) + i, data );
	513	amiga->chip_ram_w(m_cdrom_address[0] + (index*4096) + i, data );
514	514	}
515	515
516	516	m_cdrom_readmask |= ( 1 << index );

trunk/src/emu/sound/amiga.c

r32814	r32815
212	212	chan->curlocation++;
213	213	if (chan->dma_enabled && !(chan->curlocation & 1))
214	214	{
215		CUSTOM_REG(REG_AUD0DAT + channum * 8) = (*state->m_chip_ram_r)(state, chan->curlocation);
	215	CUSTOM_REG(REG_AUD0DAT + channum * 8) = state->chip_ram_r(chan->curlocation);
216	216	if (chan->curlength != 0)
217	217	chan->curlength--;
218	218

trunk/src/mess/drivers/amiga.c

r32814	r32815
952	952	ADDRESS_MAP_UNMAP_HIGH
953	953	AM_RANGE(0x000000, 0x1fffff) AM_DEVICE("overlay", address_map_bank_device, amap16)
954	954	AM_RANGE(0xa00000, 0xbfffff) AM_READWRITE(cia_r, cia_w)
955		AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	955	AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
956	956	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
957	957	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
958	958	AM_RANGE(0xf80000, 0xfbffff) AM_DEVICE("bootrom", address_map_bank_device, amap16)
r32814	r32815
1005	1005	AM_RANGE(0xdc0000, 0xdc7fff) AM_READWRITE(clock_r, clock_w)
1006	1006	AM_RANGE(0xd80000, 0xddffff) AM_NOP
1007	1007	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1008		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	1008	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1009	1009	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
1010	1010	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1011	1011	AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
r32814	r32815
1020	1020	AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1021	1021	AM_RANGE(0xd80000, 0xddffff) AM_NOP
1022	1022	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1023		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	1023	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1024	1024	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
1025	1025	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1026	1026	AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
r32814	r32815
1038	1038	AM_RANGE(0xdc8000, 0xdc87ff) AM_MIRROR(0x7800) AM_RAM AM_SHARE("sram")
1039	1039	AM_RANGE(0xdd0000, 0xddffff) AM_NOP
1040	1040	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1041		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	1041	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1042	1042	AM_RANGE(0xe00000, 0xe3ffff) AM_MIRROR(0x40000) AM_RAM AM_SHARE("memcard")
1043	1043	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1044	1044	AM_RANGE(0xf00000, 0xf3ffff) AM_MIRROR(0x40000) AM_ROM AM_REGION("cdrom", 0)
r32814	r32815
1058	1058	AM_RANGE(0x00dc0000, 0x00dcffff) AM_DEVREADWRITE8("rtc", rp5c01_device, read, write, 0x000000ff)
1059	1059	AM_RANGE(0x00dd0000, 0x00ddffff) AM_READWRITE(scsi_r, scsi_w)
1060	1060	AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
1061		AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
	1061	AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
1062	1062	AM_RANGE(0x00e80000, 0x00efffff) AM_NOP // autoconfig space (installed by devices)
1063	1063	AM_RANGE(0x00f00000, 0x00f7ffff) AM_NOP // cartridge space
1064	1064	AM_RANGE(0x00f80000, 0x00ffffff) AM_ROM AM_REGION("kickstart", 0)
r32814	r32815
1076	1076	AM_RANGE(0xdc0000, 0xdc7fff) AM_READWRITE(clock_r, clock_w)
1077	1077	AM_RANGE(0xd80000, 0xddffff) AM_NOP
1078	1078	AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1079		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	1079	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1080	1080	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
1081	1081	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1082	1082	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)
r32814	r32815
1099	1099	AM_RANGE(0xdc0000, 0xdcffff) AM_NOP // rtc
1100	1100	AM_RANGE(0xdd0000, 0xddffff) AM_NOP // reserved (dma controller)
1101	1101	AM_RANGE(0xde0000, 0xdeffff) AM_DEVREADWRITE("gayle", gayle_device, gayle_id_r, gayle_id_w)
1102		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
	1102	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
1103	1103	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
1104	1104	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1105	1105	AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
r32814	r32815
1123	1123	AM_RANGE(0xdc0000, 0xdcffff) AM_NOP // rtc
1124	1124	AM_RANGE(0xdd0000, 0xddffff) AM_NOP // reserved (dma controller)
1125	1125	AM_RANGE(0xde0000, 0xdeffff) AM_DEVREADWRITE16("gayle", gayle_device, gayle_id_r, gayle_id_w, 0xffffffff)
1126		AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
	1126	AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
1127	1127	AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror32_r)
1128	1128	AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
1129	1129	AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
r32814	r32815
1146	1146	AM_RANGE(0x00dd1000, 0x00dd3fff) AM_READWRITE16(ide_r, ide_w, 0xffffffff)
1147	1147	AM_RANGE(0x00dd4000, 0x00ddffff) AM_NOP
1148	1148	AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
1149		AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
	1149	AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
1150	1150	AM_RANGE(0x00e00000, 0x00e7ffff) AM_WRITENOP AM_READ(rom_mirror32_r)
1151	1151	AM_RANGE(0x00e80000, 0x00efffff) AM_NOP // zorro2 autoconfig space (installed by devices)
1152	1152	AM_RANGE(0x00f00000, 0x00f7ffff) AM_NOP // cartridge space
r32814	r32815
1171	1171	AM_RANGE(0x000000, 0x1fffff) AM_DEVICE("overlay", address_map_bank_device, amap32)
1172	1172	AM_RANGE(0xb80000, 0xb8003f) AM_DEVREADWRITE("akiko", akiko_device, read, write)
1173	1173	AM_RANGE(0xbf0000, 0xbfffff) AM_READWRITE16(cia_r, gayle_cia_w, 0xffffffff)
1174		AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
	1174	AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
1175	1175	AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("kickstart", 0x80000)
1176	1176	AM_RANGE(0xa00000, 0xf7ffff) AM_NOP
1177	1177	AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

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