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r32689 Sunday 12th October, 2014 at 11:54:06 UTC by smf
Beatmania IIDX Twinkle hardware: The IDE DMA is now hooked up, but the sound board isn't running well enough yet for it to make a difference. Hooked up the FDC37665GT and HLE the XVD701 and the 68k sound board responses to get most of the games booting. There is no sound and the games all fail with a hdd error when you start a stage. Beatmania IIDX with DDR 2nd Club Version wants the GQ863 hard disk. [smf]
[src/emu/bus]bus.mak
[src/emu/bus/rs232]xvd701.c* xvd701.h*
[src/emu/machine]fdc37c665gt.c* fdc37c665gt.h* machine.mak
[src/mame]mame.mak
[src/mame/drivers]twinkle.c

trunk/src/mame/mame.mak
r32688r32689
556556MACHINES += Z8536
557557MACHINES += SECFLASH
558558MACHINES += PCCARD
559MACHINES += FDC37C665GT
559560#MACHINES += SMC92X4
560561#MACHINES += TI99_HD
561562#MACHINES += STRATA
trunk/src/mame/drivers/twinkle.c
r32688r32689
66
77TODO:
88
9sound (IDE DMA, finish comms)
10dvd
11hard drive
9dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca
10finish sound board emulation and remove response hle
11emulate dvd player and video mixing
121216seg led font
1313
1414
15
1615Konami Twinkle Hardware Overview
1716Konami 1999-2002
1817
r32688r32689
232231#include "video/psx.h"
233232#include "bus/scsi/scsi.h"
234233#include "bus/scsi/scsicd.h"
234#include "bus/rs232/xvd701.h"
235235#include "machine/am53cf96.h"
236#include "machine/ataintf.h"
237#include "machine/fdc37c665gt.h"
238#include "machine/i2cmem.h"
236239#include "machine/rtc65271.h"
237#include "machine/i2cmem.h"
238240#include "machine/x76f041.h"
239#include "machine/ataintf.h"
240241#include "sound/spu.h"
241242#include "sound/cdda.h"
242243#include "sound/rf5c400.h"
r32688r32689
247248   twinkle_state(const machine_config &mconfig, device_type type, const char *tag)
248249      : driver_device(mconfig, type, tag),
249250      m_am53cf96(*this, "am53cf96"),
251      m_ata(*this, "ata"),
252      m_rfsnd(*this, "rfsnd"),
253      m_spu_ata_dma(0),
250254      m_maincpu(*this, "maincpu"),
251255      m_audiocpu(*this, "audiocpu")
252256   {
257      m_spu_hle[0x200] = 0;
258      m_spu_hle[0x202] = 0;
253259   }
254260
255261   required_device<am53cf96_device> m_am53cf96;
262   required_device<ata_interface_device> m_ata;
263   required_memory_region m_rfsnd;
256264
257265   UINT16 m_spu_ctrl;      // SPU board control register
258266   UINT8 m_spu_shared[0x400];  // SPU/PSX shared dual-ported RAM
259   UINT32 m_unknown;
267   UINT8 m_spu_hle[0x400];
268   UINT32 m_spu_ata_dma;
269   int m_spu_ata_dmarq;
260270
261271   int m_io_offset;
262272   int m_output_last[ 0x100 ];
r32688r32689
269279   DECLARE_WRITE8_MEMBER(shared_psx_w);
270280   DECLARE_READ8_MEMBER(shared_psx_r);
271281   DECLARE_WRITE16_MEMBER(twinkle_spu_ctrl_w);
282   DECLARE_WRITE16_MEMBER(spu_ata_dma_low_w);
283   DECLARE_WRITE16_MEMBER(spu_ata_dma_high_w);
272284   DECLARE_READ16_MEMBER(twinkle_waveram_r);
273285   DECLARE_WRITE16_MEMBER(twinkle_waveram_w);
274286   DECLARE_READ16_MEMBER(shared_68k_r);
275287   DECLARE_WRITE16_MEMBER(shared_68k_w);
276   DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
288   DECLARE_WRITE_LINE_MEMBER(spu_ata_irq);
289   DECLARE_WRITE_LINE_MEMBER(spu_ata_dmarq);
277290   required_device<cpu_device> m_maincpu;
278291   required_device<cpu_device> m_audiocpu;
279292
r32688r32689
495508            break;
496509
497510         case 0x8f:
498            output_set_value( "neonlamp", ~data & 1 );
511            output_set_value( "neonlamp", ( ~data >> 0 ) & 1 );
512            output_set_value( "unknown1", ( ~data >> 1 ) & 1 );
513            output_set_value( "unknown2", ( ~data >> 2 ) & 1 );
499514
500            if( ( data & 0xfe ) != 0xfe )
515            if( ( data & 0xf8 ) != 0xf8 )
501516            {
502517               printf("%02x = %02x\n", m_io_offset, data );
503518            }
r32688r32689
656671
657672WRITE8_MEMBER(twinkle_state::shared_psx_w)
658673{
674   //printf("shared_psx_w: %04x, %04x, %04x\n", offset, data, mem_mask);
675
659676   m_spu_shared[offset] = data;
660//  printf("shared_psx_w: %x to %x, mask %x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
677
678   // HLE sound board
679   m_spu_hle[offset] = data;
680
681   if (offset == 0x03fe && data == 0xff)
682   {
683      //printf("spu command %02x %02x\n", m_spu_hle[1], m_spu_hle[3]);
684
685      for (int i = 0x200; i < 0x300; i++) m_spu_hle[i] = 0xea;
686
687      switch (m_spu_hle[1])
688      {
689      case 0x91: // hdd sum 1
690         m_spu_hle[0x200] = 0; // ?
691         m_spu_hle[0x202] = 0; // ?
692         break;
693
694      case 0x9a: // hdd sum 2
695         m_spu_hle[0x200] = 0; // ?
696         m_spu_hle[0x202] = 0; // ?
697         m_spu_hle[0x203] = 1; // Must be 1 to pass test
698         break;
699
700      case 0xa1: // version
701         m_spu_hle[0x200] = 0; // ?
702         m_spu_hle[0x202] = 0; // ?
703
704         if (strcmp(machine().system().name, "bmiidx") == 0 ||
705            strcmp(machine().system().name, "bmiidxa") == 0 ||
706            strcmp(machine().system().name, "bmiidxc") == 0 ||
707            strcmp(machine().system().name, "bmiidxca") == 0)
708         {
709            strcpy((char *)&m_spu_hle[0x204], "GQ863JA_A");
710         }
711         else if (strcmp(machine().system().name, "bmiidxs") == 0)
712         {
713            strcpy((char *)&m_spu_hle[0x204], "GC983JA_A");
714         }
715         else if (strcmp(machine().system().name, "bmiidxc2") == 0)
716         {
717            strcpy((char *)&m_spu_hle[0x204], "GC983JA_R");
718         }
719         else if (strcmp(machine().system().name, "bmiidx2") == 0)
720         {
721            strcpy((char *)&m_spu_hle[0x204], "GC985JA_A");
722         }
723         else if (strcmp(machine().system().name, "bmiidx3") == 0 ||
724            strcmp(machine().system().name, "bmiidx3a") == 0)
725         {
726            strcpy((char *)&m_spu_hle[0x204], "GC992JA_A");
727         }
728         else if (strcmp(machine().system().name, "bmiidx4") == 0)
729         {
730            strcpy((char *)&m_spu_hle[0x204], "GCA03JA_A");
731         }
732         else if (strcmp(machine().system().name, "bmiidx5") == 0)
733         {
734            strcpy((char *)&m_spu_hle[0x204], "GCA17JA_A");
735         }
736         else if (strcmp(machine().system().name, "bmiidx6") == 0 ||
737            strcmp(machine().system().name, "bmiidx6a") == 0)
738         {
739            strcpy((char *)&m_spu_hle[0x204], "GCB4UJA_A");
740         }
741         else if (strcmp(machine().system().name, "bmiidx7") == 0)
742         {
743            strcpy((char *)&m_spu_hle[0x204], "GCB44JA_A");
744         }
745         else if (strcmp(machine().system().name, "bmiidx8") == 0)
746         {
747            strcpy((char *)&m_spu_hle[0x204], "GCC44JA_A");
748         }
749         break;
750
751      case 0x30: // play sound [3]=sound code
752      case 0x51: // sound off
753      case 0x25: // spu rom error ([3]==0x0f)
754      case 0x26: // spu rom error ([3]==0x0f)
755      case 0x08: // spu rom error
756      case 0x40: // spu rom error ([3]==0x01 coin sound?)
757      case 0x2f: // spu rom error
758      case 0x52: // spu rom error
759      case 0x04: // spu rom error ([3]==?)
760         m_spu_hle[0x200] = 0;
761         m_spu_hle[0x202] = 0;
762         break;
763      }
764   }
661765}
662766
663767READ8_MEMBER(twinkle_state::shared_psx_r)
664768{
665   UINT32 result = m_spu_shared[offset];
769   //UINT32 result = m_spu_shared[offset];
770   UINT32 result = m_spu_hle[offset];
666771
667//  printf("shared_psx_r: @ %x, mask %x (PC=%x)\n", offset, mem_mask, result, space.device().safe_pc());
772   //printf("shared_psx_r: %04x, %04x, %04x\n", offset, result, mem_mask);
668773
669   result = 0; // HACK to prevent the games from freezing while we sort out the rest of the 68k's boot sequence
670
671774   return result;
672775}
673776
r32688r32689
675778   AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE8(shared_psx_r, shared_psx_w, 0x00ff00ff)
676779   AM_RANGE(0x1f200000, 0x1f20001f) AM_DEVREADWRITE8("am53cf96", am53cf96_device, read, write, 0x00ff00ff)
677780   AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
678   AM_RANGE(0x1f210400, 0x1f2107ff) AM_READNOP
781   AM_RANGE(0x1f210000, 0x1f2107ff) AM_DEVREADWRITE8("fdc37c665gt", fdc37c665gt_device, read, write, 0x00ff00ff)
679782   AM_RANGE(0x1f218000, 0x1f218003) AM_WRITE8(watchdog_reset_w, 0x000000ff) /* LTC1232 */
680783   AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE8(twinkle_io_w, 0x00ff00ff)
681784   AM_RANGE(0x1f220004, 0x1f220007) AM_READ8(twinkle_io_r, 0x00ff00ff)
r32688r32689
692795
693796/* SPU board */
694797
695WRITE_LINE_MEMBER(twinkle_state::ide_interrupt)
798WRITE_LINE_MEMBER(twinkle_state::spu_ata_irq)
696799{
697800   if ((state) && (m_spu_ctrl & 0x0400))
698801   {
r32688r32689
715818{
716819   if ((!(data & 0x0080)) && (m_spu_ctrl & 0x0080))
717820   {
718      space.device().execute().set_input_line(M68K_IRQ_1, CLEAR_LINE);
821      m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
719822   }
720823   else if ((!(data & 0x0100)) && (m_spu_ctrl & 0x0100))
721824   {
722      space.device().execute().set_input_line(M68K_IRQ_2, CLEAR_LINE);
825      m_audiocpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
723826   }
724827   else if ((!(data & 0x0200)) && (m_spu_ctrl & 0x0200))
725828   {
726      space.device().execute().set_input_line(M68K_IRQ_4, CLEAR_LINE);
829      m_audiocpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
727830   }
728831   else if ((!(data & 0x0400)) && (m_spu_ctrl & 0x0400))
729832   {
730      space.device().execute().set_input_line(M68K_IRQ_6, CLEAR_LINE);
833      m_audiocpu->set_input_line(M68K_IRQ_6, CLEAR_LINE);
731834   }
732835
733836   m_spu_ctrl = data;
734837}
735838
839WRITE16_MEMBER(twinkle_state::spu_ata_dma_low_w)
840{
841   m_spu_ata_dma = (m_spu_ata_dma & ~0xffff) | data;
842
843   //printf("dma_low %08x\n", m_spu_ata_dma * 2);
844}
845
846WRITE16_MEMBER(twinkle_state::spu_ata_dma_high_w)
847{
848   m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | (data << 16);
849
850   //printf("dma_high %08x\n", m_spu_ata_dma * 2);
851}
852
853WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq)
854{
855   if (m_spu_ata_dmarq != state)
856   {
857      m_spu_ata_dmarq = state;
858
859      if (m_spu_ata_dmarq)
860      {
861         UINT16 *waveram = (UINT16 *)m_rfsnd->base();
862
863         m_ata->write_dmack(ASSERT_LINE);
864
865         while (m_spu_ata_dmarq)
866         {
867            UINT16 data = m_ata->read_dma();
868            //printf("spu_ata_dmarq %08x %04x\n", m_spu_ata_dma * 2, data);
869            //waveram[m_spu_ata_dma++] = (data >> 8) | (data << 8);
870            // bp 4a0e ;bmiidx4 checksum
871            // bp 4d62 ;bmiidx4 dma
872            waveram[m_spu_ata_dma++] = data;
873         }
874
875         m_ata->write_dmack(CLEAR_LINE);
876      }
877   }
878}
879
736880READ16_MEMBER(twinkle_state::twinkle_waveram_r)
737881{
738   UINT16 *waveram = (UINT16 *)memregion("rfsnd")->base();
882   UINT16 *waveram = (UINT16 *)m_rfsnd->base();
739883
740884   return waveram[offset];
741885}
742886
743887WRITE16_MEMBER(twinkle_state::twinkle_waveram_w)
744888{
745   UINT16 *waveram = (UINT16 *)memregion("rfsnd")->base();
889   UINT16 *waveram = (UINT16 *)m_rfsnd->base();
746890
747891   COMBINE_DATA(&waveram[offset]);
748892}
749893
750894READ16_MEMBER(twinkle_state::shared_68k_r)
751895{
752// printf("shared_68k_r: @ %x, mask %x\n", offset, mem_mask);
896   UINT16 result = m_spu_shared[offset];
753897
754   return m_spu_shared[offset];
898   //printf("shared_68k_r: %04x, %04x, %04x\n", offset, result, mem_mask);
899
900   return result;
755901}
756902
757903WRITE16_MEMBER(twinkle_state::shared_68k_w)
758904{
759//  printf("shared_68k_w: %x to %x, mask %x\n", data, offset, mem_mask);
905   //printf("shared_68k_w: %04x, %04x, %04x\n", offset, data, mem_mask);
760906
761907   m_spu_shared[offset] = data & 0xff;
762908}
r32688r32689
766912   AM_RANGE(0x100000, 0x13ffff) AM_RAM
767913   // 220000 = LEDs?
768914   AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w)
769   // 240000 = top 16 bits of DMA address?
770   // 250000 = write to initiate DMA?
915   AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w)
916   AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w)
771917   // 260000 = ???
772   AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w )
918   AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w)
773919   AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0)
774920   // 34000E = ???
775921   AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w)
r32688r32689
8861032   MCFG_AM53CF96_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
8871033
8881034   MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
889   MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, ide_interrupt))
1035   MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, spu_ata_irq))
1036   MCFG_ATA_INTERFACE_DMARQ_HANDLER(WRITELINE(twinkle_state, spu_ata_dmarq))
8901037
8911038   MCFG_DEVICE_ADD("rtc", RTC65271, 0)
8921039
1040   MCFG_DEVICE_ADD("fdc37c665gt", FDC37C665GT, XTAL_24MHz)
1041
1042   MCFG_DEVICE_ADD("rs232", RS232_PORT, 0)
1043   MCFG_SLOT_OPTION_ADD("xvd701", JVC_XVD701)
1044//   MCFG_SLOT_OPTION_ADD("xvs1100", JVC_XVS1100) // 8th mix only
1045   MCFG_SLOT_DEFAULT_OPTION("xvd701")
1046   MCFG_RS232_RXD_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, rx_w))
1047   MCFG_RS232_DCD_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, dcd_w))
1048   MCFG_RS232_DSR_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, dsr_w))
1049   MCFG_RS232_RI_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, ri_w))
1050   MCFG_RS232_CTS_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, cts_w))
1051
1052   MCFG_DEVICE_MODIFY("fdc37c665gt:uart2")
1053   MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("^rs232", rs232_port_device, write_txd))
1054   MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("^rs232", rs232_port_device, write_dtr))
1055   MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("^rs232", rs232_port_device, write_rts))
1056
8931057   /* video hardware */
8941058   MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x200000, XTAL_53_693175MHz )
8951059
r32688r32689
9731137   PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", x76f041_device, write_cs)
9741138
9751139   PORT_MODIFY("INSEC")
976   PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE_MEMBER("security", x76f041_device, read_sda)
1140   PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("security", x76f041_device, read_sda)
9771141INPUT_PORTS_END
9781142
9791143static INPUT_PORTS_START( twinklei )
r32688r32689
11891353   DISK_IMAGE_READONLY( "896jaa04", 0, NO_DUMP )
11901354
11911355   DISK_REGION( "ata:0:hdd:image" )
1192   DISK_IMAGE_READONLY( "896hdda01", 0, NO_DUMP )
1356   DISK_IMAGE_READONLY( "863hdda01", 0, SHA1(0b8dbf1c9caf4abf965dbc6e1a8e6329d48b1c90) )
11931357ROM_END
11941358
11951359ROM_START( bmiidxca )
r32688r32689
12051369   DISK_IMAGE_READONLY( "896jaa04", 0, NO_DUMP )
12061370
12071371   DISK_REGION( "ata:0:hdd:image" )
1208   DISK_IMAGE_READONLY( "896hdda01", 0, NO_DUMP )
1372   DISK_IMAGE_READONLY( "863hdda01", 0, SHA1(0b8dbf1c9caf4abf965dbc6e1a8e6329d48b1c90) )
12091373ROM_END
12101374
12111375ROM_START( bmiidxs )
r32688r32689
12441408
12451409GAME( 1999, bmiidx,   gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX (863 JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
12461410GAME( 1999, bmiidxa,  bmiidx,  twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX (863 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1247GAME( 1999, bmiidxc,  gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1248GAME( 1999, bmiidxca, bmiidxc, twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1249GAME( 1999, bmiidxs,  gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1250GAME( 1999, bmiidxc2, gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "Beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1251GAME( 1999, bmiidx2,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1252GAME( 2000, bmiidx3,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1253GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1254GAME( 2000, bmiidx4,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1255GAME( 2001, bmiidx5,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1256GAME( 2001, bmiidx6,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1257GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1258GAME( 2002, bmiidx7,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1259GAME( 2002, bmiidx8,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1411GAME( 1999, bmiidxc,  gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1412GAME( 1999, bmiidxca, bmiidxc, twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1413GAME( 1999, bmiidxs,  gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1414GAME( 1999, bmiidxc2, gq863,   twinklex, twinklex, driver_device, 0,        ROT0, "Konami", "Beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1415GAME( 1999, bmiidx2,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1416GAME( 2000, bmiidx3,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1417GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1418GAME( 2000, bmiidx4,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1419GAME( 2001, bmiidx5,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1420GAME( 2001, bmiidx6,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1421GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1422GAME( 2002, bmiidx7,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1423GAME( 2002, bmiidx8,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
trunk/src/emu/machine/fdc37c665gt.c
r0r32689
1#include "fdc37c665gt.h"
2
3fdc37c665gt_device::fdc37c665gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
4   device_t(mconfig, FDC37C665GT, "FDC37C665GT", tag, owner, clock, "fdc37c665gt", __FILE__),
5   m_uart1(*this, "uart1"),
6   m_uart2(*this, "uart2")
7{
8}
9
10READ8_MEMBER(fdc37c665gt_device::read)
11{
12   UINT8 data = 0;
13
14   if ((offset & 0x3f8) == 0x3f8)
15   {
16      data = m_uart1->ins8250_r(space, offset & 7, mem_mask);
17   }
18   else if ((offset & 0x3f8) == 0x2f8)
19   {
20      data = m_uart2->ins8250_r(space, offset & 7, mem_mask);
21   }
22   else
23   {
24      printf("fdc37c665gt_device::read %04x %02x\n", offset, data);
25   }
26   return data;
27}
28
29WRITE8_MEMBER(fdc37c665gt_device::write)
30{
31   if ((offset & 0x3f8) == 0x3f8)
32   {
33      m_uart1->ins8250_w(space, offset & 7, data, mem_mask);
34   }
35   else if ((offset & 0x3f8) == 0x2f8)
36   {
37      m_uart2->ins8250_w(space, offset & 7, data, mem_mask);
38   }
39   else
40   {
41      printf("fdc37c665gt_device::write %04x %02x\n", offset, data);
42   }
43}
44
45void fdc37c665gt_device::device_start()
46{
47}
48
49static MACHINE_CONFIG_FRAGMENT(fdc37c665gt)
50   MCFG_DEVICE_ADD("uart1", NS16550, XTAL_24MHz/13)
51   MCFG_DEVICE_ADD("uart2", NS16550, XTAL_24MHz/13)
52MACHINE_CONFIG_END
53
54machine_config_constructor fdc37c665gt_device::device_mconfig_additions() const
55{
56   return MACHINE_CONFIG_NAME(fdc37c665gt);
57}
58
59const device_type FDC37C665GT = &device_creator<fdc37c665gt_device>;
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trunk/src/emu/machine/fdc37c665gt.h
r0r32689
1/*
2* fdc37c665gt.h
3*
4*/
5
6#ifndef _FDC37C665GT_H_
7#define _FDC37C665GT_H_
8
9#pragma once
10
11#include "ins8250.h"
12
13class fdc37c665gt_device : public device_t
14{
15public:
16   // construction/destruction
17   fdc37c665gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
18
19   DECLARE_READ8_MEMBER(read);
20   DECLARE_WRITE8_MEMBER(write);
21
22protected:
23   // device-level overrides
24   virtual void device_start();
25   virtual machine_config_constructor device_mconfig_additions() const;
26
27private:
28   required_device<ns16550_device> m_uart1;
29   required_device<ns16550_device> m_uart2;
30};
31
32// device type definition
33extern const device_type FDC37C665GT;
34
35#endif
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trunk/src/emu/machine/machine.mak
r32688r32689
18981898MACHINEOBJS += $(MACHINEOBJ)/diablo_hd.o
18991899endif
19001900
1901#-------------------------------------------------
1902#
1903#@src/emu/machine/fdc37c665gt.h,MACHINES += FDC37C665GT
1904#-------------------------------------------------
1905
1906ifneq ($(filter FDC37C665GT,$(MACHINES)),)
1907MACHINEOBJS += $(MACHINEOBJ)/fdc37c665gt.o
1908endif
trunk/src/emu/bus/bus.mak
r32688r32689
945945BUSOBJS += $(BUSOBJ)/rs232/rs232.o
946946BUSOBJS += $(BUSOBJ)/rs232/ser_mouse.o
947947BUSOBJS += $(BUSOBJ)/rs232/terminal.o
948BUSOBJS += $(BUSOBJ)/rs232/xvd701.o
948949endif
949950
950951#-------------------------------------------------
trunk/src/emu/bus/rs232/xvd701.h
r0r32689
1#ifndef JVC_XV701_H_
2#define JVC_XV701_H_
3
4#include "rs232.h"
5
6class jvc_xvd701_device : public device_t,
7   public device_serial_interface,
8   public device_rs232_port_interface
9{
10public:
11   jvc_xvd701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
12   virtual machine_config_constructor device_mconfig_additions() const;
13
14   virtual WRITE_LINE_MEMBER( input_txd ) { device_serial_interface::rx_w(state); }
15
16   DECLARE_WRITE_LINE_MEMBER(update_serial);
17
18protected:
19   virtual ioport_constructor device_input_ports() const;
20   virtual void device_start();
21   virtual void device_reset();
22   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
23
24   virtual void tra_callback();
25   virtual void tra_complete();
26   virtual void rcv_complete();
27
28private:
29   static const int TIMER_RESPONSE = 1;
30
31   void send_response();
32   unsigned char sum(unsigned char *buffer, int length);
33
34   unsigned char m_command[11];
35   unsigned char m_response[11];
36   int m_response_index;
37   emu_timer *m_timer_response;
38};
39
40extern const device_type JVC_XVD701;
41
42#endif
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trunk/src/emu/bus/rs232/xvd701.c
r0r32689
1#include "xvd701.h"
2
3jvc_xvd701_device::jvc_xvd701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
4   : device_t(mconfig, JVC_XVD701, "JVC XV-D701", tag, owner, clock, "xvd701", __FILE__),
5   device_serial_interface(mconfig, *this),
6   device_rs232_port_interface(mconfig, *this)
7{
8}
9
10static MACHINE_CONFIG_FRAGMENT(xvd701)
11MACHINE_CONFIG_END
12
13machine_config_constructor jvc_xvd701_device::device_mconfig_additions() const
14{
15   return MACHINE_CONFIG_NAME(xvd701);
16}
17
18static INPUT_PORTS_START(xvd701)
19INPUT_PORTS_END
20
21ioport_constructor jvc_xvd701_device::device_input_ports() const
22{
23   return INPUT_PORTS_NAME(xvd701);
24}
25
26void jvc_xvd701_device::device_start()
27{
28   int startbits = 1;
29   int databits = 8;
30   parity_t parity = PARITY_ODD;
31   stop_bits_t stopbits = STOP_BITS_1;
32
33   set_data_frame(startbits, databits, parity, stopbits);
34
35   int txbaud = 9600;
36   set_tra_rate(txbaud);
37
38   int rxbaud = 9600;
39   set_rcv_rate(rxbaud);
40
41   output_rxd(1);
42
43   // TODO: make this configurable
44   output_dcd(0);
45   output_dsr(0);
46   output_ri(0);
47   output_cts(0);
48
49   m_timer_response = timer_alloc(TIMER_RESPONSE);
50}
51
52void jvc_xvd701_device::device_reset()
53{
54   memset(m_command, 0, sizeof(m_command));
55
56   m_response_index = sizeof(m_response);
57}
58
59void jvc_xvd701_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
60{
61   switch (id)
62   {
63   case TIMER_RESPONSE:
64      send_response();
65      break;
66
67   default:
68      device_serial_interface::device_timer(timer, id, param, ptr);
69   }
70}
71
72void jvc_xvd701_device::tra_callback()
73{
74   output_rxd(transmit_register_get_data_bit());
75}
76
77void jvc_xvd701_device::tra_complete()
78{
79   m_timer_response->adjust(attotime::from_msec(100));
80}
81
82unsigned char jvc_xvd701_device::sum(unsigned char *buffer, int length)
83{
84   int sum = 0;
85
86   for (int i = 0; i < length; i++)
87      sum += buffer[i];
88
89   return sum & 0x7f;
90}
91
92void jvc_xvd701_device::send_response()
93{
94   if (m_response_index < sizeof(m_response) && is_transmit_register_empty())
95   {
96//      printf("sending %02x\n", m_response[m_response_index]);
97      transmit_register_setup(m_response[m_response_index++]);
98   }
99}
100
101void jvc_xvd701_device::rcv_complete()
102{
103   receive_register_extract();
104
105   for (int i = 0; i < sizeof(m_command) - 1; i++)
106      m_command[i] = m_command[i + 1];
107
108   m_command[sizeof(m_command) - 1] = get_received_char();
109
110   if (m_command[0] == 0xff &&
111      m_command[1] == 0xff &&
112      m_command[2] == 0x21 &&
113      sum(m_command, sizeof(m_command)) == 0)
114   {
115      // printf("xvd701");
116
117      //for (int i = 0; i < sizeof(m_command); i++)
118      //   printf(" %02x", m_command[i]);
119
120      //printf("\n");
121
122      // FF FF 21 3E 40 70 00 00 00 00 73 DEVICE ON
123      // FF FF 21 3E 40 60 00 00 00 00 03 DEVICE OFF
124      // FF FF 21 0C 44 60 00 00 00 00 31 STOP
125      // FF FF 21 0C 43 75 00 00 00 00 1D PLAY
126      // FF FF 21 0C 43 6D 00 00 00 00 25 PAUSE
127      // FF FF 21 0C 50 20 00 00 00 00 63 SEEK TO SPECIFIC CHAPTER
128      // FF FF 21 0C 50 73 00 00 00 00 12 FF (SEEK TO NEXT CHAPTER)
129      // FF FF 21 0C 50 61 00 00 00 00 24 PREV (SEEK TO PREVIOUS CHAPTER)
130
131      m_response[0] = 0xff;
132      m_response[1] = 0xfe;
133      m_response[2] = 0x7f;
134      m_response[3] = 0x7e;
135      m_response[4] = 0x7d;
136      m_response[5] = 0x7c;
137      m_response[6] = 0x7b;
138      m_response[7] = 0x7a;
139      m_response[8] = 0x79;
140      m_response[9] = 0x78;
141      m_response[10] = 0x77;
142      m_response_index = 0;
143
144      m_timer_response->adjust(attotime::from_msec(100));
145   }
146}
147
148const device_type JVC_XVD701 = &device_creator<jvc_xvd701_device>;
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