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r32671 Saturday 11th October, 2014 at 23:59:05 UTC by Barry Rodewald
trident: MMIO WIP.  To test with Win95, set the card ID to 0xe3.
[src/emu/bus/isa]svga_trident.c trident.c trident.h

trunk/src/emu/bus/isa/trident.c
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3030#define CRTC_PORT_ADDR ((vga.miscellaneous_output&1)?0x3d0:0x3b0)
3131
3232#define LOG (1)
33#define LOG_ACCEL (0)
33#define LOG_ACCEL (1)
3434
3535trident_vga_device::trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
3636   : svga_device(mconfig, TRIDENT_VGA, "Trident TGUI9680", tag, owner, clock, "trident_vga", __FILE__)
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120120   case 0x5a:  // XOR PAT
121121      src = dst ^ src;
122122      break;
123   case 0xb8:  // PAT xor (SRC and (DST xor PAT)) (correct?)
124      src = src & (dst ^ src);
125      break;
123126   }
124127   return src;
125128}
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140143void trident_vga_device::WRITEPIXEL(INT16 x,INT16 y, UINT32 data)
141144{
142145   if(svga.rgb8_en)
143      WRITEPIXEL8(x,y,(((data >> 16) & 0xff) | ((data >> 8) & 0xff) | (data & 0xff)));  // XFree86 3.3 sets bits 0-7 to 0 when using mono patterns, does it OR each byte?
146      WRITEPIXEL8(x,y,(((data >> 8) & 0xff) | (data & 0xff)));  // XFree86 3.3 sets bits 0-7 to 0 when using mono patterns, does it OR each byte?
144147   if(svga.rgb15_en)
145148      WRITEPIXEL15(x,y,data & 0x7fff);
146149   if(svga.rgb16_en)
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184187void trident_vga_device::device_reset()
185188{
186189   svga_device::device_reset();
187   svga.id = 0xd3;  // identifies at TGUI9660XGi (set to 0xe3 to identify at TGUI9440AGi)
190   svga.id = 0xd3;  // 0xd3 identifies at TGUI9660XGi (set to 0xe3 to identify at TGUI9440AGi)
188191   tri.revision = 0x01;  // revision identifies as TGUI9680
189192   tri.new_mode = false;  // start up in old mode
190193   tri.dac_active = false;
191194   tri.linear_active = false;
192195   tri.mmio_active = false;
193196   tri.sr0f = 0x6f;
194   tri.sr0c = 0x78;
197   tri.sr0c = 0x70;
198   tri.cr2a = 0x03;  // set ISA interface?
195199   tri.mem_clock = 0x2c6;  // 50MHz default
196200   tri.vid_clock = 0;
197201   tri.port_3c3 = true;
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517521      case 0x1f:
518522         res = tri.cr1f;
519523         break;
524      case 0x20:
525         res = tri.cr20;
526         break;
520527      case 0x21:
521528         res = tri.cr21;
522529         break;
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533540      case 0x29:
534541         res = tri.cr29;
535542         break;
543      case 0x2a:
544         res = tri.cr2a;
545         break;
536546      case 0x38:
537547         res = tri.pixel_depth;
538548         break;
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618628      case 0x1f:
619629         tri.cr1f = data;  // "Software Programming Register"  written to by the BIOS
620630         break;
631      case 0x20:  // FIFO Control (old MMIO enable? no documentation of this register)
632         tri.cr20 = data;
633         break;
621634      case 0x21:  // Linear aperture
622635         tri.cr21 = data;
623636         tri.linear_address = ((data & 0xc0)<<18) | ((data & 0x0f)<<20);
624637         tri.linear_active = data & 0x20;
625         //if(tri.linear_active)
626            //popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
638         if(tri.linear_active)
639            popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
627640         break;
628641      case 0x27:
629642         vga.crtc.start_addr = (vga.crtc.start_addr & 0xfff9ffff) | ((data & 0x03)<<17);
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632645         tri.cr29 = data;
633646         vga.crtc.offset = (vga.crtc.offset & 0xfeff) | ((data & 0x10)<<4);
634647         break;
648      case 0x2a:
649         tri.cr2a = data;
650         break;
635651      case 0x38:
636652         // bit 0: 16 bit bus
637653         // bits 2-3: pixel depth (1=15/16bit, 2=24/32bit, 0=anything else)
r32670r32671
10061022   }
10071023}
10081024
1025READ8_MEMBER(trident_vga_device::vram_r)
1026{
1027   if (tri.linear_active)
1028      return vga.memory[offset % vga.svga_intf.vram_size];
1029   else
1030      return 0xff;
1031}
1032
1033WRITE8_MEMBER(trident_vga_device::vram_w)
1034{
1035   if (tri.linear_active)
1036   {
1037      if(tri.accel_memwrite_active)
1038      {
1039         tri.accel_transfer = (tri.accel_transfer & (~(0x000000ff << (24-(8*(offset % 4)))))) | (data << (24-(8 * (offset % 4))));
1040         if(offset % 4 == 3)
1041            accel_data_write(tri.accel_transfer);
1042         return;
1043      }
1044      vga.memory[offset % vga.svga_intf.vram_size] = data;
1045   }
1046}
1047
10091048READ8_MEMBER(trident_vga_device::mem_r )
10101049{
1050   if((tri.cr20 & 0x10) && (offset >= 0x1ff00)) // correct for old MMIO?
1051   {
1052      return old_mmio_r(space,offset-0x1ff00);
1053   }
1054
10111055   if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en)
10121056   {
10131057      int data;
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10291073
10301074WRITE8_MEMBER(trident_vga_device::mem_w)
10311075{
1076   if((tri.cr20 & 0x10) && (offset >= 0x1ff00)) // correct for old MMIO?
1077   {
1078      old_mmio_w(space,offset-0x1ff00,data);
1079      return;
1080   }
1081
10321082   if(tri.accel_memwrite_active)
10331083   {
10341084      tri.accel_transfer = (tri.accel_transfer & (~(0x000000ff << (24-(8*(offset % 4)))))) | (data << (24-(8 * (offset % 4))));
r32670r32671
10541104   vga_device::mem_w(space,offset,data,mem_mask);
10551105}
10561106
1107// Old style MMIO (maps to 0xbff00)
1108void trident_vga_device::old_mmio_w(address_space& space, UINT32 offset, UINT8 data)
1109{
1110   if(offset >= 0x20)
1111      accel_w(space,offset-0x20,data);
1112}
1113
1114UINT8 trident_vga_device::old_mmio_r(address_space& space, UINT32 offset)
1115{
1116   if(offset == 0x20)
1117   {
1118      if(tri.accel_busy)
1119         return 0x20;
1120   }
1121   if(offset > 0x20)
1122      return accel_r(space,offset-0x20);
1123   else
1124      return 0x00;
1125}
1126
1127
10571128// 2D Acceleration functions (very WIP)
10581129
10591130// From XFree86 source:
r32670r32671
11311202      else
11321203         res = 0x00;
11331204      break;
1205   // Operation mode:
1206   // bit 8: disable clipping if set
11341207   case 0x02:  // Operation Mode
11351208      res = tri.accel_opermode & 0x00ff;
11361209      break;
trunk/src/emu/bus/isa/trident.h
r32670r32671
2424   DECLARE_WRITE8_MEMBER(port_83c6_w);
2525   DECLARE_READ8_MEMBER(port_43c6_r);
2626   DECLARE_WRITE8_MEMBER(port_43c6_w);
27   DECLARE_READ8_MEMBER(vram_r) { if (tri.linear_active) return vga.memory[offset % vga.svga_intf.vram_size]; else return 0xff; }
28   DECLARE_WRITE8_MEMBER(vram_w) { if (tri.linear_active) vga.memory[offset % vga.svga_intf.vram_size] = data; }
27   DECLARE_READ8_MEMBER(vram_r);
28   DECLARE_WRITE8_MEMBER(vram_w);
2929   virtual READ8_MEMBER(mem_r);
3030   virtual WRITE8_MEMBER(mem_w);
3131   virtual UINT16 offset();
r32670r32671
5252      UINT8 gc2f;
5353      UINT8 cr1e;
5454      UINT8 cr1f;
55      UINT8 cr20;
5556      UINT8 cr21;
5657      UINT8 cr29;
58      UINT8 cr2a;
5759      UINT8 cr39;
5860      UINT8 dac;
5961      UINT8 lutdac_reg[0x100];
r32670r32671
120122
121123   int calculate_clock();
122124
125   // old style MMIO (0xBFF00)
126   void old_mmio_w(address_space& space, UINT32 offset, UINT8 data);
127   UINT8 old_mmio_r(address_space& space, UINT32 offset);
128
129   // 2D acceleration
123130   void accel_command();
124131   void accel_bitblt();
125132   void accel_line();
trunk/src/emu/bus/isa/svga_trident.c
r32670r32671
8181   m_isa->install_device(0x3b0, 0x3bf, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03b0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03b0_w),m_vga));
8282   m_isa->install_device(0x3c0, 0x3cf, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03c0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03c0_w),m_vga));
8383   m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03d0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03d0_w),m_vga));
84   m_isa->install_device(0x43c4, 0x43cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_43c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_43c6_w),m_vga));
8485   m_isa->install_device(0x83c4, 0x83cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_83c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_83c6_w),m_vga));
85   m_isa->install_device(0x43c4, 0x43cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_43c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_43c6_w),m_vga));
8686
8787   m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(trident_vga_device::mem_r),m_vga), write8_delegate(FUNC(trident_vga_device::mem_w),m_vga));
8888
r32670r32671
9090//   m_isa->install_memory(0x4400000, 0x45fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
9191
9292   // win95 drivers
93   m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
93//   m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
9494
9595   // acceleration ports
9696   m_isa->install_device(0x2120, 0x21ff, 0, 0, read8_delegate(FUNC(trident_vga_device::accel_r),m_vga), write8_delegate(FUNC(trident_vga_device::accel_w),m_vga));

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