MAME SVN History

199869 Revisions

r32626 Friday 10th October, 2014 at 15:56:23 UTC by hap
some notes from charles

[src/mame/drivers]	segac2.c
[src/mame/machine]	315-5296.c

trunk/src/mame/machine/315-5296.c
r32625	r32626
3	3	Sega 315-5296 I/O chip
4	4
5	5	Sega 100-pin QFP, with 8 bidirectional I/O ports, and 3 output pins.
	6	It also has chip select(/FMCS) and clock(CKOT) for a peripheral device.
6	7	Commonly used from the late 80s up until Sega Model 2.
7	8
	9	The I/O chip has 64 addresses:
	10	$00-0F : I/O ports, security, configuration registers
	11	$10-1F : Unused (no effect when read or written)
	12	$20-3F : Unused (enables /FMCS output, eg. to YM2151 /CS)
	13
	14	On System 16 derivatives, the unused locations return the 68000 prefetch
	15	value off the bus when read.
	16
	17
	18	TODO:
	19	- complete emulation of CNT register
	20
8	21	**********************************************************************/
9	22
10	23	#include "machine/315-5296.h"
r32625	r32626
16	29	// sega_315_5296_device - constructor
17	30	//-------------------------------------------------
18	31
19
20	32	sega_315_5296_device::sega_315_5296_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
21	33	: device_t(mconfig, SEGA_315_5296, "Sega 315-5296", tag, owner, clock, "315-5296", __FILE__),
22	34	m_in_pa_cb(*this),
r32625	r32626
100	112
101	113	READ8_MEMBER( sega_315_5296_device::read )
102	114	{
103		offset &= 0xf;
	115	offset &= 0x3f;
104	116
105	117	switch (offset)
106	118	{
r32625	r32626
109	121	// if the port is configured as an output, return the last thing written
110	122	if (m_dir & 1 << offset)
111	123	return m_output_latch[offset];
112
	124
113	125	// otherwise, return an input port
114	126	return (*m_in_port_cb[offset])(offset);
115	127
r32625	r32626
130	142	// port direction register & mirror
131	143	case 0xd: case 0xf:
132	144	return m_dir;
	145
	146	default:
	147	break;
133	148	}
134	149
135	150	return 0xff;
r32625	r32626
138	153
139	154	WRITE8_MEMBER( sega_315_5296_device::write )
140	155	{
141		offset &= 0xf;
	156	offset &= 0x3f;
142	157
143	158	switch (offset)
144	159	{
r32625	r32626
153	168
154	169	// CNT register
155	170	case 0xe:
156		// d0-2: CNT0-2, other bits: ?
	171	// d0-2: CNT0-2 output pins
	172	// note: When CNT2 is configured as clock output, bit 2 of this register has
	173	// no effect on the output level of CNT2.
157	174	for (int i = 0; i < 3; i++)
158	175	(*m_out_cnt_cb[i])(data >> i & 1);
159	176
	177	// d3: CNT2 output mode (1= Clock output, 0= Programmable output)
	178	// d4,5: CNT2 clock divider (0= CLK/4, 1= CLK/8, 2= CLK/16, 3= CLK/2)
	179	// d6,7: CKOT clock divider (0= CLK/4, 1= CLK/8, 2= CLK/16, 3= CLK/2)
	180	// TODO..
160	181	m_cnt = data;
161	182	break;
162	183

trunk/src/mame/drivers/segac2.c
r32625	r32626
417	417	// D6 : From uPD7759 pin 18. (/BUSY output)
418	418	int busy = (m_upd7759 != NULL) ? (m_upd7759->busy_r() << 6) : 0x40;
419	419	return 0xbf \| busy;
420
421	420	}
422	421
423	422	WRITE8_MEMBER(segac2_state::io_portd_w)
r32625	r32626
1375	1374	MCFG_MACHINE_RESET_OVERRIDE(segac2_state,segac2)
1376	1375	MCFG_NVRAM_ADD_1FILL("nvram") // borencha requires 0xff fill or there is no sound (it lacks some of the init code of the borench set)
1377	1376
1378		MCFG_DEVICE_ADD("io", SEGA_315_5296, 0)
	1377	MCFG_DEVICE_ADD("io", SEGA_315_5296, XL2_CLOCK/6) // clock divider guessed
1379	1378	MCFG_315_5296_IN_PORTA_CB(IOPORT("P1"))
1380	1379	MCFG_315_5296_IN_PORTB_CB(IOPORT("P2"))
1381	1380	MCFG_315_5296_IN_PORTC_CB(READ8(segac2_state, io_portc_r))

199869 Revisions