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r32609 Thursday 9th October, 2014 at 23:39:27 UTC by hap
added 315-5296 device

[src/emu/machine]	7200fifo.c
[src/emu/sound]	upd7759.c upd7759.h
[src/mame]	mame.mak
[src/mame/drivers]	segac2.c
[src/mame/machine]	315-5296.c* 315-5296.h*

trunk/src/emu/machine/7200fifo.c

r32608	r32609
38	38	m_buffer.resize(m_ram_size);
39	39
40	40	// resolve callbacks
41		m_ef_handler.resolve();
42		m_ff_handler.resolve();
43		m_hf_handler.resolve();
	41	m_ef_handler.resolve_safe();
	42	m_ff_handler.resolve_safe();
	43	m_hf_handler.resolve_safe();
44	44
45	45	// state save
46	46	save_item(NAME(m_read_ptr));
r32608	r32609
65	65	m_ff = 0;
66	66	m_hf = 0;
67	67
68		if (!m_ef_handler.isnull()) m_ef_handler(!m_ef);
69		if (!m_ff_handler.isnull()) m_ff_handler(!m_ff);
70		if (!m_hf_handler.isnull()) m_hf_handler(!m_hf);
	68	m_ef_handler(!m_ef);
	69	m_ff_handler(!m_ff);
	70	m_hf_handler(!m_hf);
71	71	}
72	72
73	73
r32608	r32609
87	87	if (m_ef)
88	88	{
89	89	m_ef = 0;
90		if (!m_ef_handler.isnull()) m_ef_handler(!m_ef);
	90	m_ef_handler(!m_ef);
91	91	}
92	92
93	93	else if (m_read_ptr == m_write_ptr)
94	94	{
95	95	m_ff = 1;
96		if (!m_ff_handler.isnull()) m_ff_handler(!m_ff);
	96	m_ff_handler(!m_ff);
97	97	}
98	98
99	99	else if (((m_read_ptr + 1 + m_ram_size / 2) % m_ram_size) == m_write_ptr)
100	100	{
101	101	m_hf = 1;
102		if (!m_hf_handler.isnull()) m_hf_handler(!m_hf);
	102	m_hf_handler(!m_hf);
103	103	}
104	104	}
105	105
r32608	r32609
118	118	if (m_ff)
119	119	{
120	120	m_ff = 0;
121		if (!m_ff_handler.isnull()) m_ff_handler(!m_ff);
	121	m_ff_handler(!m_ff);
122	122	}
123	123
124	124	else if (m_read_ptr == m_write_ptr)
125	125	{
126	126	m_ef = 1;
127		if (!m_ef_handler.isnull()) m_ef_handler(!m_ef);
	127	m_ef_handler(!m_ef);
128	128	}
129	129
130	130	else if (((m_read_ptr + m_ram_size / 2) % m_ram_size) == m_write_ptr)
131	131	{
132	132	m_hf = 0;
133		if (!m_hf_handler.isnull()) m_hf_handler(!m_hf);
	133	m_hf_handler(!m_hf);
134	134	}
135	135
136	136	return ret;

trunk/src/emu/sound/upd7759.c

r32608	r32609
736	736
737	737	*************************************************************/
738	738
739		void upd775x_device::reset_w(UINT8 data)
	739	WRITE_LINE_MEMBER( upd775x_device::reset_w )
740	740	{
741	741	/* update the reset value */
742	742	UINT8 oldreset = m_reset;
743		m_reset = (data != 0);
	743	m_reset = (state != 0);
744	744
745	745	/* update the stream first */
746	746	m_channel->update();
r32608	r32609
750	750	device_reset();
751	751	}
752	752
753		void upd7759_device::start_w(UINT8 data)
	753	WRITE_LINE_MEMBER( upd7759_device::start_w )
754	754	{
755	755	/* update the start value */
756	756	UINT8 oldstart = m_start;
757		m_start = (data != 0);
	757	m_start = (state != 0);
758	758
759	759	logerror("upd7759_start_w: %d->%d\n", oldstart, m_start);
760	760
r32608	r32609
772	772	}
773	773	}
774	774
775		void upd7756_device::start_w(UINT8 data)
	775	WRITE_LINE_MEMBER( upd7756_device::start_w )
776	776	{
777	777	/* update the start value */
778	778	UINT8 oldstart = m_start;
779		m_start = (data != 0);
	779	m_start = (state != 0);
780	780
781	781	logerror("upd7759_start_w: %d->%d\n", oldstart, m_start);
782	782
r32608	r32609
798	798	}
799	799
800	800
801		int upd775x_device::busy_r()
	801	READ_LINE_MEMBER( upd775x_device::busy_r )
802	802	{
803	803	/* return /BUSY */
804	804	return (m_state == STATE_IDLE);

trunk/src/emu/sound/upd7759.h

r32608	r32609
25	25
26	26	void set_bank_base(offs_t base);
27	27
28		void reset_w(UINT8 data);
29		int busy_r();
	28	DECLARE_WRITE_LINE_MEMBER( reset_w );
	29	DECLARE_READ_LINE_MEMBER( busy_r );
30	30	DECLARE_WRITE8_MEMBER( port_w );
31	31	void postload();
32	32
r32608	r32609
93	93	upd7759_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
94	94
95	95	enum
96		{
97		TIMER_SLAVE_UPDATE
98		};
	96	{
	97	TIMER_SLAVE_UPDATE
	98	};
99	99
100	100	virtual void device_start();
101	101	virtual void device_reset();
r32608	r32609
104	104
105	105	emu_timer *m_timer;                       /* timer */
106	106
107		void start_w(UINT8 data);
	107	DECLARE_WRITE_LINE_MEMBER( start_w );
108	108	};
109	109
110	110	class upd7756_device : public upd775x_device
r32608	r32609
116	116	virtual void device_reset();
117	117	virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
118	118
119		void start_w(UINT8 data);
	119	DECLARE_WRITE_LINE_MEMBER( start_w );
120	120	};
121	121
122	122	extern const device_type UPD7759;

trunk/src/mame/machine/315-5296.c

r0	r32609
	1	/**********************************************************************
	2
	3	Sega 315-5296 I/O chip
	4
	5	Sega 100-pin QFP, with 8 bidirectional I/O ports, and 3 output pins.
	6	Commonly used from the late 80s up until Sega Model 2.
	7
	8	**********************************************************************/
	9
	10	#include "machine/315-5296.h"
	11
	12
	13	const device_type SEGA_315_5296 = &device_creator<sega_315_5296_device>;
	14
	15	//-------------------------------------------------
	16	//  sega_315_5296_device - constructor
	17	//-------------------------------------------------
	18
	19
	20	sega_315_5296_device::sega_315_5296_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	21	: device_t(mconfig, SEGA_315_5296, "Sega 315-5296", tag, owner, clock, "315-5296", __FILE__),
	22	m_in_pa_cb(*this),
	23	m_in_pb_cb(*this),
	24	m_in_pc_cb(*this),
	25	m_in_pd_cb(*this),
	26	m_in_pe_cb(*this),
	27	m_in_pf_cb(*this),
	28	m_in_pg_cb(*this),
	29	m_in_ph_cb(*this),
	30	m_out_pa_cb(*this),
	31	m_out_pb_cb(*this),
	32	m_out_pc_cb(*this),
	33	m_out_pd_cb(*this),
	34	m_out_pe_cb(*this),
	35	m_out_pf_cb(*this),
	36	m_out_pg_cb(*this),
	37	m_out_ph_cb(*this),
	38	m_out_cnt0_cb(*this),
	39	m_out_cnt1_cb(*this),
	40	m_out_cnt2_cb(*this)
	41	{
	42	}
	43
	44	//-------------------------------------------------
	45	//  device_start - device-specific startup
	46	//-------------------------------------------------
	47
	48	void sega_315_5296_device::device_start()
	49	{
	50	// resolve callbacks
	51	m_in_pa_cb.resolve_safe(0xff); m_in_port_cb[0] = &m_in_pa_cb;
	52	m_in_pb_cb.resolve_safe(0xff); m_in_port_cb[1] = &m_in_pb_cb;
	53	m_in_pc_cb.resolve_safe(0xff); m_in_port_cb[2] = &m_in_pc_cb;
	54	m_in_pd_cb.resolve_safe(0xff); m_in_port_cb[3] = &m_in_pd_cb;
	55	m_in_pe_cb.resolve_safe(0xff); m_in_port_cb[4] = &m_in_pe_cb;
	56	m_in_pf_cb.resolve_safe(0xff); m_in_port_cb[5] = &m_in_pf_cb;
	57	m_in_pg_cb.resolve_safe(0xff); m_in_port_cb[6] = &m_in_pg_cb;
	58	m_in_ph_cb.resolve_safe(0xff); m_in_port_cb[7] = &m_in_ph_cb;
	59
	60	m_out_pa_cb.resolve_safe(); m_out_port_cb[0] = &m_out_pa_cb;
	61	m_out_pb_cb.resolve_safe(); m_out_port_cb[1] = &m_out_pb_cb;
	62	m_out_pc_cb.resolve_safe(); m_out_port_cb[2] = &m_out_pc_cb;
	63	m_out_pd_cb.resolve_safe(); m_out_port_cb[3] = &m_out_pd_cb;
	64	m_out_pe_cb.resolve_safe(); m_out_port_cb[4] = &m_out_pe_cb;
	65	m_out_pf_cb.resolve_safe(); m_out_port_cb[5] = &m_out_pf_cb;
	66	m_out_pg_cb.resolve_safe(); m_out_port_cb[6] = &m_out_pg_cb;
	67	m_out_ph_cb.resolve_safe(); m_out_port_cb[7] = &m_out_ph_cb;
	68
	69	m_out_cnt0_cb.resolve_safe(); m_out_cnt_cb[0] = &m_out_cnt0_cb;
	70	m_out_cnt1_cb.resolve_safe(); m_out_cnt_cb[1] = &m_out_cnt1_cb;
	71	m_out_cnt2_cb.resolve_safe(); m_out_cnt_cb[2] = &m_out_cnt2_cb;
	72
	73	// register for savestates
	74	save_item(NAME(m_output_latch));
	75	save_item(NAME(m_cnt));
	76	save_item(NAME(m_dir));
	77	}
	78
	79	//-------------------------------------------------
	80	//  device_reset - device-specific reset
	81	//-------------------------------------------------
	82
	83	void sega_315_5296_device::device_reset()
	84	{
	85	// all ports are set to input
	86	m_dir = 0;
	87
	88	// clear output ports
	89	memset(m_output_latch, 0, sizeof(m_output_latch));
	90	m_cnt = 0;
	91
	92	for (int i = 0; i < 8; i++)
	93	(*m_out_port_cb[i])((offs_t)i, 0);
	94	for (int i = 0; i < 3; i++)
	95	(*m_out_cnt_cb[i])(0);
	96	}
	97
	98
	99	//-------------------------------------------------
	100
	101	READ8_MEMBER( sega_315_5296_device::read )
	102	{
	103	offset &= 0xf;
	104
	105	switch (offset)
	106	{
	107	// port A to H
	108	case 0x0: case 0x1: case 0x2: case 0x3: case 0x4: case 0x5: case 0x6: case 0x7:
	109	// if the port is configured as an output, return the last thing written
	110	if (m_dir & 1 << offset)
	111	return m_output_latch[offset];
	112
	113	// otherwise, return an input port
	114	return (*m_in_port_cb[offset])(offset);
	115
	116	// 'SEGA' protection
	117	case 0x8:
	118	return 'S';
	119	case 0x9:
	120	return 'E';
	121	case 0xa:
	122	return 'G';
	123	case 0xb:
	124	return 'A';
	125
	126	// CNT register & mirror
	127	case 0xc: case 0xe:
	128	return m_cnt;
	129
	130	// port direction register & mirror
	131	case 0xd: case 0xf:
	132	return m_dir;
	133	}
	134
	135	return 0xff;
	136	}
	137
	138
	139	WRITE8_MEMBER( sega_315_5296_device::write )
	140	{
	141	offset &= 0xf;
	142
	143	switch (offset)
	144	{
	145	// port A to H
	146	case 0x0: case 0x1: case 0x2: case 0x3: case 0x4: case 0x5: case 0x6: case 0x7:
	147	// if the port is configured as an output, write it
	148	if (m_dir & 1 << offset)
	149	(*m_out_port_cb[offset])(offset, data);
	150
	151	m_output_latch[offset] = data;
	152	break;
	153
	154	// CNT register
	155	case 0xe:
	156	// d0-2: CNT0-2, other bits: ?
	157	for (int i = 0; i < 3; i++)
	158	(*m_out_cnt_cb[i])(data >> i & 1);
	159
	160	m_cnt = data;
	161	break;
	162
	163	// port direction register
	164	case 0xf:
	165	// refresh output ports if the direction changed
	166	for (int i = 0; i < 8; i++)
	167	{
	168	if ((m_dir ^ data) & (1 << i))
	169	(*m_out_port_cb[i])((offs_t)i, (data & 1 << i) ? m_output_latch[i] : 0);
	170	}
	171
	172	m_dir = data;
	173	break;
	174
	175	default:
	176	break;
	177	}
	178	}

Property changes on: trunk/src/mame/machine/315-5296.c

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/mame/machine/315-5296.h

r0	r32609
	1	/**********************************************************************
	2
	3	Sega 315-5296 I/O chip
	4
	5	Copyright MAME Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#pragma once
	11
	12	#ifndef _SEGA_315_5296_H
	13	#define _SEGA_315_5296_H
	14
	15	#include "emu.h"
	16
	17
	18	//**************************************************************************
	19	//  INTERFACE CONFIGURATION MACROS
	20	//**************************************************************************
	21
	22	// A to H 8-bit input ports
	23	#define MCFG_315_5296_IN_PORTA_CB(_devcb) \
	24	devcb = &sega_315_5296_device::set_in_pa_callback(*device, DEVCB_##_devcb);
	25	#define MCFG_315_5296_IN_PORTB_CB(_devcb) \
	26	devcb = &sega_315_5296_device::set_in_pb_callback(*device, DEVCB_##_devcb);
	27	#define MCFG_315_5296_IN_PORTC_CB(_devcb) \
	28	devcb = &sega_315_5296_device::set_in_pc_callback(*device, DEVCB_##_devcb);
	29	#define MCFG_315_5296_IN_PORTD_CB(_devcb) \
	30	devcb = &sega_315_5296_device::set_in_pd_callback(*device, DEVCB_##_devcb);
	31	#define MCFG_315_5296_IN_PORTE_CB(_devcb) \
	32	devcb = &sega_315_5296_device::set_in_pe_callback(*device, DEVCB_##_devcb);
	33	#define MCFG_315_5296_IN_PORTF_CB(_devcb) \
	34	devcb = &sega_315_5296_device::set_in_pf_callback(*device, DEVCB_##_devcb);
	35	#define MCFG_315_5296_IN_PORTG_CB(_devcb) \
	36	devcb = &sega_315_5296_device::set_in_pg_callback(*device, DEVCB_##_devcb);
	37	#define MCFG_315_5296_IN_PORTH_CB(_devcb) \
	38	devcb = &sega_315_5296_device::set_in_ph_callback(*device, DEVCB_##_devcb);
	39
	40	// A to H 8-bit output ports
	41	#define MCFG_315_5296_OUT_PORTA_CB(_devcb) \
	42	devcb = &sega_315_5296_device::set_out_pa_callback(*device, DEVCB_##_devcb);
	43	#define MCFG_315_5296_OUT_PORTB_CB(_devcb) \
	44	devcb = &sega_315_5296_device::set_out_pb_callback(*device, DEVCB_##_devcb);
	45	#define MCFG_315_5296_OUT_PORTC_CB(_devcb) \
	46	devcb = &sega_315_5296_device::set_out_pc_callback(*device, DEVCB_##_devcb);
	47	#define MCFG_315_5296_OUT_PORTD_CB(_devcb) \
	48	devcb = &sega_315_5296_device::set_out_pd_callback(*device, DEVCB_##_devcb);
	49	#define MCFG_315_5296_OUT_PORTE_CB(_devcb) \
	50	devcb = &sega_315_5296_device::set_out_pe_callback(*device, DEVCB_##_devcb);
	51	#define MCFG_315_5296_OUT_PORTF_CB(_devcb) \
	52	devcb = &sega_315_5296_device::set_out_pf_callback(*device, DEVCB_##_devcb);
	53	#define MCFG_315_5296_OUT_PORTG_CB(_devcb) \
	54	devcb = &sega_315_5296_device::set_out_pg_callback(*device, DEVCB_##_devcb);
	55	#define MCFG_315_5296_OUT_PORTH_CB(_devcb) \
	56	devcb = &sega_315_5296_device::set_out_ph_callback(*device, DEVCB_##_devcb);
	57
	58	// CNT output pins
	59	#define MCFG_315_5296_OUT_CNT0_CB(_devcb) \
	60	devcb = &sega_315_5296_device::set_out_cnt0_callback(*device, DEVCB_##_devcb);
	61	#define MCFG_315_5296_OUT_CNT1_CB(_devcb) \
	62	devcb = &sega_315_5296_device::set_out_cnt1_callback(*device, DEVCB_##_devcb);
	63	#define MCFG_315_5296_OUT_CNT2_CB(_devcb) \
	64	devcb = &sega_315_5296_device::set_out_cnt2_callback(*device, DEVCB_##_devcb);
	65
	66
	67	//**************************************************************************
	68	//  TYPE DEFINITIONS
	69	//**************************************************************************
	70
	71	// ======================> sega_315_5296_device
	72
	73	class sega_315_5296_device : public device_t
	74	{
	75	public:
	76	sega_315_5296_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	77
	78	// static configuration helpers
	79	template<class _Object> static devcb_base &set_in_pa_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pa_cb.set_callback(object); }
	80	template<class _Object> static devcb_base &set_in_pb_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pb_cb.set_callback(object); }
	81	template<class _Object> static devcb_base &set_in_pc_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pc_cb.set_callback(object); }
	82	template<class _Object> static devcb_base &set_in_pd_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pd_cb.set_callback(object); }
	83	template<class _Object> static devcb_base &set_in_pe_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pe_cb.set_callback(object); }
	84	template<class _Object> static devcb_base &set_in_pf_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pf_cb.set_callback(object); }
	85	template<class _Object> static devcb_base &set_in_pg_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_pg_cb.set_callback(object); }
	86	template<class _Object> static devcb_base &set_in_ph_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_in_ph_cb.set_callback(object); }
	87
	88	template<class _Object> static devcb_base &set_out_pa_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pa_cb.set_callback(object); }
	89	template<class _Object> static devcb_base &set_out_pb_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pb_cb.set_callback(object); }
	90	template<class _Object> static devcb_base &set_out_pc_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pc_cb.set_callback(object); }
	91	template<class _Object> static devcb_base &set_out_pd_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pd_cb.set_callback(object); }
	92	template<class _Object> static devcb_base &set_out_pe_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pe_cb.set_callback(object); }
	93	template<class _Object> static devcb_base &set_out_pf_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pf_cb.set_callback(object); }
	94	template<class _Object> static devcb_base &set_out_pg_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_pg_cb.set_callback(object); }
	95	template<class _Object> static devcb_base &set_out_ph_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_ph_cb.set_callback(object); }
	96
	97	template<class _Object> static devcb_base &set_out_cnt0_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_cnt0_cb.set_callback(object); }
	98	template<class _Object> static devcb_base &set_out_cnt1_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_cnt1_cb.set_callback(object); }
	99	template<class _Object> static devcb_base &set_out_cnt2_callback(device_t &device, _Object object) { return downcast<sega_315_5296_device &>(device).m_out_cnt2_cb.set_callback(object); }
	100
	101	DECLARE_READ8_MEMBER( read );
	102	DECLARE_WRITE8_MEMBER( write );
	103
	104	protected:
	105	// device-level overrides
	106	virtual void device_start();
	107	virtual void device_reset();
	108
	109	private:
	110	devcb_read8 m_in_pa_cb;
	111	devcb_read8 m_in_pb_cb;
	112	devcb_read8 m_in_pc_cb;
	113	devcb_read8 m_in_pd_cb;
	114	devcb_read8 m_in_pe_cb;
	115	devcb_read8 m_in_pf_cb;
	116	devcb_read8 m_in_pg_cb;
	117	devcb_read8 m_in_ph_cb;
	118
	119	devcb_write8 m_out_pa_cb;
	120	devcb_write8 m_out_pb_cb;
	121	devcb_write8 m_out_pc_cb;
	122	devcb_write8 m_out_pd_cb;
	123	devcb_write8 m_out_pe_cb;
	124	devcb_write8 m_out_pf_cb;
	125	devcb_write8 m_out_pg_cb;
	126	devcb_write8 m_out_ph_cb;
	127
	128	devcb_write_line m_out_cnt0_cb;
	129	devcb_write_line m_out_cnt1_cb;
	130	devcb_write_line m_out_cnt2_cb;
	131
	132	devcb_read8 *m_in_port_cb[8];
	133	devcb_write8 *m_out_port_cb[8];
	134	devcb_write_line *m_out_cnt_cb[3];
	135
	136	UINT8 m_output_latch[8];
	137	UINT8 m_cnt;
	138	UINT8 m_dir;
	139	};
	140
	141	// device type definition
	142	extern const device_type SEGA_315_5296;
	143
	144
	145	#endif /* _SEGA_315_5296_H */

Property changes on: trunk/src/mame/machine/315-5296.h

Added: svn:mime-type    + text/plain Added: svn:eol-style    + native

trunk/src/mame/mame.mak

r32608	r32609
1727	1727	$(DRIVERS)/turbo.o $(AUDIO)/turbo.o $(VIDEO)/turbo.o \
1728	1728	$(DRIVERS)/vicdual.o $(AUDIO)/vicdual.o $(VIDEO)/vicdual.o $(AUDIO)/carnival.o $(AUDIO)/depthch.o $(AUDIO)/invinco.o $(AUDIO)/pulsar.o \
1729	1729	$(DRIVERS)/zaxxon.o $(AUDIO)/zaxxon.o $(VIDEO)/zaxxon.o \
	1730	$(MACHINE)/315-5296.o \
1730	1731	$(MACHINE)/fd1089.o \
1731	1732	$(MACHINE)/fd1094.o \
1732	1733	$(MACHINE)/fddebug.o \

trunk/src/mame/drivers/segac2.c

r32608	r32609
70	70	#include "emu.h"
71	71	#include "cpu/m68000/m68000.h"
72	72	#include "machine/nvram.h"
	73	#include "machine/315-5296.h"
73	74	#include "sound/okim6295.h"
74	75	#include "sound/sn76496.h"
75	76	#include "sound/2612intf.h"
r32608	r32609
162	163	DECLARE_WRITE_LINE_MEMBER(vdp_lv6irqline_callback_c2);
163	164	DECLARE_WRITE_LINE_MEMBER(vdp_lv4irqline_callback_c2);
164	165
	166	DECLARE_READ8_MEMBER(io_portc_r);
	167	DECLARE_WRITE8_MEMBER(io_portd_w);
	168	DECLARE_WRITE8_MEMBER(io_porth_w);
	169
165	170	DECLARE_WRITE16_MEMBER( segac2_upd7759_w );
166	171	DECLARE_READ16_MEMBER( palette_r );
167	172	DECLARE_WRITE16_MEMBER( palette_w );
168		DECLARE_READ16_MEMBER( io_chip_r );
169		DECLARE_WRITE16_MEMBER( io_chip_w );
170	173	DECLARE_WRITE16_MEMBER( control_w );
171	174	DECLARE_READ16_MEMBER( prot_r );
172	175	DECLARE_WRITE16_MEMBER( prot_w );
r32608	r32609
201	204	int prot_func_pclubjv2(int in);
202	205	int prot_func_pclubjv4(int in);
203	206	int prot_func_pclubjv5(int in);
204
205	207	};
206	208
207	209
r32608	r32609
255	257	m_sp_palbase = 0;
256	258
257	259	recompute_palette_tables();
258
259	260	}
260	261
261	262
r32608	r32609
273	274	******************************************************************************/
274	275
275	276	/* handle writes to the UPD7759 */
276		WRITE16_MEMBER(segac2_state::segac2_upd7759_w )
	277	WRITE16_MEMBER(segac2_state::segac2_upd7759_w)
277	278	{
278	279	/* make sure we have a UPD chip */
279		if (!m_sound_banks)
	280	if (m_upd7759 == NULL)
280	281	return;
281	282
282	283	/* only works if we're accessing the low byte */
r32608	r32609
307	308	******************************************************************************/
308	309
309	310	/* handle reads from the paletteram */
310		READ16_MEMBER(segac2_state::palette_r )
	311	READ16_MEMBER(segac2_state::palette_r)
311	312	{
312	313	offset &= 0x1ff;
313	314	if (m_segac2_alt_palette_mode)
r32608	r32609
317	318	}
318	319
319	320	/* handle writes to the paletteram */
320		WRITE16_MEMBER(segac2_state::palette_w )
	321	WRITE16_MEMBER(segac2_state::palette_w)
321	322	{
322	323	int r, g, b, newword;
323	324	int tmpr, tmpg, tmpb;
r32608	r32609
403	404	m_segac2_sp_pal_lookup[i] = 0x200 * m_palbank + ((~sppal << 2) & 0x100) + ((sppal << 2) & 0x80) + ((~sppal >> 2) & 0x40) + ((sppal >> 2) & 0x20) + (sppal & 0x10);
404	405	}
405	406	}
406
407	407	}
408	408
409	409
410	410	/******************************************************************************
411		I/O Read & Write Handlers
412		*******************************************************************************
413
414		Controls, and Poto Poto reads 'S' 'E' 'G' and 'A' (SEGA) from this area
415		as a form of protection.
416
417		Lots of unknown writes however offset 0E certainly seems to be banking,
418		both colours and sound sample banks.
419
	411	Sega 315-5296 I/O chip
420	412	******************************************************************************/
421	413
422		READ16_MEMBER(segac2_state::io_chip_r )
	414	READ8_MEMBER(segac2_state::io_portc_r)
423	415	{
424		static const char *const portnames[] = { "P1", "P2", "PORTC", "PORTD", "SERVICE", "COINAGE", "DSW", "PORTH" };
425		offset &= 0x1f/2;
426
427		switch (offset)
428		{
429		/* I/O ports */
430		case 0x00/2:
431		case 0x02/2:
432		case 0x04/2:
433		case 0x06/2:
434		case 0x08/2:
435		case 0x0a/2:
436		case 0x0c/2:
437		case 0x0e/2:
438		/* if the port is configured as an output, return the last thing written */
439		if (m_misc_io_data[0x1e/2] & (1 << offset))
440		return m_misc_io_data[offset];
441
442		/* otherwise, return an input port */
443		if (offset == 0x04/2 && m_sound_banks)
444		return (ioport(portnames[offset])->read() & 0xbf) | (m_upd7759->busy_r() << 6);
445		return ioport(portnames[offset])->read();
446
447		/* 'SEGA' protection */
448		case 0x10/2:
449		return 'S';
450		case 0x12/2:
451		return 'E';
452		case 0x14/2:
453		return 'G';
454		case 0x16/2:
455		return 'A';
456
457		/* CNT register & mirror */
458		case 0x18/2:
459		case 0x1c/2:
460		return m_misc_io_data[0x1c/2];
461
462		/* port direction register & mirror */
463		case 0x1a/2:
464		case 0x1e/2:
465		return m_misc_io_data[0x1e/2];
466		}
467		return 0xffff;
	416	// D7 : From MB3773P pin 1. (/RESET output)
	417	// D6 : From uPD7759 pin 18. (/BUSY output)
	418	int busy = (m_upd7759 != NULL) ? (m_upd7759->busy_r() << 6) : 0x40;
	419	return 0xbf | busy;
	420
468	421	}
469	422
470
471		WRITE16_MEMBER(segac2_state::io_chip_w )
	423	WRITE8_MEMBER(segac2_state::io_portd_w)
472	424	{
473		UINT8 newbank;
474		//  UINT8 old;
	425	/*
	426	D7 : To pin 3 of JP15. (Watchdog clock control)
	427	D6 : To MUTE input pin on TDA1518BQ amplifier.
	428	D5 : To CN2 pin 10. (Unknown purpose)
	429	D4 : To CN2 pin 11. (Unknown purpose)
	430	D3 : To CN1 pin K. (Coin lockout 2)
	431	D2 : To CN1 pin 9. (Coin lockout 1)
	432	D1 : To CN1 pin J. (Coin meter 2)
	433	D0 : To CN1 pin 8. (Coin meter 1)
	434	*/
	435	//coin_lockout_w(space.machine(), 1, data & 0x08);
	436	//coin_lockout_w(space.machine(), 0, data & 0x04);
	437	coin_counter_w(space.machine(), 1, data & 0x02);
	438	coin_counter_w(space.machine(), 0, data & 0x01);
	439	}
475	440
476		/* generic implementation */
477		offset &= 0x1f/2;
478		//  old = m_misc_io_data[offset];
479		m_misc_io_data[offset] = data;
480
481		switch (offset)
	441	WRITE8_MEMBER(segac2_state::io_porth_w)
	442	{
	443	/*
	444	D7 : To pin A19 of CN4
	445	D6 : To pin B19 of CN4
	446	D5 : ?
	447	D4 : ?
	448	D3 : To pin 31 of uPD7759 sample ROM (A18 on a 27C040)
	449	D2 : To pin 30 of uPD7759 sample ROM (A17 on a 27C040)
	450	D1 : To A10 of color RAM
	451	D0 : To A9 of color RAM
	452	*/
	453	int newbank = data & 3;
	454	if (newbank != m_palbank)
482	455	{
483		/* I/O ports */
484		case 0x00/2:
485		case 0x02/2:
486		case 0x04/2:
487		case 0x08/2:
488		case 0x0a/2:
489		case 0x0c/2:
490		break;
491
492		/* miscellaneous output */
493		case 0x06/2:
494		/*
495		D7 : To pin 3 of JP15. (Watchdog clock control)
496		D6 : To MUTE input pin on TDA1518BQ amplifier.
497		D5 : To CN2 pin 10. (Unknown purpose)
498		D4 : To CN2 pin 11. (Unknown purpose)
499		D3 : To CN1 pin K. (Coin lockout 2)
500		D2 : To CN1 pin 9. (Coin lockout 1)
501		D1 : To CN1 pin J. (Coin meter 2)
502		D0 : To CN1 pin 8. (Coin meter 1)
503		*/
504		/*          coin_lockout_w(space.machine(), 1, data & 0x08);
505		coin_lockout_w(space.machine(), 0, data & 0x04); */
506		coin_counter_w(space.machine(), 1, data & 0x02);
507		coin_counter_w(space.machine(), 0, data & 0x01);
508		break;
509
510		/* banking */
511		case 0x0e/2:
512		/*
513		D7 : To pin A19 of CN4
514		D6 : To pin B19 of CN4
515		D5 : ?
516		D4 : ?
517		D3 : To pin 31 of uPD7759 sample ROM (A18 on a 27C040)
518		D2 : To pin 30 of uPD7759 sample ROM (A17 on a 27C040)
519		D1 : To A10 of color RAM
520		D0 : To A9 of color RAM
521		*/
522		newbank = data & 3;
523		if (newbank != m_palbank)
524		{
525		//m_screen->update_partial(m_screen->vpos() + 1);
526		m_palbank = newbank;
527		recompute_palette_tables();
528		}
529		if (m_sound_banks > 1)
530		{
531		newbank = (data >> 2) & (m_sound_banks - 1);
532		m_upd7759->set_bank_base(newbank * 0x20000);
533		}
534		break;
535
536		/* CNT register */
537		case 0x1c/2:
538		if (m_sound_banks > 1)
539		{
540		m_upd7759->reset_w((data >> 1) & 1);
541		}
542		break;
	456	//m_screen->update_partial(m_screen->vpos() + 1);
	457	m_palbank = newbank;
	458	recompute_palette_tables();
543	459	}
	460	if (m_sound_banks > 1)
	461	{
	462	newbank = (data >> 2) & (m_sound_banks - 1);
	463	m_upd7759->set_bank_base(newbank * 0x20000);
	464	}
544	465	}
545	466
546	467
r32608	r32609
713	634	AM_RANGE(0x000000, 0x1fffff) AM_ROM
714	635	AM_RANGE(0x800000, 0x800001) AM_MIRROR(0x13fdfe) AM_READWRITE(prot_r, prot_w)
715	636	AM_RANGE(0x800200, 0x800201) AM_MIRROR(0x13fdfe) AM_WRITE(control_w)
716		AM_RANGE(0x840000, 0x84001f) AM_MIRROR(0x13fee0) AM_READWRITE(io_chip_r, io_chip_w)
	637	AM_RANGE(0x840000, 0x84001f) AM_MIRROR(0x13fee0) AM_DEVREADWRITE8("io", sega_315_5296_device, read, write, 0x00ff)
717	638	AM_RANGE(0x840100, 0x840107) AM_MIRROR(0x13fef8) AM_DEVREADWRITE8("ymsnd", ym3438_device, read, write, 0x00ff)
718	639	AM_RANGE(0x880100, 0x880101) AM_MIRROR(0x13fefe) AM_WRITE(counter_timer_w)
719	640	AM_RANGE(0x8c0000, 0x8c0fff) AM_MIRROR(0x13f000) AM_READWRITE(palette_r, palette_w) AM_SHARE("paletteram")
r32608	r32609
758	679	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
759	680	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
760	681
761		PORT_START("PORTC")
762		PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED )
763		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL )    /* From uPD7759 pin 18. (/BUSY output) */
764		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL )    /* From MB3773P pin 1. (/RESET output) */
765
766		PORT_START("PORTD")
767		PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
768
769	682	PORT_START("SERVICE")
770	683	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
771	684	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
r32608	r32609
788	701	PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW2:6" )
789	702	PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW2:7" )
790	703	PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW2:8" )
791
792		PORT_START("PORTH")
793		PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
794	704	INPUT_PORTS_END
795	705
796	706
r32608	r32609
1465	1375	MCFG_MACHINE_RESET_OVERRIDE(segac2_state,segac2)
1466	1376	MCFG_NVRAM_ADD_1FILL("nvram") // borencha requires 0xff fill or there is no sound (it lacks some of the init code of the borench set)
1467	1377
	1378	MCFG_DEVICE_ADD("io", SEGA_315_5296, 0)
	1379	MCFG_315_5296_IN_PORTA_CB(IOPORT("P1"))
	1380	MCFG_315_5296_IN_PORTB_CB(IOPORT("P2"))
	1381	MCFG_315_5296_IN_PORTC_CB(READ8(segac2_state, io_portc_r))
	1382	MCFG_315_5296_OUT_PORTD_CB(WRITE8(segac2_state, io_portd_w))
	1383	MCFG_315_5296_IN_PORTE_CB(IOPORT("SERVICE"))
	1384	MCFG_315_5296_IN_PORTF_CB(IOPORT("COINAGE"))
	1385	MCFG_315_5296_IN_PORTG_CB(IOPORT("DSW"))
	1386	MCFG_315_5296_OUT_PORTH_CB(WRITE8(segac2_state, io_porth_w))
	1387
	1388	/* video hardware */
1468	1389	MCFG_DEVICE_ADD("gen_vdp", SEGA315_5313, 0)
1469	1390	MCFG_SEGA315_5313_IS_PAL(false)
1470	1391	MCFG_SEGA315_5313_SND_IRQ_CALLBACK(WRITELINE(segac2_state, vdp_sndirqline_callback_c2));
r32608	r32609
1475	1396
1476	1397	MCFG_TIMER_DEVICE_ADD_SCANLINE("scantimer", "gen_vdp", sega315_5313_device, megadriv_scanline_timer_callback_alt_timing, "megadriv", 0, 1)
1477	1398
1478
1479	1399	MCFG_SCREEN_ADD("megadriv", RASTER)
1480	1400	MCFG_SCREEN_REFRESH_RATE(60)
1481	1401	MCFG_SCREEN_SIZE(512, 262)
r32608	r32609
1503	1423	static MACHINE_CONFIG_DERIVED( segac2, segac )
1504	1424
1505	1425	/* basic machine hardware */
	1426	MCFG_DEVICE_MODIFY("io")
	1427	MCFG_315_5296_OUT_CNT1_CB(DEVWRITELINE("upd", upd7759_device, reset_w))
1506	1428
1507	1429	/* sound hardware */
1508	1430	MCFG_SOUND_ADD("upd", UPD7759, XL1_CLOCK)

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