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r32542 Saturday 4th October, 2014 at 22:40:03 UTC by hap
small update from FSanches
[src/mess/drivers]tecnbras.c

trunk/src/mess/drivers/tecnbras.c
r32541r32542
5050   AM_RANGE(0x8000, 0xFFFF) AM_RAM
5151ADDRESS_MAP_END
5252
53#define DMD_OFFSET 24 //This is a guess. We should verify the real hardware behaviour
5354static ADDRESS_MAP_START(i80c31_io, AS_IO, 8, tecnbras_state)
54   AM_RANGE(0x0100, 0x0145) AM_WRITE(set_x_position_w)
55   AM_RANGE(0x0100+DMD_OFFSET, 0x0145+DMD_OFFSET) AM_WRITE(set_x_position_w)
5556   AM_RANGE(0x06B8, 0x06BC) AM_WRITE(print_column_w)
5657   AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_NOP /*buzzer ?*/
5758ADDRESS_MAP_END
r32541r32542
7576{
7677   int x = m_xcoord + offset;
7778   for (int i=0; i<7; i++){
78      assert((x/5) < ARRAY_LENGTH(m_digit));
79      m_digit[x/5][i] &= ~(1 << (x%5));
80      m_digit[x/5][i] |= BIT(data, 7-i) ? (1 << (x%5)) : 0;
81      output_set_indexed_value("dmd_", (x/5)*7 + i, 0x1F & m_digit[x/5][i]);
79      if((x/5) < ARRAY_LENGTH(m_digit)){
80         m_digit[x/5][i] &= ~(1 << (x%5));
81         m_digit[x/5][i] |= BIT(data, 7-i) ? (1 << (x%5)) : 0;
82         output_set_indexed_value("dmd_", (x/5)*7 + i, 0x1F & m_digit[x/5][i]);
83      }
8284   }
8385}
8486

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