trunk/src/mess/drivers/tecnbras.c
| r32541 | r32542 | |
| 50 | 50 | AM_RANGE(0x8000, 0xFFFF) AM_RAM |
| 51 | 51 | ADDRESS_MAP_END |
| 52 | 52 | |
| 53 | #define DMD_OFFSET 24 //This is a guess. We should verify the real hardware behaviour |
| 53 | 54 | static ADDRESS_MAP_START(i80c31_io, AS_IO, 8, tecnbras_state) |
| 54 | | AM_RANGE(0x0100, 0x0145) AM_WRITE(set_x_position_w) |
| 55 | AM_RANGE(0x0100+DMD_OFFSET, 0x0145+DMD_OFFSET) AM_WRITE(set_x_position_w) |
| 55 | 56 | AM_RANGE(0x06B8, 0x06BC) AM_WRITE(print_column_w) |
| 56 | 57 | AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_NOP /*buzzer ?*/ |
| 57 | 58 | ADDRESS_MAP_END |
| r32541 | r32542 | |
| 75 | 76 | { |
| 76 | 77 | int x = m_xcoord + offset; |
| 77 | 78 | for (int i=0; i<7; i++){ |
| 78 | | assert((x/5) < ARRAY_LENGTH(m_digit)); |
| 79 | | m_digit[x/5][i] &= ~(1 << (x%5)); |
| 80 | | m_digit[x/5][i] |= BIT(data, 7-i) ? (1 << (x%5)) : 0; |
| 81 | | output_set_indexed_value("dmd_", (x/5)*7 + i, 0x1F & m_digit[x/5][i]); |
| 79 | if((x/5) < ARRAY_LENGTH(m_digit)){ |
| 80 | m_digit[x/5][i] &= ~(1 << (x%5)); |
| 81 | m_digit[x/5][i] |= BIT(data, 7-i) ? (1 << (x%5)) : 0; |
| 82 | output_set_indexed_value("dmd_", (x/5)*7 + i, 0x1F & m_digit[x/5][i]); |
| 83 | } |
| 82 | 84 | } |
| 83 | 85 | } |
| 84 | 86 | |