trunk/src/emu/bus/isa/trident.c
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| 311 | 311 | return off; |
| 312 | 312 | } |
| 313 | 313 | |
| 314 | int trident_vga_device::calculate_clock() |
| 315 | { |
| 316 | // Bits 0-6: M |
| 317 | // Bits 7-11: N |
| 318 | // Bit 12: K |
| 319 | // Later formula extends each variable by one extra bit (Providia 9685 and later) |
| 320 | double freq; |
| 321 | UINT8 m,n,k; |
| 322 | |
| 323 | m = tri.vid_clock & 0x007f; |
| 324 | n = (tri.vid_clock & 0x0f80) >> 7; |
| 325 | k = (tri.vid_clock & 0x1000) >> 12; |
| 326 | freq = ((double)(m+8) / (double)((n+2)*(pow(2.0,k)))) * 14.31818f; // there is a 14.31818MHz clock on the board |
| 327 | |
| 328 | return freq * 1000000; |
| 329 | } |
| 330 | |
| 314 | 331 | void trident_vga_device::trident_define_video_mode() |
| 315 | 332 | { |
| 316 | 333 | int divisor = 1; |
| 317 | 334 | int xtal; |
| 318 | 335 | |
| 336 | /* // clock select for TGUI9440CXi and earlier |
| 319 | 337 | switch(tri.clock) |
| 320 | 338 | { |
| 321 | 339 | case 0: |
| r32517 | r32518 | |
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| 344 | 362 | case 1: xtal = xtal / 2; break; |
| 345 | 363 | case 2: xtal = xtal / 4; break; |
| 346 | 364 | case 3: xtal = xtal / 1.5; break; |
| 365 | }*/ |
| 366 | |
| 367 | |
| 368 | // TGUI9440AGi/9660/9680/9682 programmable clock |
| 369 | switch(tri.clock) |
| 370 | { |
| 371 | case 0: |
| 372 | default: xtal = XTAL_25_1748MHz; break; |
| 373 | case 1: xtal = XTAL_28_63636MHz; break; |
| 374 | case 2: xtal = calculate_clock(); break; // how to divide the clock? Needed for higher refresh rates (75Hz+) |
| 347 | 375 | } |
| 348 | 376 | |
| 377 | |
| 349 | 378 | svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb32_en = 0; |
| 350 | 379 | switch((tri.pixel_depth & 0x0c) >> 2) |
| 351 | 380 | { |
| r32517 | r32518 | |
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| 900 | 929 | switch(offset) |
| 901 | 930 | { |
| 902 | 931 | case 2: |
| 903 | | if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40) |
| 932 | if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80)) |
| 904 | 933 | { |
| 905 | 934 | tri.mem_clock = (tri.mem_clock & 0xff00) | (data); |
| 906 | 935 | if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock); |
| 907 | 936 | } |
| 908 | 937 | break; |
| 909 | 938 | case 3: |
| 910 | | if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40) |
| 939 | if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80)) |
| 911 | 940 | { |
| 912 | 941 | tri.mem_clock = (tri.mem_clock & 0x00ff) | (data << 8); |
| 913 | 942 | if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock); |
| 914 | 943 | } |
| 915 | 944 | break; |
| 916 | 945 | case 4: |
| 917 | | if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40) |
| 946 | if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80)) |
| 918 | 947 | { |
| 919 | 948 | tri.vid_clock = (tri.vid_clock & 0xff00) | (data); |
| 920 | 949 | if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock); |
| 921 | 950 | } |
| 922 | 951 | break; |
| 923 | 952 | case 5: |
| 924 | | if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40) |
| 953 | if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80)) |
| 925 | 954 | { |
| 926 | 955 | tri.vid_clock = (tri.vid_clock & 0x00ff) | (data << 8); |
| 927 | 956 | if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock); |