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r32492 Thursday 2nd October, 2014 at 11:19:51 UTC by Barry Rodewald
trident: added hardware cursor

[src/emu/bus/isa]

svga_trident.c trident.c trident.h

trunk/src/emu/bus/isa/svga_trident.c

r32491	r32492
82	82	m_isa->install_device(0x3c0, 0x3cf, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03c0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03c0_w),m_vga));
83	83	m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03d0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03d0_w),m_vga));
84	84	m_isa->install_device(0x83c4, 0x83cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_83c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_83c6_w),m_vga));
	85	m_isa->install_device(0x43c4, 0x43cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_43c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_43c6_w),m_vga));
85	86
86	87	m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(trident_vga_device::mem_r),m_vga), write8_delegate(FUNC(trident_vga_device::mem_w),m_vga));
87	88
	89	// uncomment to test Windows 3.1 TGUI9440AGi driver
	90	//   m_isa->install_memory(0x4400000, 0x45fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
	91
88	92	// acceleration ports
89	93	m_isa->install_device(0x2120, 0x21ff, 0, 0, read8_delegate(FUNC(trident_vga_device::accel_r),m_vga), write8_delegate(FUNC(trident_vga_device::accel_w),m_vga));
90	94	}

trunk/src/emu/bus/isa/trident.c

r32491	r32492
10	10	#include "trident.h"
11	11	#include "debugger.h"
12	12
	13	enum
	14	{
	15	SCREEN_OFF = 0,
	16	TEXT_MODE,
	17	VGA_MODE,
	18	EGA_MODE,
	19	CGA_MODE,
	20	MONO_MODE,
	21	RGB8_MODE,
	22	RGB15_MODE,
	23	RGB16_MODE,
	24	RGB24_MODE,
	25	RGB32_MODE
	26	};
	27
13	28	const device_type TRIDENT_VGA = &device_creator<trident_vga_device>;
14	29
15	30	#define CRTC_PORT_ADDR ((vga.miscellaneous_output&1)?0x3d0:0x3b0)
r32491	r32492
168	183	void trident_vga_device::device_reset()
169	184	{
170	185	svga_device::device_reset();
171		svga.id = 0xd3;  // identifies at TGUI9660XGi
	186	svga.id = 0xd3;  // identifies at TGUI9660XGi (set to 0xe3 to identify at TGUI9440AGi)
172	187	tri.revision = 0x01;  // revision identifies as TGUI9680
173	188	tri.new_mode = false;  // start up in old mode
174	189	tri.dac_active = false;
r32491	r32492
176	191	tri.mmio_active = false;
177	192	tri.sr0f = 0x6f;
178	193	tri.sr0c = 0x78;
	194	tri.mem_clock = 0x2c6;  // 50MHz default
	195	tri.vid_clock = 0;
179	196	tri.port_3c3 = true;
180	197	tri.accel_busy = false;
181	198	tri.accel_memwrite_active = false;
	199	// Windows 3.1 TGUI9440AGi drivers do not set the pointer colour registers?
	200	tri.cursor_bg = 0x00000000;
	201	tri.cursor_fg = 0xffffffff;
182	202	}
183	203
	204	UINT32 trident_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	205	{
	206	UINT8 cur_mode = 0;
	207
	208	svga_device::screen_update(screen,bitmap,cliprect);
	209	cur_mode = pc_vga_choosevideomode();
	210
	211	// draw hardware graphics cursor
	212	if(tri.cursor_ctrl & 0x80)  // if cursor is enabled
	213	{
	214	UINT32 src;
	215	UINT32* dst;
	216	UINT8 val;
	217	int x,y;
	218	UINT16 cx = tri.cursor_x & 0x0fff;
	219	UINT16 cy = tri.cursor_y & 0x0fff;
	220	UINT32 bg_col;
	221	UINT32 fg_col;
	222	UINT8 cursor_size = (tri.cursor_ctrl & 0x01) ? 64 : 32;
	223
	224	if(cur_mode == SCREEN_OFF || cur_mode == TEXT_MODE || cur_mode == MONO_MODE || cur_mode == CGA_MODE || cur_mode == EGA_MODE)
	225	return 0;  // cursor only works in VGA or SVGA modes
	226
	227	src = tri.cursor_loc * 1024;  // start address is in units of 1024 bytes
	228
	229	if(cur_mode == RGB16_MODE)
	230	{
	231	bg_col = tri.cursor_bg;
	232	fg_col = tri.cursor_fg;
	233	}
	234	else /* TODO: other modes */
	235	{
	236	bg_col = m_palette->pen(tri.cursor_bg & 0xff);
	237	fg_col = m_palette->pen(tri.cursor_fg & 0xff);
	238	}
	239
	240	for(y=0;y<cursor_size;y++)
	241	{
	242	UINT8 bitcount = 31;
	243	dst = &bitmap.pix32(cy + y, cx);
	244	for(x=0;x<cursor_size;x++)
	245	{
	246	UINT32 bitb = (vga.memory[(src+3) % vga.svga_intf.vram_size]
	247	| ((vga.memory[(src+2) % vga.svga_intf.vram_size]) << 8)
	248	| ((vga.memory[(src+1) % vga.svga_intf.vram_size]) << 16)
	249	| ((vga.memory[(src+0) % vga.svga_intf.vram_size]) << 24));
	250	UINT32 bita = (vga.memory[(src+7) % vga.svga_intf.vram_size]
	251	| ((vga.memory[(src+6) % vga.svga_intf.vram_size]) << 8)
	252	| ((vga.memory[(src+5) % vga.svga_intf.vram_size]) << 16)
	253	| ((vga.memory[(src+4) % vga.svga_intf.vram_size]) << 24));
	254	val = (BIT(bita << 1,bitcount+1) << 1 | BIT(bitb,bitcount));
	255	if(tri.cursor_ctrl & 0x40)
	256	{  // X11 mode
	257	switch(val)
	258	{
	259	case 0x00:
	260	// no change
	261	break;
	262	case 0x01:
	263	dst[x] = bg_col;
	264	break;
	265	case 0x02:
	266	// no change
	267	break;
	268	case 0x03:
	269	dst[x] = fg_col;
	270	break;
	271	}
	272	}
	273	else
	274	{  // Windows mode
	275	switch(val)
	276	{
	277	case 0x00:
	278	dst[x] = bg_col;
	279	break;
	280	case 0x01:
	281	// no change
	282	break;
	283	case 0x02:  // screen data
	284	dst[x] = fg_col;
	285	break;
	286	case 0x03:  // inverted screen data
	287	dst[x] = ~(dst[x]);
	288	break;
	289	}
	290	}
	291	bitcount--;
	292	if(x % 32 == 31)
	293	{
	294	src+=8;
	295	bitcount=31;
	296	}
	297	}
	298	}
	299	}
	300
	301	return 0;
	302	}
	303
184	304	UINT16 trident_vga_device::offset()
185	305	{
186	306	UINT16 off = svga_device::offset();
r32491	r32492
280	400	case 0x0f:  // Power Up Mode 2
281	401	res = tri.sr0f;
282	402	break;
	403	default:
	404	res = vga.sequencer.data[index];
	405	if(!LOG) logerror("Trident: Sequencer index %02x read\n",index);
283	406	}
284	407	}
285	408	if(LOG) logerror("Trident SR%02X: read %02x\n",index,res);
r32491	r32492
310	433	tri.sr0c = data;
311	434	break;
312	435	case 0x0d:  // Mode Control 2
313		//svga.rgb15_en = data & 0x30; // TODO: doesn't match documentation
314	436	if(tri.new_mode)
315	437	{
316	438	tri.sr0d_new = data;
r32491	r32492
340	462	case 0x0f:  // Power Up Mode 2
341	463	tri.sr0f = data;
342	464	break;
	465	default:
	466	if(!LOG) logerror("Trident: Sequencer index %02x read\n",index);
343	467	}
344	468	}
345	469	}
346	470
347	471	UINT8 trident_vga_device::trident_crtc_reg_read(UINT8 index)
348	472	{
349		UINT8 res;
	473	UINT8 res = 0;
350	474
351	475	if(index <= 0x18)
352	476	res = crtc_reg_read(index);
r32491	r32492
363	487	case 0x21:
364	488	res = tri.cr21;
365	489	break;
	490	case 0x24:
	491	if(vga.attribute.state != 0)
	492	res |= 0x80;
	493	break;
	494	case 0x26:
	495	res = vga.attribute.index;
	496	break;
366	497	case 0x27:
367	498	res = (vga.crtc.start_addr & 0x60000) >> 17;
368	499	break;
r32491	r32492
375	506	case 0x39:
376	507	res = tri.cr39;
377	508	break;
	509	case 0x40:
	510	res = (tri.cursor_x & 0x00ff);
	511	break;
	512	case 0x41:
	513	res = (tri.cursor_x & 0xff00) >> 8;
	514	break;
	515	case 0x42:
	516	res = (tri.cursor_y & 0x00ff);
	517	break;
	518	case 0x43:
	519	res = (tri.cursor_y & 0xff00) >> 8;
	520	break;
	521	case 0x44:
	522	res = (tri.cursor_loc & 0x00ff);
	523	break;
	524	case 0x45:
	525	res = (tri.cursor_loc & 0xff00) >> 8;
	526	break;
	527	case 0x46:
	528	res = tri.cursor_x_off;
	529	break;
	530	case 0x47:
	531	res = tri.cursor_y_off;
	532	break;
	533	case 0x48:
	534	res = (tri.cursor_fg & 0x000000ff);
	535	break;
	536	case 0x49:
	537	res = (tri.cursor_fg & 0x0000ff00) >> 8;
	538	break;
	539	case 0x4a:
	540	res = (tri.cursor_fg & 0x00ff0000) >> 16;
	541	break;
	542	case 0x4b:
	543	res = (tri.cursor_fg & 0xff000000) >> 24;
	544	break;
	545	case 0x4c:
	546	res = (tri.cursor_bg & 0x000000ff);
	547	break;
	548	case 0x4d:
	549	res = (tri.cursor_bg & 0x0000ff00) >> 8;
	550	break;
	551	case 0x4e:
	552	res = (tri.cursor_bg & 0x00ff0000) >> 16;
	553	break;
	554	case 0x4f:
	555	res = (tri.cursor_bg & 0xff000000) >> 24;
	556	break;
378	557	case 0x50:
379		res = tri.cr50;
	558	res = tri.cursor_ctrl;
380	559	break;
381	560	default:
382	561	res = vga.crtc.data[index];
	562	if(!LOG) logerror("Trident: CRTC index %02x read\n",index);
383	563	break;
384	564	}
385	565	}
r32491	r32492
403	583	vga.crtc.start_addr = (vga.crtc.start_addr & 0xfffeffff) | ((data & 0x20)<<11);
404	584	break;
405	585	case 0x1f:
406		tri.cr1f = data;  // "Software Programming Register"  written to by software (BIOS?)
	586	tri.cr1f = data;  // "Software Programming Register"  written to by the BIOS
407	587	break;
408	588	case 0x21:  // Linear aperture
409	589	tri.cr21 = data;
410	590	tri.linear_address = ((data & 0xc0)<<18) | ((data & 0x0f)<<20);
411	591	tri.linear_active = data & 0x20;
412		if(tri.linear_active)
413		popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
	592	//if(tri.linear_active)
	593	//popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
414	594	break;
415	595	case 0x27:
416	596	vga.crtc.start_addr = (vga.crtc.start_addr & 0xfff9ffff) | ((data & 0x03)<<17);
r32491	r32492
420	600	vga.crtc.offset = (vga.crtc.offset & 0xfeff) | ((data & 0x10)<<4);
421	601	break;
422	602	case 0x38:
	603	// bit 0: 16 bit bus
	604	// bits 2-3: pixel depth (1=15/16bit, 2=24/32bit, 0=anything else)
	605	// bit 5: packed mode
423	606	tri.pixel_depth = data;
424	607	trident_define_video_mode();
425	608	break;
r32491	r32492
429	612	if(tri.mmio_active)
430	613	popmessage("Trident: MMIO activated");
431	614	break;
	615	case 0x40:
	616	tri.cursor_x = (tri.cursor_x & 0xff00) | data;
	617	break;
	618	case 0x41:
	619	tri.cursor_x = (tri.cursor_x & 0x00ff) | (data << 8);
	620	break;
	621	case 0x42:
	622	tri.cursor_y = (tri.cursor_y & 0xff00) | data;
	623	break;
	624	case 0x43:
	625	tri.cursor_y = (tri.cursor_y & 0x00ff) | (data << 8);
	626	break;
	627	case 0x44:
	628	tri.cursor_loc = (tri.cursor_loc & 0xff00) | data;
	629	break;
	630	case 0x45:
	631	tri.cursor_loc = (tri.cursor_loc & 0x00ff) | (data << 8);
	632	break;
	633	case 0x46:
	634	tri.cursor_x_off = data;
	635	break;
	636	case 0x47:
	637	tri.cursor_y_off = data;
	638	break;
	639	case 0x48:
	640	tri.cursor_fg = (tri.cursor_fg & 0xffffff00) | data;
	641	break;
	642	case 0x49:
	643	tri.cursor_fg = (tri.cursor_fg & 0xffff00ff) | (data << 8);
	644	break;
	645	case 0x4a:
	646	tri.cursor_fg = (tri.cursor_fg & 0xff00ffff) | (data << 16);
	647	break;
	648	case 0x4b:
	649	tri.cursor_fg = (tri.cursor_fg & 0x00ffffff) | (data << 24);
	650	break;
	651	case 0x4c:
	652	tri.cursor_bg = (tri.cursor_bg & 0xffffff00) | data;
	653	break;
	654	case 0x4d:
	655	tri.cursor_bg = (tri.cursor_bg & 0xffff00ff) | (data << 8);
	656	break;
	657	case 0x4e:
	658	tri.cursor_bg = (tri.cursor_bg & 0xff00ffff) | (data << 16);
	659	break;
	660	case 0x4f:
	661	tri.cursor_bg = (tri.cursor_bg & 0x00ffffff) | (data << 24);
	662	break;
432	663	case 0x50:
433		tri.cr50 = data;
	664	tri.cursor_ctrl = data;
434	665	break;
435	666	default:
436		//logerror("Trident: 3D4 index %02x write %02x\n",index,data);
	667	if(!LOG) logerror("Trident: 3D4 index %02x write %02x\n",index,data);
437	668	break;
438	669	}
439	670	}
r32491	r32492
460	691	break;
461	692	default:
462	693	res = 0xff;
	694	if(!LOG) logerror("Trident: Sequencer index %02x read\n",index);
463	695	break;
464	696	}
465	697	}
r32491	r32492
491	723	tri.gc2f = data;
492	724	break;
493	725	default:
494		//logerror("Trident: Unimplemented GC register %02x write %02x\n",index,data);
	726	if(!LOG) logerror("Trident: Unimplemented GC register %02x write %02x\n",index,data);
495	727	break;
496	728	}
497	729	}
r32491	r32492
644	876	}
645	877	}
646	878
	879	READ8_MEMBER(trident_vga_device::port_43c6_r)
	880	{
	881	UINT8 res = 0xff;
	882	switch(offset)
	883	{
	884	case 2:
	885	res = tri.mem_clock & 0xff;
	886	break;
	887	case 3:
	888	res = tri.mem_clock >> 8;
	889	break;
	890	case 4:
	891	res = tri.vid_clock & 0xff;
	892	break;
	893	case 5:
	894	res = tri.vid_clock >> 8;
	895	break;
	896	}
	897	return res;
	898	}
	899
	900	WRITE8_MEMBER(trident_vga_device::port_43c6_w)
	901	{
	902	switch(offset)
	903	{
	904	case 2:
	905	if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
	906	{
	907	tri.mem_clock = (tri.mem_clock & 0xff00) | (data);
	908	if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
	909	}
	910	break;
	911	case 3:
	912	if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
	913	{
	914	tri.mem_clock = (tri.mem_clock & 0x00ff) | (data << 8);
	915	if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
	916	}
	917	break;
	918	case 4:
	919	if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
	920	{
	921	tri.vid_clock = (tri.vid_clock & 0xff00) | (data);
	922	if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
	923	}
	924	break;
	925	case 5:
	926	if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
	927	{
	928	tri.vid_clock = (tri.vid_clock & 0x00ff) | (data << 8);
	929	if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
	930	}
	931	break;
	932	}
	933	}
	934
647	935	READ8_MEMBER(trident_vga_device::port_83c6_r)
648	936	{
649	937	UINT8 res = 0xff;

trunk/src/emu/bus/isa/trident.h

r32491	r32492
22	22	virtual WRITE8_MEMBER(port_03d0_w);
23	23	DECLARE_READ8_MEMBER(port_83c6_r);
24	24	DECLARE_WRITE8_MEMBER(port_83c6_w);
25		DECLARE_READ8_MEMBER(vram_r) { if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en) return vga.memory[offset % vga.svga_intf.vram_size]; else return 0xff; }
26		DECLARE_WRITE8_MEMBER(vram_w) { if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en) vga.memory[offset % vga.svga_intf.vram_size] = data; }
	25	DECLARE_READ8_MEMBER(port_43c6_r);
	26	DECLARE_WRITE8_MEMBER(port_43c6_w);
	27	DECLARE_READ8_MEMBER(vram_r) { if (tri.linear_active) return vga.memory[offset % vga.svga_intf.vram_size]; else return 0xff; }
	28	DECLARE_WRITE8_MEMBER(vram_w) { if (tri.linear_active) vga.memory[offset % vga.svga_intf.vram_size] = data; }
27	29	virtual READ8_MEMBER(mem_r);
28	30	virtual WRITE8_MEMBER(mem_w);
29	31	virtual UINT16 offset();
r32491	r32492
31	33	DECLARE_READ8_MEMBER(accel_r);
32	34	DECLARE_WRITE8_MEMBER(accel_w);
33	35
	36	virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
	37
34	38	protected:
35	39	virtual void device_start();
36	40	virtual void device_reset();
	41
37	42	struct
38	43	{
39	44	UINT8 sr0c;
r32491	r32492
50	55	UINT8 cr21;
51	56	UINT8 cr29;
52	57	UINT8 cr39;
53		UINT8 cr50;
54	58	UINT8 dac;
55	59	bool new_mode;
56	60	bool port_3c3;
r32491	r32492
62	66	UINT32 linear_address;
63	67	bool linear_active;
64	68	bool mmio_active;
	69	// TGUI9440 only?
	70	UINT16 mem_clock;  // I/O 0x43c6
	71	UINT16 vid_clock;  // I/O 0x43c8
	72	UINT16 cursor_x;
	73	UINT16 cursor_y;
	74	UINT16 cursor_loc;
	75	UINT8 cursor_x_off;
	76	UINT8 cursor_y_off;
	77	UINT32 cursor_fg;  // colour
	78	UINT32 cursor_bg;  // colour
	79	UINT8 cursor_ctrl;
65	80
66	81	// 2D acceleration
67	82	UINT16 accel_opermode;

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