trunk/src/mess/drivers/amiga.c
| r32311 | r32312 | |
| 75 | 75 | |
| 76 | 76 | protected: |
| 77 | 77 | // amiga_state overrides |
| 78 | | virtual void update_int2(); |
| 79 | | virtual void update_int6(); |
| 78 | virtual bool int2_pending(); |
| 79 | virtual bool int6_pending(); |
| 80 | 80 | |
| 81 | 81 | private: |
| 82 | 82 | // devices |
| r32311 | r32312 | |
| 140 | 140 | virtual void machine_start(); |
| 141 | 141 | |
| 142 | 142 | // amiga_state overrides |
| 143 | | virtual void update_int2(); |
| 144 | | virtual void update_int6(); |
| 143 | virtual bool int2_pending(); |
| 144 | virtual bool int6_pending(); |
| 145 | 145 | |
| 146 | 146 | private: |
| 147 | 147 | // devices |
| r32311 | r32312 | |
| 218 | 218 | static const UINT8 GAYLE_ID = 0xd0; |
| 219 | 219 | |
| 220 | 220 | protected: |
| 221 | | virtual void update_int2(); |
| 221 | virtual bool int2_pending(); |
| 222 | 222 | |
| 223 | 223 | private: |
| 224 | 224 | int m_gayle_int2; |
| r32311 | r32312 | |
| 240 | 240 | static const UINT8 GAYLE_ID = 0xd1; |
| 241 | 241 | |
| 242 | 242 | protected: |
| 243 | | virtual void update_int2(); |
| 243 | virtual bool int2_pending(); |
| 244 | 244 | |
| 245 | 245 | private: |
| 246 | 246 | int m_gayle_int2; |
| r32311 | r32312 | |
| 569 | 569 | update_int6(); |
| 570 | 570 | } |
| 571 | 571 | |
| 572 | | void a2000_state::update_int2() |
| 572 | bool a2000_state::int2_pending() |
| 573 | 573 | { |
| 574 | | int state = (m_cia_0_irq || m_zorro2_int2); |
| 575 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 574 | return m_cia_0_irq || m_zorro2_int2; |
| 576 | 575 | } |
| 577 | 576 | |
| 578 | | void a2000_state::update_int6() |
| 577 | bool a2000_state::int6_pending() |
| 579 | 578 | { |
| 580 | | int state = (m_cia_1_irq || m_zorro2_int6); |
| 581 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_EXTER); |
| 579 | return m_cia_1_irq || m_zorro2_int6; |
| 582 | 580 | } |
| 583 | 581 | |
| 584 | 582 | void cdtv_state::machine_start() |
| r32311 | r32312 | |
| 591 | 589 | m_dmac->ramsz_w(0); |
| 592 | 590 | } |
| 593 | 591 | |
| 594 | | void cdtv_state::update_int2() |
| 592 | bool cdtv_state::int2_pending() |
| 595 | 593 | { |
| 596 | | int state = (m_cia_0_irq || m_dmac_irq || m_tpi_irq); |
| 597 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 594 | return m_cia_0_irq || m_dmac_irq || m_tpi_irq; |
| 598 | 595 | } |
| 599 | 596 | |
| 600 | | void cdtv_state::update_int6() |
| 597 | bool cdtv_state::int6_pending() |
| 601 | 598 | { |
| 602 | | int state = (m_cia_1_irq); |
| 603 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_EXTER); |
| 599 | return m_cia_1_irq; |
| 604 | 600 | } |
| 605 | 601 | |
| 606 | 602 | READ32_MEMBER( a3000_state::scsi_r ) |
| r32311 | r32312 | |
| 627 | 623 | logerror("motherboard_w(%06x): %08x & %08x\n", offset, data, mem_mask); |
| 628 | 624 | } |
| 629 | 625 | |
| 630 | | void a600_state::update_int2() |
| 626 | bool a600_state::int2_pending() |
| 631 | 627 | { |
| 632 | | int state = (m_cia_0_irq || m_gayle_int2); |
| 633 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 628 | return m_cia_0_irq || m_gayle_int2; |
| 634 | 629 | } |
| 635 | 630 | |
| 636 | 631 | WRITE_LINE_MEMBER( a600_state::gayle_int2_w ) |
| r32311 | r32312 | |
| 639 | 634 | update_int2(); |
| 640 | 635 | } |
| 641 | 636 | |
| 642 | | void a1200_state::update_int2() |
| 637 | bool a1200_state::int2_pending() |
| 643 | 638 | { |
| 644 | | int state = (m_cia_0_irq || m_gayle_int2); |
| 645 | | set_interrupt((state ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 639 | return m_cia_0_irq || m_gayle_int2; |
| 646 | 640 | } |
| 647 | 641 | |
| 648 | 642 | WRITE_LINE_MEMBER( a1200_state::gayle_int2_w ) |
trunk/src/mame/machine/amiga.c
| r32311 | r32312 | |
| 398 | 398 | custom_chip_w(m_maincpu->space(AS_PROGRAM), REG_INTREQ, interrupt, 0xffff); |
| 399 | 399 | } |
| 400 | 400 | |
| 401 | bool amiga_state::int2_pending() |
| 402 | { |
| 403 | return m_cia_0_irq; |
| 404 | } |
| 405 | |
| 406 | bool amiga_state::int6_pending() |
| 407 | { |
| 408 | return m_cia_1_irq; |
| 409 | } |
| 410 | |
| 401 | 411 | void amiga_state::update_int2() |
| 402 | 412 | { |
| 403 | | set_interrupt((m_cia_0_irq ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 413 | set_interrupt((int2_pending() ? INTENA_SETCLR : 0x0000) | INTENA_PORTS); |
| 404 | 414 | } |
| 405 | 415 | |
| 406 | 416 | void amiga_state::update_int6() |
| 407 | 417 | { |
| 408 | | set_interrupt((m_cia_1_irq ? INTENA_SETCLR : 0x0000) | INTENA_EXTER); |
| 418 | set_interrupt((int6_pending() ? INTENA_SETCLR : 0x0000) | INTENA_EXTER); |
| 409 | 419 | } |
| 410 | 420 | |
| 411 | 421 | void amiga_state::update_irqs() |
| 412 | 422 | { |
| 413 | 423 | amiga_state *state = this; |
| 424 | |
| 425 | // if the external interrupt line is still active, set the interrupt request bit |
| 426 | if (int2_pending()) |
| 427 | CUSTOM_REG(REG_INTREQ) |= INTENA_PORTS; |
| 428 | |
| 429 | if (int6_pending()) |
| 430 | CUSTOM_REG(REG_INTREQ) |= INTENA_EXTER; |
| 431 | |
| 414 | 432 | int ints = CUSTOM_REG(REG_INTENA) & CUSTOM_REG(REG_INTREQ); |
| 415 | 433 | |
| 416 | 434 | // master interrupt switch |
| r32311 | r32312 | |
| 1429 | 1447 | CUSTOM_REG(REG_BLTSIZH) = data & 0x3f; |
| 1430 | 1448 | if ( CUSTOM_REG(REG_BLTSIZV) == 0 ) CUSTOM_REG(REG_BLTSIZV) = 0x400; |
| 1431 | 1449 | if ( CUSTOM_REG(REG_BLTSIZH) == 0 ) CUSTOM_REG(REG_BLTSIZH) = 0x40; |
| 1432 | | blitter_setup(space); |
| 1450 | blitter_setup(m_maincpu->space(AS_PROGRAM)); |
| 1433 | 1451 | break; |
| 1434 | 1452 | |
| 1435 | 1453 | case REG_BLTSIZV: |
| r32311 | r32312 | |
| 1445 | 1463 | { |
| 1446 | 1464 | CUSTOM_REG(REG_BLTSIZH) = data & 0x7ff; |
| 1447 | 1465 | if ( CUSTOM_REG(REG_BLTSIZH) == 0 ) CUSTOM_REG(REG_BLTSIZH) = 0x800; |
| 1448 | | blitter_setup(space); |
| 1466 | blitter_setup(m_maincpu->space(AS_PROGRAM)); |
| 1449 | 1467 | } |
| 1450 | 1468 | break; |
| 1451 | 1469 | |
| r32311 | r32312 | |
| 1479 | 1497 | amiga_sprite_enable_comparitor(space.machine(), (offset - REG_SPR0DATA) / 4, TRUE); |
| 1480 | 1498 | break; |
| 1481 | 1499 | |
| 1482 | | case REG_COP1LCH: case REG_COP2LCH: |
| 1500 | case REG_COP1LCH: |
| 1501 | case REG_COP2LCH: |
| 1483 | 1502 | data &= ( state->m_chip_ram_mask >> 16 ); |
| 1484 | 1503 | break; |
| 1485 | 1504 | |