trunk/src/emu/bus/isa/trident.c
| r32300 | r32301 | |
|---|
| 50 | 50 | void trident_vga_device::WRITEPIXEL8(INT16 x, INT16 y, UINT8 data) |
| 51 | 51 | { |
| 52 | 52 | if((x & 0xfff)<tri.accel_dest_x_clip && (y & 0xfff)<tri.accel_dest_y_clip) |
| 53 | { |
| 54 | data = handle_rop(data,READPIXEL8(x,y)) & 0xff; |
| 53 | 55 | vga.memory[((y & 0xfff)*offset() + (x & 0xfff)) % vga.svga_intf.vram_size] = data; |
| 56 | } |
| 54 | 57 | } |
| 55 | 58 | |
| 56 | 59 | void trident_vga_device::WRITEPIXEL15(INT16 x, INT16 y, UINT16 data) |
| 57 | 60 | { |
| 58 | 61 | if((x & 0xfff)<tri.accel_dest_x_clip && (y & 0xfff)<tri.accel_dest_y_clip) |
| 59 | 62 | { |
| 63 | data = handle_rop(data,READPIXEL8(x,y)) & 0x7fff; |
| 60 | 64 | vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] = data & 0x00ff; |
| 61 | 65 | vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] = (data & 0x7f00) >> 8; |
| 62 | 66 | } |
| r32300 | r32301 | |
|---|
| 66 | 70 | { |
| 67 | 71 | if((x & 0xfff)<tri.accel_dest_x_clip && (y & 0xfff)<tri.accel_dest_y_clip) |
| 68 | 72 | { |
| 73 | data = handle_rop(data,READPIXEL8(x,y)) & 0xffff; |
| 69 | 74 | vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] = data & 0x00ff; |
| 70 | 75 | vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] = (data & 0xff00) >> 8; |
| 71 | 76 | } |
| r32300 | r32301 | |
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| 75 | 80 | { |
| 76 | 81 | if((x & 0xfff)<tri.accel_dest_x_clip && (y & 0xfff)<tri.accel_dest_y_clip) |
| 77 | 82 | { |
| 83 | data = handle_rop(data,READPIXEL8(x,y)); |
| 78 | 84 | vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*4) % vga.svga_intf.vram_size] = data & 0x000000ff; |
| 79 | 85 | vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+1) % vga.svga_intf.vram_size] = (data & 0x0000ff00) >> 8; |
| 80 | 86 | vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+2) % vga.svga_intf.vram_size] = (data & 0x00ff0000) >> 16; |
| r32300 | r32301 | |
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| 82 | 88 | } |
| 83 | 89 | } |
| 84 | 90 | |
| 91 | UINT32 trident_vga_device::handle_rop(UINT32 src, UINT32 dst) |
| 92 | { |
| 93 | switch(tri.accel_fmix) // TODO: better understand this register |
| 94 | { |
| 95 | case 0xf0: // PAT |
| 96 | case 0xcc: // SRC |
| 97 | break; // pass data through |
| 98 | case 0x00: // 0 |
| 99 | src = 0; |
| 100 | break; |
| 101 | case 0xff: // 1 |
| 102 | src = 0xffffffff; |
| 103 | break; |
| 104 | case 0x66: // XOR |
| 105 | case 0x5a: // XOR PAT |
| 106 | src = dst ^ src; |
| 107 | break; |
| 108 | } |
| 109 | return src; |
| 110 | } |
| 111 | |
| 85 | 112 | UINT32 trident_vga_device::READPIXEL(INT16 x,INT16 y) |
| 86 | 113 | { |
| 87 | 114 | if(svga.rgb8_en) |
| r32300 | r32301 | |
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| 1168 | 1195 | // feed data written to VRAM to an active BitBLT command |
| 1169 | 1196 | void trident_vga_device::accel_data_write(UINT32 data) |
| 1170 | 1197 | { |
| 1198 | int xdir = 1,ydir = 1; |
| 1199 | |
| 1200 | if(tri.accel_drawflags & 0x0200) // XNEG |
| 1201 | xdir = -1; |
| 1202 | if(tri.accel_drawflags & 0x0100) // YNEG |
| 1203 | ydir = -1; |
| 1204 | |
| 1171 | 1205 | for(int x=31;x>=0;x--) |
| 1172 | 1206 | { |
| 1173 | | if(tri.accel_mem_x <= tri.accel_dest_x+tri.accel_dim_x) |
| 1207 | if(tri.accel_mem_x <= tri.accel_dest_x+tri.accel_dim_x && tri.accel_mem_x >= tri.accel_dest_x-tri.accel_dim_x) |
| 1174 | 1208 | { |
| 1175 | 1209 | if(((data >> x) & 0x01) != 0) |
| 1176 | 1210 | WRITEPIXEL(tri.accel_mem_x,tri.accel_mem_y,tri.accel_fgcolour); |
| 1177 | 1211 | else |
| 1178 | 1212 | WRITEPIXEL(tri.accel_mem_x,tri.accel_mem_y,tri.accel_bgcolour); |
| 1179 | 1213 | } |
| 1180 | | tri.accel_mem_x++; |
| 1214 | tri.accel_mem_x+=xdir; |
| 1181 | 1215 | } |
| 1182 | | if(tri.accel_mem_x > tri.accel_dest_x+tri.accel_dim_x) |
| 1216 | if(tri.accel_mem_x > tri.accel_dest_x+tri.accel_dim_x || tri.accel_mem_x < tri.accel_dest_x-tri.accel_dim_x) |
| 1183 | 1217 | { |
| 1184 | 1218 | tri.accel_mem_x = tri.accel_dest_x; |
| 1185 | | tri.accel_mem_y++; |
| 1186 | | if(tri.accel_mem_y > tri.accel_dest_y+tri.accel_dim_y) |
| 1219 | tri.accel_mem_y+=ydir; |
| 1220 | if(tri.accel_mem_y > tri.accel_dest_y+tri.accel_dim_y || tri.accel_mem_y < tri.accel_dest_y-tri.accel_dim_y) |
| 1187 | 1221 | tri.accel_memwrite_active = false; // completed |
| 1188 | 1222 | } |
| 1189 | 1223 | } |