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r32271 Monday 22nd September, 2014 at 03:11:46 UTC by R. Belmont
(MESS) concept: Hook up Apple II bus. [R. Belmont]

[src/mess]	mess.mak
[src/mess/drivers]	concept.c
[src/mess/includes]	concept.h
[src/mess/machine]	concept.c

trunk/src/mess/machine/concept.c

r32270	r32271
6	6
7	7	#include "emu.h"
8	8	#include "includes/concept.h"
9		#include "cpu/m68000/m68000.h"
10	9
11	10
12	11	#define VERBOSE 1
r32270	r32271
43	42	/* initialize clock interface */
44	43	m_clock_enable = FALSE /*TRUE*/;
45	44
46		m_exp[0] = machine().device<concept_exp_port_device>("exp1");
47		m_exp[1] = machine().device<concept_exp_port_device>("exp2");
48		m_exp[2] = machine().device<concept_exp_port_device>("exp3");
49		m_exp[3] = machine().device<concept_exp_port_device>("exp4");
50
51	45	save_item(NAME(m_pending_interrupts));
52	46	save_item(NAME(m_clock_enable));
53	47	save_item(NAME(m_clock_address));
r32270	r32271
178	172	case 2: // IO2 registers
179	173	case 3: // IO3 registers
180	174	case 4: // IO4 registers
181		return m_exp[((offset >> 4) & 7) - 1]->reg_r(space, offset & 0x0f);
	175	{
	176	int slot = ((offset >> 4) & 7);
	177	device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
182	178
	179	if (card)
	180	{
	181	return card->read_c0nx(space, offset & 0x0f);
	182	}
	183
	184	return 0xff;
	185	}
	186	break;
	187
183	188	default: // ???
184	189	logerror("concept_io_r: Slot I/O memory accessed for unknown purpose at address 0x03%4.4x\n", offset << 1);
185		break;
	190	break;
186	191	}
187	192	break;
188	193
r32270	r32271
190	195	case 2: // IO2 ROM
191	196	case 3: // IO3 ROM
192	197	case 4: // IO4 ROM
193		LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1));
194		return m_exp[((offset >> 8) & 7) - 1]->rom_r(space, offset & 0xff);
	198	{
	199	int slot = (offset >> 8) & 7;
	200	device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
195	201
	202	if (card)
	203	{
	204	return card->read_cnxx(space, offset & 0xff);
	205	}
	206	}
	207	break;
	208
196	209	case 5:
197	210	/* slot status */
198	211	LOG(("concept_io_r: Slot status read at address 0x03%4.4x\n", offset << 1));
r32270	r32271
273	286	case 2: // IO2 registers
274	287	case 3: // IO3 registers
275	288	case 4: // IO4 registers
276		return m_exp[((offset >> 4) & 7) - 1]->reg_w(space, offset & 0x0f, data);
	289	{
	290	int slot = (offset >> 4) & 7;
	291	device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
277	292
	293	if (card)
	294	{
	295	return card->write_c0nx(space, offset & 0x0f, data);
	296	}
	297	}
	298	break;
	299
278	300	default:    // ???
279	301	logerror("concept_io_w: Slot I/O memory written for unknown purpose at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data);
280	302	break;
r32270	r32271
285	307	case 2: // IO2 ROM
286	308	case 3: // IO3 ROM
287	309	case 4: // IO4 ROM
288		LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1, data));
289		return m_exp[((offset >> 8) & 7) - 1]->rom_w(space, offset & 0xff, data);
	310	{
	311	int slot = (offset >> 8) & 7;
	312	device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
290	313
	314	if (card)
	315	{
	316	return card->write_cnxx(space, offset & 0xff, data);
	317	}
	318	}
	319	break;
	320
291	321	case 5:
292	322	/* slot status */
293	323	logerror("concept_io_w: Slot status written at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data);

trunk/src/mess/includes/concept.h

r32270	r32271
11	11	#ifndef CONCEPT_H_
12	12	#define CONCEPT_H_
13	13
	14	#include "cpu/m68000/m68000.h"
14	15	#include "machine/6522via.h"
15	16	#include "machine/mos6551.h"
16	17	#include "machine/mm58274c.h"   /* mm58274 seems to be compatible with mm58174 */
17		#include "machine/concept_exp.h"
18	18	#include "sound/speaker.h"
	19	#include "bus/a2bus/a2bus.h"
19	20
20	21	#define ACIA_0_TAG  "acia0"
21	22	#define ACIA_1_TAG  "acia1"
22	23	#define KBD_ACIA_TAG "kbacia"
23	24	#define SPEAKER_TAG   "spkr"
	25	#define A2BUS_TAG "a2bus"
24	26
25		/* keyboard interface */
26		enum
27		{
28		KeyQueueSize = 32,
29		MaxKeyMessageLen = 1
30		};
31
32
33	27	class concept_state : public driver_device
34	28	{
35	29	public:
r32270	r32271
41	35	m_kbdacia(*this, KBD_ACIA_TAG),
42	36	m_speaker(*this, SPEAKER_TAG),
43	37	m_mm58274(*this,"mm58274c"),
	38	m_a2bus(*this, A2BUS_TAG),
44	39	m_videoram(*this,"videoram") { }
45	40
46	41	required_device<cpu_device> m_maincpu;
r32270	r32271
49	44	required_device<mos6551_device> m_kbdacia;
50	45	required_device<speaker_sound_device> m_speaker;
51	46	required_device<mm58274c_device> m_mm58274;
	47	required_device<a2bus_device> m_a2bus;
52	48	required_shared_ptr<UINT16> m_videoram;
53	49
54		concept_exp_port_device *m_exp[4];
55
56	50	UINT8 m_pending_interrupts;
57	51	bool m_clock_enable;
58	52	UINT8 m_clock_address;

trunk/src/mess/drivers/concept.c

r32270	r32271
31	31	#include "emu.h"
32	32	#include "cpu/m68000/m68000.h"
33	33	#include "includes/concept.h"
	34	#include "bus/a2bus/a2corvus.h"
	35	#include "bus/rs232/rs232.h"
34	36
35	37	static ADDRESS_MAP_START(concept_memmap, AS_PROGRAM, 16, concept_state )
36	38	AM_RANGE(0x000000, 0x000007) AM_ROM AM_REGION("maincpu", 0x010000)  /* boot ROM mirror */
r32270	r32271
190	192	/* init with simple, fixed, B/W palette */
191	193	/* Is the palette black on white or white on black??? */
192	194
193		SLOT_INTERFACE_START( concept_exp_devices )
194		SLOT_INTERFACE("fdc", CONCEPT_FDC)
195		SLOT_INTERFACE("hdc", CONCEPT_HDC)
	195	SLOT_INTERFACE_START( concept_a2_cards )
	196	SLOT_INTERFACE("fchdd", A2BUS_CORVUS)  /* Corvus flat-cable HDD interface (see notes in a2corvus.c) */
196	197	SLOT_INTERFACE_END
197	198
198	199
r32270	r32271
238	239	/* ACIAs */
239	240	MCFG_DEVICE_ADD(ACIA_0_TAG, MOS6551, 0)
240	241	MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
	242	MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
	243
241	244	MCFG_DEVICE_ADD(ACIA_1_TAG, MOS6551, 0)
242	245	MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
	246	MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232b", rs232_port_device, write_txd))
	247
243	248	MCFG_DEVICE_ADD(KBD_ACIA_TAG, MOS6551, 0)
244	249	MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
245	250
246		MCFG_CONCEPT_EXP_PORT_ADD("exp1", concept_exp_devices, NULL)
247		MCFG_CONCEPT_EXP_PORT_ADD("exp2", concept_exp_devices, "fdc")   // Flat cable Hard Disk Controller in Slot 2
248		MCFG_CONCEPT_EXP_PORT_ADD("exp3", concept_exp_devices, "hdc")   // Floppy Disk Controller in Slot 3
249		MCFG_CONCEPT_EXP_PORT_ADD("exp4", concept_exp_devices, NULL)
	251	/* Apple II bus */
	252	MCFG_DEVICE_ADD(A2BUS_TAG, A2BUS, 0)
	253	MCFG_A2BUS_CPU("maincpu")
	254	MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl1", concept_a2_cards, NULL)
	255	MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl2", concept_a2_cards, NULL)
	256	MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl3", concept_a2_cards, NULL)
	257	MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl4", concept_a2_cards, "fchdd")
250	258
251		// 2x RS232 ports!
	259	/* 2x RS232 ports */
	260	MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, NULL)
	261	MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_rxd))
	262	MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_dcd))
	263	MCFG_RS232_DSR_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_dsr))
	264	MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_cts))
	265
	266	MCFG_RS232_PORT_ADD("rs232b", default_rs232_devices, NULL)
	267	MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_rxd))
	268	MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_dcd))
	269	MCFG_RS232_DSR_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_dsr))
	270	MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_cts))
252	271	MACHINE_CONFIG_END
253	272
254	273

trunk/src/mess/mess.mak

r32270	r32271
1155	1155	$(MESSOBJ)/concept.a:           \
1156	1156	$(MESS_DRIVERS)/concept.o   \
1157	1157	$(MESS_MACHINE)/concept.o   \
1158		$(MESS_MACHINE)/concept_exp.o   \
1159	1158
1160	1159	$(MESSOBJ)/conitec.a:           \
1161	1160	$(MESS_DRIVERS)/prof80.o    \

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