trunk/src/mess/machine/svi318.c
| r32256 | r32257 | |
| 25 | 25 | |
| 26 | 26 | /* Serial ports */ |
| 27 | 27 | |
| 28 | | WRITE_LINE_MEMBER(svi318_state::svi318_ins8250_interrupt) |
| 28 | WRITE_LINE_MEMBER(svi318_state::ins8250_interrupt) |
| 29 | 29 | { |
| 30 | 30 | if (m_svi.bankLow != SVI_CART) |
| 31 | 31 | { |
| 32 | 32 | m_maincpu->set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE)); |
| 33 | 33 | } |
| 34 | 34 | } |
| 35 | |
| 35 | 36 | #if 0 |
| 36 | 37 | static INS8250_REFRESH_CONNECT( svi318_com_refresh_connected ) |
| 37 | 38 | { |
| r32256 | r32257 | |
| 86 | 87 | 8 CASR Cassette, Read data |
| 87 | 88 | */ |
| 88 | 89 | |
| 89 | | READ8_MEMBER(svi318_state::svi318_ppi_port_a_r) |
| 90 | READ8_MEMBER(svi318_state::ppi_port_a_r) |
| 90 | 91 | { |
| 91 | 92 | int data = 0x0f; |
| 92 | 93 | |
| 93 | 94 | if (m_cassette->input() > 0.0038) |
| 94 | | { |
| 95 | 95 | data |= 0x80; |
| 96 | | } |
| 97 | 96 | if (!m_cassette->exists()) |
| 98 | | { |
| 99 | 97 | data |= 0x40; |
| 100 | | } |
| 98 | |
| 101 | 99 | data |= m_buttons->read() & 0x30; |
| 102 | 100 | |
| 103 | 101 | return data; |
| r32256 | r32257 | |
| 116 | 114 | 8 IN7 Keyboard, Column status of selected line |
| 117 | 115 | */ |
| 118 | 116 | |
| 119 | | READ8_MEMBER(svi318_state::svi318_ppi_port_b_r) |
| 117 | READ8_MEMBER(svi318_state::ppi_port_b_r) |
| 120 | 118 | { |
| 121 | | switch (m_svi.keyboard_row) |
| 122 | | { |
| 123 | | case 0: return m_line0->read(); |
| 124 | | case 1: return m_line1->read(); |
| 125 | | case 2: return m_line2->read(); |
| 126 | | case 3: return m_line3->read(); |
| 127 | | case 4: return m_line4->read(); |
| 128 | | case 5: return m_line5->read(); |
| 129 | | case 6: return m_line6->read(); |
| 130 | | case 7: return m_line7->read(); |
| 131 | | case 8: return m_line8->read(); |
| 132 | | case 9: return m_line9->read(); |
| 133 | | case 10: return m_line10->read(); |
| 134 | | } |
| 135 | | |
| 136 | | return 0xff; |
| 119 | if (m_svi.keyboard_row <= 10) |
| 120 | return m_line[m_svi.keyboard_row]->read(); |
| 121 | else |
| 122 | return 0xff; |
| 137 | 123 | } |
| 138 | 124 | |
| 139 | 125 | /* |
| r32256 | r32257 | |
| 149 | 135 | 8 SOUND Keyboard, Click sound bit (pulse) |
| 150 | 136 | */ |
| 151 | 137 | |
| 152 | | WRITE8_MEMBER(svi318_state::svi318_ppi_port_c_w) |
| 138 | WRITE8_MEMBER(svi318_state::ppi_port_c_w) |
| 153 | 139 | { |
| 154 | 140 | int val; |
| 155 | 141 | |
| r32256 | r32257 | |
| 169 | 155 | /* cassette signal write */ |
| 170 | 156 | m_cassette->output((data & 0x20) ? -1.0 : +1.0); |
| 171 | 157 | |
| 172 | | m_svi.keyboard_row = data & 0x0F; |
| 158 | m_svi.keyboard_row = data & 0x0f; |
| 173 | 159 | } |
| 174 | 160 | |
| 175 | | WRITE8_MEMBER(svi318_state::svi318_ppi_w) |
| 161 | WRITE8_MEMBER(svi318_state::ppi_w) |
| 176 | 162 | { |
| 177 | 163 | m_ppi->write(space, offset + 2, data); |
| 178 | 164 | } |
| r32256 | r32257 | |
| 193 | 179 | 8 RIGHT2 Joystick 2, Right |
| 194 | 180 | */ |
| 195 | 181 | |
| 196 | | READ8_MEMBER(svi318_state::svi318_psg_port_a_r) |
| 182 | READ8_MEMBER(svi318_state::psg_port_a_r) |
| 197 | 183 | { |
| 198 | 184 | return m_joysticks->read(); |
| 199 | 185 | } |
| r32256 | r32257 | |
| 214 | 200 | with RAM are disabled. |
| 215 | 201 | */ |
| 216 | 202 | |
| 217 | | WRITE8_MEMBER(svi318_state::svi318_psg_port_b_w) |
| 203 | WRITE8_MEMBER(svi318_state::psg_port_b_w) |
| 218 | 204 | { |
| 219 | 205 | if ( (m_svi.bank_switch ^ data) & 0x20) |
| 220 | 206 | set_led_status (machine(), 0, !(data & 0x20) ); |
| r32256 | r32257 | |
| 225 | 211 | |
| 226 | 212 | /* Disk drives */ |
| 227 | 213 | |
| 228 | | WRITE_LINE_MEMBER(svi318_state::svi_fdc_intrq_w) |
| 214 | WRITE_LINE_MEMBER(svi318_state::fdc_intrq_w) |
| 229 | 215 | { |
| 230 | 216 | m_fdc.irq = state; |
| 231 | 217 | } |
| 232 | 218 | |
| 233 | | WRITE_LINE_MEMBER(svi318_state::svi_fdc_drq_w) |
| 219 | WRITE_LINE_MEMBER(svi318_state::fdc_drq_w) |
| 234 | 220 | { |
| 235 | 221 | m_fdc.drq = state; |
| 236 | 222 | } |
| 237 | 223 | |
| 238 | | WRITE8_MEMBER(svi318_state::svi318_fdc_drive_motor_w) |
| 224 | WRITE8_MEMBER(svi318_state::fdc_drive_motor_w) |
| 239 | 225 | { |
| 240 | | fd1793_device *fdc = machine().device<fd1793_device>("wd179x"); |
| 241 | 226 | switch (data & 3) |
| 242 | 227 | { |
| 243 | 228 | case 1: |
| 244 | | fdc->set_drive(0); |
| 229 | m_fd1793->set_drive(0); |
| 245 | 230 | m_fdc.driveselect = 0; |
| 246 | 231 | break; |
| 247 | 232 | case 2: |
| 248 | | fdc->set_drive(1); |
| 233 | m_fd1793->set_drive(1); |
| 249 | 234 | m_fdc.driveselect = 1; |
| 250 | 235 | break; |
| 251 | 236 | } |
| 252 | 237 | } |
| 253 | 238 | |
| 254 | | WRITE8_MEMBER(svi318_state::svi318_fdc_density_side_w) |
| 239 | WRITE8_MEMBER(svi318_state::fdc_density_side_w) |
| 255 | 240 | { |
| 256 | | fd1793_device *fdc = machine().device<fd1793_device>("wd179x"); |
| 257 | | |
| 258 | | fdc->dden_w(BIT(data, 0)); |
| 259 | | fdc->set_side(BIT(data, 1)); |
| 241 | m_fd1793->dden_w(BIT(data, 0)); |
| 242 | m_fd1793->set_side(BIT(data, 1)); |
| 260 | 243 | } |
| 261 | 244 | |
| 262 | | READ8_MEMBER(svi318_state::svi318_fdc_irqdrq_r) |
| 245 | READ8_MEMBER(svi318_state::fdc_irqdrq_r) |
| 263 | 246 | { |
| 264 | 247 | UINT8 result = 0; |
| 265 | 248 | |
| r32256 | r32257 | |
| 272 | 255 | MC6845_UPDATE_ROW( svi318_state::crtc_update_row ) |
| 273 | 256 | { |
| 274 | 257 | const rgb_t *palette = m_palette->palette()->entry_list_raw(); |
| 275 | | int i; |
| 276 | 258 | |
| 277 | | for( i = 0; i < x_count; i++ ) |
| 259 | for (int i = 0; i < x_count; i++) |
| 278 | 260 | { |
| 279 | | int j; |
| 280 | | UINT8 data = m_svi.svi806_gfx[ m_svi.svi806_ram->u8(( ma + i ) & 0x7FF) * 16 + ra ]; |
| 261 | UINT8 data = m_svi.svi806_gfx[m_svi.svi806_ram->u8((ma + i) & 0x7ff) * 16 + ra]; |
| 281 | 262 | |
| 282 | | if ( i == cursor_x ) |
| 263 | if (i == cursor_x) |
| 283 | 264 | { |
| 284 | 265 | data = 0xFF; |
| 285 | 266 | } |
| 286 | 267 | |
| 287 | | for( j=0; j < 8; j++ ) |
| 268 | for (int j = 0; j < 8; j++) |
| 288 | 269 | { |
| 289 | | bitmap.pix32(y, i * 8 + j ) = palette[TMS9928A_PALETTE_SIZE + ( ( data & 0x80 ) ? 1 : 0 )]; |
| 270 | bitmap.pix32(y, i * 8 + j) = palette[TMS9928A_PALETTE_SIZE + BIT(data, 7)]; |
| 290 | 271 | data = data << 1; |
| 291 | 272 | } |
| 292 | 273 | } |
| r32256 | r32257 | |
| 298 | 279 | { |
| 299 | 280 | /* 2K RAM, but allocating 4KB to make banking easier */ |
| 300 | 281 | /* The upper 2KB will be set to FFs and will never be written to */ |
| 301 | | m_svi.svi806_ram = machine().memory().region_alloc("gfx2", 0x1000, 1, ENDIANNESS_LITTLE ); |
| 302 | | memset( m_svi.svi806_ram->base(), 0x00, 0x800 ); |
| 303 | | memset( m_svi.svi806_ram->base() + 0x800, 0xFF, 0x800 ); |
| 282 | m_svi.svi806_ram = machine().memory().region_alloc("gfx2", 0x1000, 1, ENDIANNESS_LITTLE); |
| 283 | memset(m_svi.svi806_ram->base(), 0x00, 0x800); |
| 284 | memset(m_svi.svi806_ram->base() + 0x800, 0xff, 0x800); |
| 304 | 285 | m_svi.svi806_gfx = memregion("gfx1")->base(); |
| 305 | 286 | } |
| 306 | 287 | |
| 307 | 288 | |
| 308 | 289 | WRITE8_MEMBER(svi318_state::svi806_ram_enable_w) |
| 309 | 290 | { |
| 310 | | m_svi.svi806_ram_enabled = ( data & 0x01 ); |
| 291 | m_svi.svi806_ram_enabled = (data & 0x01); |
| 311 | 292 | svi318_set_banks(); |
| 312 | 293 | } |
| 313 | 294 | |
| 314 | | VIDEO_START_MEMBER(svi318_state,svi328_806) |
| 295 | VIDEO_START_MEMBER(svi318_state, svi328_806) |
| 315 | 296 | { |
| 316 | 297 | } |
| 317 | 298 | |
| 318 | | MACHINE_RESET_MEMBER(svi318_state,svi328_806) |
| 299 | MACHINE_RESET_MEMBER(svi318_state, svi328_806) |
| 319 | 300 | { |
| 320 | 301 | MACHINE_RESET_CALL_MEMBER(svi318); |
| 321 | 302 | |
| r32256 | r32257 | |
| 324 | 305 | svi318_set_banks(); |
| 325 | 306 | |
| 326 | 307 | /* Set SVI-806 80 column card palette */ |
| 327 | | m_palette->set_pen_color( TMS9928A_PALETTE_SIZE, 0, 0, 0 ); /* Monochrome black */ |
| 328 | | m_palette->set_pen_color( TMS9928A_PALETTE_SIZE+1, 0, 224, 0 ); /* Monochrome green */ |
| 308 | m_palette->set_pen_color(TMS9928A_PALETTE_SIZE, 0, 0, 0); /* Monochrome black */ |
| 309 | m_palette->set_pen_color(TMS9928A_PALETTE_SIZE+1, 0, 224, 0); /* Monochrome green */ |
| 329 | 310 | } |
| 330 | 311 | |
| 331 | 312 | /* Init functions */ |
| r32256 | r32257 | |
| 452 | 433 | }; |
| 453 | 434 | |
| 454 | 435 | |
| 455 | | DRIVER_INIT_MEMBER(svi318_state,svi318) |
| 436 | DRIVER_INIT_MEMBER(svi318_state, svi318) |
| 456 | 437 | { |
| 457 | 438 | /* z80 stuff */ |
| 458 | | m_maincpu->z80_set_cycle_tables( cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex ); |
| 439 | m_maincpu->z80_set_cycle_tables(cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex); |
| 459 | 440 | |
| 460 | | memset(&m_svi, 0, sizeof (m_svi) ); |
| 441 | memset(&m_svi, 0, sizeof(m_svi)); |
| 461 | 442 | |
| 462 | | if ( ! strcmp( machine().system().name, "svi318" ) || ! strcmp( machine().system().name, "svi318n" ) ) |
| 463 | | { |
| 443 | if (!strcmp(machine().system().name, "svi318") || !strcmp(machine().system().name, "svi318n")) |
| 464 | 444 | m_svi.svi318 = 1; |
| 465 | | } |
| 466 | 445 | |
| 467 | 446 | m_maincpu->set_input_line_vector(0, 0xff); |
| 468 | 447 | |
| 469 | 448 | /* memory */ |
| 470 | 449 | m_svi.empty_bank = auto_alloc_array(machine(), UINT8, 0x8000); |
| 471 | | memset (m_svi.empty_bank, 0xff, 0x8000); |
| 450 | memset(m_svi.empty_bank, 0xff, 0x8000); |
| 472 | 451 | } |
| 473 | 452 | |
| 474 | 453 | MACHINE_START_MEMBER(svi318_state, svi318_ntsc) |
| r32256 | r32257 | |
| 486 | 465 | static void svi318_load_proc(device_image_interface &image) |
| 487 | 466 | { |
| 488 | 467 | svi318_state *state = image.device().machine().driver_data<svi318_state>(); |
| 489 | | int size; |
| 468 | int size = image.length(); |
| 490 | 469 | int id = floppy_get_drive(&image.device()); |
| 491 | 470 | |
| 492 | | size = image.length(); |
| 493 | 471 | switch (size) |
| 494 | 472 | { |
| 495 | 473 | case 172032: /* SVI-328 SSDD */ |
| r32256 | r32257 | |
| 504 | 482 | } |
| 505 | 483 | } |
| 506 | 484 | |
| 507 | | MACHINE_RESET_MEMBER(svi318_state,svi318) |
| 485 | MACHINE_RESET_MEMBER(svi318_state, svi318) |
| 508 | 486 | { |
| 509 | | int drive; |
| 510 | | |
| 511 | 487 | m_svi.bank_switch = 0xff; |
| 512 | 488 | svi318_set_banks(); |
| 513 | 489 | |
| 514 | | for(drive=0;drive<2;drive++) |
| 490 | for (int drive = 0; drive < 2; drive++) |
| 515 | 491 | { |
| 516 | 492 | floppy_get_device(machine(), drive)->floppy_install_load_proc(svi318_load_proc); |
| 517 | 493 | } |
| r32256 | r32257 | |
| 519 | 495 | |
| 520 | 496 | /* Memory */ |
| 521 | 497 | |
| 522 | | WRITE8_MEMBER(svi318_state::svi318_writemem1) |
| 498 | WRITE8_MEMBER(svi318_state::writemem1) |
| 523 | 499 | { |
| 524 | | if ( m_svi.bankLow_read_only ) |
| 500 | if (m_svi.bankLow_read_only) |
| 525 | 501 | return; |
| 526 | 502 | |
| 527 | 503 | m_svi.bankLow_ptr[offset] = data; |
| 528 | 504 | } |
| 529 | 505 | |
| 530 | | WRITE8_MEMBER(svi318_state::svi318_writemem2) |
| 506 | WRITE8_MEMBER(svi318_state::writemem2) |
| 531 | 507 | { |
| 532 | | if ( m_svi.bankHigh1_read_only) |
| 508 | if (m_svi.bankHigh1_read_only) |
| 533 | 509 | return; |
| 534 | 510 | |
| 535 | 511 | m_svi.bankHigh1_ptr[offset] = data; |
| 536 | 512 | } |
| 537 | 513 | |
| 538 | | WRITE8_MEMBER(svi318_state::svi318_writemem3) |
| 514 | WRITE8_MEMBER(svi318_state::writemem3) |
| 539 | 515 | { |
| 540 | | if ( m_svi.bankHigh2_read_only) |
| 516 | if (m_svi.bankHigh2_read_only) |
| 541 | 517 | return; |
| 542 | 518 | |
| 543 | 519 | m_svi.bankHigh2_ptr[offset] = data; |
| 544 | 520 | } |
| 545 | 521 | |
| 546 | | WRITE8_MEMBER(svi318_state::svi318_writemem4) |
| 522 | WRITE8_MEMBER(svi318_state::writemem4) |
| 547 | 523 | { |
| 548 | | if ( m_svi.svi806_ram_enabled ) |
| 524 | if (m_svi.svi806_ram_enabled) |
| 549 | 525 | { |
| 550 | | if ( offset < 0x800 ) |
| 526 | if (offset < 0x800) |
| 551 | 527 | { |
| 552 | 528 | m_svi.svi806_ram->u8(offset) = data; |
| 553 | 529 | } |
| 554 | 530 | } |
| 555 | 531 | else |
| 556 | 532 | { |
| 557 | | if ( m_svi.bankHigh2_read_only ) |
| 533 | if (m_svi.bankHigh2_read_only) |
| 558 | 534 | return; |
| 559 | 535 | |
| 560 | | m_svi.bankHigh2_ptr[ 0x3000 + offset] = data; |
| 536 | m_svi.bankHigh2_ptr[0x3000 + offset] = data; |
| 561 | 537 | } |
| 562 | 538 | } |
| 563 | 539 | |
| r32256 | r32257 | |
| 650 | 626 | m_svi.bankHigh1_ptr = m_cart_rom->base(); |
| 651 | 627 | } |
| 652 | 628 | |
| 653 | | membank("bank1")->set_base(m_svi.bankLow_ptr ); |
| 654 | | membank("bank2")->set_base(m_svi.bankHigh1_ptr ); |
| 655 | | membank("bank3")->set_base(m_svi.bankHigh2_ptr ); |
| 629 | membank("bank1")->set_base(m_svi.bankLow_ptr); |
| 630 | membank("bank2")->set_base(m_svi.bankHigh1_ptr); |
| 631 | membank("bank3")->set_base(m_svi.bankHigh2_ptr); |
| 656 | 632 | |
| 657 | 633 | /* SVI-806 80 column card specific banking */ |
| 658 | | if ( m_svi.svi806_present ) |
| 634 | if (m_svi.svi806_present) |
| 659 | 635 | { |
| 660 | | if ( m_svi.svi806_ram_enabled ) |
| 636 | if (m_svi.svi806_ram_enabled) |
| 661 | 637 | { |
| 662 | | membank("bank4")->set_base(m_svi.svi806_ram ); |
| 638 | membank("bank4")->set_base(m_svi.svi806_ram); |
| 663 | 639 | } |
| 664 | 640 | else |
| 665 | 641 | { |
| 666 | | membank("bank4")->set_base(m_svi.bankHigh2_ptr + 0x3000 ); |
| 642 | membank("bank4")->set_base(m_svi.bankHigh2_ptr + 0x3000); |
| 667 | 643 | } |
| 668 | 644 | } |
| 669 | 645 | } |
| r32256 | r32257 | |
| 675 | 651 | m_centronics_busy = state; |
| 676 | 652 | } |
| 677 | 653 | |
| 678 | | READ8_MEMBER(svi318_state::svi318_io_ext_r) |
| 654 | READ8_MEMBER(svi318_state::io_ext_r) |
| 679 | 655 | { |
| 680 | | UINT8 data = 0xff; |
| 681 | | device_t *device; |
| 682 | | |
| 683 | 656 | if (m_svi.bankLow == SVI_CART) |
| 684 | | { |
| 685 | 657 | return 0xff; |
| 686 | | } |
| 687 | 658 | |
| 688 | | fd1793_device *fdc = machine().device<fd1793_device>("wd179x"); |
| 689 | | |
| 690 | | switch( offset ) |
| 659 | switch (offset) |
| 691 | 660 | { |
| 692 | 661 | case 0x12: |
| 693 | | data = 0xfe | m_centronics_busy; |
| 694 | | break; |
| 662 | return 0xfe | m_centronics_busy; |
| 695 | 663 | |
| 696 | 664 | case 0x20: |
| 697 | 665 | case 0x21: |
| r32256 | r32257 | |
| 701 | 669 | case 0x25: |
| 702 | 670 | case 0x26: |
| 703 | 671 | case 0x27: |
| 704 | | data = m_ins8250_0->ins8250_r(space, offset & 7); |
| 705 | | break; |
| 672 | return m_ins8250_0->ins8250_r(space, offset & 7); |
| 706 | 673 | |
| 707 | 674 | case 0x28: |
| 708 | 675 | case 0x29: |
| 709 | | case 0x2A: |
| 710 | | case 0x2B: |
| 711 | | case 0x2C: |
| 712 | | case 0x2D: |
| 713 | | case 0x2E: |
| 714 | | case 0x2F: |
| 715 | | data = m_ins8250_1->ins8250_r(space, offset & 7); |
| 716 | | break; |
| 676 | case 0x2a: |
| 677 | case 0x2b: |
| 678 | case 0x2c: |
| 679 | case 0x2d: |
| 680 | case 0x2e: |
| 681 | case 0x2f: |
| 682 | return m_ins8250_1->ins8250_r(space, offset & 7); |
| 717 | 683 | |
| 718 | 684 | case 0x30: |
| 719 | | data = fdc->status_r(space, 0); |
| 720 | | break; |
| 685 | return m_fd1793->status_r(space, 0); |
| 686 | |
| 721 | 687 | case 0x31: |
| 722 | | data = fdc->track_r(space, 0); |
| 723 | | break; |
| 688 | return m_fd1793->track_r(space, 0); |
| 689 | |
| 724 | 690 | case 0x32: |
| 725 | | data = fdc->sector_r(space, 0); |
| 726 | | break; |
| 691 | return m_fd1793->sector_r(space, 0); |
| 692 | |
| 727 | 693 | case 0x33: |
| 728 | | data = fdc->data_r(space, 0); |
| 729 | | break; |
| 694 | return m_fd1793->data_r(space, 0); |
| 695 | |
| 730 | 696 | case 0x34: |
| 731 | | data = svi318_fdc_irqdrq_r(space, 0); |
| 732 | | break; |
| 697 | return fdc_irqdrq_r(space, 0); |
| 698 | |
| 733 | 699 | case 0x51: |
| 734 | | device = machine().device("crtc"); |
| 735 | | data = downcast<mc6845_device *>(device)->register_r( space, offset ); |
| 736 | | break; |
| 700 | return m_crtc->register_r(space, offset); |
| 737 | 701 | } |
| 738 | 702 | |
| 739 | | return data; |
| 703 | return 0xff; |
| 740 | 704 | } |
| 741 | 705 | |
| 742 | | WRITE8_MEMBER(svi318_state::svi318_io_ext_w) |
| 706 | WRITE8_MEMBER(svi318_state::io_ext_w) |
| 743 | 707 | { |
| 744 | | device_t *device; |
| 745 | | |
| 746 | 708 | if (m_svi.bankLow == SVI_CART) |
| 747 | | { |
| 748 | 709 | return; |
| 749 | | } |
| 750 | 710 | |
| 751 | | fd1793_device *fdc = machine().device<fd1793_device>("wd179x"); |
| 752 | | |
| 753 | | switch( offset ) |
| 711 | switch (offset) |
| 754 | 712 | { |
| 755 | 713 | case 0x10: |
| 756 | 714 | m_cent_data_out->write(space, 0, data); |
| r32256 | r32257 | |
| 783 | 741 | break; |
| 784 | 742 | |
| 785 | 743 | case 0x30: |
| 786 | | fdc->command_w(space, 0, data); |
| 744 | m_fd1793->command_w(space, 0, data); |
| 787 | 745 | break; |
| 788 | 746 | case 0x31: |
| 789 | | fdc->track_w(space, 0, data); |
| 747 | m_fd1793->track_w(space, 0, data); |
| 790 | 748 | break; |
| 791 | 749 | case 0x32: |
| 792 | | fdc->sector_w(space, 0, data); |
| 750 | m_fd1793->sector_w(space, 0, data); |
| 793 | 751 | break; |
| 794 | 752 | case 0x33: |
| 795 | | fdc->data_w(space, 0, data); |
| 753 | m_fd1793->data_w(space, 0, data); |
| 796 | 754 | break; |
| 797 | 755 | case 0x34: |
| 798 | | svi318_fdc_drive_motor_w(space, 0, data); |
| 756 | fdc_drive_motor_w(space, 0, data); |
| 799 | 757 | break; |
| 800 | 758 | case 0x38: |
| 801 | | svi318_fdc_density_side_w(space, 0, data); |
| 759 | fdc_density_side_w(space, 0, data); |
| 802 | 760 | break; |
| 803 | 761 | |
| 804 | 762 | case 0x50: |
| 805 | | device = machine().device("crtc"); |
| 806 | | downcast<mc6845_device *>(device)->address_w(space, offset, data); |
| 763 | m_crtc->address_w(space, offset, data); |
| 807 | 764 | break; |
| 808 | 765 | case 0x51: |
| 809 | | device = machine().device("crtc"); |
| 810 | | downcast<mc6845_device *>(device)->register_w(space, offset, data); |
| 766 | m_crtc->register_w(space, offset, data); |
| 811 | 767 | break; |
| 812 | 768 | |
| 813 | 769 | case 0x58: |
trunk/src/mess/drivers/svi318.c
| r32256 | r32257 | |
| 17 | 17 | #include "rendlay.h" |
| 18 | 18 | |
| 19 | 19 | static ADDRESS_MAP_START( svi318_mem, AS_PROGRAM, 8, svi318_state ) |
| 20 | | AM_RANGE( 0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(svi318_writemem1 ) |
| 21 | | AM_RANGE( 0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(svi318_writemem2 ) |
| 22 | | AM_RANGE( 0xc000, 0xffff) AM_READ_BANK("bank3") AM_WRITE(svi318_writemem3 ) |
| 20 | AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1) |
| 21 | AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2) |
| 22 | AM_RANGE(0xc000, 0xffff) AM_READ_BANK("bank3") AM_WRITE(writemem3) |
| 23 | 23 | ADDRESS_MAP_END |
| 24 | 24 | |
| 25 | 25 | static ADDRESS_MAP_START( svi328_806_mem, AS_PROGRAM, 8, svi318_state ) |
| 26 | | AM_RANGE( 0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(svi318_writemem1 ) |
| 27 | | AM_RANGE( 0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(svi318_writemem2 ) |
| 28 | | AM_RANGE( 0xc000, 0xefff) AM_READ_BANK("bank3") AM_WRITE(svi318_writemem3 ) |
| 29 | | AM_RANGE( 0xf000, 0xffff) AM_READ_BANK("bank4") AM_WRITE(svi318_writemem4 ) |
| 26 | AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1) |
| 27 | AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2) |
| 28 | AM_RANGE(0xc000, 0xefff) AM_READ_BANK("bank3") AM_WRITE(writemem3) |
| 29 | AM_RANGE(0xf000, 0xffff) AM_READ_BANK("bank4") AM_WRITE(writemem4) |
| 30 | 30 | ADDRESS_MAP_END |
| 31 | 31 | |
| 32 | 32 | static ADDRESS_MAP_START( svi318_io, AS_IO, 8, svi318_state ) |
| 33 | 33 | ADDRESS_MAP_UNMAP_HIGH |
| 34 | 34 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 35 | | AM_RANGE( 0x00, 0x38) AM_READWRITE(svi318_io_ext_r, svi318_io_ext_w ) |
| 36 | | AM_RANGE( 0x80, 0x80) AM_DEVWRITE( "tms9928a", tms9928a_device, vram_write ) |
| 37 | | AM_RANGE( 0x81, 0x81) AM_DEVWRITE( "tms9928a", tms9928a_device, register_write ) |
| 38 | | AM_RANGE( 0x84, 0x84) AM_DEVREAD( "tms9928a", tms9928a_device, vram_read ) |
| 39 | | AM_RANGE( 0x85, 0x85) AM_DEVREAD( "tms9928a", tms9928a_device, register_read ) |
| 40 | | AM_RANGE( 0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w ) |
| 41 | | AM_RANGE( 0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w ) |
| 42 | | AM_RANGE( 0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r ) |
| 43 | | AM_RANGE( 0x96, 0x97) AM_WRITE(svi318_ppi_w) |
| 44 | | AM_RANGE( 0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read) |
| 35 | AM_RANGE(0x00, 0x38) AM_READWRITE(io_ext_r, io_ext_w ) |
| 36 | AM_RANGE(0x80, 0x80) AM_DEVWRITE("tms9928a", tms9928a_device, vram_write) |
| 37 | AM_RANGE(0x81, 0x81) AM_DEVWRITE("tms9928a", tms9928a_device, register_write) |
| 38 | AM_RANGE(0x84, 0x84) AM_DEVREAD("tms9928a", tms9928a_device, vram_read) |
| 39 | AM_RANGE(0x85, 0x85) AM_DEVREAD("tms9928a", tms9928a_device, register_read) |
| 40 | AM_RANGE(0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w) |
| 41 | AM_RANGE(0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w) |
| 42 | AM_RANGE(0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r) |
| 43 | AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w) |
| 44 | AM_RANGE(0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read) |
| 45 | 45 | ADDRESS_MAP_END |
| 46 | 46 | |
| 47 | 47 | static ADDRESS_MAP_START( svi328_806_io, AS_IO, 8, svi318_state ) |
| 48 | 48 | ADDRESS_MAP_UNMAP_HIGH |
| 49 | 49 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 50 | | AM_RANGE( 0x00, 0x58) AM_READWRITE(svi318_io_ext_r, svi318_io_ext_w ) |
| 51 | | AM_RANGE( 0x80, 0x80) AM_DEVWRITE( "tms9928a", tms9928a_device, vram_write ) |
| 52 | | AM_RANGE( 0x81, 0x81) AM_DEVWRITE( "tms9928a", tms9928a_device, register_write ) |
| 53 | | AM_RANGE( 0x84, 0x84) AM_DEVREAD( "tms9928a", tms9928a_device, vram_read ) |
| 54 | | AM_RANGE( 0x85, 0x85) AM_DEVREAD( "tms9928a", tms9928a_device, register_read ) |
| 55 | | AM_RANGE( 0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w ) |
| 56 | | AM_RANGE( 0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w ) |
| 57 | | AM_RANGE( 0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r ) |
| 58 | | AM_RANGE( 0x96, 0x97) AM_WRITE(svi318_ppi_w) |
| 59 | | AM_RANGE( 0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read) |
| 50 | AM_RANGE(0x00, 0x58) AM_READWRITE(io_ext_r, io_ext_w ) |
| 51 | AM_RANGE(0x80, 0x80) AM_DEVWRITE("tms9928a", tms9928a_device, vram_write) |
| 52 | AM_RANGE(0x81, 0x81) AM_DEVWRITE("tms9928a", tms9928a_device, register_write) |
| 53 | AM_RANGE(0x84, 0x84) AM_DEVREAD("tms9928a", tms9928a_device, vram_read) |
| 54 | AM_RANGE(0x85, 0x85) AM_DEVREAD("tms9928a", tms9928a_device, register_read) |
| 55 | AM_RANGE(0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w) |
| 56 | AM_RANGE(0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w) |
| 57 | AM_RANGE(0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r) |
| 58 | AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w) |
| 59 | AM_RANGE(0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read) |
| 60 | 60 | ADDRESS_MAP_END |
| 61 | 61 | |
| 62 | 62 | /* |
| r32256 | r32257 | |
| 101 | 101 | */ |
| 102 | 102 | |
| 103 | 103 | static INPUT_PORTS_START( svi318 ) |
| 104 | | PORT_START("LINE0") |
| 104 | PORT_START("LINE.0") |
| 105 | 105 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') |
| 106 | 106 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 107 | 107 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') |
| r32256 | r32257 | |
| 111 | 111 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') |
| 112 | 112 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') |
| 113 | 113 | |
| 114 | | PORT_START("LINE1") |
| 114 | PORT_START("LINE.1") |
| 115 | 115 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') |
| 116 | 116 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') |
| 117 | 117 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(':') PORT_CHAR(';') |
| r32256 | r32257 | |
| 121 | 121 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') |
| 122 | 122 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') |
| 123 | 123 | |
| 124 | | PORT_START("LINE2") |
| 124 | PORT_START("LINE.2") |
| 125 | 125 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') |
| 126 | 126 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') |
| 127 | 127 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') |
| r32256 | r32257 | |
| 131 | 131 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') |
| 132 | 132 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') |
| 133 | 133 | |
| 134 | | PORT_START("LINE3") |
| 134 | PORT_START("LINE.3") |
| 135 | 135 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') |
| 136 | 136 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') |
| 137 | 137 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('0') PORT_CHAR('J') |
| r32256 | r32257 | |
| 141 | 141 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') |
| 142 | 142 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') |
| 143 | 143 | |
| 144 | | PORT_START("LINE4") |
| 144 | PORT_START("LINE.4") |
| 145 | 145 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') |
| 146 | 146 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') |
| 147 | 147 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') |
| r32256 | r32257 | |
| 151 | 151 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') |
| 152 | 152 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') |
| 153 | 153 | |
| 154 | | PORT_START("LINE5") |
| 154 | PORT_START("LINE.5") |
| 155 | 155 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') |
| 156 | 156 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') |
| 157 | 157 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') |
| r32256 | r32257 | |
| 161 | 161 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) |
| 162 | 162 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) |
| 163 | 163 | |
| 164 | | PORT_START("LINE6") |
| 164 | PORT_START("LINE.6") |
| 165 | 165 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) |
| 166 | 166 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) |
| 167 | 167 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Left Grph") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(PGUP)) |
| r32256 | r32257 | |
| 171 | 171 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) |
| 172 | 172 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) |
| 173 | 173 | |
| 174 | | PORT_START("LINE7") |
| 174 | PORT_START("LINE.7") |
| 175 | 175 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F1 F6") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_CHAR(UCHAR_MAMEKEY(F6)) |
| 176 | 176 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F2 F7") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_CHAR(UCHAR_MAMEKEY(F7)) |
| 177 | 177 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F3 F8") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_CHAR(UCHAR_MAMEKEY(F8)) |
| r32256 | r32257 | |
| 181 | 181 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ins Paste") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) |
| 182 | 182 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) |
| 183 | 183 | |
| 184 | | PORT_START("LINE8") |
| 184 | PORT_START("LINE.8") |
| 185 | 185 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') |
| 186 | 186 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') |
| 187 | 187 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del Cut") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL)) |
| r32256 | r32257 | |
| 191 | 191 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_UNUSED) |
| 192 | 192 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) |
| 193 | 193 | |
| 194 | | PORT_START("LINE9") |
| 194 | PORT_START("LINE.9") |
| 195 | 195 | PORT_BIT (0xff, IP_ACTIVE_LOW, IPT_UNUSED) |
| 196 | 196 | |
| 197 | | PORT_START("LINE10") |
| 197 | PORT_START("LINE.10") |
| 198 | 198 | PORT_BIT (0xff, IP_ACTIVE_LOW, IPT_UNUSED) |
| 199 | 199 | |
| 200 | 200 | PORT_START("JOYSTICKS") |
| r32256 | r32257 | |
| 217 | 217 | |
| 218 | 218 | PORT_INCLUDE( svi318 ) |
| 219 | 219 | |
| 220 | | PORT_MODIFY("LINE9") |
| 220 | PORT_MODIFY("LINE.9") |
| 221 | 221 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) |
| 222 | 222 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) |
| 223 | 223 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) |
| r32256 | r32257 | |
| 227 | 227 | PORT_BIT (0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) |
| 228 | 228 | PORT_BIT (0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) |
| 229 | 229 | |
| 230 | | PORT_MODIFY("LINE10") |
| 230 | PORT_MODIFY("LINE.10") |
| 231 | 231 | PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) |
| 232 | 232 | PORT_BIT (0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) |
| 233 | 233 | PORT_BIT (0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) |
| r32256 | r32257 | |
| 261 | 261 | |
| 262 | 262 | static MACHINE_CONFIG_START( svi318, svi318_state ) |
| 263 | 263 | /* Basic machine hardware */ |
| 264 | | MCFG_CPU_ADD( "maincpu", Z80, 3579545 ) /* 3.579545 MHz */ |
| 265 | | MCFG_CPU_PROGRAM_MAP( svi318_mem) |
| 266 | | MCFG_CPU_IO_MAP( svi318_io) |
| 264 | MCFG_CPU_ADD("maincpu", Z80, 3579545) /* 3.579545 MHz */ |
| 265 | MCFG_CPU_PROGRAM_MAP(svi318_mem) |
| 266 | MCFG_CPU_IO_MAP(svi318_io) |
| 267 | 267 | MCFG_QUANTUM_TIME(attotime::from_hz(60)) |
| 268 | 268 | |
| 269 | | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_pal ) |
| 270 | | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi318 ) |
| 269 | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_pal) |
| 270 | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi318) |
| 271 | 271 | |
| 272 | 272 | MCFG_DEVICE_ADD("ppi8255", I8255, 0) |
| 273 | | MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, svi318_ppi_port_a_r)) |
| 274 | | MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, svi318_ppi_port_b_r)) |
| 275 | | MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, svi318_ppi_port_c_w)) |
| 273 | MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r)) |
| 274 | MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r)) |
| 275 | MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w)) |
| 276 | 276 | |
| 277 | | MCFG_DEVICE_ADD( "ins8250_0", INS8250, 1000000 ) |
| 278 | | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, svi318_ins8250_interrupt)) |
| 279 | | MCFG_DEVICE_ADD( "ins8250_1", INS8250, 3072000 ) |
| 280 | | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, svi318_ins8250_interrupt)) |
| 277 | MCFG_DEVICE_ADD("ins8250_0", INS8250, 1000000) |
| 278 | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt)) |
| 279 | MCFG_DEVICE_ADD("ins8250_1", INS8250, 3072000) |
| 280 | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt)) |
| 281 | 281 | |
| 282 | 282 | /* Video hardware */ |
| 283 | | MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 ) |
| 283 | MCFG_DEVICE_ADD("tms9928a", TMS9929A, XTAL_10_738635MHz / 2) |
| 284 | 284 | MCFG_TMS9928A_VRAM_SIZE(0x4000) |
| 285 | 285 | MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt)) |
| 286 | | MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" ) |
| 287 | | MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9929a_device, screen_update ) |
| 286 | MCFG_TMS9928A_SCREEN_ADD_PAL("screen") |
| 287 | MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update) |
| 288 | 288 | |
| 289 | 289 | /* Sound hardware */ |
| 290 | 290 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| r32256 | r32257 | |
| 293 | 293 | MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") |
| 294 | 294 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 295 | 295 | MCFG_SOUND_ADD("ay8910", AY8910, 1789773) |
| 296 | | MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, svi318_psg_port_a_r)) |
| 297 | | MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, svi318_psg_port_b_w)) |
| 296 | MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r)) |
| 297 | MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w)) |
| 298 | 298 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) |
| 299 | 299 | |
| 300 | 300 | /* printer */ |
| r32256 | r32257 | |
| 303 | 303 | |
| 304 | 304 | MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") |
| 305 | 305 | |
| 306 | | MCFG_CASSETTE_ADD( "cassette" ) |
| 306 | MCFG_CASSETTE_ADD("cassette") |
| 307 | 307 | MCFG_CASSETTE_FORMATS(svi_cassette_formats) |
| 308 | 308 | MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY) |
| 309 | 309 | MCFG_CASSETTE_INTERFACE("svi318_cass") |
| 310 | 310 | |
| 311 | 311 | MCFG_DEVICE_ADD("wd179x", FD1793, 0) |
| 312 | 312 | MCFG_WD17XX_DEFAULT_DRIVE2_TAGS |
| 313 | | MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(svi318_state,svi_fdc_intrq_w)) |
| 314 | | MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(svi318_state,svi_fdc_drq_w)) |
| 313 | MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w)) |
| 314 | MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w)) |
| 315 | 315 | |
| 316 | 316 | MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(svi318_floppy_interface) |
| 317 | 317 | |
| 318 | 318 | /* Software lists */ |
| 319 | | MCFG_SOFTWARE_LIST_ADD("cass_list","svi318_flop") |
| 320 | | MCFG_SOFTWARE_LIST_ADD("disk_list","svi318_cass") |
| 319 | MCFG_SOFTWARE_LIST_ADD("cass_list", "svi318_flop") |
| 320 | MCFG_SOFTWARE_LIST_ADD("disk_list", "svi318_cass") |
| 321 | 321 | |
| 322 | | MCFG_FRAGMENT_ADD( svi318_cartslot ) |
| 322 | MCFG_FRAGMENT_ADD(svi318_cartslot) |
| 323 | 323 | |
| 324 | 324 | /* internal ram */ |
| 325 | 325 | MCFG_RAM_ADD(RAM_TAG) |
| r32256 | r32257 | |
| 331 | 331 | |
| 332 | 332 | MCFG_DEVICE_REMOVE("tms9928a") |
| 333 | 333 | MCFG_DEVICE_REMOVE("screen") |
| 334 | | MCFG_DEVICE_ADD( "tms9928a", TMS9928A, XTAL_10_738635MHz / 2 ) |
| 334 | MCFG_DEVICE_ADD("tms9928a", TMS9928A, XTAL_10_738635MHz / 2) |
| 335 | 335 | MCFG_TMS9928A_VRAM_SIZE(0x4000) |
| 336 | 336 | MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt)) |
| 337 | | MCFG_TMS9928A_SCREEN_ADD_NTSC( "screen" ) |
| 338 | | MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9928a_device, screen_update ) |
| 337 | MCFG_TMS9928A_SCREEN_ADD_NTSC("screen") |
| 338 | MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update) |
| 339 | 339 | |
| 340 | | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_ntsc ) |
| 341 | | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi318 ) |
| 340 | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_ntsc) |
| 341 | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi318) |
| 342 | 342 | MACHINE_CONFIG_END |
| 343 | 343 | |
| 344 | 344 | static MACHINE_CONFIG_DERIVED( svi328, svi318 ) |
| r32256 | r32257 | |
| 378 | 378 | |
| 379 | 379 | static MACHINE_CONFIG_START( svi328_806, svi318_state ) |
| 380 | 380 | /* Basic machine hardware */ |
| 381 | | MCFG_CPU_ADD( "maincpu", Z80, 3579545 ) /* 3.579545 MHz */ |
| 382 | | MCFG_CPU_PROGRAM_MAP( svi328_806_mem) |
| 383 | | MCFG_CPU_IO_MAP( svi328_806_io) |
| 381 | MCFG_CPU_ADD("maincpu", Z80, 3579545) /* 3.579545 MHz */ |
| 382 | MCFG_CPU_PROGRAM_MAP(svi328_806_mem) |
| 383 | MCFG_CPU_IO_MAP(svi328_806_io) |
| 384 | 384 | MCFG_QUANTUM_TIME(attotime::from_hz(60)) |
| 385 | 385 | |
| 386 | | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_pal ) |
| 387 | | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi328_806 ) |
| 386 | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_pal) |
| 387 | MCFG_MACHINE_RESET_OVERRIDE(svi318_state, svi328_806) |
| 388 | 388 | |
| 389 | 389 | MCFG_DEVICE_ADD("ppi8255", I8255, 0) |
| 390 | | MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, svi318_ppi_port_a_r)) |
| 391 | | MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, svi318_ppi_port_b_r)) |
| 392 | | MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, svi318_ppi_port_c_w)) |
| 390 | MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r)) |
| 391 | MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r)) |
| 392 | MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w)) |
| 393 | 393 | |
| 394 | | MCFG_DEVICE_ADD( "ins8250_0", INS8250, 1000000 ) |
| 395 | | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, svi318_ins8250_interrupt)) |
| 396 | | MCFG_DEVICE_ADD( "ins8250_1", INS8250, 3072000 ) |
| 397 | | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, svi318_ins8250_interrupt)) |
| 394 | MCFG_DEVICE_ADD("ins8250_0", INS8250, 1000000) |
| 395 | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt)) |
| 396 | MCFG_DEVICE_ADD("ins8250_1", INS8250, 3072000) |
| 397 | MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt)) |
| 398 | 398 | |
| 399 | 399 | /* Video hardware */ |
| 400 | | MCFG_DEFAULT_LAYOUT( layout_dualhsxs ) |
| 400 | MCFG_DEFAULT_LAYOUT(layout_dualhsxs) |
| 401 | 401 | |
| 402 | | MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 ) |
| 402 | MCFG_DEVICE_ADD("tms9928a", TMS9929A, XTAL_10_738635MHz / 2) |
| 403 | 403 | MCFG_TMS9928A_VRAM_SIZE(0x4000) |
| 404 | 404 | MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt)) |
| 405 | | MCFG_TMS9928A_SET_SCREEN( "screen" ) |
| 406 | | MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" ) |
| 407 | | MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9929a_device, screen_update ) |
| 405 | MCFG_TMS9928A_SET_SCREEN("screen") |
| 406 | MCFG_TMS9928A_SCREEN_ADD_PAL("screen") |
| 407 | MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update) |
| 408 | 408 | MCFG_PALETTE_ADD("palette", TMS9928A_PALETTE_SIZE + 2) /* 2 additional entries for monochrome svi806 output */ |
| 409 | 409 | |
| 410 | 410 | MCFG_SCREEN_ADD("svi806", RASTER) |
| r32256 | r32257 | |
| 421 | 421 | MCFG_MC6845_CHAR_WIDTH(8) /* ? */ |
| 422 | 422 | MCFG_MC6845_UPDATE_ROW_CB(svi318_state, crtc_update_row) |
| 423 | 423 | |
| 424 | | MCFG_VIDEO_START_OVERRIDE(svi318_state, svi328_806 ) |
| 424 | MCFG_VIDEO_START_OVERRIDE(svi318_state, svi328_806) |
| 425 | 425 | |
| 426 | 426 | /* Sound hardware */ |
| 427 | 427 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| r32256 | r32257 | |
| 430 | 430 | MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") |
| 431 | 431 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 432 | 432 | MCFG_SOUND_ADD("ay8910", AY8910, 1789773) |
| 433 | | MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, svi318_psg_port_a_r)) |
| 434 | | MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, svi318_psg_port_b_w)) |
| 433 | MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r)) |
| 434 | MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w)) |
| 435 | 435 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) |
| 436 | 436 | |
| 437 | 437 | /* printer */ |
| r32256 | r32257 | |
| 440 | 440 | |
| 441 | 441 | MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") |
| 442 | 442 | |
| 443 | | MCFG_CASSETTE_ADD( "cassette" ) |
| 443 | MCFG_CASSETTE_ADD("cassette") |
| 444 | 444 | MCFG_CASSETTE_FORMATS(svi_cassette_formats) |
| 445 | 445 | MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY) |
| 446 | 446 | MCFG_CASSETTE_INTERFACE("svi318_cass") |
| 447 | 447 | |
| 448 | 448 | MCFG_DEVICE_ADD("wd179x", FD1793, 0) |
| 449 | 449 | MCFG_WD17XX_DEFAULT_DRIVE2_TAGS |
| 450 | | MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(svi318_state,svi_fdc_intrq_w)) |
| 451 | | MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(svi318_state,svi_fdc_drq_w)) |
| 450 | MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w)) |
| 451 | MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w)) |
| 452 | 452 | |
| 453 | 453 | MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(svi318_floppy_interface) |
| 454 | 454 | |
| 455 | | MCFG_FRAGMENT_ADD( svi318_cartslot ) |
| 455 | MCFG_FRAGMENT_ADD(svi318_cartslot) |
| 456 | 456 | |
| 457 | 457 | /* internal ram */ |
| 458 | 458 | MCFG_RAM_ADD(RAM_TAG) |
| r32256 | r32257 | |
| 462 | 462 | |
| 463 | 463 | static MACHINE_CONFIG_DERIVED( svi328n_806, svi328_806 ) |
| 464 | 464 | |
| 465 | | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_ntsc ) |
| 465 | MCFG_MACHINE_START_OVERRIDE(svi318_state, svi318_ntsc) |
| 466 | 466 | |
| 467 | 467 | MCFG_SCREEN_MODIFY("screen") |
| 468 | 468 | MCFG_SCREEN_REFRESH_RATE(60) |