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r32178 Thursday 18th September, 2014 at 14:40:30 UTC by David Haywood
(nw)
[src/mame/drivers]r2dx_v33.c

trunk/src/mame/drivers/r2dx_v33.c
r32177r32178
5151   DECLARE_DRIVER_INIT(nzerotea);
5252   DECLARE_DRIVER_INIT(zerotm2k);
5353
54   DECLARE_MACHINE_RESET(r2dx_v33);
55   DECLARE_MACHINE_RESET(nzeroteam);
5456
5557   UINT32 screen_update_rdx_v33(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
5658   INTERRUPT_GEN_MEMBER(rdx_v33_interrupt);
r32177r32178
6668      m_eeprom->di_write((data & 0x20) >> 5);
6769      m_eeprom->cs_write((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
6870
69      if (data&0xc7) printf("eeprom_w extra bits used %04x\n",data);
71      // 0x40 - coin counter 1?
72      // 0x80 - coin counter 2?
73
74      // 0x04 is active in Raiden DX mode, it could be part of the rom bank (which half of the rom to use) or the FG tile bank (or both?)
75
76      if (data&0x07) printf("eeprom_w extra bits used %04x\n",data & 7);
7077   }
7178   else
7279   {
r32177r32178
153160static ADDRESS_MAP_START( rdx_v33_map, AS_PROGRAM, 16, r2dx_v33_state )
154161   AM_RANGE(0x00000, 0x003ff) AM_RAM // vectors copied here
155162
156   AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
157   AM_RANGE(0x00420, 0x00429) AM_WRITE(mcu_table2_w)
163//   AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
164//   AM_RANGE(0x00420, 0x00429) AM_WRITE(mcu_table2_w)
158165
159166   /* results from cop? */
160167   AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
r32177r32178
461468INPUT_PORTS_END
462469
463470
471MACHINE_RESET_MEMBER(r2dx_v33_state,r2dx_v33)
472{
473   common_reset();
474}
475
476MACHINE_RESET_MEMBER(r2dx_v33_state,nzeroteam)
477{
478   common_reset();
479
480   bg_bank = 0;
481   fg_bank = 2;
482   mid_bank = 1;
483}
484
485
464486static MACHINE_CONFIG_START( rdx_v33, r2dx_v33_state )
465487
466488   /* basic machine hardware */
r32177r32178
468490   MCFG_CPU_PROGRAM_MAP(rdx_v33_map)
469491   MCFG_CPU_VBLANK_INT_DRIVER("screen", r2dx_v33_state,  rdx_v33_interrupt)
470492
471   //MCFG_MACHINE_RESET_OVERRIDE(r2dx_v33_state,rdx_v33)
493   MCFG_MACHINE_RESET_OVERRIDE(r2dx_v33_state,r2dx_v33)
472494
473495   MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
474496
r32177r32178
504526   MCFG_CPU_PROGRAM_MAP(nzerotea_map)
505527   MCFG_CPU_VBLANK_INT_DRIVER("screen", r2dx_v33_state,  rdx_v33_interrupt)
506528
529   MCFG_MACHINE_RESET_OVERRIDE(r2dx_v33_state,nzeroteam)
530
531
507532   //  SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
508533   SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
509534
r32177r32178
746771   ROM_LOAD( "szy-01.u099", 0x00000, 0x40000,  CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) /* PCB silkscreened PCM, Same as other Zero Team sets */
747772ROM_END
748773
749// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, is it switchable?
750GAME( 1996, r2dx_v33, 0,          rdx_v33,  rdx_v33, r2dx_v33_state,  rdx_v33,   ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING|GAME_NO_SOUND)
774// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, the rom contains both
775GAME( 1996, r2dx_v33, 0,          rdx_v33,  rdx_v33, r2dx_v33_state,  rdx_v33,   ROT270, "Seibu Kaihatsu", "Raiden II New / Raiden DX (newer V33 PCB)", GAME_NOT_WORKING|GAME_NO_SOUND)
751776
752777// 'V33 system type_b' - uses V33 CPU, COPX-D3 external protection rom, but still has the proper sound system
753778GAME( 1997, nzeroteam, zeroteam,  nzerotea, nzerotea, r2dx_v33_state, nzerotea,  ROT0,   "Seibu Kaihatsu", "New Zero Team", GAME_NOT_WORKING|GAME_NO_SOUND)

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