trunk/src/emu/bus/isa/trident.c
| r32127 | r32128 | |
|---|
| 44 | 44 | |
| 45 | 45 | m_vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vga_device::vblank_timer_cb),this)); |
| 46 | 46 | vga.svga_intf.seq_regcount = 0x0f; |
| 47 | | vga.svga_intf.crtc_regcount = 0x50; |
| 47 | vga.svga_intf.crtc_regcount = 0x60; |
| 48 | 48 | memset(&tri, 0, sizeof(tri)); |
| 49 | 49 | } |
| 50 | 50 | |
| r32127 | r32128 | |
|---|
| 52 | 52 | { |
| 53 | 53 | svga_device::device_reset(); |
| 54 | 54 | svga.id = 0xd3; // identifies at TGUI9660XGi |
| 55 | | tri.revision = 0x05; // revision identifies as TGUI9680 |
| 55 | tri.revision = 0x01; // revision identifies as TGUI9680 |
| 56 | 56 | tri.new_mode = false; // start up in old mode |
| 57 | 57 | tri.dac_active = false; |
| 58 | 58 | tri.linear_active = false; |
| r32127 | r32128 | |
|---|
| 201 | 201 | if(tri.new_mode) |
| 202 | 202 | { |
| 203 | 203 | tri.sr0e_new = data ^ 0x02; |
| 204 | | svga.bank_w = (data & 0x1f) ^ 0x02; // bit 1 is inverted, used for card detection, it is not XORed on reading |
| 204 | svga.bank_w = (data & 0x3f) ^ 0x02; // bit 1 is inverted, used for card detection, it is not XORed on reading |
| 205 | 205 | if(!(tri.gc0f & 0x01)) |
| 206 | | svga.bank_r = (data & 0x1f) ^ 0x02; |
| 206 | svga.bank_r = (data & 0x3f) ^ 0x02; |
| 207 | 207 | // TODO: handle planar modes, where bits 0 and 2 only are used |
| 208 | 208 | } |
| 209 | 209 | else |
| r32127 | r32128 | |
|---|
| 281 | 281 | break; |
| 282 | 282 | case 0x1f: |
| 283 | 283 | tri.cr1f = data; // "Software Programming Register" written to by software (BIOS?) |
| 284 | debugger_break(machine()); |
| 284 | 285 | break; |
| 285 | 286 | case 0x21: // Linear aperture |
| 286 | 287 | tri.cr21 = data; |
| r32127 | r32128 | |
|---|
| 458 | 459 | break; |
| 459 | 460 | case 8: |
| 460 | 461 | if(tri.gc0f & 0x04) // if enabled |
| 461 | | res = svga.bank_w & 0x1f; |
| 462 | res = svga.bank_w & 0x3f; |
| 462 | 463 | else |
| 463 | 464 | res = 0xff; |
| 464 | 465 | break; |
| 465 | 466 | case 9: |
| 466 | 467 | if(tri.gc0f & 0x04) // if enabled |
| 467 | 468 | if(tri.gc0f & 0x01) // and if bank regs are separated |
| 468 | | res = svga.bank_r & 0x1f; |
| 469 | res = svga.bank_r & 0x3f; |
| 469 | 470 | else |
| 470 | 471 | res = 0xff; |
| 471 | 472 | else |
| r32127 | r32128 | |
|---|
| 493 | 494 | case 8: |
| 494 | 495 | if(tri.gc0f & 0x04) // if enabled |
| 495 | 496 | { |
| 496 | | svga.bank_w = data & 0x1f; |
| 497 | svga.bank_w = data & 0x3f; |
| 497 | 498 | if(!(tri.gc0f & 0x01)) // if bank regs are not separated |
| 498 | | svga.bank_r = data & 0x1f; // then this is also the read bank register |
| 499 | svga.bank_r = data & 0x3f; // then this is also the read bank register |
| 499 | 500 | } |
| 500 | 501 | break; |
| 501 | 502 | case 9: |
| 502 | 503 | if(tri.gc0f & 0x04) // if enabled |
| 503 | 504 | { |
| 504 | 505 | if(tri.gc0f & 0x01) // and if bank regs are separated |
| 505 | | svga.bank_r = data & 0x1f; |
| 506 | svga.bank_r = data & 0x3f; |
| 506 | 507 | } |
| 507 | 508 | break; |
| 508 | 509 | default: |