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r32122 Monday 15th September, 2014 at 20:55:32 UTC by David Haywood
add palette dma (RAM to private buffer) to all seibu cop games moved some of the Raiden 2 cop emulation to a new device (just the memory DMA stuff, including private buffer copy code) and started sharing it with legionna.c in order to avoid code duplication.  We can slowly move other duplicate code over too and eventually kill the old seicop.c

[src/emu/machine]	machine.mak seibu_cop.c seibu_cop.h
[src/mame]	mame.mak
[src/mame/drivers]	legionna.c raiden2.c
[src/mame/includes]	legionna.h raiden2.h
[src/mame/machine]	raiden2cop.c* raiden2cop.h* seicop.c seicop.h

trunk/src/emu/machine/seibu_cop.c

r32121	r32122
1		// license:MAME
2		// copyright-holders:Angelo Salese
3		/***************************************************************************
4
5		Seibu COP protection device
6
7		(this header needs expanding!)
8
9		***************************************************************************/
10
11		#include "emu.h"
12		#include "machine/seibu_cop.h"
13
14
15
16		//**************************************************************************
17		//  GLOBAL VARIABLES
18		//**************************************************************************
19
20		// device type definition
21		const device_type SEIBU_COP = &device_creator<seibu_cop_device>;
22
23
24		static ADDRESS_MAP_START( seibu_cop_io, AS_0, 16, seibu_cop_device )
25		AM_RANGE(0x0428, 0x0429) AM_WRITE(fill_val_lo_w)
26		AM_RANGE(0x042a, 0x042b) AM_WRITE(fill_val_hi_w)
27
28		AM_RANGE(0x045a, 0x045b) AM_WRITE(pal_brightness_val_w)
29		AM_RANGE(0x045c, 0x045d) AM_WRITE(pal_brightness_mode_w)
30
31		AM_RANGE(0x0474, 0x0475) AM_WRITE(dma_unk_param_w)
32		AM_RANGE(0x0476, 0x0477) AM_WRITE(dma_pal_fade_table_w)
33		AM_RANGE(0x0478, 0x0479) AM_WRITE(dma_src_w)
34		AM_RANGE(0x047a, 0x047b) AM_WRITE(dma_size_w)
35		AM_RANGE(0x047c, 0x047d) AM_WRITE(dma_dst_w)
36		AM_RANGE(0x047e, 0x047f) AM_READWRITE(dma_trigger_r, dma_trigger_w)
37		ADDRESS_MAP_END
38
39
40		//**************************************************************************
41		//  INLINE HELPERS
42		//**************************************************************************
43
44		//-------------------------------------------------
45		//  readbyte - read a byte at the given address
46		//-------------------------------------------------
47
48		inline UINT16 seibu_cop_device::read_word(offs_t address)
49		{
50		return space().read_word(address);
51		}
52
53		//-------------------------------------------------
54		//  writebyte - write a byte at the given address
55		//-------------------------------------------------
56
57		inline void seibu_cop_device::write_word(offs_t address, UINT16 data)
58		{
59		space().write_word(address, data);
60		}
61
62
63		//**************************************************************************
64		//  LIVE DEVICE
65		//**************************************************************************
66
67		//-------------------------------------------------
68		//  seibu_cop_device - constructor
69		//-------------------------------------------------
70
71		seibu_cop_device::seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72		: device_t(mconfig, SEIBU_COP, "seibu_cop", tag, owner, clock, "seibu_cop", __FILE__),
73		device_memory_interface(mconfig, *this),
74		m_in_byte_cb(*this),
75		m_in_word_cb(*this),
76		m_in_dword_cb(*this),
77		m_out_byte_cb(*this),
78		m_out_word_cb(*this),
79		m_out_dword_cb(*this),
80		m_space_config("io", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(seibu_cop_io))
81		{
82		}
83
84
85		//-------------------------------------------------
86		//  device_validity_check - perform validity checks
87		//  on this device
88		//-------------------------------------------------
89
90		void seibu_cop_device::device_validity_check(validity_checker &valid) const
91		{
92		}
93
94
95		//-------------------------------------------------
96		//  device_start - device-specific startup
97		//-------------------------------------------------
98
99		void seibu_cop_device::device_start()
100		{
101		// resolve callbacks
102		m_in_byte_cb.resolve_safe(0);
103		m_in_word_cb.resolve_safe(0);
104		m_in_dword_cb.resolve_safe(0);
105		m_out_byte_cb.resolve_safe();
106		m_out_word_cb.resolve_safe();
107		m_out_dword_cb.resolve_safe();
108		}
109
110
111		//-------------------------------------------------
112		//  device_reset - device-specific reset
113		//-------------------------------------------------
114
115		void seibu_cop_device::device_reset()
116		{
117		}
118
119		//-------------------------------------------------
120		//  memory_space_config - return a description of
121		//  any address spaces owned by this device
122		//-------------------------------------------------
123
124		const address_space_config *seibu_cop_device::memory_space_config(address_spacenum spacenum) const
125		{
126		return (spacenum == AS_0) ? &m_space_config : NULL;
127		}
128
129		//**************************************************************************
130		//  READ/WRITE HANDLERS
131		//**************************************************************************
132
133		WRITE16_MEMBER(seibu_cop_device::fill_val_lo_w)
134		{
135		COMBINE_DATA(&m_fill_val_lo);
136		m_fill_val = (m_fill_val_lo) | (m_fill_val_hi << 16);
137		}
138
139		WRITE16_MEMBER(seibu_cop_device::fill_val_hi_w)
140		{
141		COMBINE_DATA(&m_fill_val_hi);
142		m_fill_val = (m_fill_val_lo) | (m_fill_val_hi << 16);
143		}
144
145		WRITE16_MEMBER(seibu_cop_device::pal_brightness_val_w)
146		{
147		COMBINE_DATA(&m_pal_brightness_val);
148
149		/* TODO: add checks for bits 15-6 */
150		}
151
152		WRITE16_MEMBER(seibu_cop_device::pal_brightness_mode_w)
153		{
154		COMBINE_DATA(&m_pal_brightness_mode);
155
156		/* TODO: add checks for anything that isn't 4 or 5 */
157		}
158
159		WRITE16_MEMBER(seibu_cop_device::dma_unk_param_w)
160		{
161		/*
162		This sets up a DMA mode of some sort
163		0x0e00: grainbow, cupsoc
164		0x0a00: legionna, godzilla, denjinmk
165		0x0600: heatbrl
166		0x1e00: zeroteam, xsedae
167		raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
168		(both only uses 0x14 and 0x15 as DMAs afaik)
169		*/
170		COMBINE_DATA(&m_dma_unk_param);
171		}
172
173		WRITE16_MEMBER(seibu_cop_device::dma_pal_fade_table_w)
174		{
175		COMBINE_DATA(&m_dma_pal_fade_table);
176		}
177
178		WRITE16_MEMBER(seibu_cop_device::dma_src_w)
179		{
180		COMBINE_DATA(&m_dma_src[m_dma_trigger]);
181		}
182
183		WRITE16_MEMBER(seibu_cop_device::dma_size_w)
184		{
185		COMBINE_DATA(&m_dma_size[m_dma_trigger]);
186		}
187
188		WRITE16_MEMBER(seibu_cop_device::dma_dst_w)
189		{
190		COMBINE_DATA(&m_dma_dst[m_dma_trigger]);
191		}
192
193		READ16_MEMBER(seibu_cop_device::dma_trigger_r)
194		{
195		return m_dma_exec_param;
196		}
197
198		WRITE16_MEMBER(seibu_cop_device::dma_trigger_w)
199		{
200		COMBINE_DATA(&m_dma_exec_param);
201		m_dma_trigger = m_dma_exec_param & 7;
202		}
203
204		//**************************************************************************
205		//  READ/WRITE HANDLERS (device to CPU / CPU to device)
206		//**************************************************************************
207
208		READ16_MEMBER( seibu_cop_device::read )
209		{
210		return read_word(offset + (0x400/2));
211		}
212
213		WRITE16_MEMBER( seibu_cop_device::write )
214		{
215		write_word(offset + (0x400/2),data);
216		}
217
218		void seibu_cop_device::normal_dma_transfer(void)
219		{
220		UINT32 src,dst,size,i;
221
222		src = (m_dma_src[m_dma_trigger] << 6);
223		dst = (m_dma_dst[m_dma_trigger] << 6);
224		size = ((m_dma_size[m_dma_trigger] << 5) - (m_dma_dst[m_dma_trigger] << 6) + 0x20)/2;
225
226		for(i = 0;i < size;i++)
227		{
228		m_out_word_cb(dst, m_in_word_cb(src));
229		src+=2;
230		dst+=2;
231		}
232		}
233
234		/* RE from Seibu Cup Soccer bootleg */
235		const UINT8 seibu_cop_device::fade_table(int v)
236		{
237		int low  = v & 0x001f;
238		int high = v & 0x03e0;
239
240		return (low * (high | (high >> 5)) + 0x210) >> 10;
241		}
242
243		void seibu_cop_device::palette_dma_transfer(void)
244		{
245		UINT32 src,dst,size,i;
246
247		/*
248		Apparently all of those are just different DMA channels, brightness effects are done through a RAM table and the pal_brightness_val / mode
249		0x80 is used by Legionnaire
250		0x81 is used by SD Gundam and Godzilla
251		0x82 is used by Zero Team and X Se Dae
252		0x86 is used by Seibu Cup Soccer
253		0x87 is used by Denjin Makai
254
255		TODO:
256		- Denjin Makai mode 4 is totally guessworked.
257		- SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
258		presumably bad RAM table or bad algorithm
259		*/
260
261		src = (m_dma_src[m_dma_trigger] << 6);
262		dst = (m_dma_dst[m_dma_trigger] << 6);
263		size = ((m_dma_size[m_dma_trigger] << 5) - (m_dma_dst[m_dma_trigger] << 6) + 0x20)/2;
264
265		//printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x %02x %02x\n",cop_dma_src[cop_dma_trigger] << 6,cop_dma_fade_table * 0x400,cop_dma_dst[cop_dma_trigger] << 6,cop_dma_size[cop_dma_trigger] << 5,cop_dma_trigger,pal_brightness_val,pal_brightness_mode);
266
267		for(i = 0;i < size;i++)
268		{
269		UINT16 pal_val;
270		int r,g,b;
271		int rt,gt,bt;
272
273		if(m_pal_brightness_mode == 5)
274		{
275		bt = ((m_in_word_cb(src + (m_dma_pal_fade_table * 0x400))) & 0x7c00) >> 5;
276		bt = fade_table(bt|(m_pal_brightness_val ^ 0));
277		b = ((m_in_word_cb(src)) & 0x7c00) >> 5;
278		b = fade_table(b|(m_pal_brightness_val ^ 0x1f));
279		pal_val = ((b + bt) & 0x1f) << 10;
280		gt = ((m_in_word_cb(src + (m_dma_pal_fade_table * 0x400))) & 0x03e0);
281		gt = fade_table(gt|(m_pal_brightness_val ^ 0));
282		g = ((m_in_word_cb(src)) & 0x03e0);
283		g = fade_table(g|(m_pal_brightness_val ^ 0x1f));
284		pal_val |= ((g + gt) & 0x1f) << 5;
285		rt = ((m_in_word_cb(src + (m_dma_pal_fade_table * 0x400))) & 0x001f) << 5;
286		rt = fade_table(rt|(m_pal_brightness_val ^ 0));
287		r = ((m_in_word_cb(src)) & 0x001f) << 5;
288		r = fade_table(r|(m_pal_brightness_val ^ 0x1f));
289		pal_val |= ((r + rt) & 0x1f);
290		}
291		else if(m_pal_brightness_mode == 4) //Denjin Makai
292		{
293		bt =(m_in_word_cb(src + (m_dma_pal_fade_table * 0x400)) & 0x7c00) >> 10;
294		b = (m_in_word_cb(src) & 0x7c00) >> 10;
295		gt =(m_in_word_cb(src + (m_dma_pal_fade_table * 0x400)) & 0x03e0) >> 5;
296		g = (m_in_word_cb(src) & 0x03e0) >> 5;
297		rt =(m_in_word_cb(src + (m_dma_pal_fade_table * 0x400)) & 0x001f) >> 0;
298		r = (m_in_word_cb(src) & 0x001f) >> 0;
299
300		if(m_pal_brightness_val == 0x10)
301		pal_val = bt << 10 | gt << 5 | rt << 0;
302		else if(m_pal_brightness_val == 0xff) // TODO: might be the back plane or it still doesn't do any mod, needs PCB tests
303		pal_val = 0;
304		else
305		{
306		bt = fade_table(bt<<5|((m_pal_brightness_val*2) ^ 0));
307		b =  fade_table(b<<5|((m_pal_brightness_val*2) ^ 0x1f));
308		pal_val = ((b + bt) & 0x1f) << 10;
309		gt = fade_table(gt<<5|((m_pal_brightness_val*2) ^ 0));
310		g =  fade_table(g<<5|((m_pal_brightness_val*2) ^ 0x1f));
311		pal_val |= ((g + gt) & 0x1f) << 5;
312		rt = fade_table(rt<<5|((m_pal_brightness_val*2) ^ 0));
313		r =  fade_table(r<<5|((m_pal_brightness_val*2) ^ 0x1f));
314		pal_val |= ((r + rt) & 0x1f);
315		}
316		}
317		else
318		{
319		printf("Seibu COP: palette DMA used with mode %02x!\n",m_pal_brightness_mode);
320		pal_val = m_in_word_cb(src);
321		}
322
323		m_out_word_cb(dst, pal_val);
324		src+=2;
325		dst+=2;
326		}
327		}
328
329		void seibu_cop_device::fill_word_transfer(void)
330		{
331		UINT32 length, address;
332		int i;
333
334		//if(cop_dma_dst[cop_dma_trigger] != 0x0000) // Invalid?
335		//  return;
336
337		address = (m_dma_src[m_dma_trigger] << 6);
338		length = ((m_dma_size[m_dma_trigger]+1) << 4);
339
340		for (i=address;i<address+length;i+=4)
341		{
342		m_out_dword_cb(i, m_fill_val, 0xffff);
343		}
344		}
345
346		void seibu_cop_device::fill_dword_transfer(void)
347		{
348		UINT32 length, address;
349		int i;
350		if(m_dma_dst[m_dma_trigger] != 0x0000) // Invalid? TODO: log & check this
351		return;
352
353		address = (m_dma_src[m_dma_trigger] << 6);
354		length = (m_dma_size[m_dma_trigger]+1) << 5;
355
356		//printf("%08x %08x\n",address,length);
357
358		for (i=address;i<address+length;i+=4)
359		{
360		m_out_dword_cb(i, m_fill_val, 0xffff);
361		}
362		}
363
364		WRITE16_MEMBER( seibu_cop_device::dma_write_trigger_w )
365		{
366		switch(m_dma_exec_param & 0xfff8)
367		{
368		case 0x008: normal_dma_transfer(); break;
369		case 0x010: break; // private buffer copy, TODO
370		case 0x080: palette_dma_transfer(); break;
371		case 0x110: fill_word_transfer(); break; // Godzilla uses this
372		case 0x118: fill_dword_transfer(); break;
373		default:
374		logerror("Seibu COP: used unemulated DMA type %04x\n",m_dma_exec_param);
375		}
376		}

trunk/src/emu/machine/seibu_cop.h

r32121	r32122
1		/***************************************************************************
2
3		Seibu COP device
4
5		***************************************************************************/
6
7		#pragma once
8
9		#ifndef __SEIBU_COPDEV_H__
10		#define __SEIBU_COPDEV_H__
11
12
13
14		//**************************************************************************
15		//  INTERFACE CONFIGURATION MACROS
16		//**************************************************************************
17
18		#define MCFG_SEIBU_COP_IN_BYTE_CB(_devcb) \
19		devcb = &seibu_cop_device::set_in_byte_callback(*device, DEVCB_##_devcb);
20
21		#define MCFG_SEIBU_COP_IN_WORD_CB(_devcb) \
22		devcb = &seibu_cop_device::set_in_word_callback(*device, DEVCB_##_devcb);
23
24		#define MCFG_SEIBU_COP_IN_DWORD_CB(_devcb) \
25		devcb = &seibu_cop_device::set_in_dword_callback(*device, DEVCB_##_devcb);
26
27		#define MCFG_SEIBU_COP_OUT_BYTE_CB(_devcb) \
28		devcb = &seibu_cop_device::set_out_byte_callback(*device, DEVCB_##_devcb);
29
30		#define MCFG_SEIBU_COP_OUT_WORD_CB(_devcb) \
31		devcb = &seibu_cop_device::set_out_word_callback(*device, DEVCB_##_devcb);
32
33		#define MCFG_SEIBU_COP_OUT_DWORD_CB(_devcb) \
34		devcb = &seibu_cop_device::set_out_dword_callback(*device, DEVCB_##_devcb);
35
36
37
38		//**************************************************************************
39		//  TYPE DEFINITIONS
40		//**************************************************************************
41
42		// ======================> seibu_cop_device
43
44		class seibu_cop_device :    public device_t,
45		public device_memory_interface
46		{
47		public:
48		// construction/destruction
49		seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
50
51		template<class _Object> static devcb_base &set_in_byte_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_in_byte_cb.set_callback(object); }
52		template<class _Object> static devcb_base &set_in_word_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_in_word_cb.set_callback(object); }
53		template<class _Object> static devcb_base &set_in_dword_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_in_dword_cb.set_callback(object); }
54		template<class _Object> static devcb_base &set_out_byte_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_out_byte_cb.set_callback(object); }
55		template<class _Object> static devcb_base &set_out_word_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_out_word_cb.set_callback(object); }
56		template<class _Object> static devcb_base &set_out_dword_callback(device_t &device, _Object object) { return downcast<seibu_cop_device &>(device).m_out_dword_cb.set_callback(object); }
57
58		// I/O operations
59		DECLARE_WRITE16_MEMBER( write );
60		DECLARE_READ16_MEMBER( read );
61		DECLARE_WRITE16_MEMBER( dma_write_trigger_w );
62		DECLARE_WRITE16_MEMBER(fill_val_lo_w);
63		DECLARE_WRITE16_MEMBER(fill_val_hi_w);
64		DECLARE_WRITE16_MEMBER(pal_brightness_val_w);
65		DECLARE_WRITE16_MEMBER(pal_brightness_mode_w);
66		DECLARE_WRITE16_MEMBER(dma_unk_param_w);
67		DECLARE_WRITE16_MEMBER(dma_pal_fade_table_w);
68		DECLARE_WRITE16_MEMBER(dma_src_w);
69		DECLARE_WRITE16_MEMBER(dma_size_w);
70		DECLARE_WRITE16_MEMBER(dma_dst_w);
71		DECLARE_READ16_MEMBER(dma_trigger_r);
72		DECLARE_WRITE16_MEMBER(dma_trigger_w);
73
74		protected:
75		// device-level overrides
76		virtual void device_validity_check(validity_checker &valid) const;
77		virtual void device_start();
78		virtual void device_reset();
79		virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
80
81		private:
82		devcb_read16       m_in_byte_cb;
83		devcb_read16       m_in_word_cb;
84		devcb_read16       m_in_dword_cb;
85		devcb_write16      m_out_byte_cb;
86		devcb_write16      m_out_word_cb;
87		devcb_write16      m_out_dword_cb;
88		inline UINT16 read_word(offs_t address);
89		inline void write_word(offs_t address, UINT16 data);
90
91		UINT16 m_dma_unk_param, m_dma_pal_fade_table, m_dma_src[8], m_dma_dst[8], m_dma_size[8], m_dma_exec_param;
92		UINT8 m_dma_trigger;
93		UINT16 m_fill_val_lo,m_fill_val_hi;
94		UINT32 m_fill_val;
95		UINT16 m_pal_brightness_val, m_pal_brightness_mode;
96
97		const address_space_config      m_space_config;
98
99		const UINT8 fade_table(int v);
100		void normal_dma_transfer(void);
101		void palette_dma_transfer(void);
102		void fill_word_transfer(void);
103		void fill_dword_transfer(void);
104		};
105
106
107		// device type definition
108		extern const device_type SEIBU_COP;
109
110
111
112		//**************************************************************************
113		//  GLOBAL VARIABLES
114		//**************************************************************************
115
116
117
118		#endif

trunk/src/emu/machine/machine.mak

r32121	r32122
1411	1411
1412	1412	#-------------------------------------------------
1413	1413	#
1414		#@src/emu/machine/seibu_cop.h,MACHINES += SEIBU_COP
1415		#-------------------------------------------------
1416
1417		ifneq ($(filter SEIBU_COP,$(MACHINES)),)
1418		MACHINEOBJS += $(MACHINEOBJ)/seibu_cop.o
1419		endif
1420
1421		#-------------------------------------------------
1422		#
1423	1414	#@src/emu/machine/serflash.h,MACHINES += SERFLASH
1424	1415	#-------------------------------------------------
1425	1416

trunk/src/mame/drivers/raiden2.c

r32121	r32122
279	279	cop_latch_trigger = data;
280	280	}
281	281
282		WRITE16_MEMBER(raiden2_state::cop_dma_adr_rel_w)
283		{
284		COMBINE_DATA(&cop_dma_adr_rel);
285		}
286	282
287		WRITE16_MEMBER(raiden2_state::cop_dma_v1_w)
288		{
289		COMBINE_DATA(&cop_dma_v1);
290		}
291	283
292		WRITE16_MEMBER(raiden2_state::cop_dma_v2_w)
293		{
294		COMBINE_DATA(&cop_dma_v2);
295		}
296	284
297		WRITE16_MEMBER(raiden2_state::cop_dma_dst_w)
298		{
299		COMBINE_DATA(&cop_dma_dst[cop_dma_mode]);
300		}
301
302		READ16_MEMBER(raiden2_state::cop_dma_mode_r)
303		{
304		return cop_dma_mode;
305		}
306
307		WRITE16_MEMBER(raiden2_state::cop_dma_mode_w)
308		{
309		COMBINE_DATA(&cop_dma_mode);
310		}
311
312		WRITE16_MEMBER(raiden2_state::cop_dma_src_w)
313		{
314		COMBINE_DATA(&cop_dma_src[cop_dma_mode]);
315		}
316
317		WRITE16_MEMBER(raiden2_state::cop_dma_size_w)
318		{
319		COMBINE_DATA(&cop_dma_size[cop_dma_mode]);
320		}
321
322		WRITE16_MEMBER(raiden2_state::cop_pal_brightness_val_w)
323		{
324		COMBINE_DATA(&pal_brightness_val);
325		}
326
327		/* RE from Seibu Cup Soccer bootleg */
328		const UINT8 raiden2_state::fade_table(int v)
329		{
330		int low  = v & 0x001f;
331		int high = v & 0x03e0;
332
333		return (low * (high | (high >> 5)) + 0x210) >> 10;
334		}
335
336	285	WRITE16_MEMBER(raiden2_state::m_videoram_private_w)
337	286	{
338	287	//AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_SHARE("back_data")
r32121	r32122
361	310	}
362	311	}
363	312
364		WRITE16_MEMBER(raiden2_state::cop_dma_trigger_w)
365		{
366		/*
367		printf("COP DMA mode=%x adr=%x size=%x vals=%x %x %x\n",
368		cop_dma_mode,
369		cop_dma_src[cop_dma_mode]<<6,
370		cop_dma_size[cop_dma_mode]<<4,
371		cop_dma_v1,
372		cop_dma_v2,
373		cop_dma_dst[cop_dma_mode]);
374		*/
375		switch(cop_dma_mode) {
376		case 0x14: {
377		/* TODO: this transfers the whole VRAM, not only spriteram!
378		For whatever reason, this stopped working as soon as I've implemented DMA slot concept.
379		Raiden 2 uses this DMA with cop_dma_dst == 0xfffe, effectively changing the order of the uploaded VRAMs.
380		Also the size is used for doing a sprite limit trickery.
381		*/
382		// based on legionna this should probably only transfer tilemaps, although maybe on this HW things are different
383		// we might be misinterpreting params.  For legionna.c it always points to the start of RAM where the tilemaps are
384		// for zeroteam likewise, but for Raiden 2 the pointer is wrong??
385
386		// tilemap DMA
387		{
388		int src = cop_dma_src[cop_dma_mode] << 6;
389		if (src == 0xcfc0) src = 0xd000; // R2, why?? everything else sets the right pointer
390
391		for (int i = 0; i < 0x2800 /2; i++)
392		{
393		UINT16 tileval = space.read_word(src);
394		src += 2;
395		//m_videoramout_cb(space, i, tileval, 0xffff);
396		m_videoram_private_w(space, i, tileval, 0xffff);
397		}
398
399		}
400
401
402		// sprite DMA part
403		static int rsize = ((0x80 - cop_dma_size[cop_dma_mode]) & 0x7f) +1;
404
405		sprites_cur_start = 0x1000 - (rsize << 5);
406		#if 0
407		int rsize = 32*(0x7f-cop_dma_size);
408		int radr = 64*cop_dma_adr - rsize;
409		for(int i=0; i<rsize; i+=2)
410		sprites[i/2] = space.read_word(radr+i);
411		sprites_cur_start = rsize;
412		#endif
413		break;
414		}
415		// case 0x15: points at palette in legionna.c and here
416		case 0x82: {
417		UINT32 src,dst,size;
418		int i;
419
420		src = (cop_dma_src[cop_dma_mode] << 6);
421		dst = (cop_dma_dst[cop_dma_mode] << 6);
422		size = ((cop_dma_size[cop_dma_mode] << 5) - (cop_dma_dst[cop_dma_mode] << 6) + 0x20)/2;
423
424		//printf("%08x %08x %08x\n",src,dst,size);
425
426		for(i = 0;i < size;i++)
427		{
428		UINT16 pal_val;
429		int r,g,b;
430		int rt,gt,bt;
431
432		bt = (space.read_word(src + (cop_dma_adr_rel * 0x400)) & 0x7c00) >> 5;
433		bt = fade_table(bt|(pal_brightness_val ^ 0));
434		b = ((space.read_word(src)) & 0x7c00) >> 5;
435		b = fade_table(b|(pal_brightness_val ^ 0x1f));
436		pal_val = ((b + bt) & 0x1f) << 10;
437		gt = (space.read_word(src + (cop_dma_adr_rel * 0x400)) & 0x03e0);
438		gt = fade_table(gt|(pal_brightness_val ^ 0));
439		g = ((space.read_word(src)) & 0x03e0);
440		g = fade_table(g|(pal_brightness_val ^ 0x1f));
441		pal_val |= ((g + gt) & 0x1f) << 5;
442		rt = (space.read_word(src + (cop_dma_adr_rel * 0x400)) & 0x001f) << 5;
443		rt = fade_table(rt|(pal_brightness_val ^ 0));
444		r = ((space.read_word(src)) & 0x001f) << 5;
445		r = fade_table(r|(pal_brightness_val ^ 0x1f));
446		pal_val |= ((r + rt) & 0x1f);
447
448		space.write_word(dst, pal_val);
449		src+=2;
450		dst+=2;
451		}
452
453		break;
454		}
455		case 0x09: {
456		UINT32 src,dst,size;
457		int i;
458
459		src = (cop_dma_src[cop_dma_mode] << 6);
460		dst = (cop_dma_dst[cop_dma_mode] << 6);
461		size = ((cop_dma_size[cop_dma_mode] << 5) - (cop_dma_dst[cop_dma_mode] << 6) + 0x20)/2;
462
463		//      printf("%08x %08x %08x\n",src,dst,size);
464
465		for(i = 0;i < size;i++)
466		{
467		space.write_word(dst, space.read_word(src));
468		src+=2;
469		dst+=2;
470		}
471
472		break;
473		}
474		case 0x118:
475		case 0x11f: {
476		UINT32 length, address;
477		int i;
478		if(cop_dma_dst[cop_dma_mode] != 0x0000) // Invalid?
479		return;
480
481		address = (cop_dma_src[cop_dma_mode] << 6);
482		length = (cop_dma_size[cop_dma_mode]+1) << 5;
483
484		//printf("%08x %08x\n",address,length);
485
486		for (i=address;i<address+length;i+=4)
487		{
488		space.write_dword(i, (cop_dma_v1) | (cop_dma_v2 << 16));
489		}
490		}
491		}
492		}
493
494	313	WRITE16_MEMBER(raiden2_state::cop_itoa_low_w)
495	314	{
496	315	cop_itoa = (cop_itoa & ~UINT32(mem_mask)) | (data & mem_mask);
r32121	r32122
849	668
850	669	void raiden2_state::draw_sprites(const rectangle &cliprect)
851	670	{
852		UINT16 *source = sprites + sprites_cur_start/2;
	671	UINT16 *source = sprites + (0x1000/2)-4;
853	672	sprite_buffer.fill(0xf, cliprect);
854	673
855	674	gfx_element *gfx = m_gfxdecode->gfx(2);
r32121	r32122
1605	1424	AM_RANGE(0x00420, 0x00421) AM_WRITE(cop_itoa_low_w)
1606	1425	AM_RANGE(0x00422, 0x00423) AM_WRITE(cop_itoa_high_w)
1607	1426	AM_RANGE(0x00424, 0x00425) AM_WRITE(cop_itoa_digit_count_w)
1608		AM_RANGE(0x00428, 0x00429) AM_WRITE(cop_dma_v1_w)
1609		AM_RANGE(0x0042a, 0x0042b) AM_WRITE(cop_dma_v2_w)
	1427	AM_RANGE(0x00428, 0x00429) AM_DEVWRITE("raiden2cop", raiden2cop_device, cop_dma_v1_w)
	1428	AM_RANGE(0x0042a, 0x0042b) AM_DEVWRITE("raiden2cop", raiden2cop_device, cop_dma_v2_w)
1610	1429	AM_RANGE(0x00432, 0x00433) AM_WRITE(cop_pgm_data_w)
1611	1430	AM_RANGE(0x00434, 0x00435) AM_WRITE(cop_pgm_addr_w)
1612	1431	AM_RANGE(0x00436, 0x00437) AM_WRITE(cop_hitbox_baseadr_w)
r32121	r32122
1619	1438	AM_RANGE(0x00454, 0x00455) AM_WRITE(cop_sort_lookup_hi_w)
1620	1439	AM_RANGE(0x00456, 0x00457) AM_WRITE(cop_sort_lookup_lo_w)
1621	1440	AM_RANGE(0x00458, 0x00459) AM_WRITE(cop_sort_param_w)
1622		AM_RANGE(0x0045a, 0x0045b) AM_WRITE(cop_pal_brightness_val_w) //palette DMA brightness val, used by X Se Dae / Zero Team
1623		AM_RANGE(0x0045c, 0x0045d) AM_WRITENOP //palette DMA brightness mode, used by X Se Dae / Zero Team (sets to 5)
	1441	AM_RANGE(0x0045a, 0x0045b) AM_DEVWRITE("raiden2cop", raiden2cop_device, cop_pal_brightness_val_w) //palette DMA brightness val, used by X Se Dae / Zero Team
	1442	AM_RANGE(0x0045c, 0x0045d) AM_DEVWRITE("raiden2cop", raiden2cop_device, cop_pal_brightness_mode_w)  //palette DMA brightness mode, used by X Se Dae / Zero Team (sets to 5)
1624	1443	AM_RANGE(0x00470, 0x00471) AM_READWRITE(cop_tile_bank_2_r,cop_tile_bank_2_w)
1625	1444
1626		AM_RANGE(0x00476, 0x00477) AM_WRITE(cop_dma_adr_rel_w)
1627		AM_RANGE(0x00478, 0x00479) AM_WRITE(cop_dma_src_w)
1628		AM_RANGE(0x0047a, 0x0047b) AM_WRITE(cop_dma_size_w)
1629		AM_RANGE(0x0047c, 0x0047d) AM_WRITE(cop_dma_dst_w)
1630		AM_RANGE(0x0047e, 0x0047f) AM_READWRITE(cop_dma_mode_r, cop_dma_mode_w)
	1445	AM_RANGE(0x00476, 0x00477) AM_DEVWRITE("raiden2cop", raiden2cop_device, cop_dma_adr_rel_w)
	1446	AM_RANGE(0x00478, 0x00479) AM_DEVWRITE("raiden2cop", raiden2cop_device,cop_dma_src_w)
	1447	AM_RANGE(0x0047a, 0x0047b) AM_DEVWRITE("raiden2cop", raiden2cop_device,cop_dma_size_w)
	1448	AM_RANGE(0x0047c, 0x0047d) AM_DEVWRITE("raiden2cop", raiden2cop_device,cop_dma_dst_w)
	1449	AM_RANGE(0x0047e, 0x0047f) AM_DEVREADWRITE("raiden2cop", raiden2cop_device, cop_dma_mode_r, cop_dma_mode_w)
1631	1450	AM_RANGE(0x004a0, 0x004a9) AM_READWRITE(cop_reg_high_r, cop_reg_high_w)
1632	1451	AM_RANGE(0x004c0, 0x004c9) AM_READWRITE(cop_reg_low_r, cop_reg_low_w)
1633	1452	AM_RANGE(0x00500, 0x00505) AM_WRITE(cop_cmd_w)
r32121	r32122
1662	1481	AM_RANGE(0x006da, 0x006db) AM_WRITE(sprite_prot_y_w)
1663	1482	AM_RANGE(0x006dc, 0x006dd) AM_READWRITE(sprite_prot_maxx_r, sprite_prot_maxx_w)
1664	1483	AM_RANGE(0x006de, 0x006df) AM_WRITE(sprite_prot_src_w)
1665		AM_RANGE(0x006fc, 0x006fd) AM_WRITE(cop_dma_trigger_w)
	1484	AM_RANGE(0x006fc, 0x006fd) AM_DEVWRITE("raiden2cop", raiden2cop_device,cop_dma_trigger_w)
1666	1485	AM_RANGE(0x006fe, 0x006ff) AM_WRITE(cop_sort_dma_trig_w) // sort-DMA trigger
1667	1486
1668	1487	AM_RANGE(0x00762, 0x00763) AM_READ(sprite_prot_dst1_r)
r32121	r32122
1691	1510	AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
1692	1511
1693	1512	AM_RANGE(0x10000, 0x1efff) AM_RAM
1694		AM_RANGE(0x1f000, 0x1ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	1513	AM_RANGE(0x1f000, 0x1ffff) AM_RAM //_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
1695	1514
1696	1515	AM_RANGE(0x20000, 0x2ffff) AM_ROMBANK("mainbank1")
1697	1516	AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("mainbank2")
r32121	r32122
1728	1547	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM // _WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1729	1548	AM_RANGE(0x0c800, 0x0cfff) AM_RAM // _WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1730	1549	AM_RANGE(0x0d000, 0x0dfff) AM_RAM // _WRITE(raiden2_text_w) AM_SHARE("text_data")
1731		AM_RANGE(0x0e000, 0x0efff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	1550	AM_RANGE(0x0e000, 0x0efff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
1732	1551	AM_RANGE(0x0f000, 0x0ffff) AM_RAM AM_SHARE("sprites")
1733	1552	AM_RANGE(0x10000, 0x1ffff) AM_RAM
1734	1553
r32121	r32122
1759	1578	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM // _WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1760	1579	AM_RANGE(0x0c800, 0x0cfff) AM_RAM // _WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1761	1580	AM_RANGE(0x0d000, 0x0dfff) AM_RAM // _WRITE(raiden2_text_w) AM_SHARE("text_data")
1762		AM_RANGE(0x0e000, 0x0efff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	1581	AM_RANGE(0x0e000, 0x0efff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
1763	1582	AM_RANGE(0x0f000, 0x0ffff) AM_RAM AM_SHARE("sprites")
1764	1583
1765	1584	AM_RANGE(0x10000, 0x1ffff) AM_RAM
r32121	r32122
2097	1916
2098	1917	MCFG_GFXDECODE_ADD("gfxdecode", "palette", raiden2)
2099	1918	MCFG_PALETTE_ADD("palette", 2048)
2100		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1919	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
2101	1920
2102	1921	MCFG_DEVICE_ADD("crtc", SEIBU_CRTC, 0)
2103	1922	MCFG_SEIBU_CRTC_LAYER_EN_CB(WRITE16(raiden2_state, tilemap_enable_w))
2104	1923	MCFG_SEIBU_CRTC_LAYER_SCROLL_CB(WRITE16(raiden2_state, tile_scroll_w))
2105	1924
	1925	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1926	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(raiden2_state, m_videoram_private_w))
	1927
2106	1928	MCFG_VIDEO_START_OVERRIDE(raiden2_state,raiden2)
2107	1929
2108	1930	/* sound hardware */
r32121	r32122
2154	1976
2155	1977	MCFG_GFXDECODE_ADD("gfxdecode", "palette", raiden2)
2156	1978	MCFG_PALETTE_ADD("palette", 2048)
2157		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1979	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
2158	1980
2159	1981	MCFG_DEVICE_ADD("crtc", SEIBU_CRTC, 0)
2160	1982	MCFG_SEIBU_CRTC_LAYER_EN_CB(WRITE16(raiden2_state, tilemap_enable_w))
2161	1983	MCFG_SEIBU_CRTC_LAYER_SCROLL_CB(WRITE16(raiden2_state, tile_scroll_w))
2162	1984
	1985	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1986	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(raiden2_state, m_videoram_private_w))
	1987
2163	1988	MCFG_VIDEO_START_OVERRIDE(raiden2_state,raiden2)
2164	1989
2165	1990	/* sound hardware */

trunk/src/mame/drivers/legionna.c

r32121	r32122
89	89	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
90	90	AM_RANGE(0x102000, 0x1027ff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
91	91	AM_RANGE(0x102800, 0x1037ff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
92		AM_RANGE(0x104000, 0x104fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")    /* palette xRRRRxGGGGxBBBBx ? */
	92	AM_RANGE(0x104000, 0x104fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")    /* palette xRRRRxGGGGxBBBBx ? */
93	93	AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
94	94	AM_RANGE(0x106000, 0x107fff) AM_RAM
95	95	AM_RANGE(0x108000, 0x11ffff) AM_RAM /* main ram */
r32121	r32122
105	105	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
106	106	AM_RANGE(0x102000, 0x102fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
107	107	AM_RANGE(0x103000, 0x103fff) AM_RAM AM_SHARE("spriteram")
108		AM_RANGE(0x104000, 0x104fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	108	AM_RANGE(0x104000, 0x104fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
109	109	AM_RANGE(0x108000, 0x11ffff) AM_RAM
110	110	ADDRESS_MAP_END
111	111
r32121	r32122
119	119	AM_RANGE(0x102000, 0x1027ff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
120	120	AM_RANGE(0x102800, 0x1037ff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
121	121	AM_RANGE(0x103800, 0x103fff) AM_RAM // check?
122		AM_RANGE(0x104000, 0x104fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	122	AM_RANGE(0x104000, 0x104fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
123	123	AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
124	124	AM_RANGE(0x106000, 0x1067ff) AM_RAM
125	125	AM_RANGE(0x106800, 0x106fff) AM_RAM
r32121	r32122
127	127	AM_RANGE(0x108000, 0x11ffff) AM_RAM
128	128	ADDRESS_MAP_END
129	129
	130
130	131	/* did they swap the lines, or does the protection device swap the words during the DMA?? */
131		WRITE16_MEMBER(legionna_state::denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w)
	132	WRITE16_MEMBER(legionna_state::wordswapram_w)
132	133	{
133	134	offset^=1;
134		m_palette->write(space,offset,data,mem_mask);
	135	COMBINE_DATA(&m_wordswapram[offset]);
135	136	}
136	137
	138
137	139	static ADDRESS_MAP_START( denjinmk_map, AS_PROGRAM, 16, legionna_state )
138	140	AM_RANGE(0x000000, 0x0fffff) AM_ROM
139	141	AM_RANGE(0x100000, 0x1003ff) AM_RAM
r32121	r32122
143	145	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
144	146	AM_RANGE(0x102000, 0x1027ff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
145	147	AM_RANGE(0x102800, 0x103fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
146		AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("palette")
	148	AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(wordswapram_w) AM_SHARE("wordswapram")
147	149	AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
148	150	AM_RANGE(0x106000, 0x107fff) AM_RAM
149	151	AM_RANGE(0x108000, 0x11dfff) AM_RAM
r32121	r32122
159	161	AM_RANGE(0x101000, 0x1017ff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
160	162	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
161	163	AM_RANGE(0x102000, 0x102fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
162		AM_RANGE(0x103000, 0x103fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	164	AM_RANGE(0x103000, 0x103fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
163	165	AM_RANGE(0x104000, 0x104fff) AM_RAM//_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
164	166	AM_RANGE(0x105000, 0x105fff) AM_RAM
165	167	AM_RANGE(0x106000, 0x106fff) AM_RAM
r32121	r32122
175	177	AM_RANGE(0x101000, 0x1017ff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
176	178	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
177	179	AM_RANGE(0x102000, 0x102fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
178		AM_RANGE(0x103000, 0x103fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	180	AM_RANGE(0x103000, 0x103fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
179	181	AM_RANGE(0x104000, 0x104fff) AM_RAM
180	182	AM_RANGE(0x105000, 0x106fff) AM_RAM
181	183	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
r32121	r32122
194	196	AM_RANGE(0x101000, 0x1017ff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
195	197	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
196	198	AM_RANGE(0x102000, 0x102fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
197		AM_RANGE(0x103000, 0x103fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	199	AM_RANGE(0x103000, 0x103fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
198	200	AM_RANGE(0x104000, 0x104fff) AM_RAM
199	201	AM_RANGE(0x105000, 0x106fff) AM_RAM
200	202	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
r32121	r32122
213	215	AM_RANGE(0x101000, 0x1017ff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
214	216	AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
215	217	AM_RANGE(0x102000, 0x102fff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
216		AM_RANGE(0x103000, 0x103fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
	218	AM_RANGE(0x103000, 0x103fff) AM_RAM // _DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
217	219	AM_RANGE(0x104000, 0x104fff) AM_RAM
218	220	AM_RANGE(0x105000, 0x106fff) AM_RAM
219	221	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
r32121	r32122
1066	1068	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1067	1069
1068	1070	MCFG_SEIBU_COP_ADD("seibucop")
1069		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1071	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1072	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1070	1073
1071	1074	/* video hardware */
1072	1075	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1079	1082
1080	1083	MCFG_GFXDECODE_ADD("gfxdecode", "palette", legionna)
1081	1084	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1082		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1085	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1083	1086
1084	1087	MCFG_VIDEO_START_OVERRIDE(legionna_state,legionna)
1085	1088
r32121	r32122
1098	1101	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1099	1102
1100	1103	MCFG_SEIBU_COP_ADD("seibucop")
1101		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1104	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1105	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1102	1106
1103	1107	/* video hardware */
1104	1108	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1112	1116	MCFG_GFXDECODE_ADD("gfxdecode", "palette", heatbrl)
1113	1117
1114	1118	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1115		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1119	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1116	1120
1117	1121	MCFG_VIDEO_START_OVERRIDE(legionna_state,legionna)
1118	1122
r32121	r32122
1130	1134	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1131	1135
1132	1136	MCFG_SEIBU_COP_ADD("seibucop")
1133		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1137	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1138	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1134	1139
1135	1140	/* video hardware */
1136	1141	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1145	1150	MCFG_GFXDECODE_ADD("gfxdecode", "palette", heatbrl)
1146	1151
1147	1152	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1148		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1153	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1149	1154
1150	1155	MCFG_VIDEO_START_OVERRIDE(legionna_state,godzilla)
1151	1156
r32121	r32122
1163	1168	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1164	1169
1165	1170	MCFG_SEIBU_COP_ADD("seibucop")
1166		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1171	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1172	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1167	1173
1168	1174	/* video hardware */
1169	1175	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1177	1183	MCFG_GFXDECODE_ADD("gfxdecode", "palette", heatbrl)
1178	1184
1179	1185	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1180		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1186	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1181	1187
1182	1188	MCFG_VIDEO_START_OVERRIDE(legionna_state,denjinmk)
1183	1189
r32121	r32122
1195	1201	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1196	1202
1197	1203	MCFG_SEIBU_COP_ADD("seibucop")
1198		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1204	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1205	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1199	1206
1200	1207	/* video hardware */
1201	1208	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1209	1216	MCFG_GFXDECODE_ADD("gfxdecode", "palette", grainbow)
1210	1217
1211	1218	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1212		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1219	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1213	1220
1214	1221	MCFG_VIDEO_START_OVERRIDE(legionna_state,grainbow)
1215	1222
r32121	r32122
1228	1235	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1229	1236
1230	1237	MCFG_SEIBU_COP_ADD("seibucop")
1231		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1238	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1239	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1232	1240
1233	1241	/* video hardware */
1234	1242	MCFG_SCREEN_ADD("screen", RASTER)
r32121	r32122
1242	1250	MCFG_GFXDECODE_ADD("gfxdecode", "palette", cupsoc)
1243	1251
1244	1252	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1245		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1253	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1246	1254
1247	1255	MCFG_VIDEO_START_OVERRIDE(legionna_state,cupsoc)
1248	1256
r32121	r32122
1263	1271	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state,  irq4_line_hold) /* VBL */
1264	1272
1265	1273	MCFG_SEIBU_COP_ADD("seibucop")
1266		MCFG_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
	1274	MCFG_RAIDEN2COP_ADD("raiden2cop")
	1275	MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
1267	1276
	1277
1268	1278	/*Different Sound hardware*/
1269	1279	//SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1270	1280	MCFG_CPU_ADD("audiocpu", Z80,14318180/4)
r32121	r32122
1283	1293	MCFG_GFXDECODE_ADD("gfxdecode", "palette", heatbrl_csb)
1284	1294
1285	1295	MCFG_PALETTE_ADD_INIT_BLACK("palette", 128*16)
1286		MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
	1296	//MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
1287	1297
1288	1298	MCFG_VIDEO_START_OVERRIDE(legionna_state,cupsoc)
1289	1299

trunk/src/mame/machine/raiden2cop.c

r0	r32122
	1	/***************************************************************************
	2
	3	Seibu Cop (Co-Processor) emulation
	4	(new implementation, based on Raiden 2 code)
	5
	6	***************************************************************************/
	7
	8	#include "emu.h"
	9	#include "raiden2cop.h"
	10
	11	const device_type RAIDEN2COP = &device_creator<raiden2cop_device>;
	12
	13	raiden2cop_device::raiden2cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	14	: device_t(mconfig, RAIDEN2COP, "RAIDEN2COP", tag, owner, clock, "raiden2cop", __FILE__),
	15	m_videoramout_cb(*this),
	16	m_palette(*this, ":palette")
	17	{
	18	}
	19
	20
	21	//-------------------------------------------------
	22	//  device_start - device-specific startup
	23	//-------------------------------------------------
	24	void raiden2cop_device::device_start()
	25	{
	26	m_videoramout_cb.resolve_safe();
	27	}
	28
	29
	30	WRITE16_MEMBER(raiden2cop_device::cop_dma_adr_rel_w)
	31	{
	32	COMBINE_DATA(&cop_dma_adr_rel);
	33	}
	34
	35	WRITE16_MEMBER(raiden2cop_device::cop_dma_v1_w)
	36	{
	37	COMBINE_DATA(&cop_dma_v1);
	38	}
	39
	40	WRITE16_MEMBER(raiden2cop_device::cop_dma_v2_w)
	41	{
	42	COMBINE_DATA(&cop_dma_v2);
	43	}
	44
	45	WRITE16_MEMBER(raiden2cop_device::cop_dma_dst_w)
	46	{
	47	COMBINE_DATA(&cop_dma_dst[cop_dma_mode]);
	48	}
	49
	50	READ16_MEMBER(raiden2cop_device::cop_dma_mode_r)
	51	{
	52	return cop_dma_mode;
	53	}
	54
	55	WRITE16_MEMBER(raiden2cop_device::cop_dma_mode_w)
	56	{
	57	COMBINE_DATA(&cop_dma_mode);
	58	}
	59
	60	WRITE16_MEMBER(raiden2cop_device::cop_dma_src_w)
	61	{
	62	COMBINE_DATA(&cop_dma_src[cop_dma_mode]);
	63	}
	64
	65	WRITE16_MEMBER(raiden2cop_device::cop_dma_size_w)
	66	{
	67	COMBINE_DATA(&cop_dma_size[cop_dma_mode]);
	68	}
	69
	70	WRITE16_MEMBER(raiden2cop_device::cop_pal_brightness_val_w)
	71	{
	72	COMBINE_DATA(&pal_brightness_val);
	73	}
	74
	75	WRITE16_MEMBER(raiden2cop_device::cop_pal_brightness_mode_w)
	76	{
	77	COMBINE_DATA(&pal_brightness_mode);
	78	}
	79
	80	/* RE from Seibu Cup Soccer bootleg */
	81	const UINT8 raiden2cop_device::fade_table(int v)
	82	{
	83	int low  = v & 0x001f;
	84	int high = v & 0x03e0;
	85
	86	return (low * (high | (high >> 5)) + 0x210) >> 10;
	87	}
	88
	89
	90	WRITE16_MEMBER(raiden2cop_device::cop_dma_trigger_w)
	91	{
	92	#if 0
	93	if (cop_dma_mode != 0x14 && cop_dma_mode != 0x15)
	94	{
	95	printf("COP DMA mode=%x adr=%x size=%x vals=%x %x %x\n",
	96	cop_dma_mode,
	97	cop_dma_src[cop_dma_mode] << 6,
	98	cop_dma_size[cop_dma_mode] << 4,
	99	cop_dma_v1,
	100	cop_dma_v2,
	101	cop_dma_dst[cop_dma_mode]);
	102	}
	103	#endif
	104	switch (cop_dma_mode)
	105	{
	106	/********************************************************************************************************************/
	107	case 0x14:
	108	{ // ALL games use this - tilemap DMA (RAM -> private buffer)
	109	{
	110	int src = cop_dma_src[cop_dma_mode] << 6;
	111	if (src == 0xcfc0) src = 0xd000; // R2, why?? everything else sets the right pointer (it also sets up odd size / dest regs, they probably counteract this)
	112
	113	for (int i = 0; i < 0x2800 / 2; i++)
	114	{
	115	UINT16 tileval = space.read_word(src);
	116	src += 2;
	117	m_videoramout_cb(space, i, tileval, 0xffff);
	118	}
	119
	120	}
	121
	122	break;
	123	}
	124	/********************************************************************************************************************/
	125	case 0x15:
	126	{ // ALL games use this - palette DMA (RAM -> private buffer)
	127	int src = cop_dma_src[cop_dma_mode] << 6;
	128
	129	for (int i = 0; i < 0x1000 / 2; i++) // todo, use length register
	130	{
	131	UINT16 palval = space.read_word(src);
	132	src += 2;
	133	m_palette->set_pen_color(i, pal5bit(palval >> 0), pal5bit(palval >> 5), pal5bit(palval >> 10));
	134	}
	135
	136	break;
	137	}
	138	/********************************************************************************************************************/
	139	case 0x80:
	140	case 0x81:
	141	case 0x82:
	142	case 0x83:
	143	case 0x84:
	144	case 0x85:
	145	case 0x86:
	146	case 0x87:
	147	{ // these are typically used to transfer palette data from one RAM buffer to another, applying fade values to it prior to the 0x15 transfer
	148	UINT32 src, dst, size, i;
	149
	150	/*
	151	Apparently all of those are just different DMA channels, brightness effects are done through a RAM table and the pal_brightness_val / mode
	152	0x80 is used by Legionnaire
	153	0x81 is used by SD Gundam and Godzilla
	154	0x82 is used by Zero Team and X Se Dae
	155	0x86 is used by Seibu Cup Soccer
	156	0x87 is used by Denjin Makai
	157
	158	TODO:
	159	- Denjin Makai mode 4 is totally guessworked.
	160	- SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
	161	presumably bad RAM table or bad algorithm
	162	*/
	163
	164	//if(dma_trigger != 0x87)
	165	//printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x %02x %02x\n",cop_dma_src[cop_dma_mode] << 6,cop_dma_adr_rel * 0x400,cop_dma_dst[cop_dma_mode] << 6,cop_dma_size[cop_dma_mode] << 5,cop_dma_mode,pal_brightness_val,pal_brightness_mode);
	166
	167	src = (cop_dma_src[cop_dma_mode] << 6);
	168	dst = (cop_dma_dst[cop_dma_mode] << 6);
	169	size = ((cop_dma_size[cop_dma_mode] << 5) - (cop_dma_dst[cop_dma_mode] << 6) + 0x20) / 2;
	170
	171	for (i = 0; i < size; i++)
	172	{
	173	UINT16 pal_val;
	174	int r, g, b;
	175	int rt, gt, bt;
	176
	177	if (pal_brightness_mode == 5)
	178	{
	179	bt = ((space.read_word(src + (cop_dma_adr_rel * 0x400))) & 0x7c00) >> 5;
	180	bt = fade_table(bt | (pal_brightness_val ^ 0));
	181	b = ((space.read_word(src)) & 0x7c00) >> 5;
	182	b = fade_table(b | (pal_brightness_val ^ 0x1f));
	183	pal_val = ((b + bt) & 0x1f) << 10;
	184	gt = ((space.read_word(src + (cop_dma_adr_rel * 0x400))) & 0x03e0);
	185	gt = fade_table(gt | (pal_brightness_val ^ 0));
	186	g = ((space.read_word(src)) & 0x03e0);
	187	g = fade_table(g | (pal_brightness_val ^ 0x1f));
	188	pal_val |= ((g + gt) & 0x1f) << 5;
	189	rt = ((space.read_word(src + (cop_dma_adr_rel * 0x400))) & 0x001f) << 5;
	190	rt = fade_table(rt | (pal_brightness_val ^ 0));
	191	r = ((space.read_word(src)) & 0x001f) << 5;
	192	r = fade_table(r | (pal_brightness_val ^ 0x1f));
	193	pal_val |= ((r + rt) & 0x1f);
	194	}
	195	else if (pal_brightness_mode == 4) //Denjin Makai
	196	{
	197	UINT16 targetpaldata = space.read_word(src + (cop_dma_adr_rel * 0x400));
	198	UINT16 paldata = space.read_word(src); // ^1 !!! (why?)
	199
	200	bt = (targetpaldata & 0x7c00) >> 10;
	201	b = (paldata & 0x7c00) >> 10;
	202	gt = (targetpaldata & 0x03e0) >> 5;
	203	g = (paldata & 0x03e0) >> 5;
	204	rt = (targetpaldata & 0x001f) >> 0;
	205	r = (paldata & 0x001f) >> 0;
	206
	207	if (pal_brightness_val == 0x10)
	208	pal_val = bt << 10 | gt << 5 | rt << 0;
	209	else if (pal_brightness_val == 0xff) // TODO: might be the back plane or it still doesn't do any mod, needs PCB tests
	210	pal_val = 0;
	211	else
	212	{
	213	bt = fade_table(bt << 5 | ((pal_brightness_val * 2) ^ 0));
	214	b = fade_table(b << 5 | ((pal_brightness_val * 2) ^ 0x1f));
	215	pal_val = ((b + bt) & 0x1f) << 10;
	216	gt = fade_table(gt << 5 | ((pal_brightness_val * 2) ^ 0));
	217	g = fade_table(g << 5 | ((pal_brightness_val * 2) ^ 0x1f));
	218	pal_val |= ((g + gt) & 0x1f) << 5;
	219	rt = fade_table(rt << 5 | ((pal_brightness_val * 2) ^ 0));
	220	r = fade_table(r << 5 | ((pal_brightness_val * 2) ^ 0x1f));
	221	pal_val |= ((r + rt) & 0x1f);
	222	}
	223	}
	224	else
	225	{
	226	printf("Warning: palette DMA used with mode %02x!\n", pal_brightness_mode);
	227	pal_val = space.read_word(src);
	228	}
	229
	230	space.write_word(dst, pal_val);
	231	src += 2;
	232	dst += 2;
	233	}
	234	break;
	235	}
	236	/********************************************************************************************************************/
	237	case 0x09: {
	238	UINT32 src, dst, size;
	239	int i;
	240
	241	src = (cop_dma_src[cop_dma_mode] << 6);
	242	dst = (cop_dma_dst[cop_dma_mode] << 6);
	243	size = ((cop_dma_size[cop_dma_mode] << 5) - (cop_dma_dst[cop_dma_mode] << 6) + 0x20) / 2;
	244
	245	//      printf("%08x %08x %08x\n",src,dst,size);
	246
	247	for (i = 0; i < size; i++)
	248	{
	249	space.write_word(dst, space.read_word(src));
	250	src += 2;
	251	dst += 2;
	252	}
	253
	254	break;
	255	}
	256	/********************************************************************************************************************/
	257	case 0x0e:  // Godzilla / Seibu Cup Soccer
	258	{
	259	UINT32 src, dst, size, i;
	260
	261	src = (cop_dma_src[cop_dma_mode] << 6);
	262	dst = (cop_dma_dst[cop_dma_mode] << 6);
	263	size = ((cop_dma_size[cop_dma_mode] << 5) - (cop_dma_dst[cop_dma_mode] << 6) + 0x20) / 2;
	264
	265	for (i = 0; i < size; i++)
	266	{
	267	space.write_word(dst, space.read_word(src));
	268	src += 2;
	269	dst += 2;
	270	}
	271
	272	break;
	273	}
	274	/********************************************************************************************************************/
	275	case 0x116: // Godzilla
	276	{
	277	UINT32 length, address;
	278	int i;
	279
	280	//if(cop_dma_dst[cop_dma_mode] != 0x0000) // Invalid?
	281	//  return;
	282
	283	address = (cop_dma_src[cop_dma_mode] << 6);
	284	length = ((cop_dma_size[cop_dma_mode] + 1) << 4);
	285
	286	for (i = address; i < address + length; i += 4)
	287	{
	288	space.write_dword(i, (cop_dma_v1) | (cop_dma_v2 << 16));
	289	}
	290	break;
	291	}
	292
	293	/********************************************************************************************************************/
	294	case 0x118:
	295	case 0x119:
	296	case 0x11a:
	297	case 0x11b:
	298	case 0x11c:
	299	case 0x11d:
	300	case 0x11e:
	301	case 0x11f: {
	302	UINT32 length, address;
	303	int i;
	304	if (cop_dma_dst[cop_dma_mode] != 0x0000) // Invalid?
	305	return;
	306
	307	address = (cop_dma_src[cop_dma_mode] << 6);
	308	length = (cop_dma_size[cop_dma_mode] + 1) << 5;
	309
	310	//printf("%08x %08x\n",address,length);
	311
	312	for (i = address; i < address + length; i += 4)
	313	{
	314	space.write_dword(i, (cop_dma_v1) | (cop_dma_v2 << 16));
	315	}
	316	/*
	317	UINT32 length, address;
	318	int i;
	319	if(cop_dma_dst[cop_dma_mode] != 0x0000) // Invalid?
	320	return;
	321
	322	address = (cop_dma_src[cop_dma_mode] << 6);
	323	length = (cop_dma_size[cop_dma_mode]+1) << 5;
	324
	325	//printf("%08x %08x\n",address,length);
	326
	327	for (i=address;i<address+length;i+=4)
	328	{
	329	space.write_dword(i, m_fill_val);
	330	}
	331	*/
	332
	333	break;
	334	}
	335
	336
	337	}
	338
	339	}

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trunk/src/mame/machine/raiden2cop.h

r0	r32122
	1	/***************************************************************************
	2
	3	Seibu Cop (Co-Processor) emulation
	4	(new implementation, based on Raiden 2 code)
	5
	6	***************************************************************************/
	7
	8	#ifndef RAIDEN2COP_H
	9	#define RAIDEN2COP_H
	10
	11
	12	#define MCFG_RAIDEN2COP_ADD(_tag ) \
	13	MCFG_DEVICE_ADD(_tag, RAIDEN2COP, 0)
	14
	15	#define MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(_devcb) \
	16	devcb = &raiden2cop_device::set_m_videoramout_cb(*device, DEVCB_##_devcb);
	17
	18
	19	class raiden2cop_device : public device_t
	20	{
	21	public:
	22	raiden2cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	23
	24	UINT16 cop_dma_v1, cop_dma_v2, cop_dma_mode;
	25	UINT16 cop_dma_src[0x200], cop_dma_dst[0x200], cop_dma_size[0x200];
	26	UINT16 cop_dma_adr_rel;
	27
	28	UINT16 pal_brightness_val;
	29	UINT16 pal_brightness_mode;
	30
	31	DECLARE_WRITE16_MEMBER( cop_dma_v1_w );
	32	DECLARE_WRITE16_MEMBER( cop_dma_v2_w );
	33
	34	DECLARE_WRITE16_MEMBER( cop_dma_adr_rel_w );
	35	DECLARE_WRITE16_MEMBER( cop_dma_src_w );
	36	DECLARE_WRITE16_MEMBER( cop_dma_size_w );
	37	DECLARE_WRITE16_MEMBER( cop_dma_dst_w );
	38	DECLARE_READ16_MEMBER( cop_dma_mode_r );
	39	DECLARE_WRITE16_MEMBER( cop_dma_mode_w );
	40
	41	DECLARE_WRITE16_MEMBER( cop_pal_brightness_val_w );
	42	DECLARE_WRITE16_MEMBER( cop_pal_brightness_mode_w );
	43
	44	DECLARE_WRITE16_MEMBER ( cop_dma_trigger_w );
	45
	46	const UINT8 fade_table(int v);
	47
	48	template<class _Object> static devcb_base &set_m_videoramout_cb(device_t &device, _Object object) { return downcast<raiden2cop_device &>(device).m_videoramout_cb.set_callback(object); }
	49	protected:
	50	// device-level overrides
	51	virtual void device_start();
	52
	53	private:
	54	// internal state
	55	devcb_write16       m_videoramout_cb;
	56	required_device<palette_device> m_palette;
	57	};
	58
	59	extern const device_type RAIDEN2COP;
	60
	61	#endif  /* RAIDEN2COP_H */

Property changes on: trunk/src/mame/machine/raiden2cop.h

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trunk/src/mame/machine/seicop.c

r32121	r32122
1607	1607	m_cop_438(0),
1608	1608	m_cop_43a(0),
1609	1609	m_cop_43c(0),
1610		m_cop_dma_fade_table(0),
1611		m_cop_dma_trigger(0),
1612	1610	m_cop_scale(0),
1613	1611	m_cop_rng_max_value(0),
1614	1612	m_copd2_offs(0),
r32121	r32122
1632	1630	m_cop_rom_addr_unk(0),
1633	1631	m_u1(0),
1634	1632	m_u2(0),
1635		m_fill_val(0),
1636		m_pal_brightness_val(0),
1637		m_pal_brightness_mode(0),
1638	1633	m_cop_sprite_dma_src(0),
1639	1634	m_cop_sprite_dma_abs_x(0),
1640	1635	m_cop_sprite_dma_abs_y(0),
1641	1636	m_cop_sprite_dma_size(0),
1642	1637	m_cop_sprite_dma_param(0),
1643		m_videoramout_cb(*this)
	1638	m_raiden2cop(*this, ":raiden2cop")
1644	1639	{
1645	1640	memset(m_copd2_table, 0, sizeof(UINT16)*0x100);
1646	1641	memset(m_copd2_table_2, 0, sizeof(UINT16)*0x100/8);
1647	1642	memset(m_copd2_table_3, 0, sizeof(UINT16)*0x100/8);
1648	1643	memset(m_copd2_table_4, 0, sizeof(UINT16)*0x100/8);
1649		memset(m_cop_dma_src, 0, sizeof(UINT16)*0x200);
1650		memset(m_cop_dma_size, 0, sizeof(UINT16)*0x200);
1651		memset(m_cop_dma_dst, 0, sizeof(UINT16)*0x200);
1652	1644	memset(m_seibu_vregs, 0, sizeof(UINT16)*0x50/2);
1653	1645
1654	1646	for (int i = 0; i < 8; i++)
r32121	r32122
1674	1666	void seibu_cop_legacy_device::device_start()
1675	1667	{
1676	1668	m_cop_mcu_ram = reinterpret_cast<UINT16 *>(machine().root_device().memshare("cop_mcu_ram")->ptr());
1677		m_videoramout_cb.resolve_safe();
1678	1669
1679	1670	save_item(NAME(m_cop_438));
1680	1671	save_item(NAME(m_cop_43a));
1681	1672	save_item(NAME(m_cop_43c));
1682		save_item(NAME(m_cop_dma_fade_table));
1683		save_item(NAME(m_cop_dma_trigger));
	1673	//save_item(NAME(m_cop_dma_fade_table));
	1674	//save_item(NAME(m_cop_dma_trigger));
1684	1675	save_item(NAME(m_cop_scale));
1685	1676	save_item(NAME(m_cop_rng_max_value));
1686	1677	save_item(NAME(m_copd2_offs));
r32121	r32122
1704	1695	save_item(NAME(m_cop_rom_addr_unk));
1705	1696	save_item(NAME(m_u1));
1706	1697	save_item(NAME(m_u2));
1707		save_item(NAME(m_fill_val));
1708		save_item(NAME(m_pal_brightness_val));
1709		save_item(NAME(m_pal_brightness_mode));
	1698	//   save_item(NAME(m_fill_val));
	1699	//   save_item(NAME(m_pal_brightness_val));
	1700	//   save_item(NAME(m_pal_brightness_mode));
1710	1701	save_item(NAME(m_cop_sprite_dma_src));
1711	1702	save_item(NAME(m_cop_sprite_dma_abs_x));
1712	1703	save_item(NAME(m_cop_sprite_dma_abs_y));
r32121	r32122
1716	1707	save_item(NAME(m_copd2_table_2));
1717	1708	save_item(NAME(m_copd2_table_3));
1718	1709	save_item(NAME(m_copd2_table_4));
1719		save_item(NAME(m_cop_dma_src));
1720		save_item(NAME(m_cop_dma_size));
1721		save_item(NAME(m_cop_dma_dst));
	1710	//   save_item(NAME(m_cop_dma_src));
	1711	//   save_item(NAME(m_cop_dma_size));
	1712	//   save_item(NAME(m_cop_dma_dst));
1722	1713	save_item(NAME(m_seibu_vregs));
1723	1714	}
1724	1715
r32121	r32122
2216	2207	which seems common to all the games
2217	2208	*/
2218	2209
	2210	#if 0
2219	2211	/* RE from Seibu Cup Soccer bootleg */
2220	2212	static const UINT8 fade_table(int v)
2221	2213	{
r32121	r32122
2224	2216
2225	2217	return (low * (high | (high >> 5)) + 0x210) >> 10;
2226	2218	}
	2219	#endif
2227	2220
2228
2229	2221	#define COP_CMD(_1_,_2_,_3_,_4_,_5_,_6_,_7_,_8_,_m_u1_,_m_u2_) \
2230	2222	(m_copd2_table[command+0] == _1_ && m_copd2_table[command+1] == _2_ && m_copd2_table[command+2] == _3_ && m_copd2_table[command+3] == _4_ && \
2231	2223	m_copd2_table[command+4] == _5_ && m_copd2_table[command+5] == _6_ && m_copd2_table[command+6] == _7_ && m_copd2_table[command+7] == _8_ && \
r32121	r32122
2430	2422	*/
2431	2423	break;
2432	2424
2433		case (0x028/2):
2434		case (0x02a/2):
2435		m_fill_val = (m_cop_mcu_ram[0x028/2]) | (m_cop_mcu_ram[0x02a/2] << 16);
2436		break;
	2425	// ram fill
	2426	case (0x028 / 2) : m_raiden2cop->cop_dma_v1_w(space, offset, data, mem_mask); break;
	2427	case (0x02a / 2) : m_raiden2cop->cop_dma_v2_w(space, offset, data, mem_mask); break;
2437	2428
	2429
	2430
	2431
2438	2432	/* max possible value returned by the RNG at 0x5a*, trusted */
2439	2433	case (0x02c/2): m_cop_rng_max_value = m_cop_mcu_ram[0x2c/2] & 0xff; break;
2440	2434
r32121	r32122
2459	2453	case (0x04a/2): { m_cop_rom_addr_hi = data & 0xffff; break; }
2460	2454
2461	2455	/* brightness control */
2462		case (0x05a/2): m_pal_brightness_val = data & 0xff; break;
2463		case (0x05c/2): m_pal_brightness_mode = data & 0xff; break;
2464
	2456	case (0x05a / 2) : m_raiden2cop->cop_pal_brightness_val_w(space, offset, data, mem_mask); break;
	2457	case (0x05c / 2) : m_raiden2cop->cop_pal_brightness_mode_w(space, offset, data, mem_mask); break;
	2458
2465	2459	/* DMA / layer clearing section */
2466	2460	case (0x074/2):
2467	2461	/*
r32121	r32122
2475	2469	*/
2476	2470	break;
2477	2471
2478		/* used in palette DMAs, for fading effects */
2479		case (0x076/2):
2480		m_cop_dma_fade_table = data;
2481		break;
	2472
	2473	case (0x076 / 2) : m_raiden2cop->cop_dma_adr_rel_w(space, offset, data, mem_mask); break; /* used in palette DMAs, for fading effects */
	2474	case (0x078 / 2) : m_raiden2cop->cop_dma_src_w(space, offset, data, mem_mask); break; /* DMA source address */
	2475	case (0x07a / 2) : m_raiden2cop->cop_dma_size_w(space, offset, data, mem_mask); break;/* DMA length */
	2476	case (0x07c/2): m_raiden2cop->cop_dma_dst_w(space, offset, data, mem_mask); break; /* DMA destination */
	2477	case (0x07e/2): m_raiden2cop->cop_dma_mode_w(space, offset, data, mem_mask); break; /* DMA parameter */
2482	2478
2483		case (0x078/2): /* DMA source address */
2484		{
2485		m_cop_dma_src[m_cop_dma_trigger] = data; // << 6 to get actual address
2486		//seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<6);
2487		break;
2488		}
2489	2479
2490		case (0x07a/2): /* DMA length */
2491		{
2492		m_cop_dma_size[m_cop_dma_trigger] = data;
2493		//seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<5);
2494		break;
2495		}
2496	2480
2497		case (0x07c/2): /* DMA destination */
2498		{
2499		m_cop_dma_dst[m_cop_dma_trigger] = data;
2500		//seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<6);
2501		break;
2502		}
2503	2481
2504		case (0x07e/2): /* DMA parameter */
2505		{
2506		m_cop_dma_trigger = data;
2507		//seibu_cop_log("%06x: COPX set layer clear trigger? to %04x\n", space.device().safe_pc(), data);
2508		if (data>=0x1ff)
2509		{
2510		seibu_cop_log("invalid DMA trigger!, >0x1ff\n");
2511		m_cop_dma_trigger = 0;
2512		}
2513	2482
2514		break;
2515		}
2516	2483
	2484
	2485
2517	2486	case (0x08c/2): m_cop_sprite_dma_abs_y = (m_cop_mcu_ram[0x08c/2]); break;
2518	2487	case (0x08e/2): m_cop_sprite_dma_abs_x = (m_cop_mcu_ram[0x08e/2]); break;
2519	2488
r32121	r32122
3088	3057	}
3089	3058
3090	3059	/* DMA go register */
3091		case (0x2fc/2):
3092		{
3093		//seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", space.device().safe_pc(), data);
3094		//printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger);
	3060	case (0x2fc/2):   m_raiden2cop->cop_dma_trigger_w(space, offset, data, mem_mask);   break;
3095	3061
3096		if (m_cop_dma_trigger >= 0x80 && m_cop_dma_trigger <= 0x87)
3097		{
3098		UINT32 src,dst,size,i;
3099	3062
3100		/*
3101		Apparently all of those are just different DMA channels, brightness effects are done through a RAM table and the m_pal_brightness_val / mode
3102		0x80 is used by Legionnaire
3103		0x81 is used by SD Gundam and Godzilla
3104		0x82 is used by Zero Team and X Se Dae
3105		0x86 is used by Seibu Cup Soccer
3106		0x87 is used by Denjin Makai
3107
3108		TODO:
3109		- Denjin Makai mode 4 is totally guessworked.
3110		- SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
3111		presumably bad RAM table or bad algorithm
3112		*/
3113
3114		//if(dma_trigger != 0x87)
3115		//printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x %02x %02x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table * 0x400,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger,m_pal_brightness_val,m_pal_brightness_mode);
3116
3117		src = (m_cop_dma_src[m_cop_dma_trigger] << 6);
3118		dst = (m_cop_dma_dst[m_cop_dma_trigger] << 6);
3119		size = ((m_cop_dma_size[m_cop_dma_trigger] << 5) - (m_cop_dma_dst[m_cop_dma_trigger] << 6) + 0x20)/2;
3120
3121		for(i = 0;i < size;i++)
3122		{
3123		UINT16 pal_val;
3124		int r,g,b;
3125		int rt,gt,bt;
3126
3127		if(m_pal_brightness_mode == 5)
3128		{
3129		bt = ((space.read_word(src + (m_cop_dma_fade_table * 0x400))) & 0x7c00) >> 5;
3130		bt = fade_table(bt|(m_pal_brightness_val ^ 0));
3131		b = ((space.read_word(src)) & 0x7c00) >> 5;
3132		b = fade_table(b|(m_pal_brightness_val ^ 0x1f));
3133		pal_val = ((b + bt) & 0x1f) << 10;
3134		gt = ((space.read_word(src + (m_cop_dma_fade_table * 0x400))) & 0x03e0);
3135		gt = fade_table(gt|(m_pal_brightness_val ^ 0));
3136		g = ((space.read_word(src)) & 0x03e0);
3137		g = fade_table(g|(m_pal_brightness_val ^ 0x1f));
3138		pal_val |= ((g + gt) & 0x1f) << 5;
3139		rt = ((space.read_word(src + (m_cop_dma_fade_table * 0x400))) & 0x001f) << 5;
3140		rt = fade_table(rt|(m_pal_brightness_val ^ 0));
3141		r = ((space.read_word(src)) & 0x001f) << 5;
3142		r = fade_table(r|(m_pal_brightness_val ^ 0x1f));
3143		pal_val |= ((r + rt) & 0x1f);
3144		}
3145		else if(m_pal_brightness_mode == 4) //Denjin Makai
3146		{
3147		bt =(space.read_word(src + (m_cop_dma_fade_table * 0x400)) & 0x7c00) >> 10;
3148		b = (space.read_word(src) & 0x7c00) >> 10;
3149		gt =(space.read_word(src + (m_cop_dma_fade_table * 0x400)) & 0x03e0) >> 5;
3150		g = (space.read_word(src) & 0x03e0) >> 5;
3151		rt =(space.read_word(src + (m_cop_dma_fade_table * 0x400)) & 0x001f) >> 0;
3152		r = (space.read_word(src) & 0x001f) >> 0;
3153
3154		if(m_pal_brightness_val == 0x10)
3155		pal_val = bt << 10 | gt << 5 | rt << 0;
3156		else if(m_pal_brightness_val == 0xff) // TODO: might be the back plane or it still doesn't do any mod, needs PCB tests
3157		pal_val = 0;
3158		else
3159		{
3160		bt = fade_table(bt<<5|((m_pal_brightness_val*2) ^ 0));
3161		b =  fade_table(b<<5|((m_pal_brightness_val*2) ^ 0x1f));
3162		pal_val = ((b + bt) & 0x1f) << 10;
3163		gt = fade_table(gt<<5|((m_pal_brightness_val*2) ^ 0));
3164		g =  fade_table(g<<5|((m_pal_brightness_val*2) ^ 0x1f));
3165		pal_val |= ((g + gt) & 0x1f) << 5;
3166		rt = fade_table(rt<<5|((m_pal_brightness_val*2) ^ 0));
3167		r =  fade_table(r<<5|((m_pal_brightness_val*2) ^ 0x1f));
3168		pal_val |= ((r + rt) & 0x1f);
3169		}
3170		}
3171		else
3172		{
3173		printf("Warning: palette DMA used with mode %02x!\n",m_pal_brightness_mode);
3174		pal_val = space.read_word(src);
3175		}
3176
3177		space.write_word(dst, pal_val);
3178		src+=2;
3179		dst+=2;
3180		}
3181
3182		return;
3183		}
3184
3185		/* Seibu Cup Soccer trigger this*/
3186		if (m_cop_dma_trigger == 0x0e)
3187		{
3188		UINT32 src,dst,size,i;
3189
3190		src = (m_cop_dma_src[m_cop_dma_trigger] << 6);
3191		dst = (m_cop_dma_dst[m_cop_dma_trigger] << 6);
3192		size = ((m_cop_dma_size[m_cop_dma_trigger] << 5) - (m_cop_dma_dst[m_cop_dma_trigger] << 6) + 0x20)/2;
3193
3194		for(i = 0;i < size;i++)
3195		{
3196		space.write_word(dst, space.read_word(src));
3197		src+=2;
3198		dst+=2;
3199		}
3200
3201		return;
3202		}
3203
3204		/* do the fill  */
3205		if (m_cop_dma_trigger >= 0x118 && m_cop_dma_trigger <= 0x11f)
3206		{
3207		UINT32 length, address;
3208		int i;
3209		if(m_cop_dma_dst[m_cop_dma_trigger] != 0x0000) // Invalid?
3210		return;
3211
3212		address = (m_cop_dma_src[m_cop_dma_trigger] << 6);
3213		length = (m_cop_dma_size[m_cop_dma_trigger]+1) << 5;
3214
3215		//printf("%08x %08x\n",address,length);
3216
3217		for (i=address;i<address+length;i+=4)
3218		{
3219		space.write_dword(i, m_fill_val);
3220		}
3221
3222		return;
3223		}
3224
3225		/* Godzilla specific */
3226		if (m_cop_dma_trigger == 0x116)
3227		{
3228		UINT32 length, address;
3229		int i;
3230
3231		//if(m_cop_dma_dst[m_cop_dma_trigger] != 0x0000) // Invalid?
3232		//  return;
3233
3234		address = (m_cop_dma_src[m_cop_dma_trigger] << 6);
3235		length = ((m_cop_dma_size[m_cop_dma_trigger]+1) << 4);
3236
3237		for (i=address;i<address+length;i+=4)
3238		{
3239		space.write_dword(i, m_fill_val);
3240		}
3241
3242		return;
3243		}
3244
3245		/* private buffer copies - tilemaps */
3246		if (m_cop_dma_trigger == 0x14)
3247		{
3248		//   AM_RANGE(0x101000, 0x1017ff) AM_RAM // _WRITE(legionna_background_w) AM_SHARE("back_data")
3249		//   AM_RANGE(0x101800, 0x101fff) AM_RAM // _WRITE(legionna_foreground_w) AM_SHARE("fore_data")
3250		//   AM_RANGE(0x102000, 0x1027ff) AM_RAM // _WRITE(legionna_midground_w) AM_SHARE("mid_data")
3251		//   AM_RANGE(0x102800, 0x1037ff) AM_RAM // _WRITE(legionna_text_w) AM_SHARE("textram")
3252		int src = m_cop_dma_src[m_cop_dma_trigger] << 6;
3253
3254		for (int i = 0; i < 0x2800 /2; i++)
3255		{
3256		UINT16 tileval = space.read_word(src);
3257		//printf("reading source %04x (data is %04x)\n", src, data);
3258		src += 2;
3259		m_videoramout_cb(space, i, tileval, 0xffff);
3260		}
3261
3262		return;
3263		}
3264
3265		/* private buffer copy - palette? */
3266		if (m_cop_dma_trigger == 0x15)
3267		{
3268		//printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger);
3269		}
3270		return;
3271
3272		printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger);
3273
3274		break;
3275		}
3276
3277	3063	/* sort-DMA, oh my ... */
3278	3064	case (0x054/2): { m_cop_sort_lookup = (m_cop_sort_lookup&0x0000ffff)|(m_cop_mcu_ram[offset]<<16); break; }
3279	3065	case (0x056/2): { m_cop_sort_lookup = (m_cop_sort_lookup&0xffff0000)|(m_cop_mcu_ram[offset]<<0);  break; }

trunk/src/mame/machine/seicop.h

r32121	r32122
1	1
	2	#include "raiden2cop.h"
	3
2	4	struct collision_info
3	5	{
4	6	collision_info():
r32121	r32122
18	20	UINT16 hitbox_x,hitbox_y;
19	21	};
20	22
21		#define MCFG_VIDEORAM_OUT_CB(_devcb) \
22		devcb = &seibu_cop_legacy_device::set_m_videoramout_cb(*device, DEVCB_##_devcb);
23	23
24	24	class seibu_cop_legacy_device : public device_t
25	25	{
r32121	r32122
44	44	DECLARE_READ16_MEMBER( legionna_mcu_r );
45	45	DECLARE_WRITE16_MEMBER( legionna_mcu_w );
46	46
47		//DECLARE_READ16_MEMBER( raiden2_mcu_r );   unused
48		//DECLARE_WRITE16_MEMBER( raiden2_mcu_w );  unused
49		template<class _Object> static devcb_base &set_m_videoramout_cb(device_t &device, _Object object) { return downcast<seibu_cop_legacy_device &>(device).m_videoramout_cb.set_callback(object); }
50
51	47	protected:
52	48	// device-level overrides
53	49	virtual void device_config_complete();
r32121	r32122
63	59	UINT16 m_cop_438;
64	60	UINT16 m_cop_43a;
65	61	UINT16 m_cop_43c;
66		UINT16 m_cop_dma_src[0x200];
67		UINT16 m_cop_dma_size[0x200];
68		UINT16 m_cop_dma_dst[0x200];
69		UINT16 m_cop_dma_fade_table;
70		UINT16 m_cop_dma_trigger;
	62
71	63	UINT16 m_cop_scale;
72	64	UINT8 m_cop_rng_max_value;
73	65	UINT16 m_copd2_offs;
r32121	r32122
83	75	int m_r0, m_r1;
84	76	UINT16 m_cop_rom_addr_lo,m_cop_rom_addr_hi,m_cop_rom_addr_unk;
85	77	UINT16 m_u1,m_u2;
86		UINT32 m_fill_val;
87		UINT8 m_pal_brightness_val,m_pal_brightness_mode;
	78
88	79	UINT32 m_cop_sprite_dma_src;
89	80	int m_cop_sprite_dma_abs_x,m_cop_sprite_dma_abs_y,m_cop_sprite_dma_size;
90	81	UINT32 m_cop_sprite_dma_param;
r32121	r32122
96	87	UINT8 cop_calculate_collsion_detection();
97	88	DECLARE_READ16_MEMBER( generic_cop_r );
98	89	DECLARE_WRITE16_MEMBER( generic_cop_w );
99		devcb_write16       m_videoramout_cb;
100	90
	91	required_device<raiden2cop_device> m_raiden2cop;
	92
101	93	};
102	94
103	95	extern const device_type SEIBU_COP_LEGACY;
104	96
105	97	#define MCFG_SEIBU_COP_ADD(_tag) \
106	98	MCFG_DEVICE_ADD(_tag, SEIBU_COP_LEGACY, 0)
	99

trunk/src/mame/includes/legionna.h

r32121	r32122
1	1	#include "sound/okim6295.h"
	2	#include "machine/raiden2cop.h"
2	3
	4
3	5	class legionna_state : public driver_device
4	6	{
5	7	public:
r32121	r32122
14	16	m_audiocpu(*this, "audiocpu"),
15	17	m_oki(*this, "oki"),
16	18	m_gfxdecode(*this, "gfxdecode"),
17		m_palette(*this, "palette") { }
	19	m_palette(*this, "palette"),
	20	m_wordswapram(*this, "wordswapram")
	21	{ }
18	22
19	23	required_shared_ptr<UINT16> m_spriteram;
20	24	UINT16* m_back_data;
r32121	r32122
36	40	UINT16 m_mid_gfx_bank;
37	41
38	42	DECLARE_WRITE16_MEMBER(videowrite_cb_w);
39		DECLARE_WRITE16_MEMBER(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w);
	43	DECLARE_WRITE16_MEMBER(wordswapram_w);
40	44	DECLARE_WRITE16_MEMBER(legionna_background_w);
41	45	DECLARE_WRITE16_MEMBER(legionna_midground_w);
42	46	DECLARE_WRITE16_MEMBER(legionna_foreground_w);
r32121	r32122
70	74	required_device<okim6295_device> m_oki;
71	75	required_device<gfxdecode_device> m_gfxdecode;
72	76	required_device<palette_device> m_palette;
	77	optional_shared_ptr<UINT16> m_wordswapram;
	78
73	79	};
74	80
75	81	/*----------- defined in video/legionna.c -----------*/

trunk/src/mame/includes/raiden2.h

r32121	r32122
1	1	#include "audio/seibu.h"
	2	#include "machine/raiden2cop.h"
2	3
3	4	class raiden2_state : public driver_device
4	5	{
r32121	r32122
17	18	m_gfxdecode(*this, "gfxdecode"),
18	19	m_palette(*this, "palette"),
19	20	tile_buffer(320, 256),
20		sprite_buffer(320, 256)
	21	sprite_buffer(320, 256),
	22	m_raiden2cop(*this, "raiden2cop")
21	23	{ }
22	24
23	25	UINT16 *back_data, *fore_data, *mid_data, *text_data;
r32121	r32122
30	32	DECLARE_WRITE16_MEMBER( cop_itoa_low_w );
31	33	DECLARE_WRITE16_MEMBER( cop_itoa_high_w );
32	34	DECLARE_WRITE16_MEMBER( cop_itoa_digit_count_w );
33		DECLARE_WRITE16_MEMBER( cop_dma_v1_w );
34		DECLARE_WRITE16_MEMBER( cop_dma_v2_w );
35	35	DECLARE_WRITE16_MEMBER( cop_scale_w );
36	36	DECLARE_WRITE16_MEMBER( cop_angle_target_w );
37	37	DECLARE_WRITE16_MEMBER( cop_angle_step_w );
38		DECLARE_WRITE16_MEMBER( cop_dma_adr_rel_w );
39		DECLARE_WRITE16_MEMBER( cop_dma_src_w );
40		DECLARE_WRITE16_MEMBER( cop_dma_size_w );
41		DECLARE_WRITE16_MEMBER( cop_dma_dst_w );
42		DECLARE_READ16_MEMBER( cop_dma_mode_r );
43		DECLARE_WRITE16_MEMBER( cop_dma_mode_w );
44		DECLARE_WRITE16_MEMBER( cop_pal_brightness_val_w );
	38
45	39	DECLARE_READ16_MEMBER ( cop_reg_high_r );
46	40	DECLARE_WRITE16_MEMBER( cop_reg_high_w );
47	41	DECLARE_READ16_MEMBER ( cop_reg_low_r );
r32121	r32122
65	59	DECLARE_WRITE16_MEMBER( cop_angle_compare_w );
66	60	DECLARE_WRITE16_MEMBER( cop_angle_mod_val_w );
67	61
68		DECLARE_WRITE16_MEMBER ( cop_dma_trigger_w );
69	62	DECLARE_WRITE16_MEMBER ( raiden2_bank_w );
70	63	DECLARE_READ16_MEMBER ( cop_tile_bank_2_r );
71	64	DECLARE_WRITE16_MEMBER ( cop_tile_bank_2_w );
r32121	r32122
108	101	UINT32 cop_regs[8], cop_itoa;
109	102	UINT16 cop_status, cop_scale, cop_itoa_digit_count, cop_angle, cop_dist;
110	103	UINT8 cop_itoa_digits[10];
111		UINT16 cop_dma_mode, cop_dma_src[0x200], cop_dma_dst[0x200], cop_dma_size[0x200], cop_dma_v1, cop_dma_v2, cop_dma_adr_rel;
112		UINT16 sprites_cur_start;
113		UINT16 pal_brightness_val;
114	104
115	105	UINT16 cop_func_trigger[0x100/8];       /* function trigger */
116	106	UINT16 cop_func_value[0x100/8];         /* function value (?) */
r32121	r32122
179	169	INTERRUPT_GEN_MEMBER(raiden2_interrupt);
180	170	UINT16 rps();
181	171	UINT16 rpc();
182		const UINT8 fade_table(int v);
183	172	void combine32(UINT32 *val, int offset, UINT16 data, UINT16 mem_mask);
184	173	void sprcpt_init(void);
185	174
186	175	void blend_layer(bitmap_rgb32 &bitmap, const rectangle &cliprect, bitmap_ind16 &source, int layer);
187	176	void tilemap_draw_and_blend(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, tilemap_t *tilemap);
188	177
	178	required_device<raiden2cop_device> m_raiden2cop;
	179
	180
189	181	};
190	182
191	183	/*----------- defined in machine/r2crypt.c -----------*/

trunk/src/mame/mame.mak

r32121	r32122
515	515	MACHINES += SCSI
516	516	MACHINES += SCUDSP
517	517	#MACHINES += SECFLASH
518		MACHINES += SEIBU_COP
519	518	MACHINES += SERFLASH
520	519	MACHINES += SMC91C9X
521	520	MACHINES += SMPC
r32121	r32122
1766	1765	$(DRIVERS)/panicr.o \
1767	1766	$(DRIVERS)/raiden.o $(VIDEO)/raiden.o \
1768	1767	$(DRIVERS)/raiden2.o $(MACHINE)/r2crypt.o \
	1768	$(MACHINE)/raiden2cop.o \
1769	1769	$(DRIVERS)/r2dx_v33.o \
1770	1770	$(DRIVERS)/seibuspi.o $(MACHINE)/seibuspi.o $(VIDEO)/seibuspi.o \
1771	1771	$(DRIVERS)/sengokmj.o \

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