trunk/src/emu/bus/ti99_peb/bwg.c
r32117 | r32118 | |
136 | 136 | |
137 | 137 | SETADDRESS_DBIN_MEMBER( snug_bwg_device::setaddress_dbin ) |
138 | 138 | { |
| 139 | // Do not allow setaddress for debugger |
| 140 | if (space.debugger_access()) return; |
| 141 | |
139 | 142 | // Selection login in the PAL and some circuits on the board |
140 | 143 | |
141 | 144 | // Is the card being selected? |
r32117 | r32118 | |
181 | 184 | } |
182 | 185 | |
183 | 186 | /* |
| 187 | Access for debugger. This is a stripped-down version of the |
| 188 | main methods below. We only allow ROM and RAM access. |
| 189 | */ |
| 190 | void snug_bwg_device::debug_read(offs_t offset, UINT8* value) |
| 191 | { |
| 192 | if (((offset & m_select_mask)==m_select_value) && m_selected) |
| 193 | { |
| 194 | if ((offset & 0x1c00)==0x1c00) |
| 195 | { |
| 196 | if ((offset & 0x1fe0)!=0x1fe0) |
| 197 | *value = m_buffer_ram[(m_ram_page<<10) | (offset & 0x03ff)]; |
| 198 | } |
| 199 | else |
| 200 | *value = m_dsrrom[(m_rom_page<<13) | (offset & 0x1fff)]; |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | void snug_bwg_device::debug_write(offs_t offset, UINT8 data) |
| 205 | { |
| 206 | if (((offset & m_select_mask)==m_select_value) && m_selected) |
| 207 | { |
| 208 | if (((offset & 0x1c00)==0x1c00) && ((offset & 0x1fe0)!=0x1fe0)) |
| 209 | m_buffer_ram[(m_ram_page<<10) | (m_address & 0x03ff)] = data; |
| 210 | } |
| 211 | } |
| 212 | |
| 213 | /* |
184 | 214 | Read a byte from ROM, RAM, FDC, or RTC. See setaddress_dbin for selection |
185 | 215 | logic. |
186 | 216 | */ |
187 | 217 | READ8Z_MEMBER(snug_bwg_device::readz) |
188 | 218 | { |
| 219 | if (space.debugger_access()) |
| 220 | { |
| 221 | debug_read(offset, value); |
| 222 | return; |
| 223 | } |
| 224 | |
189 | 225 | if (m_inDsrArea && m_selected) |
190 | 226 | { |
191 | 227 | // 010x xxxx xxxx xxxx |
r32117 | r32118 | |
197 | 233 | if (m_RTCsel) |
198 | 234 | { |
199 | 235 | // .... ..11 111x xxx0 |
200 | | if (!space.debugger_access()) *value = m_clock->read(space, (m_address & 0x001e) >> 1); |
| 236 | *value = m_clock->read(space, (m_address & 0x001e) >> 1); |
201 | 237 | if (TRACE_RW) logerror("bwg: read RTC: %04x -> %02x\n", m_address & 0xffff, *value); |
202 | 238 | } |
203 | 239 | else |
r32117 | r32118 | |
213 | 249 | // .... ..11 1111 0xx0 |
214 | 250 | // Note that the value is inverted again on the board, |
215 | 251 | // so we can drop the inversion |
216 | | if (!space.debugger_access()) *value = m_wd1773->gen_r((m_address >> 1)&0x03); |
| 252 | *value = m_wd1773->gen_r((m_address >> 1)&0x03); |
217 | 253 | if (TRACE_RW) logerror("bwg: read FDC: %04x -> %02x\n", m_address & 0xffff, *value); |
218 | 254 | if (TRACE_DATA) |
219 | 255 | { |
r32117 | r32118 | |
250 | 286 | */ |
251 | 287 | WRITE8_MEMBER(snug_bwg_device::write) |
252 | 288 | { |
| 289 | if (space.debugger_access()) |
| 290 | { |
| 291 | debug_write(offset, data); |
| 292 | return; |
| 293 | } |
| 294 | |
253 | 295 | if (m_inDsrArea && m_selected) |
254 | 296 | { |
255 | 297 | if (m_lastK) |
r32117 | r32118 | |
260 | 302 | { |
261 | 303 | // .... ..11 111x xxx0 |
262 | 304 | if (TRACE_RW) logerror("bwg: write RTC: %04x <- %02x\n", m_address & 0xffff, data); |
263 | | if (!space.debugger_access()) m_clock->write(space, (m_address & 0x001e) >> 1, data); |
| 305 | m_clock->write(space, (m_address & 0x001e) >> 1, data); |
264 | 306 | } |
265 | 307 | else |
266 | 308 | { |
r32117 | r32118 | |
276 | 318 | // Note that the value is inverted again on the board, |
277 | 319 | // so we can drop the inversion |
278 | 320 | if (TRACE_RW) logerror("bwg: write FDC: %04x <- %02x\n", m_address & 0xffff, data); |
279 | | if (!space.debugger_access()) m_wd1773->gen_w((m_address >> 1)&0x03, data); |
| 321 | m_wd1773->gen_w((m_address >> 1)&0x03, data); |
280 | 322 | } |
281 | 323 | else |
282 | 324 | { |
trunk/src/emu/bus/ti99_peb/hfdc.c
r32117 | r32118 | |
96 | 96 | |
97 | 97 | SETADDRESS_DBIN_MEMBER( myarc_hfdc_device::setaddress_dbin ) |
98 | 98 | { |
99 | | // Debugger does not run safely with HFDC |
100 | | // TODO: Check why debugger messes up the access (likely to happen at other locations, too) |
| 99 | // Do not allow setaddress for the debugger. It will mess up the |
| 100 | // setaddress/memory access pairs when the CPU enters wait states. |
101 | 101 | if (space.debugger_access()) return; |
102 | 102 | |
103 | 103 | // Selection login in the PAL and some circuits on the board |
r32117 | r32118 | |
139 | 139 | } |
140 | 140 | |
141 | 141 | /* |
| 142 | Access for debugger. This is a stripped-down version of the |
| 143 | main methods below. We only allow ROM and RAM access. |
| 144 | */ |
| 145 | void myarc_hfdc_device::debug_read(offs_t offset, UINT8* value) |
| 146 | { |
| 147 | if (((offset & m_select_mask)==m_select_value) && m_selected) |
| 148 | { |
| 149 | if ((offset & 0x1000)==RAM_ADDR) |
| 150 | { |
| 151 | int bank = (offset & 0x0c00) >> 10; |
| 152 | *value = m_buffer_ram[(m_ram_page[bank]<<10) | (offset & 0x03ff)]; |
| 153 | } |
| 154 | else |
| 155 | { |
| 156 | if ((offset & 0x0fc0)!=0x0fc0) |
| 157 | { |
| 158 | *value = m_dsrrom[(m_rom_page << 12) | (offset & 0x0fff)]; |
| 159 | } |
| 160 | } |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | void myarc_hfdc_device::debug_write(offs_t offset, UINT8 data) |
| 165 | { |
| 166 | if (((offset & m_select_mask)==m_select_value) && m_selected) |
| 167 | { |
| 168 | if ((offset & 0x1000)==RAM_ADDR) |
| 169 | { |
| 170 | int bank = (offset & 0x0c00) >> 10; |
| 171 | m_buffer_ram[(m_ram_page[bank]<<10) | (m_address & 0x03ff)] = data; |
| 172 | } |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | /* |
142 | 177 | Read a byte from the memory address space of the HFDC |
143 | 178 | |
144 | 179 | 0x4000 - 0x4fbf one of four possible ROM pages |
r32117 | r32118 | |
155 | 190 | */ |
156 | 191 | READ8Z_MEMBER(myarc_hfdc_device::readz) |
157 | 192 | { |
158 | | // Debugger does not run safely with HFDC |
159 | | if (space.debugger_access()) return; |
| 193 | if (space.debugger_access()) |
| 194 | { |
| 195 | debug_read(offset, value); |
| 196 | return; |
| 197 | } |
160 | 198 | |
161 | 199 | if (m_inDsrArea && m_selected) |
162 | 200 | { |
r32117 | r32118 | |
229 | 267 | */ |
230 | 268 | WRITE8_MEMBER( myarc_hfdc_device::write ) |
231 | 269 | { |
232 | | // Debugger does not run safely with HFDC |
233 | | if (space.debugger_access()) return; |
| 270 | if (space.debugger_access()) |
| 271 | { |
| 272 | debug_write(offset, data); |
| 273 | return; |
| 274 | } |
234 | 275 | |
235 | 276 | if (m_inDsrArea && m_selected) |
236 | 277 | { |