trunk/src/emu/bus/a2bus/a2bus.c
| r32058 | r32059 | |
| 1 | // license:BSD-3-Clause |
| 2 | // copyright-holders:R. Belmont |
| 1 | 3 | /*************************************************************************** |
| 2 | 4 | |
| 3 | 5 | a2bus.c - Apple II slot bus and card emulation |
| r32058 | r32059 | |
| 169 | 171 | { |
| 170 | 172 | m_device_list[i] = NULL; |
| 171 | 173 | } |
| 174 | |
| 175 | m_slot_irq_mask = m_slot_nmi_mask = 0; |
| 172 | 176 | } |
| 173 | 177 | |
| 174 | 178 | //------------------------------------------------- |
| r32058 | r32059 | |
| 199 | 203 | m_device_list[slot] = card; |
| 200 | 204 | } |
| 201 | 205 | |
| 202 | | void a2bus_device::set_irq_line(int state) |
| 206 | UINT8 a2bus_device::get_a2bus_irq_mask() |
| 203 | 207 | { |
| 208 | return m_slot_irq_mask; |
| 209 | } |
| 210 | |
| 211 | UINT8 a2bus_device::get_a2bus_nmi_mask() |
| 212 | { |
| 213 | return m_slot_nmi_mask; |
| 214 | } |
| 215 | |
| 216 | void a2bus_device::set_irq_line(int state, int slot) |
| 217 | { |
| 204 | 218 | m_out_irq_cb(state); |
| 219 | |
| 220 | if (state == CLEAR_LINE) |
| 221 | { |
| 222 | m_slot_irq_mask &= ~(1<<slot); |
| 223 | } |
| 224 | else if (state == ASSERT_LINE) |
| 225 | { |
| 226 | m_slot_irq_mask |= (1<<slot); |
| 227 | } |
| 205 | 228 | } |
| 206 | 229 | |
| 207 | | void a2bus_device::set_nmi_line(int state) |
| 230 | void a2bus_device::set_nmi_line(int state, int slot) |
| 208 | 231 | { |
| 209 | 232 | m_out_nmi_cb(state); |
| 233 | |
| 234 | if (state == CLEAR_LINE) |
| 235 | { |
| 236 | m_slot_nmi_mask &= ~(1<<slot); |
| 237 | } |
| 238 | else if (state == ASSERT_LINE) |
| 239 | { |
| 240 | m_slot_nmi_mask |= (1<<slot); |
| 241 | } |
| 210 | 242 | } |
| 211 | 243 | |
| 212 | 244 | void a2bus_device::set_inh_slotnum(int slot) |
trunk/src/emu/bus/a2bus/a2bus.h
| r32058 | r32059 | |
| 92 | 92 | |
| 93 | 93 | void add_a2bus_card(int slot, device_a2bus_card_interface *card); |
| 94 | 94 | device_a2bus_card_interface *get_a2bus_card(int slot); |
| 95 | UINT8 get_a2bus_irq_mask(); |
| 96 | UINT8 get_a2bus_nmi_mask(); |
| 95 | 97 | |
| 96 | | void set_irq_line(int state); |
| 97 | | void set_nmi_line(int state); |
| 98 | void set_irq_line(int state, int slot); |
| 99 | void set_nmi_line(int state, int slot); |
| 98 | 100 | void set_inh_slotnum(int slot); |
| 99 | 101 | |
| 100 | 102 | DECLARE_WRITE_LINE_MEMBER( irq_w ); |
| r32058 | r32059 | |
| 114 | 116 | |
| 115 | 117 | device_a2bus_card_interface *m_device_list[8]; |
| 116 | 118 | const char *m_cputag; |
| 119 | |
| 120 | UINT8 m_slot_irq_mask; |
| 121 | UINT8 m_slot_nmi_mask; |
| 117 | 122 | }; |
| 118 | 123 | |
| 119 | 124 | |
| r32058 | r32059 | |
| 148 | 153 | UINT32 get_slotromspace() { return 0xc000 | (m_slot<<8); } // return Cn00 address for this slot |
| 149 | 154 | UINT32 get_slotiospace() { return 0xc080 + (m_slot<<4); } // return C0n0 address for this slot |
| 150 | 155 | |
| 151 | | void raise_slot_irq() { m_a2bus->set_irq_line(ASSERT_LINE); } |
| 152 | | void lower_slot_irq() { m_a2bus->set_irq_line(CLEAR_LINE); } |
| 153 | | void raise_slot_nmi() { m_a2bus->set_nmi_line(ASSERT_LINE); } |
| 154 | | void lower_slot_nmi() { m_a2bus->set_nmi_line(CLEAR_LINE); } |
| 156 | void raise_slot_irq() { m_a2bus->set_irq_line(ASSERT_LINE, m_slot); } |
| 157 | void lower_slot_irq() { m_a2bus->set_irq_line(CLEAR_LINE, m_slot); } |
| 158 | void raise_slot_nmi() { m_a2bus->set_nmi_line(ASSERT_LINE, m_slot); } |
| 159 | void lower_slot_nmi() { m_a2bus->set_nmi_line(CLEAR_LINE, m_slot); } |
| 155 | 160 | void raise_slot_inh() { m_a2bus->set_inh_slotnum(m_slot); } |
| 156 | 161 | void lower_slot_inh() { m_a2bus->set_inh_slotnum(INH_SLOT_INVALID); } |
| 157 | 162 | |
trunk/src/mess/machine/apple3.c
| r32058 | r32059 | |
| 1239 | 1239 | m_pdltimer->adjust(attotime::from_hz(1000000.0)); |
| 1240 | 1240 | } |
| 1241 | 1241 | } |
| 1242 | |
| 1243 | WRITE_LINE_MEMBER(apple3_state::a2bus_irq_w) |
| 1244 | { |
| 1245 | UINT8 irq_mask = m_a2bus->get_a2bus_irq_mask(); |
| 1246 | |
| 1247 | m_via_1->write_ca1(state); |
| 1248 | m_via_1->write_pa7(state); |
| 1249 | |
| 1250 | if (irq_mask & (1<<4)) |
| 1251 | { |
| 1252 | m_via_1->write_pa4(ASSERT_LINE); |
| 1253 | } |
| 1254 | else |
| 1255 | { |
| 1256 | m_via_1->write_pa4(CLEAR_LINE); |
| 1257 | } |
| 1258 | |
| 1259 | if (irq_mask & (1<<3)) |
| 1260 | { |
| 1261 | m_via_1->write_pa5(ASSERT_LINE); |
| 1262 | } |
| 1263 | else |
| 1264 | { |
| 1265 | m_via_1->write_pa5(CLEAR_LINE); |
| 1266 | } |
| 1267 | } |
| 1268 | |
| 1269 | WRITE_LINE_MEMBER(apple3_state::a2bus_nmi_w) |
| 1270 | { |
| 1271 | m_via_1->write_pb7(state); |
| 1272 | |
| 1273 | if (m_via_0_a & ENV_NMIENABLE) |
| 1274 | { |
| 1275 | m_maincpu->set_input_line(INPUT_LINE_NMI, state); |
| 1276 | } |
| 1277 | } |
| 1278 | |
trunk/src/mess/drivers/apple3.c
| r32058 | r32059 | |
| 87 | 87 | /* slot bus */ |
| 88 | 88 | MCFG_DEVICE_ADD("a2bus", A2BUS, 0) |
| 89 | 89 | MCFG_A2BUS_CPU("maincpu") |
| 90 | | //MCFG_A2BUS_OUT_IRQ_CB(WRITELINE(apple3_state, a2bus_irq_w)) |
| 91 | | //MCFG_A2BUS_OUT_NMI_CB(WRITELINE(apple3_state, a2bus_nmi_w)) |
| 90 | MCFG_A2BUS_OUT_IRQ_CB(WRITELINE(apple3_state, a2bus_irq_w)) |
| 91 | MCFG_A2BUS_OUT_NMI_CB(WRITELINE(apple3_state, a2bus_nmi_w)) |
| 92 | 92 | //MCFG_A2BUS_OUT_INH_CB(WRITELINE(apple3_state, a2bus_inh_w)) |
| 93 | 93 | MCFG_A2BUS_SLOT_ADD("a2bus", "sl1", apple3_cards, NULL) |
| 94 | 94 | MCFG_A2BUS_SLOT_ADD("a2bus", "sl2", apple3_cards, NULL) |