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r32034 Tuesday 9th September, 2014 at 19:44:31 UTC by David Haywood
buffer tilemaps to prevent tilemap / tilebank desync in r2 intro (fixes 1 frame glitches in animation)
[src/mame/drivers]raiden2.c
[src/mame/includes]raiden2.h
[src/mame/machine]seicop.c

trunk/src/mame/machine/seicop.c
r32033r32034
32573257            return;
32583258         }
32593259
3260         /* privaet buffer copy - sprites? */
3261         if (m_cop_dma_trigger==0x15)
3260         /* private buffer copy - palette? */
3261         if (m_cop_dma_trigger == 0x15)
3262         {
3263            //printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger);
3264         }
32623265         return;
32633266
32643267         printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",m_cop_dma_src[m_cop_dma_trigger] << 6,m_cop_dma_fade_table,m_cop_dma_dst[m_cop_dma_trigger] << 6,m_cop_dma_size[m_cop_dma_trigger] << 5,m_cop_dma_trigger);
trunk/src/mame/includes/raiden2.h
r32033r32034
55public:
66   raiden2_state(const machine_config &mconfig, device_type type, const char *tag)
77      : driver_device(mconfig, type, tag),
8      /*
89        back_data(*this, "back_data"),
910        fore_data(*this, "fore_data"),
1011        mid_data(*this, "mid_data"),
1112        text_data(*this, "text_data"),
13        */
1214        sprites(*this, "sprites") ,
1315        m_maincpu(*this, "maincpu"),
1416        m_seibu_sound(*this, "seibu_sound"),
r32033r32034
1820        sprite_buffer(320, 256)
1921   { }
2022
21   required_shared_ptr<UINT16> back_data,fore_data,mid_data, text_data, sprites;
23   UINT16 *back_data, *fore_data, *mid_data, *text_data;
24   required_shared_ptr<UINT16> sprites;
2225   required_device<cpu_device> m_maincpu;
2326   required_device<seibu_sound_device> m_seibu_sound;
2427   required_device<gfxdecode_device> m_gfxdecode;
r32033r32034
7477   DECLARE_WRITE16_MEMBER ( raiden2_foreground_w );
7578   DECLARE_WRITE16_MEMBER ( raiden2_midground_w );
7679   DECLARE_WRITE16_MEMBER ( raiden2_text_w );
80   DECLARE_WRITE16_MEMBER(m_videoram_private_w);
7781
7882   DECLARE_WRITE16_MEMBER( sprcpt_val_1_w );
7983   DECLARE_WRITE16_MEMBER( sprcpt_val_2_w );
trunk/src/mame/drivers/raiden2.c
r32033r32034
333333   return (low * (high | (high >> 5)) + 0x210) >> 10;
334334}
335335
336WRITE16_MEMBER(raiden2_state::m_videoram_private_w)
337{
338   //AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_SHARE("back_data")
339   //AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
340   //AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(raiden2_midground_w)  AM_SHARE("mid_data")
341   //AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(raiden2_text_w) AM_SHARE("text_data")
342
343   if (offset < 0x800 / 2)
344   {
345      raiden2_background_w(space, offset, data, 0xffff);
346   }
347   else if (offset < 0x1000 /2)
348   {
349      offset -= 0x800 / 2;
350      raiden2_foreground_w(space, offset, data, 0xffff);
351   }
352   else if (offset < 0x1800/2)
353   {
354      offset -= 0x1000 / 2;
355      raiden2_midground_w(space, offset, data, 0xffff);
356   }
357   else if (offset < 0x2800/2)
358   {
359      offset -= 0x1800 / 2;
360      raiden2_text_w(space, offset, data, 0xffff);
361   }
362}
363
336364WRITE16_MEMBER(raiden2_state::cop_dma_trigger_w)
337365{
338   //  logerror("COP DMA mode=%x adr=%x size=%x vals=%x %x %x\n", cop_dma_mode, cop_dma_src[cop_dma_mode], cop_dma_size[cop_dma_mode], cop_dma_v1[cop_dma_mode], cop_dma_v2[cop_dma_mode], cop_dma_dst[cop_dma_mode]);
339
366   /*
367   printf("COP DMA mode=%x adr=%x size=%x vals=%x %x %x\n",
368      cop_dma_mode,
369      cop_dma_src[cop_dma_mode]<<6,
370      cop_dma_size[cop_dma_mode]<<4,
371      cop_dma_v1,
372      cop_dma_v2,
373      cop_dma_dst[cop_dma_mode]);
374   */
340375   switch(cop_dma_mode) {
341376   case 0x14: {
342377      /* TODO: this transfers the whole VRAM, not only spriteram!
r32033r32034
344379         Raiden 2 uses this DMA with cop_dma_dst == 0xfffe, effectively changing the order of the uploaded VRAMs.
345380         Also the size is used for doing a sprite limit trickery.
346381      */
382      // based on legionna this should probably only transfer tilemaps, although maybe on this HW things are different
383      // we might be misinterpreting params.  For legionna.c it always points to the start of RAM where the tilemaps are
384      // for zeroteam likewise, but for Raiden 2 the pointer is wrong??
385
386      // tilemap DMA
387      {
388         int src = cop_dma_src[cop_dma_mode] << 6;
389         if (src == 0xcfc0) src = 0xd000; // R2, why?? everything else sets the right pointer
390         
391         for (int i = 0; i < 0x2800 /2; i++)
392         {
393            UINT16 tileval = space.read_word(src);
394            src += 2;
395            //m_videoramout_cb(space, i, tileval, 0xffff);
396            m_videoram_private_w(space, i, tileval, 0xffff);
397         }
398
399      }
400
401
402      // sprite DMA part
347403      static int rsize = ((0x80 - cop_dma_size[cop_dma_mode]) & 0x7f) +1;
348404
349405      sprites_cur_start = 0x1000 - (rsize << 5);
r32033r32034
356412      #endif
357413      break;
358414   }
415   // case 0x15: points at palette in legionna.c and here
359416   case 0x82: {
360417      UINT32 src,dst,size;
361418      int i;
r32033r32034
10541111
10551112VIDEO_START_MEMBER(raiden2_state,raiden2)
10561113{
1114   back_data = auto_alloc_array_clear(machine(), UINT16, 0x800/2);
1115   fore_data =  auto_alloc_array_clear(machine(), UINT16, 0x800/2);
1116   mid_data =  auto_alloc_array_clear(machine(), UINT16, 0x800/2);
1117   text_data =  auto_alloc_array_clear(machine(), UINT16, 0x1000/2);
1118
10571119   text_layer       = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(raiden2_state::get_text_tile_info),this), TILEMAP_SCAN_ROWS,  8, 8, 64,32 );
10581120   background_layer = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(raiden2_state::get_back_tile_info),this), TILEMAP_SCAN_ROWS, 16,16, 32,32 );
10591121   midground_layer  = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(raiden2_state::get_mid_tile_info),this),  TILEMAP_SCAN_ROWS, 16,16, 32,32 );
r32033r32034
16261688   AM_RANGE(0x00800, 0x0bfff) AM_RAM
16271689
16281690   AM_RANGE(0x0c000, 0x0cfff) AM_RAM AM_SHARE("sprites")
1629   AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_SHARE("back_data")
1630   AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1631   AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(raiden2_midground_w)  AM_SHARE("mid_data")
1632   AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(raiden2_text_w) AM_SHARE("text_data")
1691   AM_RANGE(0x0d000, 0x0d7ff) AM_RAM // _WRITE(raiden2_background_w) AM_SHARE("back_data")
1692   AM_RANGE(0x0d800, 0x0dfff) AM_RAM // _WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1693   AM_RANGE(0x0e000, 0x0e7ff) AM_RAM // _WRITE(raiden2_midground_w)  AM_SHARE("mid_data")
1694   AM_RANGE(0x0e800, 0x0f7ff) AM_RAM // _WRITE(raiden2_text_w) AM_SHARE("text_data")
16331695   AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
16341696
16351697   AM_RANGE(0x10000, 0x1efff) AM_RAM
r32033r32034
16661728   AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
16671729
16681730   AM_RANGE(0x00800, 0x0b7ff) AM_RAM
1669   AM_RANGE(0x0b800, 0x0bfff) AM_RAM_WRITE(raiden2_background_w) AM_SHARE("back_data")
1670   AM_RANGE(0x0c000, 0x0c7ff) AM_RAM_WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1671   AM_RANGE(0x0c800, 0x0cfff) AM_RAM_WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1672   AM_RANGE(0x0d000, 0x0dfff) AM_RAM_WRITE(raiden2_text_w) AM_SHARE("text_data")
1731   AM_RANGE(0x0b800, 0x0bfff) AM_RAM // _WRITE(raiden2_background_w) AM_SHARE("back_data")
1732   AM_RANGE(0x0c000, 0x0c7ff) AM_RAM // _WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1733   AM_RANGE(0x0c800, 0x0cfff) AM_RAM // _WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1734   AM_RANGE(0x0d000, 0x0dfff) AM_RAM // _WRITE(raiden2_text_w) AM_SHARE("text_data")
16731735   AM_RANGE(0x0e000, 0x0efff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
16741736   AM_RANGE(0x0f000, 0x0ffff) AM_RAM AM_SHARE("sprites")
16751737   AM_RANGE(0x10000, 0x1ffff) AM_RAM
r32033r32034
16971759   AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
16981760
16991761   AM_RANGE(0x00800, 0x0b7ff) AM_RAM
1700   AM_RANGE(0x0b800, 0x0bfff) AM_RAM_WRITE(raiden2_background_w) AM_SHARE("back_data")
1701   AM_RANGE(0x0c000, 0x0c7ff) AM_RAM_WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1702   AM_RANGE(0x0c800, 0x0cfff) AM_RAM_WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1703   AM_RANGE(0x0d000, 0x0dfff) AM_RAM_WRITE(raiden2_text_w) AM_SHARE("text_data")
1762   AM_RANGE(0x0b800, 0x0bfff) AM_RAM // _WRITE(raiden2_background_w) AM_SHARE("back_data")
1763   AM_RANGE(0x0c000, 0x0c7ff) AM_RAM // _WRITE(raiden2_foreground_w) AM_SHARE("fore_data")
1764   AM_RANGE(0x0c800, 0x0cfff) AM_RAM // _WRITE(raiden2_midground_w) AM_SHARE("mid_data")
1765   AM_RANGE(0x0d000, 0x0dfff) AM_RAM // _WRITE(raiden2_text_w) AM_SHARE("text_data")
17041766   AM_RANGE(0x0e000, 0x0efff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
17051767   AM_RANGE(0x0f000, 0x0ffff) AM_RAM AM_SHARE("sprites")
17061768

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