MAME SVN History

199869 Revisions

r32029 Tuesday 9th September, 2014 at 18:31:51 UTC by hap
poking around with taitojc dangcurv

[src/emu/cpu/tms32051]	tms32051.c tms32051.h
[src/mame/drivers]	taitojc.c

trunk/src/mame/drivers/taitojc.c
r32028	r32029
893	893	}
894	894
895	895	static ADDRESS_MAP_START( tms_program_map, AS_PROGRAM, 16, taitojc_state )
896		AM_RANGE(0x4000, 0x7fff) AM_RAM
	896	AM_RANGE(0x0000, 0x1fff) AM_RAM AM_MIRROR(0x4000)
	897	AM_RANGE(0x6000, 0x7fff) AM_RAM
897	898	ADDRESS_MAP_END
898	899
899	900	static ADDRESS_MAP_START( tms_data_map, AS_DATA, 16, taitojc_state )

trunk/src/emu/cpu/tms32051/tms32051.c
r32028	r32029
8	8	#include "debugger.h"
9	9	#include "tms32051.h"
10	10
11		#define INTERRUPT_INT1 0
12		#define INTERRUPT_INT2 1
13		#define INTERRUPT_INT3 2
14		#define INTERRUPT_TINT 3
15		#define INTERRUPT_RINT 4
16		#define INTERRUPT_XINT 5
17		#define INTERRUPT_TRNT 6
18		#define INTERRUPT_TXNT 7
19		#define INTERRUPT_INT4 8
20
21	11	enum
22	12	{
23	13	TMS32051_PC = 1,
r32028	r32029
55	45	**************************************************************************/
56	46
57	47	static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 16, tms32051_device )
58		AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
	48	// AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
59	49	AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
60	50	AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
61	51	ADDRESS_MAP_END
r32028	r32029
251	241
252	242	void tms32051_device::check_interrupts()
253	243	{
254		int i;
255
256	244	if (m_st0.intm == 0 && m_ifr != 0)
257	245	{
258		for (i=0; i < 16; i++)
	246	for (int i = 0; i < 16; i++)
259	247	{
260	248	if (m_ifr & (1 << i))
261	249	{
r32028	r32029
274	262
275	263	void tms32051_device::save_interrupt_context()
276	264	{
277		m_shadow.acc = m_acc;
278		m_shadow.accb = m_accb;
279		m_shadow.arcr = m_arcr;
280		m_shadow.indx = m_indx;
281		m_shadow.preg = m_preg;
282		m_shadow.treg0 = m_treg0;
283		m_shadow.treg1 = m_treg1;
284		m_shadow.treg2 = m_treg2;
	265	m_shadow.acc = m_acc;
	266	m_shadow.accb = m_accb;
	267	m_shadow.arcr = m_arcr;
	268	m_shadow.indx = m_indx;
	269	m_shadow.preg = m_preg;
	270	m_shadow.treg0 = m_treg0;
	271	m_shadow.treg1 = m_treg1;
	272	m_shadow.treg2 = m_treg2;
285	273	memcpy(&m_shadow.pmst, &m_pmst, sizeof(TMS32051_PMST));
286	274	memcpy(&m_shadow.st0, &m_st0, sizeof(TMS32051_ST0));
287	275	memcpy(&m_shadow.st1, &m_st1, sizeof(TMS32051_ST1));
r32028	r32029
289	277
290	278	void tms32051_device::restore_interrupt_context()
291	279	{
292		m_acc = m_shadow.acc;
293		m_accb = m_shadow.accb;
294		m_arcr = m_shadow.arcr;
295		m_indx = m_shadow.indx;
296		m_preg = m_shadow.preg;
297		m_treg0 = m_shadow.treg0;
298		m_treg1 = m_shadow.treg1;
299		m_treg2 = m_shadow.treg2;
	280	m_acc = m_shadow.acc;
	281	m_accb = m_shadow.accb;
	282	m_arcr = m_shadow.arcr;
	283	m_indx = m_shadow.indx;
	284	m_preg = m_shadow.preg;
	285	m_treg0 = m_shadow.treg0;
	286	m_treg1 = m_shadow.treg1;
	287	m_treg2 = m_shadow.treg2;
300	288	memcpy(&m_pmst, &m_shadow.pmst, sizeof(TMS32051_PMST));
301	289	memcpy(&m_st0, &m_shadow.st0, sizeof(TMS32051_ST0));
302	290	memcpy(&m_st1, &m_shadow.st1, sizeof(TMS32051_ST1));
r32028	r32029
304	292
305	293	void tms32051_device::execute_set_input(int irq, int state)
306	294	{
307		if ( state == ASSERT_LINE )
	295	if (state == ASSERT_LINE)
308	296	{
309	297	if ((m_imr & (1 << irq)) != 0)
310	298	{
r32028	r32029
318	306
319	307	void tms32051_device::execute_run()
320	308	{
321		while(m_icount > 0)
	309	while (m_icount > 0)
322	310	{
323	311	UINT16 ppc;
324	312
r32028	r32029
370	358	// reset timer
371	359	m_timer.tim = m_timer.prd;
372	360
373		execute_set_input(INT~~ERRUPT~~_TINT, ASSERT_LINE);
	361	execute_set_input(TMS32051_TINT, ASSERT_LINE);
374	362	}
375	363	}
376	364	}
r32028	r32029
409	397	case 0x15: return m_ar[5];
410	398	case 0x16: return m_ar[6];
411	399	case 0x17: return m_ar[7];
	400	case 0x18: return m_indx;
	401	case 0x19: return m_arcr;
	402	case 0x1a: return m_cbsr1;
	403	case 0x1b: return m_cber1;
	404	case 0x1c: return m_cbsr2;
	405	case 0x1d: return m_cber2;
412	406	case 0x1e: return m_cbcr;
413	407	case 0x1f: return m_bmar;
414	408	case 0x24: return m_timer.tim;
r32028	r32029
423	417	}
424	418
425	419	case 0x28: return 0; // PDWSR
	420
426	421	default:
427		if(!space.debugger_access())
428		fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, m_pc-1);
	422	if (!space.debugger_access())
	423	fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, m_pc-1);
429	424	}
430	425
431	426	return 0;
r32028	r32029
439	434	case 0x04: m_imr = data; break;
440	435	case 0x06: // IFR
441	436	{
442		int i;
443		for (i=0; i < 16; i++)
	437	for (int i = 0; i < 16; i++)
444	438	{
445	439	if (data & (1 << i))
446	440	{
r32028	r32029
499	493	}
500	494
501	495	case 0x28: break; // PDWSR
	496
502	497	default:
503		if(!space.debugger_access())
504		fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, m_pc-1);
	498	if (!space.debugger_access())
	499	fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, m_pc-1);
505	500	}
506	501	}
507	502
508	503
509	504	bool tms32051_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value)
510
511	505	{
512	506	/* TODO: alignment if offset is odd */
513	507	if (spacenum == AS_PROGRAM)

trunk/src/emu/cpu/tms32051/tms32051.h
r32028	r32029
4	4	#define __TMS32051_H__
5	5
6	6
	7	enum
	8	{
	9	TMS32051_INT1 = 0,
	10	TMS32051_INT2,
	11	TMS32051_INT3,
	12	TMS32051_TINT,
	13	TMS32051_RINT,
	14	TMS32051_XINT,
	15	TMS32051_TRNT,
	16	TMS32051_TXNT,
	17	TMS32051_INT4
	18	};
	19
7	20	struct TMS32051_PMST
8	21	{
9	22	UINT16 iptr;

199869 Revisions