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| r31989 Monday 8th September, 2014 at 12:00:45 UTC by Oliver Stöneberg |
|---|
| fixed most of the -Wunreachable-code-break and -Wunreachable-code-return warnings of clang 3.5 when compiling MESS (nw) |
| [src/emu] | ioport.c |
| [src/emu/bus/a2bus] | a2applicard.c a2hsscsi.c a2scsi.c a2vulcan.c |
| [src/emu/bus/coco] | cococart.c |
| [src/emu/bus/gba] | rom.c |
| [src/emu/bus/isa] | aga.c gus.c isa.c s3virge.c |
| [src/emu/bus/msx_slot] | cartridge.c |
| [src/emu/bus/neogeo] | kof98_prot.c |
| [src/emu/bus/nes] | mmc5.c |
| [src/emu/bus/nubus] | nubus.c nubus_cb264.c nubus_m2hires.c nubus_m2video.c nubus_spec8.c nubus_specpdq.c nubus_wsportrait.c pds30_30hr.c pds30_cb264.c pds30_mc30.c pds30_procolor816.c |
| [src/emu/bus/pci] | i82439tx.c mpc105.c |
| [src/emu/bus/scsi] | scsihle.c |
| [src/emu/bus/snes] | bsx.c |
| [src/emu/cpu] | drcbec.c drcbex64.c drcbex86.c uml.c |
| [src/emu/cpu/8x300] | 8x300.c |
| [src/emu/cpu/adsp2100] | adsp2100.c |
| [src/emu/cpu/am29000] | am29000.c |
| [src/emu/cpu/arm] | arm.c |
| [src/emu/cpu/arm7] | arm7.c arm7ops.c |
| [src/emu/cpu/cop400] | cop400.c |
| [src/emu/cpu/dsp16] | dsp16dis.c |
| [src/emu/cpu/dsp32] | dsp32.c |
| [src/emu/cpu/dsp56k] | dsp56mem.c dsp56pcu.c |
| [src/emu/cpu/es5510] | es5510.c |
| [src/emu/cpu/h8] | h8_adc.c |
| [src/emu/cpu/hcd62121] | hcd62121_ops.h |
| [src/emu/cpu/i8085] | i8085.c |
| [src/emu/cpu/i8089] | i8089_channel.c |
| [src/emu/cpu/i86] | i86.c |
| [src/emu/cpu/i960] | i960.c |
| [src/emu/cpu/m68000] | m68kcpu.c |
| [src/emu/cpu/m6809] | hd6309.c konami.c |
| [src/emu/cpu/mb86233] | mb86233.c |
| [src/emu/cpu/mcs48] | mcs48.c |
| [src/emu/cpu/mcs51] | mcs51.c |
| [src/emu/cpu/mips] | mips3com.c r3000.c |
| [src/emu/cpu/mn10200] | mn102dis.c |
| [src/emu/cpu/powerpc] | ppccom.c |
| [src/emu/cpu/rsp] | rsp.c rspdrc.c |
| [src/emu/cpu/score] | score.c |
| [src/emu/cpu/se3208] | se3208.c se3208dis.c |
| [src/emu/cpu/sh4] | sh3comn.c |
| [src/emu/cpu/sharc] | sharc.c |
| [src/emu/cpu/tlcs90] | tlcs90.c |
| [src/emu/cpu/tms32031] | tms32031.c |
| [src/emu/cpu/tms32082] | mp_ops.c |
| [src/emu/cpu/tms9900] | 9900dasm.c |
| [src/emu/cpu/v60] | v60.c |
| [src/emu/cpu/z180] | z180.c |
| [src/emu/cpu/z8] | z8.c |
| [src/emu/cpu/z80] | z80.c |
| [src/emu/debug] | debugcpu.c |
| [src/emu/machine] | 53c810.c 68307tmu.c adc0808.c ds2404.c jvsdev.c k033906.c mb89352.c mc68328.c mc6843.c ncr5380.c ncr5380n.c ncr5390.c ncr539x.c netlist.c nscsi_bus.c s3c44b0.c strata.c upd71071.c wd33c93.c z80dma.c |
| [src/emu/netlist] | nl_setup.c |
| [src/emu/video] | ef9340_1.c mc6847.c pc_vga.c |
| [src/mame/drivers] | konamim2.c |
| [src/mame/machine] | amiga.c archimds.c cdi070.c cdicdic.c megadriv.c |
| [src/mame/video] | n64.c |
| [src/mess/drivers] | fmtowns.c hp49gp.c ip22.c laser3k.c mac.c mz2500.c pc88va.c rainbow.c replicator.c smc777.c vidbrain.c |
| [src/mess/machine] | 6883sam.c apple2.c apple2gs.c c65.c concept.c fm_scsi.c genpc.c mac.c macpci.c msx_matsushita.c msx_s1985.c pc9801_118.c pc9801_26.c pc9801_86.c pce_cd.c psxcd.c |
| [src/mess/video] | apple2.c fm7.c gba.c gime.c mac.c newport.c |
| [src/osd/sdl] | sdlfile.c sdlmain.c |
| r31988 | r31989 | |
|---|---|---|
| 307 | 307 | *actual = result; |
| 308 | 308 | |
| 309 | 309 | return FILERR_NONE; |
| 310 | break; | |
| 311 | 310 | |
| 312 | 311 | case SDLFILE_SOCKET: |
| 313 | 312 | return sdl_read_socket(file, buffer, offset, count, actual); |
| 314 | break; | |
| 315 | 313 | |
| 316 | 314 | case SDLFILE_PTTY: |
| 317 | 315 | return sdl_read_ptty(file, buffer, offset, count, actual); |
| 318 | break; | |
| 319 | 316 | |
| 320 | 317 | default: |
| 321 | 318 | return FILERR_FAILURE; |
| r31988 | r31989 | |
| 352 | 349 | if (actual != NULL) |
| 353 | 350 | *actual = result; |
| 354 | 351 | return FILERR_NONE; |
| 355 | break; | |
| 356 | 352 | |
| 357 | 353 | case SDLFILE_SOCKET: |
| 358 | 354 | return sdl_write_socket(file, buffer, offset, count, actual); |
| 359 | break; | |
| 360 | 355 | |
| 361 | 356 | case SDLFILE_PTTY: |
| 362 | 357 | return sdl_write_ptty(file, buffer, offset, count, actual); |
| 363 | break; | |
| 364 | 358 | |
| 365 | 359 | default: |
| 366 | 360 | return FILERR_FAILURE; |
| r31988 | r31989 | |
| 383 | 377 | if (!result) |
| 384 | 378 | return error_to_file_error(errno); |
| 385 | 379 | return FILERR_NONE; |
| 386 | break; | |
| 387 | 380 | |
| 388 | 381 | default: |
| 389 | 382 | return FILERR_FAILURE; |
| r31988 | r31989 | |
| 404 | 397 | close(file->handle); |
| 405 | 398 | osd_free(file); |
| 406 | 399 | return FILERR_NONE; |
| 407 | break; | |
| 408 | 400 | |
| 409 | 401 | case SDLFILE_SOCKET: |
| 410 | 402 | return sdl_close_socket(file); |
| 411 | break; | |
| 412 | 403 | |
| 413 | 404 | case SDLFILE_PTTY: |
| 414 | 405 | return sdl_close_ptty(file); |
| 415 | break; | |
| 416 | 406 | |
| 417 | 407 | default: |
| 418 | 408 | return FILERR_FAILURE; |
| r31988 | r31989 | |
|---|---|---|
| 351 | 351 | #endif |
| 352 | 352 | |
| 353 | 353 | exit(res); |
| 354 | ||
| 355 | return res; | |
| 356 | 354 | } |
| 357 | 355 | |
| 358 | 356 |
| r31988 | r31989 | |
|---|---|---|
| 4006 | 4006 | |
| 4007 | 4007 | default: |
| 4008 | 4008 | fatalerror("Unknown analog port type -- don't know if it is absolute or not\n"); |
| 4009 | break; | |
| 4010 | 4009 | } |
| 4011 | 4010 | |
| 4012 | 4011 | // further processing for absolute controls |
| r31988 | r31989 | |
|---|---|---|
| 947 | 947 | |
| 948 | 948 | default: |
| 949 | 949 | fatalerror("debug_read_opcode: unknown type = %d\n", space.data_width() / 8 * 10 + size); |
| 950 | break; | |
| 951 | 950 | } |
| 952 | 951 | |
| 953 | 952 | /* turn on debugger access */ |
| r31988 | r31989 | |
|---|---|---|
| 215 | 215 | return stpcpy_int(s, REGNAME(r)); |
| 216 | 216 | } |
| 217 | 217 | |
| 218 | return 0; | |
| 218 | // never executed | |
| 219 | //return 0; | |
| 219 | 220 | } |
| 220 | 221 | |
| 221 | 222 | const alu_op_t es5510_device::ALU_OPS[16] = { |
| r31988 | r31989 | |
|---|---|---|
| 1125 | 1125 | |
| 1126 | 1126 | default: |
| 1127 | 1127 | fatalerror("CPU_IMPORT_STATE(this) called for unexpected value\n"); |
| 1128 | break; | |
| 1129 | 1128 | } |
| 1130 | 1129 | |
| 1131 | 1130 | } |
| r31988 | r31989 | |
| 1165 | 1164 | |
| 1166 | 1165 | default: |
| 1167 | 1166 | fatalerror("CPU_EXPORT_STATE(this) called for unexpected value\n"); |
| 1168 | break; | |
| 1169 | 1167 | } |
| 1170 | 1168 | } |
| 1171 | 1169 |
| r31988 | r31989 | |
|---|---|---|
| 54 | 54 | |
| 55 | 55 | default: return "UNKNOWN"; |
| 56 | 56 | } |
| 57 | return ""; | |
| 57 | // never executed | |
| 58 | //return ""; | |
| 58 | 59 | } |
| 59 | 60 | |
| 60 | 61 | astring disasmZField(const UINT8& Z) |
| r31988 | r31989 | |
| 83 | 84 | |
| 84 | 85 | default: return "UNKNOWN"; |
| 85 | 86 | } |
| 86 | return ""; | |
| 87 | // never executed | |
| 88 | //return ""; | |
| 87 | 89 | } |
| 88 | 90 | |
| 89 | 91 | astring disasmF2Field(const UINT8& F2, const UINT8& D, const UINT8& S) |
| r31988 | r31989 | |
| 139 | 141 | |
| 140 | 142 | default: return "RESERVED"; |
| 141 | 143 | } |
| 142 | return ""; | |
| 144 | // never executed | |
| 145 | //return ""; | |
| 143 | 146 | } |
| 144 | 147 | |
| 145 | 148 | astring disasmBField(const UINT8& B) |
| r31988 | r31989 | |
| 157 | 160 | |
| 158 | 161 | default: return "UNKNOWN"; |
| 159 | 162 | } |
| 160 | return ""; | |
| 163 | // never executed | |
| 164 | //return ""; | |
| 161 | 165 | } |
| 162 | 166 | |
| 163 | 167 | astring disasmRImmediateField(const UINT8& R) |
| r31988 | r31989 | |
| 175 | 179 | |
| 176 | 180 | default: return "UNKNOWN"; |
| 177 | 181 | } |
| 178 | return ""; | |
| 182 | // never executed | |
| 183 | //return ""; | |
| 179 | 184 | } |
| 180 | 185 | |
| 181 | 186 | astring disasmRField(const UINT8& R) |
| r31988 | r31989 | |
| 213 | 218 | |
| 214 | 219 | default: return "RESERVED"; |
| 215 | 220 | } |
| 216 | return ""; | |
| 221 | // never executed | |
| 222 | //return ""; | |
| 217 | 223 | } |
| 218 | 224 | |
| 219 | 225 | astring disasmIField(const UINT8& I) |
| r31988 | r31989 | |
| 227 | 233 | |
| 228 | 234 | default: return "UNKNOWN"; |
| 229 | 235 | } |
| 230 | return ""; | |
| 236 | // never executed | |
| 237 | //return ""; | |
| 231 | 238 | } |
| 232 | 239 | |
| 233 | 240 | bool disasmSIField(const UINT8& SI) |
| r31988 | r31989 | |
|---|---|---|
| 1536 | 1536 | } |
| 1537 | 1537 | } |
| 1538 | 1538 | |
| 1539 | return 0; | |
| 1539 | // never executed | |
| 1540 | //return 0; | |
| 1540 | 1541 | } |
| 1541 | 1542 | |
| 1542 | 1543 | #define WRITEBACK_RESULT() {memcpy(&m_v[VDREG].s[0], &vres[0], 16);} |
| r31988 | r31989 | |
|---|---|---|
| 3136 | 3136 | } |
| 3137 | 3137 | } |
| 3138 | 3138 | } |
| 3139 | return 0; | |
| 3139 | // never executed | |
| 3140 | //return 0; | |
| 3140 | 3141 | } |
| 3141 | 3142 | |
| 3142 | 3143 | #if USE_SIMD |
| r31988 | r31989 | |
|---|---|---|
| 305 | 305 | default: |
| 306 | 306 | fatalerror("Unknown MIPS flavor specified\n"); |
| 307 | 307 | } |
| 308 | return 0x2000; | |
| 308 | // never executed | |
| 309 | //return 0x2000; | |
| 309 | 310 | } |
| 310 | 311 | |
| 311 | 312 |
| r31988 | r31989 | |
|---|---|---|
| 417 | 417 | |
| 418 | 418 | default: |
| 419 | 419 | fatalerror("r3000_device::state_import called for unexpected value\n"); |
| 420 | break; | |
| 421 | 420 | } |
| 422 | 421 | } |
| 423 | 422 | |
| r31988 | r31989 | |
| 435 | 434 | |
| 436 | 435 | default: |
| 437 | 436 | fatalerror("r3000_device::state_export called for unexpected value\n"); |
| 438 | break; | |
| 439 | 437 | } |
| 440 | 438 | } |
| 441 | 439 |
| r31988 | r31989 | |
|---|---|---|
| 571 | 571 | DSP56K::HRDF_bit_set(cpustate, 0); |
| 572 | 572 | return value; |
| 573 | 573 | } |
| 574 | break; | |
| 575 | 574 | // COSR |
| 576 | 575 | case 0xffe8: break; |
| 577 | 576 | |
| r31988 | r31989 | |
| 931 | 930 | return 0xbf; |
| 932 | 931 | else |
| 933 | 932 | return RXH; |
| 934 | break; | |
| 935 | 933 | |
| 936 | 934 | // Receive byte register - low byte (RXL) |
| 937 | 935 | case 0x07: |
| r31988 | r31989 | |
| 944 | 942 | DSP56K::RXDF_bit_set(cpustate, 0); |
| 945 | 943 | return value; |
| 946 | 944 | } |
| 947 | break; | |
| 948 | 945 | |
| 949 | 946 | default: logerror("DSP56k : dsp56k_host_interface_read called with invalid address 0x%02x.\n", offset); |
| 950 | 947 | } |
| r31988 | r31989 | |
|---|---|---|
| 479 | 479 | } |
| 480 | 480 | |
| 481 | 481 | fatalerror("DSP56K ERROR : IRQ TAG specified incorrectly (get_vector_by_tag) : %s.\n", tag); |
| 482 | return -1; | |
| 482 | // never executed | |
| 483 | //return -1; | |
| 483 | 484 | } |
| 484 | 485 | |
| 485 | 486 | } // namespace DSP56K |
| r31988 | r31989 | |
|---|---|---|
| 1011 | 1011 | fatalerror("%04x: unimplemented addr mode = %d\n",pc,mode); |
| 1012 | 1012 | } |
| 1013 | 1013 | |
| 1014 | return 0; | |
| 1014 | // never executed | |
| 1015 | //return 0; | |
| 1015 | 1016 | } |
| 1016 | 1017 | |
| 1017 | 1018 | offs_t tlcs90_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) |
| r31988 | r31989 | |
| 1237 | 1238 | default: |
| 1238 | 1239 | fatalerror("%04x: unimplemented condition = %d\n",m_pc.w.l,cond); |
| 1239 | 1240 | } |
| 1240 | return 0; | |
| 1241 | ||
| 1242 | // never executed | |
| 1243 | //return 0; | |
| 1241 | 1244 | } |
| 1242 | 1245 | |
| 1243 | 1246 | void tlcs90_device::Push( UINT16 rr ) |
| r31988 | r31989 | |
|---|---|---|
| 466 | 466 | case SIZE_WORD: convert_to_mov_immediate((INT16)m_param[1].immediate()); break; |
| 467 | 467 | case SIZE_DWORD: convert_to_mov_immediate((INT32)m_param[1].immediate()); break; |
| 468 | 468 | case SIZE_QWORD: convert_to_mov_immediate((INT64)m_param[1].immediate()); break; |
| 469 | case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n"); | |
| 469 | case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n"); | |
| 470 | 470 | } |
| 471 | 471 | break; |
| 472 | 472 |
| r31988 | r31989 | |
|---|---|---|
| 496 | 496 | int h8_adc_2655_device::get_channel_index(int count) |
| 497 | 497 | { |
| 498 | 498 | abort(); |
| 499 | return 0; | |
| 500 | 499 | } |
| r31988 | r31989 | |
|---|---|---|
| 1295 | 1295 | if (pCarry) *pCarry = (rm & (1 << (k - 1))); |
| 1296 | 1296 | return LSR(rm, k); |
| 1297 | 1297 | } |
| 1298 | break; | |
| 1299 | 1298 | |
| 1300 | 1299 | case 2: /* ASR */ |
| 1301 | 1300 | if (k == 0 || k > 32) |
| r31988 | r31989 | |
| 1310 | 1309 | else |
| 1311 | 1310 | return LSR(rm, k); |
| 1312 | 1311 | } |
| 1313 | break; | |
| 1314 | 1312 | |
| 1315 | 1313 | case 3: /* ROR and RRX */ |
| 1316 | 1314 | if (k) |
| r31988 | r31989 | |
| 1324 | 1322 | if (pCarry) *pCarry = (rm & 1); |
| 1325 | 1323 | return LSR(rm, 1) | ((R15 & C_MASK) << 2); |
| 1326 | 1324 | } |
| 1327 | break; | |
| 1328 | 1325 | } |
| 1329 | 1326 | |
| 1330 | 1327 | logerror("%08x: Decodeshift error\n",R15); |
| r31988 | r31989 | |
|---|---|---|
| 2469 | 2469 | /* fly-by mode DMA */ |
| 2470 | 2470 | case 1: |
| 2471 | 2471 | fatalerror("ppc4xx_dma_exec: fly-by DMA not implemented\n"); |
| 2472 | break; | |
| 2473 | 2472 | |
| 2474 | 2473 | /* software initiated memory-to-memory mode DMA */ |
| 2475 | 2474 | case 2: |
| r31988 | r31989 | |
| 2525 | 2524 | /* hardware initiated memory-to-memory mode DMA */ |
| 2526 | 2525 | case 3: |
| 2527 | 2526 | fatalerror("ppc4xx_dma_exec: HW mem-to-mem DMA not implemented\n"); |
| 2528 | break; | |
| 2529 | 2527 | } |
| 2530 | 2528 | } |
| 2531 | 2529 | |
| r31988 | r31989 | |
| 2808 | 2806 | ppc4xx_spu_timer_reset(); |
| 2809 | 2807 | break; |
| 2810 | 2808 | |
| 2811 | break; | |
| 2812 | ||
| 2813 | 2809 | case SPU4XX_BUFFER: |
| 2814 | 2810 | /* write to the transmit buffer and mark it full */ |
| 2815 | 2811 | m_spu.txbuf = data; |
| r31988 | r31989 | |
|---|---|---|
| 80 | 80 | // IVR is write-only |
| 81 | 81 | default: logerror("8X300: Invalid register %02x read.\n",reg); return 0; |
| 82 | 82 | } |
| 83 | return 0; | |
| 84 | 83 | } |
| 85 | 84 | |
| 86 | 85 | void n8x300_cpu_device::device_start() |
| r31988 | r31989 | |
|---|---|---|
| 321 | 321 | case ADDRESSING_MODE_REGISTER_B: return m_d.b.l; |
| 322 | 322 | case ADDRESSING_MODE_REGISTER_E: return m_w.b.h; |
| 323 | 323 | case ADDRESSING_MODE_REGISTER_F: return m_w.b.l; |
| 324 | default: fatalerror("Unexpected"); | |
| 324 | default: fatalerror("Unexpected"); | |
| 325 | 325 | } |
| 326 | 326 | } |
| 327 | 327 | |
| r31988 | r31989 | |
| 345 | 345 | case ADDRESSING_MODE_REGISTER_V: return (ordinal & 1) ? m_v.b.l : m_v.b.h; |
| 346 | 346 | case ADDRESSING_MODE_REGISTER_PC: return (ordinal & 1) ? m_pc.b.l : m_pc.b.h; |
| 347 | 347 | case ADDRESSING_MODE_ZERO: return 0x00; |
| 348 | default: fatalerror("Unexpected"); | |
| 348 | default: fatalerror("Unexpected"); | |
| 349 | 349 | } |
| 350 | 350 | } |
| 351 | 351 | |
| r31988 | r31989 | |
| 364 | 364 | case ADDRESSING_MODE_REGISTER_E: m_w.b.h = data; break; |
| 365 | 365 | case ADDRESSING_MODE_REGISTER_F: m_w.b.l = data; break; |
| 366 | 366 | case ADDRESSING_MODE_ZERO: break; |
| 367 | default: fatalerror("Unexpected"); | |
| 367 | default: fatalerror("Unexpected"); | |
| 368 | 368 | } |
| 369 | 369 | } |
| 370 | 370 | |
| r31988 | r31989 | |
| 387 | 387 | case ADDRESSING_MODE_REGISTER_V: *((ordinal & 1) ? &m_v.b.l : &m_v.b.h) = data; break; |
| 388 | 388 | case ADDRESSING_MODE_REGISTER_PC: *((ordinal & 1) ? &m_pc.b.l : &m_pc.b.h) = data; break; |
| 389 | 389 | case ADDRESSING_MODE_ZERO: break; |
| 390 | default: fatalerror("Unexpected"); | |
| 390 | default: fatalerror("Unexpected"); | |
| 391 | 391 | } |
| 392 | 392 | } |
| 393 | 393 | |
| r31988 | r31989 | |
| 470 | 470 | case 15: value = ((UINT16) m_w.b.l) << 8 | m_w.b.l; break; // F |
| 471 | 471 | default: |
| 472 | 472 | fatalerror("Should not reach here"); |
| 473 | break; | |
| 474 | 473 | } |
| 475 | 474 | |
| 476 | 475 | exgtfr_register result; |
| r31988 | r31989 | |
| 507 | 506 | case 15: m_w.b.l = (UINT8) (value.word_value >> 0); break; // F |
| 508 | 507 | default: |
| 509 | 508 | fatalerror("Should not reach here"); |
| 510 | break; | |
| 511 | 509 | } |
| 512 | 510 | } |
| 513 | 511 | |
| r31988 | r31989 | |
| 614 | 612 | case 15: if (promote) set_regop16(m_w); else set_regop8(m_w.b.l); break; // F |
| 615 | 613 | default: |
| 616 | 614 | fatalerror("Should not reach here"); |
| 617 | break; | |
| 618 | 615 | } |
| 619 | 616 | |
| 620 | 617 | // set source |
| r31988 | r31989 | |
| 638 | 635 | case 15: m_addressing_mode = promote ? ADDRESSING_MODE_REGISTER_W : ADDRESSING_MODE_REGISTER_F; break; // F |
| 639 | 636 | default: |
| 640 | 637 | fatalerror("Should not reach here"); |
| 641 | break; | |
| 642 | 638 | } |
| 643 | 639 | |
| 644 | 640 | // eat a single CPU cycle |
| r31988 | r31989 | |
|---|---|---|
| 137 | 137 | case ADDRESSING_MODE_EA: return read_memory(m_ea.w + ordinal); |
| 138 | 138 | case ADDRESSING_MODE_IMMEDIATE: return read_opcode_arg(); |
| 139 | 139 | case ADDRESSING_MODE_REGISTER_D: return (ordinal & 1) ? m_d.b.l : m_d.b.h; |
| 140 | default: fatalerror("Unexpected"); | |
| 140 | default: fatalerror("Unexpected"); | |
| 141 | 141 | } |
| 142 | 142 | } |
| 143 | 143 | |
| r31988 | r31989 | |
| 164 | 164 | case ADDRESSING_MODE_IMMEDIATE: /* do nothing */ break; |
| 165 | 165 | case ADDRESSING_MODE_EA: write_memory(m_ea.w + ordinal, data); break; |
| 166 | 166 | case ADDRESSING_MODE_REGISTER_D: *((ordinal & 1) ? &m_d.b.l : &m_d.b.h) = data; break; |
| 167 | default: fatalerror("Unexpected"); | |
| 167 | default: fatalerror("Unexpected"); | |
| 168 | 168 | } |
| 169 | 169 | } |
| 170 | 170 | |
| r31988 | r31989 | |
| 184 | 184 | case 0x70: return m_pc.w; |
| 185 | 185 | default: |
| 186 | 186 | fatalerror("Should not get here"); |
| 187 | return m_x.w; | |
| 187 | // never executed | |
| 188 | //return m_x.w; | |
| 188 | 189 | } |
| 189 | 190 | } |
| 190 | 191 |
| r31988 | r31989 | |
|---|---|---|
| 1670 | 1670 | return &se3208_device::MVFC; |
| 1671 | 1671 | else |
| 1672 | 1672 | return &se3208_device::MVTC; |
| 1673 | break; | |
| 1674 | 1673 | } |
| 1675 | 1674 | break; |
| 1676 | 1675 | } |
| r31988 | r31989 | |
|---|---|---|
| 1388 | 1388 | return MVFC; |
| 1389 | 1389 | else |
| 1390 | 1390 | return MVTC; |
| 1391 | break; | |
| 1392 | 1391 | } |
| 1393 | 1392 | break; |
| 1394 | 1393 | } |
| r31988 | r31989 | |
|---|---|---|
| 81 | 81 | break; |
| 82 | 82 | default: |
| 83 | 83 | fatalerror("I960: %x: IAC %08x %08x %08x %08x\n", m_PIP, iac[0], iac[1], iac[2], iac[3]); |
| 84 | break; | |
| 85 | 84 | } |
| 86 | 85 | } |
| 87 | 86 | |
| r31988 | r31989 | |
| 129 | 128 | |
| 130 | 129 | default: |
| 131 | 130 | fatalerror("I960: %x: unhandled MEMB mode %x\n", m_PIP, mode); |
| 132 | return 0; | |
| 133 | 131 | } |
| 134 | 132 | } |
| 135 | 133 | } |
| r31988 | r31989 | |
|---|---|---|
| 288 | 288 | default: |
| 289 | 289 | goto illegal2; |
| 290 | 290 | } |
| 291 | break; | |
| 292 | 291 | |
| 293 | 292 | case 0xf1: |
| 294 | 293 | opcode = program_read_byte(pc+1); |
| r31988 | r31989 | |
| 375 | 374 | default: |
| 376 | 375 | goto illegal2; |
| 377 | 376 | } |
| 378 | break; | |
| 379 | 377 | |
| 380 | 378 | case 0xf3: |
| 381 | 379 | opcode = program_read_byte(pc+1); |
| r31988 | r31989 | |
| 485 | 483 | default: |
| 486 | 484 | goto illegal3; |
| 487 | 485 | } |
| 488 | break; | |
| 489 | 486 | |
| 490 | 487 | case 0xff: |
| 491 | 488 | opcode = program_read_byte(pc+2); |
| r31988 | r31989 | |
| 516 | 513 | default: |
| 517 | 514 | goto illegal3; |
| 518 | 515 | } |
| 519 | break; | |
| 520 | 516 | |
| 521 | 517 | default: |
| 522 | 518 | goto illegal2; |
| 523 | 519 | } |
| 524 | break; | |
| 525 | 520 | |
| 526 | 521 | case 0xf4: |
| 527 | 522 | opcode = program_read_byte(pc+1); |
| r31988 | r31989 | |
| 667 | 662 | default: |
| 668 | 663 | goto illegal2; |
| 669 | 664 | } |
| 670 | break; | |
| 671 | 665 | |
| 672 | 666 | case 0xf5: |
| 673 | 667 | opcode = program_read_byte(pc+1); |
| r31988 | r31989 | |
| 721 | 715 | default: |
| 722 | 716 | goto illegal3; |
| 723 | 717 | } |
| 724 | break; | |
| 725 | 718 | } |
| 726 | 719 | |
| 727 | 720 | case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: |
| r31988 | r31989 | |
| 742 | 735 | default: |
| 743 | 736 | goto illegal3; |
| 744 | 737 | } |
| 745 | break; | |
| 746 | 738 | } |
| 747 | 739 | |
| 748 | 740 | case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: |
| r31988 | r31989 | |
| 870 | 862 | default: |
| 871 | 863 | goto illegal3; |
| 872 | 864 | } |
| 873 | break; | |
| 874 | 865 | } |
| 875 | 866 | |
| 876 | 867 | case 0xfc: |
| r31988 | r31989 | |
| 892 | 883 | default: |
| 893 | 884 | goto illegal2; |
| 894 | 885 | } |
| 895 | break; | |
| 896 | 886 | |
| 897 | 887 | case 0xf6: |
| 898 | 888 | sprintf(buffer, "nop"); |
| r31988 | r31989 | |
| 1002 | 992 | default: |
| 1003 | 993 | goto illegal2; |
| 1004 | 994 | } |
| 1005 | break; | |
| 1006 | 995 | |
| 1007 | 996 | case 0xf8: case 0xf9: case 0xfa: case 0xfb: |
| 1008 | 997 | sprintf(buffer, "mov %s, d%d", i16str(r16s(pc+1)), opcode & 3); |
| r31988 | r31989 | |
|---|---|---|
| 123 | 123 | case SH3_INTEVT_ADDR: |
| 124 | 124 | logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 INTEVT - %08x)\n",tag(), m_pc & AM,(offset *4)+SH3_UPPER_REGBASE,mem_mask, m_sh3internal_upper[offset]); |
| 125 | 125 | fatalerror("INTEVT unsupported on SH3\n"); |
| 126 | return m_sh3internal_upper[offset]; | |
| 126 | // never executed | |
| 127 | //return m_sh3internal_upper[offset]; | |
| 127 | 128 | |
| 128 | 129 | |
| 129 | 130 | default: |
| r31988 | r31989 | |
| 163 | 164 | // logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (INTEVT2)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask); |
| 164 | 165 | return m_sh3internal_lower[offset]; |
| 165 | 166 | } |
| 166 | break; | |
| 167 | 167 | |
| 168 | 168 | |
| 169 | 169 | case IRR0_IRR1: |
| r31988 | r31989 | |
| 184 | 184 | fatalerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR0/1 unused bits)\n",tag(), m_pc & AM,(offset *4)+0x4000000,mem_mask); |
| 185 | 185 | } |
| 186 | 186 | } |
| 187 | break; | |
| 188 | 187 | |
| 189 | 188 | case PADR_PBDR: |
| 190 | 189 | { |
| r31988 | r31989 | |
|---|---|---|
| 1266 | 1266 | |
| 1267 | 1267 | default: |
| 1268 | 1268 | fatalerror("CPU_IMPORT_STATE(mcs48) called for unexpected value\n"); |
| 1269 | break; | |
| 1270 | 1269 | } |
| 1271 | 1270 | } |
| 1272 | 1271 | |
| r31988 | r31989 | |
| 1293 | 1292 | |
| 1294 | 1293 | default: |
| 1295 | 1294 | fatalerror("CPU_EXPORT_STATE(mcs48) called for unexpected value\n"); |
| 1296 | break; | |
| 1297 | 1295 | } |
| 1298 | 1296 | } |
| 1299 | 1297 |
| r31988 | r31989 | |
|---|---|---|
| 135 | 135 | } |
| 136 | 136 | default: fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", address, m_pc); |
| 137 | 137 | } |
| 138 | return 0; | |
| 139 | 138 | } |
| 140 | 139 | |
| 141 | 140 | void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data) |
| r31988 | r31989 | |
|---|---|---|
| 445 | 445 | // everything else is unexpected |
| 446 | 446 | default: |
| 447 | 447 | fatalerror("Unexpected parameter type\n"); |
| 448 | break; | |
| 449 | 448 | } |
| 450 | 449 | } |
| 451 | 450 |
| r31988 | r31989 | |
|---|---|---|
| 243 | 243 | |
| 244 | 244 | default: |
| 245 | 245 | fatalerror("No or unknown featuremask supplied\n"); |
| 246 | break; | |
| 247 | 246 | } |
| 248 | 247 | } |
| 249 | 248 |
| r31988 | r31989 | |
|---|---|---|
| 227 | 227 | { |
| 228 | 228 | return FAULT_DOMAIN; |
| 229 | 229 | } |
| 230 | break; | |
| 231 | 230 | case 1 : // "Client - Accesses are checked against the access permission bits in the section or page descriptor" |
| 232 | 231 | { |
| 233 | 232 | switch (ap) |
| r31988 | r31989 | |
| 286 | 285 | { |
| 287 | 286 | return FAULT_NONE; |
| 288 | 287 | } |
| 289 | break; | |
| 290 | 288 | } |
| 291 | 289 | } |
| 292 | 290 | break; |
| r31988 | r31989 | |
| 294 | 292 | { |
| 295 | 293 | return FAULT_DOMAIN; |
| 296 | 294 | } |
| 297 | break; | |
| 298 | 295 | case 3 : // "Manager - Accesses are not checked against the access permission bits so a permission fault cannot be generated" |
| 299 | 296 | { |
| 300 | 297 | return FAULT_NONE; |
| 301 | 298 | } |
| 302 | break; | |
| 303 | 299 | } |
| 304 | 300 | return FAULT_NONE; |
| 305 | 301 | } |
| r31988 | r31989 | |
| 749 | 745 | break; |
| 750 | 746 | case COND_NV: |
| 751 | 747 | { UNEXECUTED(); goto skip_exec; } |
| 752 | break; | |
| 753 | 748 | } |
| 754 | 749 | /*******************************************************************/ |
| 755 | 750 | /* If we got here - condition satisfied, so decode the instruction */ |
| r31988 | r31989 | |
|---|---|---|
| 103 | 103 | } |
| 104 | 104 | return k ? LSL(rm, k) : rm; |
| 105 | 105 | } |
| 106 | break; | |
| 107 | 106 | |
| 108 | 107 | case 1: /* LSR */ |
| 109 | 108 | if (k == 0 || k == 32) |
| r31988 | r31989 | |
| 124 | 123 | *pCarry = (rm & (1 << (k - 1))); |
| 125 | 124 | return LSR(rm, k); |
| 126 | 125 | } |
| 127 | break; | |
| 128 | 126 | |
| 129 | 127 | case 2: /* ASR */ |
| 130 | 128 | if (k == 0 || k > 32) |
| r31988 | r31989 | |
| 141 | 139 | else |
| 142 | 140 | return LSR(rm, k); |
| 143 | 141 | } |
| 144 | break; | |
| 145 | 142 | |
| 146 | 143 | case 3: /* ROR and RRX */ |
| 147 | 144 | if (k) |
| r31988 | r31989 | |
| 159 | 156 | *pCarry = (rm & 1); |
| 160 | 157 | return LSR(rm, 1) | ((GET_CPSR & C_MASK) << 2); |
| 161 | 158 | } |
| 162 | break; | |
| 163 | 159 | } |
| 164 | 160 | |
| 165 | 161 | LOG(("%08x: Decodeshift error\n", R15)); |
| r31988 | r31989 | |
|---|---|---|
| 3649 | 3649 | |
| 3650 | 3650 | default: |
| 3651 | 3651 | fatalerror("CPU_IMPORT_STATE() called for unexpected value\n"); |
| 3652 | break; | |
| 3653 | 3652 | } |
| 3654 | 3653 | } |
| 3655 | 3654 | |
| r31988 | r31989 | |
| 3664 | 3663 | |
| 3665 | 3664 | default: |
| 3666 | 3665 | fatalerror("CPU_EXPORT_STATE() called for unexpected value\n"); |
| 3667 | break; | |
| 3668 | 3666 | } |
| 3669 | 3667 | } |
| 3670 | 3668 |
| r31988 | r31989 | |
|---|---|---|
| 336 | 336 | return sprintf (dest, "@>%04x(R%d)", base, arg); |
| 337 | 337 | else /* symbolic (direct) */ |
| 338 | 338 | return sprintf (dest, "@>%04x", base); |
| 339 | break; | |
| 340 | 339 | case 0x3: /* workspace register indirect auto increment */ |
| 341 | 340 | return sprintf (dest, "*R%d+", arg); |
| 342 | 341 | } |
| r31988 | r31989 | |
|---|---|---|
| 2191 | 2191 | |
| 2192 | 2192 | default: |
| 2193 | 2193 | fatalerror("CPU_IMPORT_STATE(mcs48) called for unexpected value\n"); |
| 2194 | break; | |
| 2195 | 2194 | } |
| 2196 | 2195 | } |
| 2197 | 2196 | |
| r31988 | r31989 | |
| 2216 | 2215 | |
| 2217 | 2216 | default: |
| 2218 | 2217 | fatalerror("CPU_EXPORT_STATE(mcs51) called for unexpected value\n"); |
| 2219 | break; | |
| 2220 | 2218 | } |
| 2221 | 2219 | } |
| 2222 | 2220 |
| r31988 | r31989 | |
|---|---|---|
| 330 | 330 | |
| 331 | 331 | default: |
| 332 | 332 | fatalerror("dsp32c_device::state_import called for unexpected value\n"); |
| 333 | break; | |
| 334 | 333 | } |
| 335 | 334 | } |
| 336 | 335 | |
| r31988 | r31989 | |
| 361 | 360 | |
| 362 | 361 | default: |
| 363 | 362 | fatalerror("dsp32c_device::state_export called for unexpected value\n"); |
| 364 | break; | |
| 365 | 363 | } |
| 366 | 364 | } |
| 367 | 365 |
| r31988 | r31989 | |
|---|---|---|
| 502 | 502 | |
| 503 | 503 | default: |
| 504 | 504 | fatalerror("CPU_IMPORT_STATE(tms3203x) called for unexpected value\n"); |
| 505 | break; | |
| 506 | 505 | } |
| 507 | 506 | } |
| 508 | 507 | |
| r31988 | r31989 | |
| 529 | 528 | |
| 530 | 529 | default: |
| 531 | 530 | fatalerror("CPU_IMPORT_STATE(tms3203x) called for unexpected value\n"); |
| 532 | break; | |
| 533 | 531 | } |
| 534 | 532 | } |
| 535 | 533 |
| r31988 | r31989 | |
|---|---|---|
| 2560 | 2560 | |
| 2561 | 2561 | default: |
| 2562 | 2562 | fatalerror("CPU_IMPORT_STATE(z80) called for unexpected value\n"); |
| 2563 | break; | |
| 2564 | 2563 | } |
| 2565 | 2564 | } |
| 2566 | 2565 | |
| r31988 | r31989 | |
| 2579 | 2578 | |
| 2580 | 2579 | default: |
| 2581 | 2580 | fatalerror("CPU_EXPORT_STATE(z80) called for unexpected value\n"); |
| 2582 | break; | |
| 2583 | 2581 | } |
| 2584 | 2582 | } |
| 2585 | 2583 |
| r31988 | r31989 | |
|---|---|---|
| 425 | 425 | |
| 426 | 426 | default: |
| 427 | 427 | fatalerror( "TGP: Unknown ALU op %x at PC:%04x\n", alu, GETPC() ); |
| 428 | break; | |
| 429 | 428 | } |
| 430 | 429 | } |
| 431 | 430 | |
| r31988 | r31989 | |
| 718 | 717 | |
| 719 | 718 | default: |
| 720 | 719 | fatalerror( "TGP: Unknown GETREG (%d) at PC=%04x\n", reg, GETPC() ); |
| 721 | break; | |
| 722 | 720 | } |
| 723 | 721 | } |
| 724 | 722 | else if ( mode == 2 ) /* Indexed */ |
| r31988 | r31989 | |
| 783 | 781 | fatalerror( "TGP: Unknown GETREG mode %d at PC:%04x\n", mode, GETPC() ); |
| 784 | 782 | } |
| 785 | 783 | |
| 786 | return 0; | |
| 784 | // never executed | |
| 785 | //return 0; | |
| 787 | 786 | } |
| 788 | 787 | |
| 789 | 788 | void mb86233_cpu_device::SETREGS( UINT32 reg, UINT32 val ) |
| r31988 | r31989 | |
| 886 | 885 | break; |
| 887 | 886 | |
| 888 | 887 | default: |
| 889 | { | |
| 890 | 888 | fatalerror( "TGP: Unknown register write (r:%d, mode:%d) at PC:%04x\n", reg, mode, GETPC()); |
| 891 | } | |
| 892 | break; | |
| 893 | 889 | } |
| 894 | 890 | } |
| 895 | 891 | else |
| r31988 | r31989 | |
| 980 | 976 | fatalerror( "TGP: Unknown INDIRECT mode %d at PC:%04x\n", mode, GETPC() ); |
| 981 | 977 | } |
| 982 | 978 | |
| 983 | return 0; | |
| 979 | // never executed | |
| 980 | //return 0; | |
| 984 | 981 | } |
| 985 | 982 | |
| 986 | 983 | /*************************************************************************** |
| r31988 | r31989 | |
| 1249 | 1246 | |
| 1250 | 1247 | default: |
| 1251 | 1248 | fatalerror( "TGP: Unknown TGP move (op=%02x) at PC:%x\n", op, GETPC()); |
| 1252 | break; | |
| 1253 | 1249 | } |
| 1254 | 1250 | } |
| 1255 | 1251 | break; |
| r31988 | r31989 | |
| 1564 | 1560 | |
| 1565 | 1561 | case 0x0e: /* RIIF */ |
| 1566 | 1562 | fatalerror( "TGP: RIIF unimplemented at PC:%04x\n", GETPC() ); |
| 1567 | break; | |
| 1568 | 1563 | |
| 1569 | 1564 | default: |
| 1570 | 1565 | fatalerror( "TGP: Unknown Branch opcode (subtype=%d) at PC:%04x\n", subtype, GETPC() ); |
| 1571 | break; | |
| 1572 | 1566 | } |
| 1573 | 1567 | } |
| 1574 | 1568 | } |
| r31988 | r31989 | |
| 1625 | 1619 | |
| 1626 | 1620 | case 0x0e: /* RIUL */ |
| 1627 | 1621 | fatalerror( "TGP: RIUL unimplemented at PC:%04x\n", GETPC() ); |
| 1628 | break; | |
| 1629 | 1622 | |
| 1630 | 1623 | default: |
| 1631 | 1624 | fatalerror( "TGP: Unknown Branch opcode (subtype=%d) at PC:%04x\n", subtype, GETPC() ); |
| 1632 | break; | |
| 1633 | 1625 | } |
| 1634 | 1626 | } |
| 1635 | 1627 | } |
| r31988 | r31989 | |
| 1642 | 1634 | |
| 1643 | 1635 | default: |
| 1644 | 1636 | fatalerror( "TGP: unknown opcode %08x at PC:%04x (%02x)\n", opcode, GETPC(),(opcode >> 26) & 0x3f ); |
| 1645 | break; | |
| 1646 | 1637 | } |
| 1647 | 1638 | |
| 1648 | 1639 | if ( GETFIFOWAIT() == 0 ) |
| r31988 | r31989 | |
|---|---|---|
| 369 | 369 | case EXCEPTION_CPE: |
| 370 | 370 | case EXCEPTION_BUSEL_DATA: |
| 371 | 371 | fatalerror("unhandled exception: %d 0x%08x (PC=0x%08x)\n", cause, param, m_ppc); |
| 372 | break; | |
| 373 | 372 | } |
| 374 | 373 | } |
| 375 | 374 |
| r31988 | r31989 | |
|---|---|---|
| 1055 | 1055 | |
| 1056 | 1056 | default: |
| 1057 | 1057 | fatalerror("CPU_IMPORT_STATE(i808x) called for unexpected value\n"); |
| 1058 | break; | |
| 1059 | 1058 | } |
| 1060 | 1059 | } |
| 1061 | 1060 | |
| r31988 | r31989 | |
| 1079 | 1078 | |
| 1080 | 1079 | default: |
| 1081 | 1080 | fatalerror("CPU_EXPORT_STATE(i808x) called for unexpected value\n"); |
| 1082 | break; | |
| 1083 | 1081 | } |
| 1084 | 1082 | } |
| 1085 | 1083 |
| r31988 | r31989 | |
|---|---|---|
| 248 | 248 | |
| 249 | 249 | case DMA_WAIT_FOR_SOURCE_DRQ: |
| 250 | 250 | fatalerror("%s('%s'): wait for source drq not supported\n", shortname(), tag()); |
| 251 | break; | |
| 252 | 251 | |
| 253 | 252 | case DMA_FETCH: |
| 254 | 253 | if (VERBOSE_DMA) |
| r31988 | r31989 | |
| 306 | 305 | |
| 307 | 306 | case DMA_TRANSLATE: |
| 308 | 307 | fatalerror("%s('%s'): dma translate requested\n", shortname(), tag()); |
| 309 | break; | |
| 310 | 308 | |
| 311 | 309 | case DMA_WAIT_FOR_DEST_DRQ: |
| 312 | 310 | fatalerror("%s('%s'): wait for destination drq not supported\n", shortname(), tag()); |
| 313 | break; | |
| 314 | 311 | |
| 315 | 312 | case DMA_STORE: |
| 316 | 313 | if (VERBOSE_DMA) |
| r31988 | r31989 | |
| 348 | 345 | |
| 349 | 346 | case DMA_COMPARE: |
| 350 | 347 | fatalerror("%s('%s'): dma compare requested\n", shortname(), tag()); |
| 351 | break; | |
| 352 | 348 | |
| 353 | 349 | case DMA_TERMINATE: |
| 354 | 350 | if (VERBOSE_DMA) |
| r31988 | r31989 | |
|---|---|---|
| 482 | 482 | { |
| 483 | 483 | fatalerror("Am29000 instruction MMU translation enabled!\n"); |
| 484 | 484 | } |
| 485 | return 0; | |
| 485 | // never executed | |
| 486 | //return 0; | |
| 486 | 487 | } |
| 487 | 488 | |
| 488 | 489 | /*************************************************************************** |
| r31988 | r31989 | |
|---|---|---|
| 1019 | 1019 | |
| 1020 | 1020 | default: |
| 1021 | 1021 | /*logerror*/fatalerror( "%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op ); |
| 1022 | break; |
| r31988 | r31989 | |
|---|---|---|
| 711 | 711 | |
| 712 | 712 | default: |
| 713 | 713 | fatalerror("CPU_IMPORT_STATE(adsp21xx) called for unexpected value\n"); |
| 714 | break; | |
| 715 | 714 | } |
| 716 | 715 | } |
| 717 | 716 |
| r31988 | r31989 | |
|---|---|---|
| 786 | 786 | |
| 787 | 787 | default: |
| 788 | 788 | fatalerror("CPU_IMPORT_STATE(z8) called for unexpected value\n"); |
| 789 | break; | |
| 790 | 789 | } |
| 791 | 790 | } |
| 792 | 791 | |
| r31988 | r31989 | |
| 805 | 804 | |
| 806 | 805 | default: |
| 807 | 806 | fatalerror("CPU_EXPORT_STATE(z8) called for unexpected value\n"); |
| 808 | break; | |
| 809 | 807 | } |
| 810 | 808 | } |
| 811 | 809 |
| r31988 | r31989 | |
|---|---|---|
| 178 | 178 | |
| 179 | 179 | default: |
| 180 | 180 | fatalerror("vector_loadstore(): ls bits = %02X\n", vector_ls_bits); |
| 181 | break; | |
| 182 | 181 | } |
| 183 | 182 | } |
| 184 | 183 |
| r31988 | r31989 | |
|---|---|---|
| 520 | 520 | |
| 521 | 521 | // these opcodes should be processed at compile-time only |
| 522 | 522 | fatalerror("Unexpected opcode\n"); |
| 523 | break; | |
| 524 | 523 | |
| 525 | 524 | case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc |
| 526 | 525 | debugger_instruction_hook(&m_device, PARAM0); |
| r31988 | r31989 | |
| 2074 | 2073 | |
| 2075 | 2074 | default: |
| 2076 | 2075 | fatalerror("Unexpected opcode!\n"); |
| 2077 | break; | |
| 2078 | 2076 | } |
| 2079 | 2077 | |
| 2080 | 2078 | // advance past the parameters and immediates |
| 2081 | 2079 | inst += OPCODE_GET_PWORDS(opcode); |
| 2082 | 2080 | } |
| 2083 | 2081 | |
| 2084 | return 0; | |
| 2082 | // never executed | |
| 2083 | //return 0; | |
| 2085 | 2084 | } |
| 2086 | 2085 | |
| 2087 | 2086 | |
| r31988 | r31989 | |
| 2165 | 2164 | |
| 2166 | 2165 | default: |
| 2167 | 2166 | fatalerror("Unexpected param->type\n"); |
| 2168 | break; | |
| 2169 | 2167 | } |
| 2170 | 2168 | |
| 2171 | 2169 | *dstptr = dst; |
| r31988 | r31989 | |
|---|---|---|
| 323 | 323 | // everything else is unexpected |
| 324 | 324 | default: |
| 325 | 325 | fatalerror("Unexpected parameter type\n"); |
| 326 | break; | |
| 327 | 326 | } |
| 328 | 327 | } |
| 329 | 328 |
| r31988 | r31989 | |
|---|---|---|
| 2194 | 2194 | set_SZPF_Word(tmp); |
| 2195 | 2195 | CLKM(ALU_RI16,ALU_MI16_RO); |
| 2196 | 2196 | break; |
| 2197 | break; | |
| 2198 | 2197 | case 0x10: /* NOT */ |
| 2199 | 2198 | PutbackRMWord(~tmp); |
| 2200 | 2199 | CLKM(NEGNOT_R16,NEGNOT_M16); |
| r31988 | r31989 | |
|---|---|---|
| 307 | 307 | UINT32 v60_device::opUNHANDLED() |
| 308 | 308 | { |
| 309 | 309 | fatalerror("Unhandled OpCode found : %02x at %08x\n", OpRead16(PC), PC); |
| 310 | return 0; /* never reached, fatalerror won't return */ | |
| 310 | //return 0; /* never reached, fatalerror won't return */ | |
| 311 | 311 | } |
| 312 | 312 | |
| 313 | 313 | // Opcode jump table |
| r31988 | r31989 | |
|---|---|---|
| 219 | 219 | case 0xA0: /* Read slice */ |
| 220 | 220 | default: |
| 221 | 221 | fatalerror/*logerror*/("ef9341 unimplemented data action %02X\n", m_ef9340.M & 0xE0 ); |
| 222 | break; | |
| 223 | 222 | } |
| 224 | 223 | m_ef9341.busy = 0; |
| 225 | 224 | } |
| r31988 | r31989 | |
|---|---|---|
| 2067 | 2067 | return data; |
| 2068 | 2068 | } |
| 2069 | 2069 | |
| 2070 | return 0; | |
| 2070 | // never executed | |
| 2071 | //return 0; | |
| 2071 | 2072 | } |
| 2072 | 2073 | |
| 2073 | 2074 | WRITE8_MEMBER(vga_device::mem_w) |
| r31988 | r31989 | |
| 2748 | 2749 | case 0x03: svga.rgb15_en = 1; divisor = 2; break; |
| 2749 | 2750 | case 0x05: svga.rgb16_en = 1; divisor = 2; break; |
| 2750 | 2751 | case 0x0d: svga.rgb32_en = 1; divisor = 1; break; |
| 2751 | default: fatalerror("TODO: S3 colour mode not implemented %02x\n",((s3.ext_misc_ctrl_2) >> 4)); | |
| 2752 | default: fatalerror("TODO: S3 colour mode not implemented %02x\n",((s3.ext_misc_ctrl_2) >> 4)); | |
| 2752 | 2753 | } |
| 2753 | 2754 | } |
| 2754 | 2755 | else |
| r31988 | r31989 | |
|---|---|---|
| 292 | 292 | case SCANLINE_ZONE_FRAME_END: result = "SCANLINE_ZONE_FRAME_END"; break; |
| 293 | 293 | default: |
| 294 | 294 | fatalerror("Should not get here\n"); |
| 295 | break; | |
| 296 | 295 | } |
| 297 | 296 | return result; |
| 298 | 297 | } |
| r31988 | r31989 | |
| 715 | 714 | default: |
| 716 | 715 | /* should not get here */ |
| 717 | 716 | fatalerror("should not get here\n"); |
| 718 | break; | |
| 719 | 717 | } |
| 720 | 718 | } |
| 721 | 719 | else |
| r31988 | r31989 | |
| 799 | 797 | break; |
| 800 | 798 | default: |
| 801 | 799 | fatalerror("Should not get here\n"); |
| 802 | break; | |
| 803 | 800 | } |
| 804 | 801 | return result; |
| 805 | 802 | } |
| r31988 | r31989 | |
|---|---|---|
| 273 | 273 | { |
| 274 | 274 | return (asc8 > asc16) ? ASCII8 : ASCII16; |
| 275 | 275 | } |
| 276 | ||
| 277 | return NOMAPPER; | |
| 278 | 276 | } |
| 279 | 277 | |
| 280 | 278 |
| r31988 | r31989 | |
|---|---|---|
| 284 | 284 | case 0x03: svga.rgb15_en = 1; divisor = 2; break; |
| 285 | 285 | case 0x05: svga.rgb16_en = 1; divisor = 2; break; |
| 286 | 286 | case 0x0d: svga.rgb32_en = 1; divisor = 1; break; |
| 287 | default: fatalerror("TODO: s3 video mode not implemented %02x\n",((s3.ext_misc_ctrl_2) >> 4)); | |
| 287 | default: fatalerror("TODO: s3 video mode not implemented %02x\n",((s3.ext_misc_ctrl_2) >> 4)); | |
| 288 | 288 | } |
| 289 | 289 | } |
| 290 | 290 | else |
| r31988 | r31989 | |
|---|---|---|
| 1329 | 1329 | logerror("GUS: Invalid or unimplemented read of port 0x2X%01x\n",offset); |
| 1330 | 1330 | return 0xff; |
| 1331 | 1331 | } |
| 1332 | return 0xff; | |
| 1333 | 1332 | } |
| 1334 | 1333 | |
| 1335 | 1334 | WRITE8_MEMBER(isa16_gus_device::board_w) |
| r31988 | r31989 | |
| 1385 | 1384 | logerror("GUS: Invalid or unimplemented register read of port 0x3X%01x\n",offset); |
| 1386 | 1385 | return 0xff; |
| 1387 | 1386 | } |
| 1388 | return 0xff; | |
| 1389 | 1387 | } |
| 1390 | 1388 | |
| 1391 | 1389 | WRITE8_MEMBER(isa16_gus_device::synth_w) |
| r31988 | r31989 | |
|---|---|---|
| 921 | 921 | case AGA_MONO: |
| 922 | 922 | return m_videoram[offset]; |
| 923 | 923 | } |
| 924 | return 0; | |
| 925 | 924 | } |
| 926 | 925 | |
| 927 | 926 | WRITE8_MEMBER ( isa8_aga_pc200_device::pc200_videoram_w ) |
| r31988 | r31989 | |
|---|---|---|
| 301 | 301 | break; |
| 302 | 302 | default: |
| 303 | 303 | fatalerror("ISA8: Bus width %d not supported\n", buswidth); |
| 304 | break; | |
| 305 | 304 | } |
| 306 | 305 | } |
| 307 | 306 | |
| r31988 | r31989 | |
| 530 | 529 | break; |
| 531 | 530 | default: |
| 532 | 531 | fatalerror("ISA16: Bus width %d not supported\n", buswidth); |
| 533 | break; | |
| 534 | 532 | } |
| 535 | 533 | } |
| 536 | 534 |
| r31988 | r31989 | |
|---|---|---|
| 266 | 266 | break; |
| 267 | 267 | default: |
| 268 | 268 | fatalerror("This should never happen\n"); |
| 269 | break; | |
| 270 | 269 | } |
| 271 | 270 | } |
| 272 | 271 |
| r31988 | r31989 | |
|---|---|---|
| 233 | 233 | |
| 234 | 234 | default: |
| 235 | 235 | fatalerror("xceedmc30: unknown video mode %d\n", m_mode); |
| 236 | break; | |
| 237 | 236 | } |
| 238 | 237 | return 0; |
| 239 | 238 | } |
| r31988 | r31989 | |
|---|---|---|
| 219 | 219 | |
| 220 | 220 | default: |
| 221 | 221 | fatalerror("m2video: unknown video mode %d\n", m_mode); |
| 222 | break; | |
| 223 | 222 | } |
| 224 | 223 | return 0; |
| 225 | 224 | } |
| r31988 | r31989 | |
|---|---|---|
| 218 | 218 | |
| 219 | 219 | default: |
| 220 | 220 | fatalerror("m2hires: unknown video mode %d\n", m_mode); |
| 221 | break; | |
| 222 | 221 | } |
| 223 | 222 | return 0; |
| 224 | 223 | } |
| r31988 | r31989 | |
|---|---|---|
| 230 | 230 | |
| 231 | 231 | default: |
| 232 | 232 | fatalerror("cb264se30: unknown video mode %d\n", m_mode); |
| 233 | break; | |
| 234 | 233 | } |
| 235 | 234 | return 0; |
| 236 | 235 | } |
| r31988 | r31989 | |
|---|---|---|
| 138 | 138 | break; |
| 139 | 139 | default: |
| 140 | 140 | fatalerror("NUBUS: Bus width %d not supported\n", buswidth); |
| 141 | break; | |
| 142 | 141 | } |
| 143 | 142 | } |
| 144 | 143 | |
| r31988 | r31989 | |
| 156 | 155 | break; |
| 157 | 156 | default: |
| 158 | 157 | fatalerror("NUBUS: Bus width %d not supported\n", buswidth); |
| 159 | break; | |
| 160 | 158 | } |
| 161 | 159 | } |
| 162 | 160 | |
| r31988 | r31989 | |
| 174 | 172 | break; |
| 175 | 173 | default: |
| 176 | 174 | fatalerror("NUBUS: Bus width %d not supported\n", buswidth); |
| 177 | break; | |
| 178 | 175 | } |
| 179 | 176 | } |
| 180 | 177 | |
| r31988 | r31989 | |
| 192 | 189 | break; |
| 193 | 190 | default: |
| 194 | 191 | fatalerror("NUBUS: Bus width %d not supported\n", buswidth); |
| 195 | break; | |
| 196 | 192 | } |
| 197 | 193 | } |
| 198 | 194 | |
| r31988 | r31989 | |
| 210 | 206 | break; |
| 211 | 207 | default: |
| 212 | 208 | fatalerror("NUBUS: Bus width %d not supported\n", buswidth); |
| 213 | break; | |
| 214 | 209 | } |
| 215 | 210 | } |
| 216 | 211 | |
| r31988 | r31989 | |
| 443 | 438 | |
| 444 | 439 | default: |
| 445 | 440 | fatalerror("NuBus: unhandled byteLanes value %02x\n", byteLanes); |
| 446 | break; | |
| 447 | 441 | } |
| 448 | 442 | |
| 449 | 443 | // the slot manager can supposedly handle inverted ROMs by itself, but let's do it for it anyway |
| r31988 | r31989 | |
|---|---|---|
| 222 | 222 | |
| 223 | 223 | default: |
| 224 | 224 | fatalerror("spec8s3: unknown video mode %d\n", m_mode); |
| 225 | break; | |
| 226 | 225 | } |
| 227 | 226 | return 0; |
| 228 | 227 | } |
| r31988 | r31989 | |
|---|---|---|
| 236 | 236 | |
| 237 | 237 | default: |
| 238 | 238 | fatalerror("specpdq: unknown video mode %d\n", m_mode); |
| 239 | break; | |
| 240 | 239 | } |
| 241 | 240 | return 0; |
| 242 | 241 | } |
| r31988 | r31989 | |
|---|---|---|
| 220 | 220 | |
| 221 | 221 | default: |
| 222 | 222 | fatalerror("xceed30hr: unknown video mode %d\n", m_mode); |
| 223 | break; | |
| 224 | 223 | } |
| 225 | 224 | return 0; |
| 226 | 225 | } |
| r31988 | r31989 | |
|---|---|---|
| 206 | 206 | |
| 207 | 207 | default: |
| 208 | 208 | fatalerror("wsportrait: unknown video mode %d\n", m_mode); |
| 209 | break; | |
| 210 | 209 | } |
| 211 | 210 | return 0; |
| 212 | 211 | } |
| r31988 | r31989 | |
|---|---|---|
| 219 | 219 | |
| 220 | 220 | default: |
| 221 | 221 | fatalerror("cb264: unknown video mode %d\n", m_cb264_mode); |
| 222 | break; | |
| 223 | 222 | } |
| 224 | 223 | |
| 225 | 224 | return 0; |
| r31988 | r31989 | |
|---|---|---|
| 237 | 237 | |
| 238 | 238 | default: |
| 239 | 239 | fatalerror("procolor816: unknown video mode %d\n", m_mode); |
| 240 | break; | |
| 241 | 240 | } |
| 242 | 241 | return 0; |
| 243 | 242 | } |
| r31988 | r31989 | |
|---|---|---|
| 188 | 188 | { |
| 189 | 189 | return m_ata->read_cs0(space, offset, 0xff); |
| 190 | 190 | } |
| 191 | break; | |
| 192 | 191 | |
| 193 | 192 | case 2: |
| 194 | 193 | case 3: |
| r31988 | r31989 | |
|---|---|---|
| 150 | 150 | |
| 151 | 151 | case 6: // IRQ on Z80 via CTC channel 3 (CP/M doesn't use the CTC or IRQs) |
| 152 | 152 | fatalerror("Applicard: Z80 IRQ not supported yet\n"); |
| 153 | break; | |
| 154 | 153 | |
| 155 | 154 | case 7: // NMI on Z80 (direct) |
| 156 | 155 | m_z80->set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| r31988 | r31989 | |
| 255 | 254 | { |
| 256 | 255 | return m_z80ram[offset]; |
| 257 | 256 | } |
| 258 | return 0xff; | |
| 257 | // never executed | |
| 258 | //return 0xff; | |
| 259 | 259 | } |
| 260 | 260 | |
| 261 | 261 |
| r31988 | r31989 | |
|---|---|---|
| 176 | 176 | case 7: |
| 177 | 177 | // printf("Read 5380 @ %x\n", offset); |
| 178 | 178 | return m_ncr5380->read(space, offset); |
| 179 | break; | |
| 180 | 179 | |
| 181 | 180 | case 0xc: |
| 182 | 181 | return 0x00; // indicate watchdog? |
| r31988 | r31989 | |
|---|---|---|
| 167 | 167 | case 7: |
| 168 | 168 | // printf("Read 5380 @ %x\n", offset); |
| 169 | 169 | return m_ncr5380->read(space, offset); |
| 170 | break; | |
| 171 | 170 | |
| 172 | 171 | case 8: // read and DACK |
| 173 | 172 | return m_ncr5380->dma_r(); |
| r31988 | r31989 | |
|---|---|---|
| 172 | 172 | break; |
| 173 | 173 | default: |
| 174 | 174 | fatalerror("Invalid value\n"); |
| 175 | break; | |
| 176 | 175 | } |
| 177 | 176 | return s; |
| 178 | 177 | } |
| r31988 | r31989 | |
|---|---|---|
| 586 | 586 | |
| 587 | 587 | fatalerror("scsihle: Unknown SCSI command group %d, command byte=%02X\n", group,cbyte); |
| 588 | 588 | |
| 589 | return 6; | |
| 589 | // never executed | |
| 590 | //return 6; | |
| 590 | 591 | } |
| r31988 | r31989 | |
|---|---|---|
| 329 | 329 | return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; |
| 330 | 330 | } |
| 331 | 331 | |
| 332 | return 0x00; | |
| 332 | // never executed | |
| 333 | //return 0x00; | |
| 333 | 334 | } |
| 334 | 335 | |
| 335 | 336 | |
| r31988 | r31989 | |
| 353 | 354 | return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; |
| 354 | 355 | } |
| 355 | 356 | |
| 356 | return 0x00; | |
| 357 | // never executed | |
| 358 | //return 0x00; | |
| 357 | 359 | } |
| 358 | 360 | |
| 359 | 361 | WRITE8_MEMBER(sns_rom_bsx_device::write_l) |
| r31988 | r31989 | |
|---|---|---|
| 155 | 155 | |
| 156 | 156 | default: |
| 157 | 157 | fatalerror("Unknown CPU\n"); |
| 158 | break; | |
| 159 | 158 | } |
| 160 | 159 | break; |
| 161 | 160 |
| r31988 | r31989 | |
|---|---|---|
| 134 | 134 | |
| 135 | 135 | default: |
| 136 | 136 | fatalerror("i82439tx_pci_read(): Unexpected PCI read 0x%02X\n", offset); |
| 137 | break; | |
| 138 | 137 | } |
| 139 | 138 | return result; |
| 140 | 139 | } |
| r31988 | r31989 | |
| 251 | 250 | |
| 252 | 251 | default: |
| 253 | 252 | fatalerror("i82439tx_pci_write(): Unexpected PCI write 0x%02X <-- 0x%08X\n", offset, data); |
| 254 | break; | |
| 255 | 253 | } |
| 256 | 254 | } |
| 257 | 255 |
| r31988 | r31989 | |
|---|---|---|
| 104 | 104 | else |
| 105 | 105 | return m_default_rom[1]; |
| 106 | 106 | |
| 107 | return 0xffff; | |
| 107 | // never executed | |
| 108 | //return 0xffff; | |
| 108 | 109 | } |
| 109 | 110 | |
| 110 | 111 | WRITE16_MEMBER( kof98_prot_device::kof98_prot_w ) |
| r31988 | r31989 | |
|---|---|---|
| 203 | 203 | break; |
| 204 | 204 | default: |
| 205 | 205 | fatalerror("Unknown mem_mask for GBA flash write %x\n", mem_mask); |
| 206 | break; | |
| 207 | 206 | } |
| 208 | 207 | } |
| 209 | 208 | |
| r31988 | r31989 | |
| 255 | 254 | break; |
| 256 | 255 | default: |
| 257 | 256 | fatalerror("Unknown mem_mask for GBA flash write %x\n", mem_mask); |
| 258 | break; | |
| 259 | 257 | } |
| 260 | 258 | } |
| 261 | 259 |
| r31988 | r31989 | |
|---|---|---|
| 61 | 61 | |
| 62 | 62 | fatalerror("NCR5380: Unknown SCSI command group %d\n", group); |
| 63 | 63 | |
| 64 | return 6; | |
| 64 | // never executed | |
| 65 | //return 6; | |
| 65 | 66 | } |
| 66 | 67 | |
| 67 | 68 |
| r31988 | r31989 | |
|---|---|---|
| 467 | 467 | return scsi_sense_buffer[pos]; |
| 468 | 468 | default: |
| 469 | 469 | fatalerror("nscsi_full_device::scsi_get_data - unknown id\n"); |
| 470 | return 0; // shut up compiler | |
| 471 | 470 | } |
| 472 | 471 | } |
| 473 | 472 |
| r31988 | r31989 | |
|---|---|---|
| 180 | 180 | return 0; |
| 181 | 181 | } |
| 182 | 182 | |
| 183 | return -1; | |
| 183 | // never executed | |
| 184 | //return -1; | |
| 184 | 185 | } |
| 185 | 186 | |
| 186 | 187 | bool jvs_device::get_address_set_line() |
| r31988 | r31989 | |
|---|---|---|
| 171 | 171 | |
| 172 | 172 | fatalerror("MB89352: Unknown SCSI command group %d\n", group); |
| 173 | 173 | |
| 174 | return 6; | |
| 174 | // never executed | |
| 175 | //return 6; | |
| 175 | 176 | } |
| 176 | 177 | |
| 177 | 178 | void mb89352_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| r31988 | r31989 | |
|---|---|---|
| 145 | 145 | scsi_bus->data_w(scsi_refid, 0); |
| 146 | 146 | scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); |
| 147 | 147 | fatalerror("need to wait for bus free\n"); |
| 148 | break; | |
| 149 | 148 | } |
| 150 | 149 | state = (state & STATE_MASK) | (ARB_ASSERT_SEL << SUB_SHIFT); |
| 151 | 150 | scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); |
| r31988 | r31989 | |
|---|---|---|
| 357 | 357 | } |
| 358 | 358 | } |
| 359 | 359 | |
| 360 | return 0; /* unreachable */ | |
| 360 | //return 0; /* unreachable */ | |
| 361 | 361 | } |
| 362 | 362 | |
| 363 | 363 |
| r31988 | r31989 | |
|---|---|---|
| 613 | 613 | /* read aux status */ |
| 614 | 614 | return regs[WD_AUXILIARY_STATUS]; |
| 615 | 615 | } |
| 616 | break; | |
| 617 | 616 | |
| 618 | 617 | case 1: |
| 619 | 618 | { |
| r31988 | r31989 | |
|---|---|---|
| 280 | 280 | |
| 281 | 281 | default: |
| 282 | 282 | fatalerror("539x: Unhandled command %02x\n", m_command); |
| 283 | break; | |
| 284 | 283 | } |
| 285 | 284 | break; |
| 286 | 285 |
| r31988 | r31989 | |
|---|---|---|
| 279 | 279 | case NL_ERROR: |
| 280 | 280 | emu_fatalerror error("netlist ERROR: %s\n", errstr.cstr()); |
| 281 | 281 | throw error; |
| 282 | break; | |
| 283 | 282 | } |
| 284 | 283 | } |
| 285 | 284 |
| r31988 | r31989 | |
|---|---|---|
| 116 | 116 | |
| 117 | 117 | default: |
| 118 | 118 | fatalerror("DS2404: Unknown ROM command %02X\n", cmd); |
| 119 | break; | |
| 120 | 119 | } |
| 121 | 120 | } |
| 122 | 121 | |
| r31988 | r31989 | |
| 151 | 150 | |
| 152 | 151 | default: |
| 153 | 152 | fatalerror("DS2404: Unknown command %02X\n", cmd); |
| 154 | break; | |
| 155 | 153 | } |
| 156 | 154 | } |
| 157 | 155 |
| r31988 | r31989 | |
|---|---|---|
| 394 | 394 | case 0x3f: |
| 395 | 395 | return 0x00; |
| 396 | 396 | } |
| 397 | break; | |
| 398 | 397 | } |
| 399 | 398 | |
| 400 | 399 | return 0; |
| r31988 | r31989 | |
|---|---|---|
| 118 | 118 | case 7: |
| 119 | 119 | input = m_in_in_7_cb(); |
| 120 | 120 | break; |
| 121 | break; | |
| 122 | 121 | } |
| 123 | 122 | m_sar = (255 * (input - vref_neg)) / (vref_pos - vref_neg); |
| 124 | 123 |
| r31988 | r31989 | |
|---|---|---|
| 58 | 58 | default: |
| 59 | 59 | fatalerror("%s: k033906_reg_r: %08X\n", machine().describe_context(), reg); |
| 60 | 60 | } |
| 61 | return 0; | |
| 61 | // never executed | |
| 62 | //return 0; | |
| 62 | 63 | } |
| 63 | 64 | |
| 64 | 65 | void k033906_device::reg_w(int reg, UINT32 data) |
| r31988 | r31989 | |
|---|---|---|
| 684 | 684 | { |
| 685 | 685 | case COMMAND_ENABLE_AFTER_RETI: |
| 686 | 686 | fatalerror("Z80DMA '%s' Unimplemented WR6 command %02x\n", tag(), data); |
| 687 | break; | |
| 688 | 687 | case COMMAND_READ_STATUS_BYTE: |
| 689 | 688 | if (LOG) logerror("Z80DMA '%s' CMD Read status Byte\n", tag()); |
| 690 | 689 | READ_MASK = 1; |
| r31988 | r31989 | |
|---|---|---|
| 167 | 167 | scsi_bus->data_w(scsi_refid, 0); |
| 168 | 168 | scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); |
| 169 | 169 | fatalerror("need to wait for bus free\n"); |
| 170 | break; | |
| 171 | 170 | } |
| 172 | 171 | |
| 173 | 172 | state &= STATE_MASK; |
| r31988 | r31989 | |
|---|---|---|
| 579 | 579 | case S3C44B0_PNRMODE_STN_04_SS : width = ((hozval + 1) * 4); break; |
| 580 | 580 | case S3C44B0_PNRMODE_STN_04_DS : width = ((hozval + 1) * 4); break; |
| 581 | 581 | case S3C44B0_PNRMODE_STN_08_SS : width = ((hozval + 1) * 8); break; |
| 582 | default : fatalerror("invalid display mode (%d)\n", dismode); | |
| 582 | default : fatalerror("invalid display mode (%d)\n", dismode); | |
| 583 | 583 | } |
| 584 | 584 | height = lineval + 1; |
| 585 | 585 | m_lcd.framerate = framerate; |
| r31988 | r31989 | |
|---|---|---|
| 189 | 189 | if (!m_dma_read_3_cb.isnull()) |
| 190 | 190 | data = m_dma_read_3_cb(0); |
| 191 | 191 | break; |
| 192 | break; | |
| 193 | 192 | } |
| 194 | 193 | space.write_byte(m_reg.address_current[channel], data & 0xff); |
| 195 | 194 | if (m_reg.mode_control[channel] & 0x20) // Address direction |
| r31988 | r31989 | |
| 228 | 227 | if (!m_dma_write_3_cb.isnull()) |
| 229 | 228 | m_dma_write_3_cb((offs_t)0, data); |
| 230 | 229 | break; |
| 231 | break; | |
| 232 | 230 | } |
| 233 | 231 | if (m_reg.mode_control[channel] & 0x20) // Address direction |
| 234 | 232 | m_reg.address_current[channel]--; |
| r31988 | r31989 | |
|---|---|---|
| 2057 | 2057 | verboselog(machine(), 2, "mc68328_r (%04x): PADIR = %02x\n", mem_mask, m_regs.padir); |
| 2058 | 2058 | return m_regs.padir << 8; |
| 2059 | 2059 | } |
| 2060 | break; | |
| 2061 | 2060 | |
| 2062 | 2061 | case 0x402: |
| 2063 | 2062 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2089 | 2088 | verboselog(machine(), 2, "mc68328_r (%04x): PBDIR = %02x\n", mem_mask, m_regs.pbdir); |
| 2090 | 2089 | return m_regs.pbdir << 8; |
| 2091 | 2090 | } |
| 2092 | break; | |
| 2093 | 2091 | |
| 2094 | 2092 | case 0x40a: |
| 2095 | 2093 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2121 | 2119 | verboselog(machine(), 2, "mc68328_r (%04x): PCDIR = %02x\n", mem_mask, m_regs.pcdir); |
| 2122 | 2120 | return m_regs.pcdir << 8; |
| 2123 | 2121 | } |
| 2124 | break; | |
| 2125 | 2122 | |
| 2126 | 2123 | case 0x412: |
| 2127 | 2124 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2153 | 2150 | verboselog(machine(), 2, "mc68328_r (%04x): PDDIR = %02x\n", mem_mask, m_regs.pddir); |
| 2154 | 2151 | return m_regs.pddir << 8; |
| 2155 | 2152 | } |
| 2156 | break; | |
| 2157 | 2153 | |
| 2158 | 2154 | case 0x41a: |
| 2159 | 2155 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2178 | 2174 | verboselog(machine(), 2, "mc68328_r (%04x): PDPOL = %02x\n", mem_mask, m_regs.pdpol); |
| 2179 | 2175 | return m_regs.pdpol << 8; |
| 2180 | 2176 | } |
| 2181 | break; | |
| 2182 | 2177 | |
| 2183 | 2178 | case 0x41e: |
| 2184 | 2179 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2210 | 2205 | verboselog(machine(), 2, "mc68328_r (%04x): PEDIR = %02x\n", mem_mask, m_regs.pedir); |
| 2211 | 2206 | return m_regs.pedir << 8; |
| 2212 | 2207 | } |
| 2213 | break; | |
| 2214 | 2208 | |
| 2215 | 2209 | case 0x422: |
| 2216 | 2210 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2223 | 2217 | verboselog(machine(), 2, "mc68328_r (%04x): PEPUEN = %02x\n", mem_mask, m_regs.pepuen); |
| 2224 | 2218 | return m_regs.pepuen << 8; |
| 2225 | 2219 | } |
| 2226 | break; | |
| 2227 | 2220 | |
| 2228 | 2221 | case 0x428: |
| 2229 | 2222 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2243 | 2236 | verboselog(machine(), 2, "mc68328_r (%04x): PFDIR = %02x\n", mem_mask, m_regs.pfdir); |
| 2244 | 2237 | return m_regs.pfdir << 8; |
| 2245 | 2238 | } |
| 2246 | break; | |
| 2247 | 2239 | |
| 2248 | 2240 | case 0x42a: |
| 2249 | 2241 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2256 | 2248 | verboselog(machine(), 2, "mc68328_r (%04x): PFPUEN = %02x\n", mem_mask, m_regs.pfpuen); |
| 2257 | 2249 | return m_regs.pfpuen << 8; |
| 2258 | 2250 | } |
| 2259 | break; | |
| 2260 | 2251 | |
| 2261 | 2252 | case 0x430: |
| 2262 | 2253 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2276 | 2267 | verboselog(machine(), 2, "mc68328_r (%04x): PGDIR = %02x\n", mem_mask, m_regs.pgdir); |
| 2277 | 2268 | return m_regs.pgdir << 8; |
| 2278 | 2269 | } |
| 2279 | break; | |
| 2280 | 2270 | |
| 2281 | 2271 | case 0x432: |
| 2282 | 2272 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2289 | 2279 | verboselog(machine(), 2, "mc68328_r (%04x): PGPUEN = %02x\n", mem_mask, m_regs.pgpuen); |
| 2290 | 2280 | return m_regs.pgpuen << 8; |
| 2291 | 2281 | } |
| 2292 | break; | |
| 2293 | 2282 | |
| 2294 | 2283 | case 0x438: |
| 2295 | 2284 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2309 | 2298 | verboselog(machine(), 2, "mc68328_r (%04x): PJDIR = %02x\n", mem_mask, m_regs.pjdir); |
| 2310 | 2299 | return m_regs.pjdir << 8; |
| 2311 | 2300 | } |
| 2312 | break; | |
| 2313 | 2301 | |
| 2314 | 2302 | case 0x43a: |
| 2315 | 2303 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2341 | 2329 | verboselog(machine(), 2, "mc68328_r (%04x): PKDIR = %02x\n", mem_mask, m_regs.pkdir); |
| 2342 | 2330 | return m_regs.pkdir << 8; |
| 2343 | 2331 | } |
| 2344 | break; | |
| 2345 | 2332 | |
| 2346 | 2333 | case 0x442: |
| 2347 | 2334 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2354 | 2341 | verboselog(machine(), 2, "mc68328_r (%04x): PKPUEN = %02x\n", mem_mask, m_regs.pkpuen); |
| 2355 | 2342 | return m_regs.pkpuen << 8; |
| 2356 | 2343 | } |
| 2357 | break; | |
| 2358 | 2344 | |
| 2359 | 2345 | case 0x448: |
| 2360 | 2346 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2374 | 2360 | verboselog(machine(), 2, "mc68328_r (%04x): PMDIR = %02x\n", mem_mask, m_regs.pmdir); |
| 2375 | 2361 | return m_regs.pmdir << 8; |
| 2376 | 2362 | } |
| 2377 | break; | |
| 2378 | 2363 | |
| 2379 | 2364 | case 0x44a: |
| 2380 | 2365 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
| 2387 | 2372 | verboselog(machine(), 2, "mc68328_r (%04x): PMPUEN = %02x\n", mem_mask, m_regs.pmpuen); |
| 2388 | 2373 | return m_regs.pmpuen << 8; |
| 2389 | 2374 | } |
| 2390 | break; | |
| 2391 | 2375 | |
| 2392 | 2376 | case 0x500: |
| 2393 | 2377 | verboselog(machine(), 2, "mc68328_r (%04x): PWMC = %04x\n", mem_mask, m_regs.pwmc); |
| r31988 | r31989 | |
| 2578 | 2562 | verboselog(machine(), 2, "mc68328_r (%04x): LPICF = %02x\n", mem_mask, m_regs.lpicf); |
| 2579 | 2563 | return m_regs.lpicf << 8; |
| 2580 | 2564 | } |
| 2581 | break; | |
| 2582 | 2565 | |
| 2583 | 2566 | case 0xa22: |
| 2584 | 2567 | if (mem_mask & 0x00ff) |
| r31988 | r31989 | |
|---|---|---|
| 20 | 20 | case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */ |
| 21 | 21 | //if (pc!=0x2182e) logerror("%08x m68307_internal_timer_r %08x (%04x) (TCN - Timer Counter for timer %d)\n", pc, offset*2,mem_mask, which); |
| 22 | 22 | return timer->read_tcn(mem_mask, which); |
| 23 | break; | |
| 24 | 23 | |
| 25 | ||
| 26 | 24 | default: |
| 27 | 25 | logerror("%08x m68307_internal_timer_r %08x, (%04x)\n", pc, offset*2,mem_mask); |
| 28 | 26 | break; |
| r31988 | r31989 | |
|---|---|---|
| 470 | 470 | fatalerror("LSI53C810: reg_r: Unknown reg %02X\n", offset); |
| 471 | 471 | } |
| 472 | 472 | |
| 473 | return 0; | |
| 473 | // never executed | |
| 474 | //return 0; | |
| 474 | 475 | } |
| 475 | 476 | |
| 476 | 477 | void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data) |
| r31988 | r31989 | |
| 779 | 780 | |
| 780 | 781 | default: |
| 781 | 782 | fatalerror("unknown op 0x%08X\n", op); |
| 782 | break; | |
| 783 | 783 | } |
| 784 | 784 | result = 8; |
| 785 | 785 | } |
| r31988 | r31989 | |
|---|---|---|
| 148 | 148 | { |
| 149 | 149 | case netlist_terminal_t::TERMINAL: |
| 150 | 150 | return "TERMINAL"; |
| 151 | break; | |
| 152 | 151 | case netlist_terminal_t::INPUT: |
| 153 | 152 | return "INPUT"; |
| 154 | break; | |
| 155 | 153 | case netlist_terminal_t::OUTPUT: |
| 156 | 154 | return "OUTPUT"; |
| 157 | break; | |
| 158 | 155 | case netlist_terminal_t::NET: |
| 159 | 156 | return "NET"; |
| 160 | break; | |
| 161 | 157 | case netlist_terminal_t::PARAM: |
| 162 | 158 | return "PARAM"; |
| 163 | break; | |
| 164 | 159 | case netlist_terminal_t::DEVICE: |
| 165 | 160 | return "DEVICE"; |
| 166 | break; | |
| 167 | 161 | case netlist_terminal_t::NETLIST: |
| 168 | 162 | return "NETLIST"; |
| 169 | break; | |
| 170 | 163 | case netlist_terminal_t::QUEUE: |
| 171 | 164 | return "QUEUE"; |
| 172 | break; | |
| 173 | 165 | } |
| 174 | 166 | // FIXME: noreturn |
| 175 | 167 | netlist().error("Unknown object type %d\n", in.type()); |
| r31988 | r31989 | |
|---|---|---|
| 473 | 473 | |
| 474 | 474 | return (offset == 0) ? m_keyb_press : ((m_shift_press_flag << 6) | (m_keyb_press_flag << 2) | (m_keyb_press_flag)); |
| 475 | 475 | } |
| 476 | break; | |
| 477 | 476 | default: |
| 478 | 477 | { |
| 479 | 478 | //if(offset == 1) |
| r31988 | r31989 | |
| 483 | 482 | } |
| 484 | 483 | } |
| 485 | 484 | |
| 486 | return 0x00; | |
| 485 | // never executed | |
| 486 | //return 0x00; | |
| 487 | 487 | } |
| 488 | 488 | |
| 489 | 489 | /* TODO: the packet commands strikes me as something I've already seen before, don't remember where however ... */ |
| r31988 | r31989 | |
|---|---|---|
| 547 | 547 | return m_539x_1->read(space, 2); |
| 548 | 548 | } |
| 549 | 549 | |
| 550 | return 0; | |
| 550 | // never executed | |
| 551 | //return 0; | |
| 551 | 552 | } |
| 552 | 553 | |
| 553 | 554 | WRITE8_MEMBER(mac_state::mac_5396_w) |
| r31988 | r31989 | |
|---|---|---|
| 821 | 821 | else //PCG RAM |
| 822 | 822 | return m_pcg_ram[offset]; |
| 823 | 823 | } |
| 824 | break; | |
| 825 | 824 | case 0x3a: |
| 826 | 825 | { |
| 827 | 826 | return m_dic_rom[(offset & 0x1fff) + ((m_dic_bank & 0x1f)*0x2000)]; |
| 828 | 827 | } |
| 829 | break; | |
| 830 | 828 | case 0x3c: |
| 831 | 829 | case 0x3d: |
| 832 | 830 | case 0x3e: |
| r31988 | r31989 | |
| 834 | 832 | { |
| 835 | 833 | return m_phone_rom[offset+(cur_bank & 3)*0x2000]; |
| 836 | 834 | } |
| 837 | break; | |
| 838 | 835 | default: return ram[offset+cur_bank*0x2000]; |
| 839 | 836 | } |
| 840 | 837 | |
| 838 | // never executed | |
| 841 | 839 | return 0xff; |
| 842 | 840 | } |
| 843 | 841 |
| r31988 | r31989 | |
|---|---|---|
| 316 | 316 | //verboselog(0, "Unknown HPC PBUS6 Read: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), mem_mask ); |
| 317 | 317 | return 0; |
| 318 | 318 | } |
| 319 | return 0; | |
| 320 | 319 | } |
| 321 | 320 | |
| 322 | 321 | WRITE32_MEMBER(ip22_state::hpc3_pbus6_w) |
| r31988 | r31989 | |
| 434 | 433 | //verboselog((machine, 0, "Unknown HPC3 ENET/HDx Read: %08x (%08x)\n", 0x1fb90000 + ( offset << 2 ), mem_mask ); |
| 435 | 434 | return 0; |
| 436 | 435 | } |
| 437 | return 0; | |
| 438 | 436 | } |
| 439 | 437 | |
| 440 | 438 | WRITE32_MEMBER(ip22_state::hpc3_hd_enet_w) |
| r31988 | r31989 | |
| 493 | 491 | //verboselog((machine, 0, "Unknown HPC3 HD0 Read: %08x (%08x) [%x] PC=%x\n", 0x1fbc0000 + ( offset << 2 ), mem_mask, offset, space.device().safe_pc() ); |
| 494 | 492 | return 0; |
| 495 | 493 | } |
| 496 | return 0; | |
| 497 | 494 | } |
| 498 | 495 | |
| 499 | 496 | WRITE32_MEMBER(ip22_state::hpc3_hd0_w) |
| r31988 | r31989 | |
| 540 | 537 | //verboselog((machine, 0, "Unknown HPC3 PBUS4 Read: %08x (%08x)\n", 0x1fbd9000 + ( offset << 2 ), mem_mask ); |
| 541 | 538 | return 0; |
| 542 | 539 | } |
| 543 | return 0; | |
| 544 | 540 | } |
| 545 | 541 | |
| 546 | 542 | WRITE32_MEMBER(ip22_state::hpc3_pbus4_w) |
| r31988 | r31989 | |
| 1006 | 1002 | return; |
| 1007 | 1003 | /* FIXME: this code is never excuted */ |
| 1008 | 1004 | //verboselog((machine, 0, " Read Back Index: %01x\n", ( data & H2_IAR_RB_INDEX ) ); |
| 1009 | break; | |
| 1005 | //break; | |
| 1010 | 1006 | case 0x0040/4: |
| 1011 | 1007 | //verboselog((machine, 0, "HAL2 Indirect Data Register 0 Write: 0x%08x (%08x)\n", data, mem_mask ); |
| 1012 | 1008 | m_HAL2.nIDR[0] = data; |
| r31988 | r31989 | |
|---|---|---|
| 769 | 769 | return m_shared[offset]; |
| 770 | 770 | } |
| 771 | 771 | |
| 772 | return 0xff; | |
| 772 | // never executed | |
| 773 | //return 0xff; | |
| 773 | 774 | } |
| 774 | 775 | |
| 775 | 776 | WRITE8_MEMBER(rainbow_state::share_z80_w) |
| r31988 | r31989 | |
|---|---|---|
| 151 | 151 | verboselog( 7, "LCD_SPI_LINE_1 -> %d\n", m_lcd_spi.l1); |
| 152 | 152 | return m_lcd_spi.l1; |
| 153 | 153 | } |
| 154 | break; | |
| 155 | 154 | case LCD_SPI_LINE_DATA : |
| 156 | 155 | { |
| 157 | 156 | verboselog( 7, "LCD_SPI_LINE_DATA -> %d\n", m_lcd_spi.data); |
| 158 | 157 | return m_lcd_spi.data; |
| 159 | 158 | } |
| 160 | break; | |
| 161 | 159 | case LCD_SPI_LINE_3 : |
| 162 | 160 | { |
| 163 | 161 | verboselog( 7, "LCD_SPI_LINE_3 -> %d\n", m_lcd_spi.l3); |
| 164 | 162 | return m_lcd_spi.l3; |
| 165 | 163 | } |
| 166 | break; | |
| 167 | 164 | } |
| 168 | 165 | return 0; |
| 169 | 166 | } |
| r31988 | r31989 | |
|---|---|---|
| 2022 | 2022 | default: |
| 2023 | 2023 | return 0; |
| 2024 | 2024 | } |
| 2025 | return 0; | |
| 2026 | 2025 | } |
| 2027 | 2026 | |
| 2028 | 2027 | WRITE8_MEMBER(towns_state::towns_volume_w) |
| r31988 | r31989 | |
|---|---|---|
| 597 | 597 | |
| 598 | 598 | return knj_ram[knj_offset]; |
| 599 | 599 | } |
| 600 | break; | |
| 601 | 600 | case 0xc: // Dictionary ROM |
| 602 | 601 | case 0xd: |
| 603 | 602 | { |
| r31988 | r31989 | |
|---|---|---|
| 221 | 221 | case 3: |
| 222 | 222 | // timer 8-bit polynomial counter |
| 223 | 223 | fatalerror("%s: F3853 Timer not supported!\n", machine().describe_context()); |
| 224 | break; | |
| 225 | 224 | } |
| 226 | 225 | } |
| 227 | 226 |
| r31988 | r31989 | |
|---|---|---|
| 394 | 394 | m_strobe = 0; |
| 395 | 395 | return rv; |
| 396 | 396 | } |
| 397 | break; | |
| 398 | 397 | |
| 399 | 398 | case 0x7c: |
| 400 | 399 | return m_bank0val; |
| r31988 | r31989 | |
|---|---|---|
| 202 | 202 | printf("[%08X] Port A READ (A-axis signals + B-axis STEP&DIR)\n", m_maincpu->m_shifted_pc); |
| 203 | 203 | #endif |
| 204 | 204 | return 0x00; |
| 205 | break; | |
| 206 | 205 | } |
| 207 | 206 | case AVR8_IO_PORTB: |
| 208 | 207 | { |
| r31988 | r31989 | |
| 210 | 209 | printf("[%08X] Port B READ (SD-CS; 1280-MISO/MOSI/SCK; EX2-FAN/HEAT/PWR-CHECK; BLINK)\n", m_maincpu->m_shifted_pc); |
| 211 | 210 | #endif |
| 212 | 211 | return 0x00; |
| 213 | break; | |
| 214 | 212 | } |
| 215 | 213 | case AVR8_IO_PORTC: |
| 216 | 214 | { |
| r31988 | r31989 | |
| 218 | 216 | printf("[%08X] Port C READ (1280-EX1/EX2; LCD-signals; R&G-LED; DETECT)\n", m_maincpu->m_shifted_pc); |
| 219 | 217 | #endif |
| 220 | 218 | return DETECT; //indicated that the Interface board is present. |
| 221 | break; | |
| 222 | 219 | } |
| 223 | 220 | case AVR8_IO_PORTD: |
| 224 | 221 | { |
| r31988 | r31989 | |
| 226 | 223 | printf("[%08X] Port D READ (SDA/SCL; 1280-EX-TX/RX)\n", m_maincpu->m_shifted_pc); |
| 227 | 224 | #endif |
| 228 | 225 | return 0x00; |
| 229 | break; | |
| 230 | 226 | } |
| 231 | 227 | case AVR8_IO_PORTE: |
| 232 | 228 | { |
| r31988 | r31989 | |
| 234 | 230 | printf("[%08X] Port E READ (1280-TX/RX; THERMO-signals)\n", m_maincpu->m_shifted_pc); |
| 235 | 231 | #endif |
| 236 | 232 | return 0x00; |
| 237 | break; | |
| 238 | 233 | } |
| 239 | 234 | case AVR8_IO_PORTF: |
| 240 | 235 | { |
| r31988 | r31989 | |
| 242 | 237 | printf("[%08X] Port F READ (X-axis & Y-axis signals)\n", m_maincpu->m_shifted_pc); |
| 243 | 238 | #endif |
| 244 | 239 | return 0x00; |
| 245 | break; | |
| 246 | 240 | } |
| 247 | 241 | case AVR8_IO_PORTG: |
| 248 | 242 | { |
| r31988 | r31989 | |
| 250 | 244 | printf("[%08X] Port G READ (BUZZ; Cutoff-sr-check; B-axis EN; 1280-EX3/EX4)\n", m_maincpu->m_shifted_pc); |
| 251 | 245 | #endif |
| 252 | 246 | return 0x00; |
| 253 | break; | |
| 254 | 247 | } |
| 255 | 248 | case AVR8_IO_PORTH: |
| 256 | 249 | { |
| r31988 | r31989 | |
| 258 | 251 | printf("[%08X] Port H READ (cuttoff-text/reset; EX1-FAN/HEAT/PWR-CHECK; SD-CD/SD-WP)\n", m_maincpu->m_shifted_pc); |
| 259 | 252 | #endif |
| 260 | 253 | return 0x00; |
| 261 | break; | |
| 262 | 254 | } |
| 263 | 255 | case AVR8_IO_PORTJ: |
| 264 | 256 | { |
| r31988 | r31989 | |
| 266 | 258 | printf("[%08X] Port J READ (Interface buttons; POTS-SCL; B-axis-POT)\n", m_maincpu->m_shifted_pc); |
| 267 | 259 | #endif |
| 268 | 260 | return ioport("keypad")->read(); |
| 269 | break; | |
| 270 | 261 | } |
| 271 | 262 | case AVR8_IO_PORTK: |
| 272 | 263 | { |
| r31988 | r31989 | |
| 274 | 265 | printf("[%08X] Port K READ (Z-axis signals; HBP-THERM; 1280-EX5/6/7)\n", m_maincpu->m_shifted_pc); |
| 275 | 266 | #endif |
| 276 | 267 | return 0x00; |
| 277 | break; | |
| 278 | 268 | } |
| 279 | 269 | case AVR8_IO_PORTL: |
| 280 | 270 | { |
| r31988 | r31989 | |
| 282 | 272 | printf("[%08X] Port L READ (HBP; EXTRA-FET; X-MIN/MAX; Y-MIN/MAX; Z-MIN/MAX)\n", m_maincpu->m_shifted_pc); |
| 283 | 273 | #endif |
| 284 | 274 | return 0x00; |
| 285 | break; | |
| 286 | 275 | } |
| 287 | 276 | } |
| 288 | 277 | return 0; |
| r31988 | r31989 | |
|---|---|---|
| 91 | 91 | |
| 92 | 92 | fatalerror("fmscsi: Unknown SCSI command group %d\n", group); |
| 93 | 93 | |
| 94 | return 6; | |
| 94 | // never executed | |
| 95 | //return 6; | |
| 95 | 96 | } |
| 96 | 97 | |
| 97 | 98 | void fmscsi_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| r31988 | r31989 | |
|---|---|---|
| 1423 | 1423 | case 0x09: return m_acard_ctrl[r_num]; |
| 1424 | 1424 | default: return 0; |
| 1425 | 1425 | } |
| 1426 | ||
| 1427 | return 0; | |
| 1428 | 1426 | } |
| 1429 | 1427 | |
| 1430 | 1428 | WRITE8_MEMBER(pce_cd_device::acard_w) |
| r31988 | r31989 | |
|---|---|---|
| 1229 | 1229 | } |
| 1230 | 1230 | } |
| 1231 | 1231 | fatalerror("psxcd: out of timers\n"); |
| 1232 | return 0; | |
| 1233 | 1232 | } |
| r31988 | r31989 | |
|---|---|---|
| 541 | 541 | break; |
| 542 | 542 | default: |
| 543 | 543 | fatalerror("IBM5160_MOTHERBOARD: Bus width %d not supported\n", buswidth); |
| 544 | break; | |
| 545 | 544 | } |
| 546 | 545 | } |
| 547 | 546 |
| r31988 | r31989 | |
|---|---|---|
| 554 | 554 | } |
| 555 | 555 | |
| 556 | 556 | // else fall through to floating bus |
| 557 | return apple2_getfloatingbusvalue(); | |
| 557 | // never executed | |
| 558 | //return apple2_getfloatingbusvalue(); | |
| 558 | 559 | } |
| 559 | 560 | |
| 560 | 561 | WRITE8_MEMBER(apple2_state::apple2_c1xx_w ) |
| r31988 | r31989 | |
| 602 | 603 | } |
| 603 | 604 | |
| 604 | 605 | // else fall through to floating bus |
| 605 | return apple2_getfloatingbusvalue(); | |
| 606 | // never executed | |
| 607 | //return apple2_getfloatingbusvalue(); | |
| 606 | 608 | } |
| 607 | 609 | |
| 608 | 610 | WRITE8_MEMBER(apple2_state::apple2_c3xx_w ) |
| r31988 | r31989 | |
| 654 | 656 | } |
| 655 | 657 | |
| 656 | 658 | // else fall through to floating bus |
| 657 | return apple2_getfloatingbusvalue(); | |
| 659 | // never executed | |
| 660 | //return apple2_getfloatingbusvalue(); | |
| 658 | 661 | } |
| 659 | 662 | |
| 660 | 663 | WRITE8_MEMBER ( apple2_state::apple2_c4xx_w ) |
| r31988 | r31989 | |
|---|---|---|
| 1035 | 1035 | return c65_ram_expansion_r(space, offset & 0x1f, mem_mask); |
| 1036 | 1036 | /*return; ram expansion crtl optional */ |
| 1037 | 1037 | } |
| 1038 | break; | |
| 1039 | 1038 | case 0x100: |
| 1040 | 1039 | case 0x200: |
| 1041 | 1040 | case 0x300: |
| r31988 | r31989 | |
|---|---|---|
| 78 | 78 | m_pattern = (m_pattern << 2) | (m_pattern >> 6); |
| 79 | 79 | return result; |
| 80 | 80 | } |
| 81 | break; | |
| 82 | 81 | |
| 83 | 82 | case 0x09: // Data |
| 84 | 83 | if (m_address < m_sram.count()) |
| r31988 | r31989 | |
|---|---|---|
| 33 | 33 | m_7 = ( m_7 << 1 ) | ( m_7 >> 7 ); |
| 34 | 34 | return data; |
| 35 | 35 | } |
| 36 | break; | |
| 37 | 36 | |
| 38 | 37 | default: |
| 39 | 38 | printf("msx_s1985: unhandled read from offset %02x\n", offset); |
| r31988 | r31989 | |
|---|---|---|
| 240 | 240 | case 3: // IO3 registers |
| 241 | 241 | case 4: // IO4 registers |
| 242 | 242 | return m_exp[((offset >> 4) & 7) - 1]->reg_r(space, offset & 0x0f); |
| 243 | break; | |
| 244 | 243 | |
| 245 | 244 | default: // ??? |
| 246 | 245 | logerror("concept_io_r: Slot I/O memory accessed for unknown purpose at address 0x03%4.4x\n", offset << 1); |
| r31988 | r31989 | |
| 254 | 253 | case 4: // IO4 ROM |
| 255 | 254 | LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1)); |
| 256 | 255 | return m_exp[((offset >> 8) & 7) - 1]->rom_r(space, offset & 0xff); |
| 257 | break; | |
| 258 | 256 | |
| 259 | 257 | case 5: |
| 260 | 258 | /* slot status */ |
| r31988 | r31989 | |
| 304 | 302 | case 1: |
| 305 | 303 | /* NSR0 data comm port 0 */ |
| 306 | 304 | return m_acia0->read(space, (offset & 3)); |
| 307 | break; | |
| 308 | 305 | |
| 309 | 306 | case 2: |
| 310 | 307 | /* NSR1 data comm port 1 */ |
| 311 | 308 | return m_acia1->read(space, (offset & 3)); |
| 312 | break; | |
| 313 | 309 | |
| 314 | 310 | case 3: |
| 315 | 311 | /* NVIA versatile system interface */ |
| r31988 | r31989 | |
| 318 | 314 | via6522_device *via_0 = machine().device<via6522_device>("via6522_0"); |
| 319 | 315 | return via_0->read(space, offset & 0xf); |
| 320 | 316 | } |
| 321 | break; | |
| 322 | 317 | |
| 323 | 318 | case 4: |
| 324 | 319 | /* NCALM clock calendar address and strobe register */ |
| r31988 | r31989 | |
| 365 | 360 | case 3: // IO3 registers |
| 366 | 361 | case 4: // IO4 registers |
| 367 | 362 | return m_exp[((offset >> 4) & 7) - 1]->reg_w(space, offset & 0x0f, data); |
| 368 | break; | |
| 369 | 363 | |
| 370 | 364 | default: // ??? |
| 371 | 365 | logerror("concept_io_w: Slot I/O memory written for unknown purpose at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data); |
| r31988 | r31989 | |
| 379 | 373 | case 4: // IO4 ROM |
| 380 | 374 | LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1, data)); |
| 381 | 375 | return m_exp[((offset >> 8) & 7) - 1]->rom_w(space, offset & 0xff, data); |
| 382 | break; | |
| 383 | 376 | |
| 384 | 377 | case 5: |
| 385 | 378 | /* slot status */ |
| r31988 | r31989 | |
|---|---|---|
| 197 | 197 | return m_539x_1->read(space, 2); |
| 198 | 198 | } |
| 199 | 199 | |
| 200 | return 0; | |
| 200 | // never executed | |
| 201 | //return 0; | |
| 201 | 202 | } |
| 202 | 203 | |
| 203 | 204 | WRITE8_MEMBER(macpci_state::mac_5396_w) |
| r31988 | r31989 | |
|---|---|---|
| 460 | 460 | |
| 461 | 461 | default: |
| 462 | 462 | fatalerror("ADB command 0x%02x unimplemented\n", m_adb_command); |
| 463 | break; | |
| 464 | 463 | } |
| 465 | 464 | m_adb_kmstatus |= 0x20; |
| 466 | 465 | } |
| r31988 | r31989 | |
| 583 | 582 | |
| 584 | 583 | default: |
| 585 | 584 | fatalerror("ADB command 0x%02x unimplemented\n", data); |
| 586 | break; | |
| 587 | ||
| 588 | 585 | } |
| 589 | 586 | |
| 590 | 587 | if (m_adb_command_length > 0) |
| r31988 | r31989 | |
|---|---|---|
| 146 | 146 | break; |
| 147 | 147 | default: |
| 148 | 148 | fatalerror("PC-9801-26: Bus width %d not supported\n", buswidth); |
| 149 | break; | |
| 150 | 149 | } |
| 151 | 150 | } |
| 152 | 151 |
| r31988 | r31989 | |
|---|---|---|
| 154 | 154 | break; |
| 155 | 155 | default: |
| 156 | 156 | fatalerror("PC-9801-118: Bus width %d not supported\n", buswidth); |
| 157 | break; | |
| 158 | 157 | } |
| 159 | 158 | } |
| 160 | 159 |
| r31988 | r31989 | |
|---|---|---|
| 1231 | 1231 | |
| 1232 | 1232 | default: |
| 1233 | 1233 | return 0x80; |
| 1234 | ||
| 1235 | 1234 | } |
| 1236 | ||
| 1237 | return 0x80; | |
| 1238 | 1235 | } |
| 1239 | 1236 | |
| 1240 | 1237 | READ8_MEMBER(mac_state::mac_via_in_a_pmu) |
| r31988 | r31989 | |
| 1813 | 1810 | |
| 1814 | 1811 | default: |
| 1815 | 1812 | fatalerror("mac: unknown clock\n"); |
| 1816 | break; | |
| 1817 | 1813 | } |
| 1818 | 1814 | |
| 1819 | 1815 | // clear PMU response timer |
| r31988 | r31989 | |
|---|---|---|
| 154 | 154 | break; |
| 155 | 155 | default: |
| 156 | 156 | fatalerror("PC-9801-86: Bus width %d not supported\n", buswidth); |
| 157 | break; | |
| 158 | 157 | } |
| 159 | 158 | } |
| 160 | 159 |
| r31988 | r31989 | |
|---|---|---|
| 425 | 425 | |
| 426 | 426 | default: |
| 427 | 427 | fatalerror("Should not get here\n"); |
| 428 | return; | |
| 429 | 428 | } |
| 430 | 429 | } |
| 431 | 430 |
| r31988 | r31989 | |
|---|---|---|
| 334 | 334 | |
| 335 | 335 | default: |
| 336 | 336 | fatalerror("Invalid column count\n"); |
| 337 | break; | |
| 338 | 337 | } |
| 339 | 338 | } |
| 340 | 339 | |
| r31988 | r31989 | |
| 447 | 446 | |
| 448 | 447 | default: |
| 449 | 448 | fatalerror("Invalid column count\n"); |
| 450 | break; | |
| 451 | 449 | } |
| 452 | 450 | } |
| 453 | 451 | } |
| r31988 | r31989 | |
|---|---|---|
| 469 | 469 | break; |
| 470 | 470 | default: |
| 471 | 471 | fatalerror("Should not get here\n"); |
| 472 | break; | |
| 473 | 472 | } |
| 474 | 473 | return result; |
| 475 | 474 | } |
| r31988 | r31989 | |
| 1252 | 1251 | break; |
| 1253 | 1252 | default: |
| 1254 | 1253 | fatalerror("Should not get here\n"); |
| 1255 | break; | |
| 1256 | 1254 | } |
| 1257 | 1255 | } |
| 1258 | 1256 | else |
| r31988 | r31989 | |
| 1319 | 1317 | |
| 1320 | 1318 | default: |
| 1321 | 1319 | fatalerror("Should not get here\n"); |
| 1322 | break; | |
| 1323 | 1320 | } |
| 1324 | 1321 | } |
| 1325 | 1322 | else |
| r31988 | r31989 | |
| 1350 | 1347 | break; |
| 1351 | 1348 | default: |
| 1352 | 1349 | fatalerror("Should not get here\n"); |
| 1353 | break; | |
| 1354 | 1350 | } |
| 1355 | 1351 | } |
| 1356 | 1352 | return lines_per_row; |
| r31988 | r31989 | |
| 1498 | 1494 | default: |
| 1499 | 1495 | /* should not get here */ |
| 1500 | 1496 | fatalerror("Should not get here\n"); |
| 1501 | return; | |
| 1502 | 1497 | } |
| 1503 | 1498 | } |
| 1504 | 1499 | else |
| r31988 | r31989 | |
| 1523 | 1518 | case 0x1C: pitch = record_scanline_res<160, &gime_base_device::get_data_without_attributes, false>(physical_scanline); break; |
| 1524 | 1519 | default: |
| 1525 | 1520 | fatalerror("Should not get here\n"); |
| 1526 | return; | |
| 1527 | 1521 | } |
| 1528 | 1522 | } |
| 1529 | 1523 | else |
| r31988 | r31989 | |
| 1541 | 1535 | case 0x15: pitch = record_scanline_res< 80, &gime_base_device::get_data_with_attributes, true>(physical_scanline); break; |
| 1542 | 1536 | default: |
| 1543 | 1537 | fatalerror("Should not get here\n"); |
| 1544 | return; | |
| 1545 | 1538 | } |
| 1546 | 1539 | } |
| 1547 | 1540 | |
| r31988 | r31989 | |
| 1616 | 1609 | |
| 1617 | 1610 | default: |
| 1618 | 1611 | fatalerror("Should not get here\n"); |
| 1619 | break; | |
| 1620 | 1612 | } |
| 1621 | 1613 | |
| 1622 | 1614 | // bit 3 of $FF99 controls "wideness" |
| r31988 | r31989 | |
| 1639 | 1631 | UINT32 gime_base_device::emit_dummy_samples(const scanline_record *scanline, int sample_start, int sample_count, pixel_t *pixels, const pixel_t *palette) |
| 1640 | 1632 | { |
| 1641 | 1633 | fatalerror("Should not get here\n"); |
| 1642 | return 0; | |
| 1643 | 1634 | } |
| 1644 | 1635 | |
| 1645 | 1636 | //------------------------------------------------- |
| r31988 | r31989 | |
|---|---|---|
| 1162 | 1162 | logerror("ALU: read from invalid register 0x%02x\n",offset); |
| 1163 | 1163 | return 0xff; |
| 1164 | 1164 | } |
| 1165 | return 0xff; | |
| 1166 | 1165 | } |
| 1167 | 1166 | |
| 1168 | 1167 | WRITE8_MEMBER(fm7_state::fm77av_alu_w) |
| r31988 | r31989 | |
| 1341 | 1340 | logerror("Unmapped read from sub CPU port 0xd%03x via MMR banking\n",offset); |
| 1342 | 1341 | return 0xff; |
| 1343 | 1342 | } |
| 1344 | return 0xff; | |
| 1345 | 1343 | } |
| 1346 | 1344 | |
| 1347 | 1345 | WRITE8_MEMBER(fm7_state::fm7_sub_ram_ports_banked_w) |
| r31988 | r31989 | |
|---|---|---|
| 1877 | 1877 | break; |
| 1878 | 1878 | default: |
| 1879 | 1879 | fatalerror("Invalid screen mode (6 or 7)!\n"); |
| 1880 | break; | |
| 1881 | 1880 | } |
| 1882 | 1881 | |
| 1883 | 1882 | for (int x = 0; x < 240; x++) |
| r31988 | r31989 | |
|---|---|---|
| 1213 | 1213 | { |
| 1214 | 1214 | return 0; |
| 1215 | 1215 | } |
| 1216 | break; | |
| 1217 | 1216 | |
| 1218 | 1217 | default: |
| 1219 | 1218 | // printf("macwd_r: @ %x, mask %08x (PC=%x)\n", offset, mem_mask, m_maincpu->pc()); |
| r31988 | r31989 | |
|---|---|---|
| 471 | 471 | //verboselog(machine(), 2, "Unknown VC2 Register Read: %02x\n", m_REX3.nDCBRegSelect ); |
| 472 | 472 | return 0; |
| 473 | 473 | } |
| 474 | return 0; | |
| 475 | 474 | } |
| 476 | 475 | |
| 477 | 476 | WRITE32_MEMBER( newport_video_device::vc2_w ) |
| r31988 | r31989 | |
| 873 | 872 | //verboselog(machine(), 2, "Unknown REX3 Read: %08x (%08x)\n", 0x1f0f0000 + ( offset << 2 ), mem_mask ); |
| 874 | 873 | return 0; |
| 875 | 874 | } |
| 876 | return 0; | |
| 877 | 875 | } |
| 878 | 876 | |
| 879 | 877 | void newport_video_device::DoREX3Command() |
| r31988 | r31989 | |
|---|---|---|
| 701 | 701 | default: |
| 702 | 702 | { |
| 703 | 703 | fatalerror("CDE: unknown command %08X\n", m_cde_command_bytes[0]); |
| 704 | break; | |
| 705 | 704 | } |
| 706 | 705 | } |
| 707 | 706 | } |
| r31988 | r31989 | |
|---|---|---|
| 349 | 349 | } |
| 350 | 350 | } |
| 351 | 351 | |
| 352 | return 0; | |
| 352 | // never executed | |
| 353 | //return 0; | |
| 353 | 354 | } |
| 354 | 355 | |
| 355 | 356 | |
| r31988 | r31989 | |
| 428 | 429 | } |
| 429 | 430 | } |
| 430 | 431 | |
| 431 | return 0; | |
| 432 | // never executed | |
| 433 | //return 0; | |
| 432 | 434 | } |
| 433 | 435 | |
| 434 | 436 | void archimedes_state::archimedes_driver_init() |
| r31988 | r31989 | |
|---|---|---|
| 70 | 70 | return 0; |
| 71 | 71 | } |
| 72 | 72 | |
| 73 | return -1; | |
| 73 | // never executed | |
| 74 | //return -1; | |
| 74 | 75 | } |
| 75 | 76 | |
| 76 | 77 |
| r31988 | r31989 | |
|---|---|---|
| 475 | 475 | |
| 476 | 476 | default: |
| 477 | 477 | fatalerror("play_xa: unhandled xa mode %08x\n",hdr[2]); |
| 478 | return; | |
| 479 | 478 | } |
| 480 | 479 | |
| 481 | 480 | dmadac_set_frequency(&state->m_dmadac[0], 2, m_audio_sample_freq); |
| r31988 | r31989 | |
|---|---|---|
| 806 | 806 | verboselog(machine(), 2, "cdi68070_periphs_r: MMU Status: %02x & %04x\n", m_mmu.status, mem_mask); |
| 807 | 807 | return m_mmu.status; |
| 808 | 808 | } |
| 809 | break; | |
| 810 | 809 | case 0x8040/2: |
| 811 | 810 | case 0x8048/2: |
| 812 | 811 | case 0x8050/2: |
| r31988 | r31989 | |
|---|---|---|
| 297 | 297 | break; |
| 298 | 298 | default: |
| 299 | 299 | fatalerror("Invalid timer: %d\n", id); |
| 300 | break; | |
| 301 | 300 | } |
| 302 | 301 | } |
| 303 | 302 | |
| r31988 | r31989 | |
| 1345 | 1344 | case REG_SERDATR: case REG_DSKBYTR: case REG_INTENAR: case REG_INTREQR: |
| 1346 | 1345 | // read-only registers |
| 1347 | 1346 | return; |
| 1348 | break; | |
| 1349 | 1347 | |
| 1350 | 1348 | case REG_DSKDAT: |
| 1351 | 1349 | popmessage("DSKDAT W %04x, contact MESSdev",data); |
| r31988 | r31989 | |
|---|---|---|
| 460 | 460 | case 3: *input_r = &userdata->PrimColor.i.r; *input_g = &userdata->PrimColor.i.g; *input_b = &userdata->PrimColor.i.b; break; |
| 461 | 461 | case 4: *input_r = &userdata->ShadeColor.i.r; *input_g = &userdata->ShadeColor.i.g; *input_b = &userdata->ShadeColor.i.b; break; |
| 462 | 462 | case 5: *input_r = &userdata->EnvColor.i.r; *input_g = &userdata->EnvColor.i.g; *input_b = &userdata->EnvColor.i.b; break; |
| 463 | case 6: fatalerror("SET_SUBB_RGB_INPUT: key_center\n"); | |
| 463 | case 6: fatalerror("SET_SUBB_RGB_INPUT: key_center\n"); | |
| 464 | 464 | case 7: *input_r = (UINT8*)&m_k4; *input_g = (UINT8*)&m_k4; *input_b = (UINT8*)&m_k4; break; |
| 465 | 465 | case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: |
| 466 | 466 | { |
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