trunk/src/emu/bus/megadrive/ggenie.c
| r0 | r31962 | |
|---|
| 1 | /*********************************************************************************************************** |
| 2 | |
| 3 | |
| 4 | Game Genie pass-thorugh cart emulation |
| 5 | |
| 6 | |
| 7 | based on Charles MacDonald's docs: http://cgfm2.emuviews.com/txt/genie.txt |
| 8 | |
| 9 | |
| 10 | There is an interesting difference between Rev.0 and Rev.A |
| 11 | After the codes has been entered, the former just performs |
| 12 | a last write to the MODE register (m_gg_regs[0]) which both |
| 13 | sets the enable bits for the 6 available cheats (in the low |
| 14 | 8 bits) and locks the GG so that later reads goes to the |
| 15 | piggyback cart. The latter revision, instead, performs the |
| 16 | same operations in two subsequent 8bit writes, accessing |
| 17 | separately the low and high bits of the register. |
| 18 | |
| 19 | ***********************************************************************************************************/ |
| 20 | |
| 21 | #include "emu.h" |
| 22 | #include "ggenie.h" |
| 23 | #include "rom.h" |
| 24 | |
| 25 | |
| 26 | //------------------------------------------------- |
| 27 | // md_rom_device - constructor |
| 28 | //------------------------------------------------- |
| 29 | |
| 30 | const device_type MD_ROM_GAMEGENIE = &device_creator<md_rom_ggenie_device>; |
| 31 | |
| 32 | |
| 33 | md_rom_ggenie_device::md_rom_ggenie_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 34 | : device_t(mconfig, MD_ROM_GAMEGENIE, "MD Game Genie", tag, owner, clock, "md_ggenie", __FILE__), |
| 35 | device_md_cart_interface( mconfig, *this ), |
| 36 | m_exp(*this, "subslot") |
| 37 | { |
| 38 | } |
| 39 | |
| 40 | |
| 41 | void md_rom_ggenie_device::device_start() |
| 42 | { |
| 43 | save_item(NAME(m_gg_bypass)); |
| 44 | save_item(NAME(m_reg_enable)); |
| 45 | save_item(NAME(m_gg_regs)); |
| 46 | save_item(NAME(m_gg_addr)); |
| 47 | save_item(NAME(m_gg_data)); |
| 48 | } |
| 49 | |
| 50 | void md_rom_ggenie_device::device_reset() |
| 51 | { |
| 52 | m_gg_bypass = 0; |
| 53 | m_reg_enable = 0; |
| 54 | memset(m_gg_regs, 0, sizeof(m_gg_regs)); |
| 55 | memset(m_gg_addr, 0, sizeof(m_gg_addr)); |
| 56 | memset(m_gg_data, 0, sizeof(m_gg_data)); |
| 57 | } |
| 58 | |
| 59 | /*------------------------------------------------- |
| 60 | mapper specific handlers |
| 61 | -------------------------------------------------*/ |
| 62 | |
| 63 | READ16_MEMBER(md_rom_ggenie_device::read) |
| 64 | { |
| 65 | if (!m_gg_bypass || !m_exp->m_cart) |
| 66 | { |
| 67 | if (m_reg_enable) |
| 68 | return m_gg_regs[offset & 0x1f]; |
| 69 | else |
| 70 | return m_rom[MD_ADDR(offset)]; |
| 71 | } |
| 72 | |
| 73 | if (m_exp->m_cart) |
| 74 | { |
| 75 | if (offset == m_gg_addr[0]/2 && BIT(m_gg_regs[0], 0)) |
| 76 | return m_gg_data[0]; |
| 77 | else if (offset == m_gg_addr[1]/2 && BIT(m_gg_regs[0], 1)) |
| 78 | return m_gg_data[1]; |
| 79 | else if (offset == m_gg_addr[2]/2 && BIT(m_gg_regs[0], 2)) |
| 80 | return m_gg_data[2]; |
| 81 | else if (offset == m_gg_addr[3]/2 && BIT(m_gg_regs[0], 3)) |
| 82 | return m_gg_data[3]; |
| 83 | else if (offset == m_gg_addr[4]/2 && BIT(m_gg_regs[0], 4)) |
| 84 | return m_gg_data[4]; |
| 85 | else if (offset == m_gg_addr[5]/2 && BIT(m_gg_regs[0], 5)) |
| 86 | return m_gg_data[5]; |
| 87 | else |
| 88 | return m_exp->m_cart->read(space, offset); |
| 89 | } |
| 90 | else |
| 91 | return 0xffff; |
| 92 | } |
| 93 | |
| 94 | WRITE16_MEMBER(md_rom_ggenie_device::write) |
| 95 | { |
| 96 | if (offset >= 0x40/2) |
| 97 | return; |
| 98 | |
| 99 | if (ACCESSING_BITS_0_7) |
| 100 | m_gg_regs[offset] = (m_gg_regs[offset] & 0xff00) | (data & 0x00ff); |
| 101 | |
| 102 | if (ACCESSING_BITS_8_15) |
| 103 | m_gg_regs[offset] = (m_gg_regs[offset] & 0x00ff) | (data & 0xff00); |
| 104 | |
| 105 | //printf("write to 0x%X, data 0x%X\n", offset, data); |
| 106 | |
| 107 | // MODE |
| 108 | if (offset == 0) |
| 109 | { |
| 110 | // bit10 set = read goes to piggyback cart |
| 111 | if (data & 0x400) |
| 112 | m_gg_bypass = 1; |
| 113 | // bit10 unset = read goes to Game Genie ASIC/ROM |
| 114 | else |
| 115 | { |
| 116 | m_gg_bypass = 0; |
| 117 | |
| 118 | // bit9 set = read goes to ASIC registers |
| 119 | if (data & 0x200) |
| 120 | m_reg_enable = 1; |
| 121 | // bit9 unset = read goes to GG ROM |
| 122 | else |
| 123 | m_reg_enable = 0; |
| 124 | } |
| 125 | |
| 126 | // LOCK bit |
| 127 | if (data & 0x100) |
| 128 | { |
| 129 | // addresses |
| 130 | m_gg_addr[0] = ((m_gg_regs[2] & 0x3f) << 16) | m_gg_regs[3]; |
| 131 | m_gg_addr[1] = ((m_gg_regs[5] & 0x3f) << 16) | m_gg_regs[6]; |
| 132 | m_gg_addr[2] = ((m_gg_regs[8] & 0x3f) << 16) | m_gg_regs[9]; |
| 133 | m_gg_addr[3] = ((m_gg_regs[11] & 0x3f) << 16) | m_gg_regs[12]; |
| 134 | m_gg_addr[4] = ((m_gg_regs[14] & 0x3f) << 16) | m_gg_regs[15]; |
| 135 | m_gg_addr[5] = ((m_gg_regs[17] & 0x3f) << 16) | m_gg_regs[18]; |
| 136 | |
| 137 | // data |
| 138 | m_gg_data[0] = m_gg_regs[4]; |
| 139 | m_gg_data[1] = m_gg_regs[7]; |
| 140 | m_gg_data[2] = m_gg_regs[10]; |
| 141 | m_gg_data[3] = m_gg_regs[13]; |
| 142 | m_gg_data[4] = m_gg_regs[16]; |
| 143 | m_gg_data[5] = m_gg_regs[19]; |
| 144 | |
| 145 | //printf("mode %X\n", data); |
| 146 | //for (int i = 0; i < 6; i++) |
| 147 | // printf("addr %d = 0x%X - data 0x%X\n", i, m_gg_addr[i], m_gg_data[i]); |
| 148 | } |
| 149 | } |
| 150 | else if (offset == 1) |
| 151 | { |
| 152 | // RESET |
| 153 | m_gg_regs[1] |= 1; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | //------------------------------------------------- |
| 158 | // MACHINE_CONFIG_FRAGMENT( ggenie_slot ) |
| 159 | //------------------------------------------------- |
| 160 | |
| 161 | static SLOT_INTERFACE_START(ggenie_sub_cart) |
| 162 | SLOT_INTERFACE_INTERNAL("rom", MD_STD_ROM) |
| 163 | SLOT_INTERFACE_INTERNAL("rom_svp", MD_STD_ROM) |
| 164 | SLOT_INTERFACE_INTERNAL("rom_sram", MD_ROM_SRAM) |
| 165 | SLOT_INTERFACE_INTERNAL("rom_sramsafe", MD_ROM_SRAM) |
| 166 | SLOT_INTERFACE_INTERNAL("rom_fram", MD_ROM_FRAM) |
| 167 | SLOT_INTERFACE_END |
| 168 | |
| 169 | static MACHINE_CONFIG_FRAGMENT( ggenie_slot ) |
| 170 | MCFG_MD_CARTRIDGE_ADD("subslot", ggenie_sub_cart, NULL) |
| 171 | MCFG_MD_CARTRIDGE_NOT_MANDATORY |
| 172 | MACHINE_CONFIG_END |
| 173 | |
| 174 | |
| 175 | //------------------------------------------------- |
| 176 | // machine_config_additions - device-specific |
| 177 | // machine configurations |
| 178 | //------------------------------------------------- |
| 179 | |
| 180 | machine_config_constructor md_rom_ggenie_device::device_mconfig_additions() const |
| 181 | { |
| 182 | return MACHINE_CONFIG_NAME( ggenie_slot ); |
| 183 | } |