MAME SVN History

199869 Revisions

r31958 Sunday 7th September, 2014 at 03:56:59 UTC by Barry Rodewald
(MESS) Added the following video card BIOSes: [rfka01, Barry Rodewald] s3_764: S3 9503-62 (not working) Elsa Winner 1000/T2D s3virge: S3 ViRGE BIOS v1.00-10 mach64: ATi mach64V1 113-34404-104

[src/emu/bus/isa]

s3virge.c svga_s3.c vga_ati.c

trunk/src/emu/bus/isa/svga_s3.c
r31957	r31958
9	9
10	10	ROM_START( s3_764 )
11	11	ROM_REGION(0x8000,"s3_764", 0)
12		ROM_LOAD("s3_764.bin", 0x00000, 0x8000, CRC(4f10aac7) SHA1(c77b3f11cc15679121314823588887dd547cd715) )
	12	ROM_DEFAULT_BIOS("9fxv330")
	13
	14	ROM_SYSTEM_BIOS( 0, "9fxv330", "PCI Number Nine 9FX Vision 330 2.03.10 (S3 Trio64)" )
	15	ROMX_LOAD("s3_764.bin", 0x00000, 0x8000, CRC(4f10aac7) SHA1(c77b3f11cc15679121314823588887dd547cd715), ROM_BIOS(1) )
13	16	ROM_IGNORE( 0x8000 )
	17
	18	// The following are from Trio64V2/DX based cards
	19	ROM_SYSTEM_BIOS( 1, "s3_9503", "PCI S3 9503-62 (S3 Trio64V2/DX)" )
	20	ROMX_LOAD("pci_9503-62_s3.bin", 0x00000, 0x8000, CRC(0e9d79d8) SHA1(274b5b98cc998f2783567000cdb12b14308bc290), ROM_BIOS(2) )
	21
	22	ROM_SYSTEM_BIOS( 2, "winner1k", "PCI Elsa Winner 1000/T2D 6.01.00 (S3 Trio64V2/DX)" )
	23	ROMX_LOAD("pci_elsa_winner_1000-t2d_6.01.00.bin", 0x00000, 0x8000, CRC(1c9532b8) SHA1(d27d60b9a3566aa42a01ad497046af16eaa2ed87), ROM_BIOS(3) )
	24
14	25	ROM_END
15	26
16	27	//**************************************************************************
r31957	r31958
115	126
116	127	ROM_START( s3virge )
117	128	ROM_REGION(0x8000,"s3virge", 0)
118		ROM_LOAD("s3virge.bin", 0x00000, 0x8000, CRC(a7983a85) SHA1(e885371816d3237f7badd57ccd602cd863c9c9f8) )
	129	ROM_DEFAULT_BIOS("virge")
	130
	131	ROM_SYSTEM_BIOS( 0, "virge", "PCI S3 ViRGE v1.00-10" )
	132	ROMX_LOAD("pci_m-v_virge-4s3.bin", 0x00000, 0x8000, CRC(d0a0f1de) SHA1(b7b41081974762a199610219bdeab149b7c7143d), ROM_BIOS(1) )
	133
	134	ROM_SYSTEM_BIOS( 1, "virgeo", "PCI S3 ViRGE v1.00-05" )
	135	ROMX_LOAD("s3virge.bin", 0x00000, 0x8000, CRC(a7983a85) SHA1(e885371816d3237f7badd57ccd602cd863c9c9f8), ROM_BIOS(2) )
119	136	ROM_IGNORE( 0x8000 )
120	137	ROM_END
121	138

trunk/src/emu/bus/isa/vga_ati.c
r31957	r31958
52	52
53	53	ROM_SYSTEM_BIOS( 3, "pci", "PCI BIOS 113-25420-100" )
54	54	ROMX_LOAD("pci_mach64__113-25420-100-1995.27c256.u1.bin", 0x00000, 0x8000, CRC(762596e8) SHA1(9544b073ac182ec2990e18f54afbb96d52db744a), ROM_BIOS(4) )
	55
	56	ROM_SYSTEM_BIOS( 4, "pci_v1", "PCI mach64 V1 BIOS 113-34404-104" )
	57	ROMX_LOAD("pci_mach64_v1_113-34404-104_1996.bin", 0x00000, 0x8000, CRC(c6a39c3f) SHA1(0f4cf9221179c675dafafde638bc00244b6feb63), ROM_BIOS(5) )
	58	ROM_IGNORE(0x8000)
	59
55	60	ROM_END
56	61
57	62	//**************************************************************************

trunk/src/emu/bus/isa/s3virge.c
r31957	r31958
159	159	res = s3.crt_reg_lock;
160	160	break;
161	161	case 0x36: // Configuration register 1
162		res = s3.strapping & 0x000000ff; ~~// PCI (not really), Fast Page Mode DRAM~~
	162	res = s3.strapping & 0x000000ff;
163	163	if(vga.svga_intf.vram_size == 0x200000)
164	164	res \|= 0x80;
165	165	else if(vga.svga_intf.vram_size == 0x400000)
r31957	r31958
168	168	res \|= 0x80; // shouldn't get here...
169	169	break;
170	170	case 0x37: // Configuration register 2
171		res = (s3.strapping & 0x0000ff00) >> 8; ~~// enable chipset, 64k BIOS size, internal DCLK/MCLK~~
	171	res = (s3.strapping & 0x0000ff00) >> 8;
172	172	break;
173	173	case 0x38:
174	174	res = s3.reg_lock1;
r31957	r31958
235	235	res = s3.ext_misc_ctrl_2;
236	236	break;
237	237	case 0x68: // Configuration register 3
238		res = (s3.strapping & 0x00ff0000) >> 16; ~~// no /CAS,/OE stretch time, 32-bit data bus size~~
	238	res = (s3.strapping & 0x00ff0000) >> 16;
239	239	break;
240	240	case 0x69:
241	241	res = vga.crtc.start_addr_latch >> 16;
r31957	r31958
244	244	res = svga.bank_r & 0x7f;
245	245	break;
246	246	case 0x6f: // Configuration register 4
247		res = (s3.strapping & 0xff000000) >> 24; ~~// LPB(?) mode, Serial port I/O at port 0xe8, Serial port I/O disabled (MMIO only), no WE delay~~
	247	res = (s3.strapping & 0xff000000) >> 24;
248	248	break;
249	249	default:
250	250	res = vga.crtc.data[index];

199869 Revisions