trunk/src/mess/drivers/pve500.c
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| 28 | 28 | |
| 29 | 29 | Changelog: |
| 30 | 30 | |
| 31 | 2014 SEP 01 [Felipe Sanches]: |
| 32 | * hooked-up MB8421 device (dual-port SRAM) |
| 33 | |
| 31 | 34 | 2014 JUN 24 [Felipe Sanches]: |
| 32 | | * figured out the multiplexing signals for the 7seg display |
| 35 | * figured out the multiplexing signals for the 7-seg display |
| 33 | 36 | |
| 34 | 37 | 2014 JUN 23 [Felipe Sanches]: |
| 35 | 38 | * hooked-up the RS422 ports |
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| 46 | 49 | #include "sound/beep.h" |
| 47 | 50 | #include "bus/rs232/rs232.h" /* actually meant to be RS422 ports */ |
| 48 | 51 | #include "pve500.lh" |
| 52 | #include "machine/mb8421.h" |
| 49 | 53 | |
| 50 | 54 | #define IO_EXPANDER_PORTA 0 |
| 51 | 55 | #define IO_EXPANDER_PORTB 1 |
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| 63 | 67 | , m_buzzer(*this, "buzzer") |
| 64 | 68 | { } |
| 65 | 69 | |
| 66 | | DECLARE_WRITE8_MEMBER(dualport_ram_left_w); |
| 67 | | DECLARE_WRITE8_MEMBER(dualport_ram_right_w); |
| 68 | | DECLARE_READ8_MEMBER(dualport_ram_left_r); |
| 69 | | DECLARE_READ8_MEMBER(dualport_ram_right_r); |
| 70 | DECLARE_WRITE_LINE_MEMBER(mb8421_intl); |
| 71 | DECLARE_WRITE_LINE_MEMBER(mb8421_intr); |
| 70 | 72 | DECLARE_WRITE_LINE_MEMBER(GPI_w); |
| 71 | 73 | DECLARE_WRITE_LINE_MEMBER(external_monitor_w); |
| 72 | 74 | |
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| 74 | 76 | DECLARE_READ8_MEMBER(io_expander_r); |
| 75 | 77 | DECLARE_DRIVER_INIT(pve500); |
| 76 | 78 | private: |
| 77 | | UINT8 dualport_7FE_data; |
| 78 | | UINT8 dualport_7FF_data; |
| 79 | | |
| 80 | 79 | virtual void machine_start(); |
| 81 | 80 | virtual void machine_reset(); |
| 82 | 81 | required_device<tmpz84c015_device> m_maincpu; |
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| 113 | 112 | static ADDRESS_MAP_START(maincpu_prg, AS_PROGRAM, 8, pve500_state) |
| 114 | 113 | AM_RANGE (0x0000, 0xBFFF) AM_ROM // ICB7: 48kbytes EEPROM |
| 115 | 114 | AM_RANGE (0xC000, 0xDFFF) AM_RAM // ICD6: 8kbytes of RAM |
| 116 | | AM_RANGE (0xE7FE, 0xE7FE) AM_MIRROR(0x1800) AM_READ(dualport_ram_left_r) |
| 117 | | AM_RANGE (0xE7FF, 0xE7FF) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_left_w) |
| 118 | | AM_RANGE (0xE000, 0xE7FF) AM_MIRROR(0x1800) AM_RAM AM_SHARE("sharedram") // ICF5: 2kbytes of RAM shared between the two CPUs |
| 115 | AM_RANGE (0xE000, 0xE7FF) AM_MIRROR(0x1800) AM_DEVREADWRITE("mb8421", mb8421_device, left_r, left_w) |
| 119 | 116 | ADDRESS_MAP_END |
| 120 | 117 | |
| 121 | 118 | static ADDRESS_MAP_START(subcpu_io, AS_IO, 8, pve500_state) |
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| 125 | 122 | static ADDRESS_MAP_START(subcpu_prg, AS_PROGRAM, 8, pve500_state) |
| 126 | 123 | AM_RANGE (0x0000, 0x7FFF) AM_ROM // ICG5: 32kbytes EEPROM |
| 127 | 124 | AM_RANGE (0x8000, 0xBFFF) AM_MIRROR(0x3FF8) AM_READWRITE(io_expander_r, io_expander_w) // ICG3: I/O Expander |
| 128 | | AM_RANGE (0xC7FE, 0xC7FE) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_right_w) |
| 129 | | AM_RANGE (0xC7FF, 0xC7FF) AM_MIRROR(0x1800) AM_READ(dualport_ram_right_r) |
| 130 | | AM_RANGE (0xC000, 0xC7FF) AM_MIRROR(0x3800) AM_RAM AM_SHARE("sharedram") // ICF5: 2kbytes of RAM shared between the two CPUs |
| 125 | AM_RANGE (0xC000, 0xC7FF) AM_MIRROR(0x3800) AM_DEVREADWRITE("mb8421", mb8421_device, right_r, right_w) |
| 131 | 126 | ADDRESS_MAP_END |
| 132 | 127 | |
| 133 | 128 | DRIVER_INIT_MEMBER( pve500_state, pve500 ) |
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| 239 | 234 | m_buzzer->set_frequency(3750); //CLK2 coming out of IC D4 (frequency divider circuitry) |
| 240 | 235 | } |
| 241 | 236 | |
| 242 | | READ8_MEMBER(pve500_state::dualport_ram_left_r) |
| 237 | WRITE_LINE_MEMBER(pve500_state::mb8421_intl) |
| 243 | 238 | { |
| 244 | | //printf("dualport_ram: Left READ\n"); |
| 245 | | m_subcpu->trg1(1); //(INT_Right) |
| 246 | | return dualport_7FE_data; |
| 239 | // shared ram interrupt request from subcpu side |
| 240 | m_maincpu->trg1(state); |
| 247 | 241 | } |
| 248 | 242 | |
| 249 | | WRITE8_MEMBER(pve500_state::dualport_ram_left_w) |
| 243 | WRITE_LINE_MEMBER(pve500_state::mb8421_intr) |
| 250 | 244 | { |
| 251 | | //printf("dualport_ram: Left WRITE\n"); |
| 252 | | dualport_7FF_data = data; |
| 253 | | m_subcpu->trg1(0); //(INT_Right) |
| 245 | // shared ram interrupt request from maincpu side |
| 246 | m_subcpu->trg1(state); |
| 254 | 247 | } |
| 255 | 248 | |
| 256 | | READ8_MEMBER(pve500_state::dualport_ram_right_r) |
| 257 | | { |
| 258 | | //printf("dualport_ram: Right READ\n"); |
| 259 | | m_maincpu->trg1(1); //(INT_Left) |
| 260 | | return dualport_7FF_data; |
| 261 | | } |
| 262 | | |
| 263 | | WRITE8_MEMBER(pve500_state::dualport_ram_right_w) |
| 264 | | { |
| 265 | | //printf("dualport_ram: Right WRITE\n"); |
| 266 | | dualport_7FE_data = data; |
| 267 | | m_maincpu->trg1(0); //(INT_Left) |
| 268 | | } |
| 269 | | |
| 270 | 249 | READ8_MEMBER(pve500_state::io_expander_r) |
| 271 | 250 | { |
| 272 | 251 | // printf("READ IO_EXPANDER_PORT%c\n", 'A'+offset); |
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| 396 | 375 | MCFG_RS232_PORT_ADD("serial_mixer", default_rs232_devices, NULL) |
| 397 | 376 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE("subcpu", tmpz84c015_device, rxb_w)) |
| 398 | 377 | |
| 399 | | /* TODO: |
| 400 | | -> There are a few LEDs and a sequence of 7-seg displays with atotal of 27 digits |
| 401 | | */ |
| 378 | /* ICF5: 2kbytes of RAM shared between the two CPUs (dual-port RAM)*/ |
| 379 | MCFG_DEVICE_ADD("mb8421", MB8421, 0) |
| 380 | MCFG_MB8421_INTL_HANDLER(WRITELINE(pve500_state, mb8421_intl)) |
| 381 | MCFG_MB8421_INTR_HANDLER(WRITELINE(pve500_state, mb8421_intr)) |
| 402 | 382 | |
| 403 | 383 | /* video hardware */ |
| 404 | 384 | MCFG_DEFAULT_LAYOUT(layout_pve500) |