trunk/src/emu/cpu/mips/mips3drc.c
| r31791 | r31792 | |
|---|
| 1617 | 1617 | return TRUE; |
| 1618 | 1618 | |
| 1619 | 1619 | case 0x31: /* LWC1 - MIPS I */ |
| 1620 | UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1 |
| 1621 | UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 1); // exh cop,1,Z |
| 1620 | 1622 | UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL |
| 1621 | 1623 | UML_CALLH(block, *m_read32[m_core->mode >> 1]); // callh read32 |
| 1622 | 1624 | UML_MOV(block, FPR32(RTREG), I0); // mov <cpr1_rt>,i0 |
| r31791 | r31792 | |
|---|
| 1625 | 1627 | return TRUE; |
| 1626 | 1628 | |
| 1627 | 1629 | case 0x35: /* LDC1 - MIPS III */ |
| 1630 | UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1 |
| 1631 | UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 1); // exh cop,1,Z |
| 1628 | 1632 | UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL |
| 1629 | 1633 | UML_CALLH(block, *m_read64[m_core->mode >> 1]); // callh read64 |
| 1630 | 1634 | UML_DMOV(block, FPR64(RTREG), I0); // dmov <cpr1_rt>,i0 |
| r31791 | r31792 | |
|---|
| 1768 | 1772 | return TRUE; |
| 1769 | 1773 | |
| 1770 | 1774 | case 0x39: /* SWC1 - MIPS I */ |
| 1775 | UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1 |
| 1776 | UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 1); // exh cop,1,Z |
| 1771 | 1777 | UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL |
| 1772 | 1778 | UML_MOV(block, I1, FPR32(RTREG)); // mov i1,<cpr1_rt> |
| 1773 | 1779 | UML_CALLH(block, *m_write32[m_core->mode >> 1]); // callh write32 |
| r31791 | r31792 | |
|---|
| 1776 | 1782 | return TRUE; |
| 1777 | 1783 | |
| 1778 | 1784 | case 0x3d: /* SDC1 - MIPS III */ |
| 1785 | UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1 |
| 1786 | UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 1); // exh cop,1,Z |
| 1779 | 1787 | UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL |
| 1780 | 1788 | UML_DMOV(block, I1, FPR64(RTREG)); // dmov i1,<cpr1_rt> |
| 1781 | 1789 | UML_CALLH(block, *m_write64[m_core->mode >> 1]); // callh write64 |