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r31466 Tuesday 29th July, 2014 at 10:47:05 UTC by Robbbert
by35.c : copied by17 code in, most games boot although none are playable in a satisfactory manner.
[src/mame]mame.mak
[src/mame/drivers]by35.c
[src/mame/layout]by35.lay*

trunk/src/mame/mame.mak
r31465r31466
25322532$(DRIVERS)/buggychl.o:  $(LAYOUT)/buggychl.lh
25332533
25342534$(DRIVERS)/by17.o:      $(LAYOUT)/by17.lh
2535$(DRIVERS)/by35.o:      $(LAYOUT)/by35.lh
25352536
25362537$(DRIVERS)/bzone.o:     $(LAYOUT)/bzone.lh \
25372538         $(LAYOUT)/redbaron.lh
trunk/src/mame/layout/by35.lay
r0r31466
1<!-- BY35 copied from by17.lay -->
2
3<!-- 2014-07-29: Initial version.  [Robbbert] -->
4
5<mamelayout version="2">
6
7   <element name="digit" defstate="0">
8      <led7seg>
9         <color red="1.0" green="0.75" blue="0.0" />
10      </led7seg>
11   </element>
12   <element name="red_led">
13      <disk><color red="1.0" green="0.0" blue="0.0" /></disk>
14   </element>
15   <element name="background">
16      <rect>
17         <bounds left="0" top="0" right="1" bottom="1" />
18         <color red="0.0" green="0.0" blue="0.0" />
19      </rect>
20   </element>
21   <element name="P0"><text string="Ball / Match"><color red="1.0" green="1.0" blue="1.0" /></text></element>
22   <element name="P1"><text string="Credits"><color red="1.0" green="1.0" blue="1.0" /></text></element>
23   <element name="P2"><text string="Players"><color red="1.0" green="1.0" blue="1.0" /></text></element>
24   <element name="P3"><text string="Player 1"><color red="1.0" green="1.0" blue="1.0" /></text></element>
25   <element name="P4"><text string="Player 2"><color red="1.0" green="1.0" blue="1.0" /></text></element>
26   <element name="P5"><text string="Player 3"><color red="1.0" green="1.0" blue="1.0" /></text></element>
27   <element name="P6"><text string="Player 4"><color red="1.0" green="1.0" blue="1.0" /></text></element>
28
29   <view name="Default Layout">
30
31      <!-- Background -->
32      <backdrop element="background">
33         <bounds left="0" top="20" right="274" bottom="394" />
34      </backdrop>
35
36      <!-- LEDs -->
37
38      <!-- Player 1 Score -->
39
40      <bezel name="digit5" element="digit">
41         <bounds left="10" top="45" right="44" bottom="84" />
42      </bezel>
43      <bezel name="digit4" element="digit">
44         <bounds left="54" top="45" right="88" bottom="84" />
45      </bezel>
46      <bezel name="digit3" element="digit">
47         <bounds left="98" top="45" right="132" bottom="84" />
48      </bezel>
49      <bezel name="digit2" element="digit">
50         <bounds left="142" top="45" right="176" bottom="84" />
51      </bezel>
52      <bezel name="digit1" element="digit">
53         <bounds left="186" top="45" right="220" bottom="84" />
54      </bezel>
55      <bezel name="digit0" element="digit">
56         <bounds left="230" top="45" right="264" bottom="84" />
57      </bezel>
58
59      <!-- Player 2 Score -->
60      <bezel name="digit13" element="digit">
61         <bounds left="10" top="105" right="44" bottom="144" />
62      </bezel>
63      <bezel name="digit12" element="digit">
64         <bounds left="54" top="105" right="88" bottom="144" />
65      </bezel>
66      <bezel name="digit11" element="digit">
67         <bounds left="98" top="105" right="132" bottom="144" />
68      </bezel>
69      <bezel name="digit10" element="digit">
70         <bounds left="142" top="105" right="176" bottom="144" />
71      </bezel>
72      <bezel name="digit9" element="digit">
73         <bounds left="186" top="105" right="220" bottom="144" />
74      </bezel>
75      <bezel name="digit8" element="digit">
76         <bounds left="230" top="105" right="264" bottom="144" />
77      </bezel>
78
79      <!-- Player 3 Score -->
80      <bezel name="digit21" element="digit">
81         <bounds left="10" top="165" right="44" bottom="204" />
82      </bezel>
83      <bezel name="digit20" element="digit">
84         <bounds left="54" top="165" right="88" bottom="204" />
85      </bezel>
86      <bezel name="digit19" element="digit">
87         <bounds left="98" top="165" right="132" bottom="204" />
88      </bezel>
89      <bezel name="digit18" element="digit">
90         <bounds left="142" top="165" right="176" bottom="204" />
91      </bezel>
92      <bezel name="digit17" element="digit">
93         <bounds left="186" top="165" right="220" bottom="204" />
94      </bezel>
95      <bezel name="digit16" element="digit">
96         <bounds left="230" top="165" right="264" bottom="204" />
97      </bezel>
98
99      <!-- Player 4 Score -->
100      <bezel name="digit28" element="digit">
101         <bounds left="10" top="225" right="44" bottom="264" />
102      </bezel>
103      <bezel name="digit27" element="digit">
104         <bounds left="54" top="225" right="88" bottom="264" />
105      </bezel>
106      <bezel name="digit26" element="digit">
107         <bounds left="98" top="225" right="132" bottom="264" />
108      </bezel>
109      <bezel name="digit25" element="digit">
110         <bounds left="142" top="225" right="176" bottom="264" />
111      </bezel>
112      <bezel name="digit24" element="digit">
113         <bounds left="186" top="225" right="220" bottom="264" />
114      </bezel>
115      <bezel name="digit29" element="digit">
116         <bounds left="230" top="225" right="264" bottom="264" />
117      </bezel>
118
119      <!-- Credits and Balls -->
120      <bezel name="digit35" element="digit">
121         <bounds left="10" top="345" right="44" bottom="384" />
122      </bezel>
123      <bezel name="digit34" element="digit">
124         <bounds left="54" top="345" right="88" bottom="384" />
125      </bezel>
126      <bezel name="digit32" element="digit">
127         <bounds left="186" top="345" right="220" bottom="384" />
128      </bezel>
129      <bezel name="digit37" element="digit">
130         <bounds left="230" top="345" right="264" bottom="384" />
131      </bezel>
132
133      <bezel element="P0"><bounds left="200" right="258" top="330" bottom="342" /></bezel>
134      <bezel element="P1"><bounds left="30" right="88" top="330" bottom="342" /></bezel>
135      <bezel name="text3" element="P3"><bounds left="100" right="180" top="30" bottom="42" /></bezel>
136      <bezel name="text2" element="P4"><bounds left="100" right="180" top="90" bottom="102" /></bezel>
137      <bezel name="text1" element="P5"><bounds left="100" right="180" top="150" bottom="162" /></bezel>
138      <bezel name="text0" element="P6"><bounds left="100" right="180" top="210" bottom="222" /></bezel>
139      <bezel name="led0" element="red_led">
140         <bounds left="110" right="125" top="360" bottom="375" /></bezel>
141   </view>
142</mamelayout>
Property changes on: trunk/src/mame/layout/by35.lay
Added: svn:eol-style
   + native
Added: svn:mime-type
   + text/plain
trunk/src/mame/drivers/by35.c
r31465r31466
1/*
1/********************************************************************************************
2
3    PINBALL
24    Bally MPU AS-2518-35
3*/
45
56
6#include "emu.h"
7ToDo:
8- Nuova Bell games don't boot
9- Display to fix
10- Sound
11- Dips, Inputs, Solenoids vary per game
12- Mechanical
13
14*********************************************************************************************/
15
16
17#include "machine/genpin.h"
718#include "cpu/m6800/m6800.h"
19#include "machine/6821pia.h"
20#include "machine/nvram.h"
21#include "by35.lh"
822
9class by35_state : public driver_device
23
24class by35_state : public genpin_class
1025{
1126public:
1227   by35_state(const machine_config &mconfig, device_type type, const char *tag)
13      : driver_device(mconfig, type, tag),
14         m_maincpu(*this, "maincpu")
28      : genpin_class(mconfig, type, tag)
29      , m_maincpu(*this, "maincpu")
30      , m_pia_u10(*this, "pia_u10")
31      , m_pia_u11(*this, "pia_u11")
32      , m_io_test(*this, "TEST")
33      , m_io_dsw0(*this, "DSW0")
34      , m_io_dsw1(*this, "DSW1")
35      , m_io_dsw2(*this, "DSW2")
36      , m_io_dsw3(*this, "DSW3")
37      , m_io_x0(*this, "X0")
38      , m_io_x1(*this, "X1")
39      , m_io_x2(*this, "X2")
40      , m_io_x3(*this, "X3")
41      , m_io_x4(*this, "X4")
1542   { }
1643
17protected:
18
19   // devices
20   required_device<cpu_device> m_maincpu;
21
22   // driver_device overrides
44   DECLARE_DRIVER_INIT(by35);
45   DECLARE_READ8_MEMBER(u10_a_r);
46   DECLARE_WRITE8_MEMBER(u10_a_w);
47   DECLARE_READ8_MEMBER(u10_b_r);
48   DECLARE_WRITE8_MEMBER(u10_b_w);
49   DECLARE_READ8_MEMBER(u11_a_r);
50   DECLARE_WRITE8_MEMBER(u11_a_w);
51   DECLARE_WRITE8_MEMBER(u11_b_w);
52   DECLARE_WRITE_LINE_MEMBER(u10_ca2_w);
53   DECLARE_WRITE_LINE_MEMBER(u10_cb2_w);
54   DECLARE_WRITE_LINE_MEMBER(u11_ca2_w);
55   DECLARE_WRITE_LINE_MEMBER(u11_cb2_w);
56   DECLARE_INPUT_CHANGED_MEMBER(activity_test);
57   DECLARE_INPUT_CHANGED_MEMBER(self_test);
58   TIMER_DEVICE_CALLBACK_MEMBER(u10_timer);
59   TIMER_DEVICE_CALLBACK_MEMBER(u11_timer);
60private:
61   UINT8 m_u10;
62   UINT8 m_u10_a;
63   UINT8 m_u10_b;
64   UINT8 m_u11_a;
65   UINT8 m_u11_b;
66   bool m_u10_cb2;
67   bool m_u10_timer;
68   bool m_u11_timer;
69   UINT8 m_digit;
70   UINT8 m_segment;
2371   virtual void machine_reset();
24public:
25   DECLARE_DRIVER_INIT(by35);
72   required_device<m6800_cpu_device> m_maincpu;
73   required_device<pia6821_device> m_pia_u10;
74   required_device<pia6821_device> m_pia_u11;
75   required_ioport m_io_test;
76   required_ioport m_io_dsw0;
77   required_ioport m_io_dsw1;
78   required_ioport m_io_dsw2;
79   required_ioport m_io_dsw3;
80   required_ioport m_io_x0;
81   required_ioport m_io_x1;
82   required_ioport m_io_x2;
83   required_ioport m_io_x3;
84   required_ioport m_io_x4;
2685};
2786
2887
2988static ADDRESS_MAP_START( by35_map, AS_PROGRAM, 8, by35_state )
30   AM_RANGE(0x0000, 0xffff) AM_NOP
31   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
32   AM_RANGE(0x0000, 0x007f) AM_RAM
33   AM_RANGE(0x0200, 0x02ff) AM_RAM // CMOS NVRAM
34   AM_RANGE(0x1000, 0x7fff) AM_ROM
89   //ADDRESS_MAP_GLOBAL_MASK(0x7fff)
90   AM_RANGE(0x0000, 0x007f) AM_RAM // internal to the cpu
91   AM_RANGE(0x0088, 0x008b) AM_DEVREADWRITE("pia_u10", pia6821_device, read, write)
92   AM_RANGE(0x0090, 0x0093) AM_DEVREADWRITE("pia_u11", pia6821_device, read, write)
93   AM_RANGE(0x0200, 0x02ff) AM_RAM AM_SHARE("nvram")
94   AM_RANGE(0x1000, 0xffff) AM_ROM //AM_REGION("roms", 0 )
3595ADDRESS_MAP_END
3696
3797static INPUT_PORTS_START( by35 )
98   PORT_START("TEST")
99   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Self Test") PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, by35_state, self_test, 0)
100   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Activity") PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, by35_state, activity_test, 0)
101
102   PORT_START("DSW0")
103   PORT_DIPNAME( 0x01, 0x00, "S01") // S1-5: 32 combinations of coins/credits of a coin slot. S9-13 other slot.
104   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
105   PORT_DIPSETTING(    0x01, DEF_STR( On ))
106   PORT_DIPNAME( 0x02, 0x00, "S02")
107   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
108   PORT_DIPSETTING(    0x02, DEF_STR( On ))
109   PORT_DIPNAME( 0x04, 0x00, "S03")
110   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
111   PORT_DIPSETTING(    0x04, DEF_STR( On ))
112   PORT_DIPNAME( 0x08, 0x00, "S04")
113   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
114   PORT_DIPSETTING(    0x08, DEF_STR( On ))
115   PORT_DIPNAME( 0x10, 0x00, "S05")
116   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
117   PORT_DIPSETTING(    0x10, DEF_STR( On ))
118   PORT_DIPNAME( 0x20, 0x20, "S06")
119   PORT_DIPSETTING(    0x00, DEF_STR( No ))
120   PORT_DIPSETTING(    0x20, DEF_STR( Yes ))
121   PORT_DIPNAME( 0x40, 0x40, "S07")
122   PORT_DIPSETTING(    0x00, DEF_STR( No ))
123   PORT_DIPSETTING(    0x40, DEF_STR( Yes ))
124   PORT_DIPNAME( 0x80, 0x80, "S08")
125   PORT_DIPSETTING(    0x00, DEF_STR( No ))
126   PORT_DIPSETTING(    0x80, DEF_STR( Yes ))
127
128   PORT_START("DSW1")
129   PORT_DIPNAME( 0x01, 0x00, "S09")
130   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
131   PORT_DIPSETTING(    0x01, DEF_STR( On ))
132   PORT_DIPNAME( 0x02, 0x00, "S10")
133   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
134   PORT_DIPSETTING(    0x02, DEF_STR( On ))
135   PORT_DIPNAME( 0x04, 0x00, "S11")
136   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
137   PORT_DIPSETTING(    0x04, DEF_STR( On ))
138   PORT_DIPNAME( 0x08, 0x00, "S12")
139   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
140   PORT_DIPSETTING(    0x08, DEF_STR( On ))
141   PORT_DIPNAME( 0x10, 0x00, "S13")
142   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
143   PORT_DIPSETTING(    0x10, DEF_STR( On ))
144   PORT_DIPNAME( 0x20, 0x00, "S14")
145   PORT_DIPSETTING(    0x00, DEF_STR( Yes ))
146   PORT_DIPSETTING(    0x20, DEF_STR( No ))
147   PORT_DIPNAME( 0x40, 0x40, "S15")
148   PORT_DIPSETTING(    0x00, DEF_STR( No ))
149   PORT_DIPSETTING(    0x40, DEF_STR( Yes ))
150   PORT_DIPNAME( 0x80, 0x00, "S16")
151   PORT_DIPSETTING(    0x00, DEF_STR( No ))
152   PORT_DIPSETTING(    0x80, DEF_STR( Yes ))
153
154   PORT_START("DSW2")
155   PORT_DIPNAME( 0x01, 0x00, "S17")
156   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
157   PORT_DIPSETTING(    0x01, DEF_STR( On ))
158   PORT_DIPNAME( 0x02, 0x00, "S18")
159   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
160   PORT_DIPSETTING(    0x02, DEF_STR( On ))
161   PORT_DIPNAME( 0x04, 0x00, "S19")
162   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
163   PORT_DIPSETTING(    0x04, DEF_STR( On ))
164   PORT_DIPNAME( 0x08, 0x00, "S20")
165   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
166   PORT_DIPSETTING(    0x08, DEF_STR( On ))
167   PORT_DIPNAME( 0x10, 0x00, "S21")
168   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
169   PORT_DIPSETTING(    0x10, DEF_STR( On ))
170   PORT_DIPNAME( 0x20, 0x00, "S22")
171   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
172   PORT_DIPSETTING(    0x20, DEF_STR( On ))
173   PORT_DIPNAME( 0x40, 0x00, "S23")
174   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
175   PORT_DIPSETTING(    0x40, DEF_STR( On ))
176   PORT_DIPNAME( 0x80, 0x00, "S24")
177   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
178   PORT_DIPSETTING(    0x80, DEF_STR( On ))
179
180   PORT_START("DSW3")
181   PORT_DIPNAME( 0x03, 0x03, "Maximum Credits")
182   PORT_DIPSETTING(    0x00, "10")
183   PORT_DIPSETTING(    0x01, "15")
184   PORT_DIPSETTING(    0x02, "25")
185   PORT_DIPSETTING(    0x03, "40")
186   PORT_DIPNAME( 0x04, 0x04, "Credits displayed")
187   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
188   PORT_DIPSETTING(    0x04, DEF_STR( On ))
189   PORT_DIPNAME( 0x08, 0x08, "Match")
190   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
191   PORT_DIPSETTING(    0x08, DEF_STR( On ))
192   PORT_DIPNAME( 0x10, 0x00, "Keep all replays")
193   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
194   PORT_DIPSETTING(    0x10, DEF_STR( On ))
195   PORT_DIPNAME( 0x20, 0x00, "Voice" )
196   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
197   PORT_DIPSETTING(    0x20, DEF_STR( On ))
198   PORT_DIPNAME( 0xC0, 0x40, "Balls")
199   PORT_DIPSETTING(    0xC0, "2")
200   PORT_DIPSETTING(    0x00, "3")
201   PORT_DIPSETTING(    0x80, "4")
202   PORT_DIPSETTING(    0x40, "5")
203
204   PORT_START("X0")
205   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER )
206   PORT_BIT( 0x0a, IP_ACTIVE_HIGH, IPT_UNUSED )
207   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START2 )
208   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER )
209   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 )
210   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT )
211   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_X)
212
213   PORT_START("X1")
214   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
215   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
216   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
217   PORT_BIT( 0x38, IP_ACTIVE_HIGH, IPT_UNUSED )
218   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER )
219   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_TILT1 ) PORT_NAME("Slam Tilt")
220
221   // from here, vary per game
222   PORT_START("X2")
223   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_A)
224   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_S)
225   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_D)
226   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_F)
227   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_G)
228   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_H)
229   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_J)
230   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_K)
231
232   PORT_START("X3")
233   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q)
234   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_W)
235   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_E)
236   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_R)
237   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Y)
238   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_U)
239   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_I)
240   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_O)
241
242   PORT_START("X4")
243   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Z)
244   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_C)
245   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_V)
246   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_B)
247   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_N)
248   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_M)
249   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_COMMA)
250   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_STOP)
38251INPUT_PORTS_END
39252
253INPUT_CHANGED_MEMBER( by35_state::activity_test )
254{
255   if(newval)
256      m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
257}
258
259INPUT_CHANGED_MEMBER( by35_state::self_test )
260{
261   m_pia_u10->ca1_w(newval);
262}
263
264WRITE_LINE_MEMBER( by35_state::u10_ca2_w )
265{
266}
267     
268WRITE_LINE_MEMBER( by35_state::u10_cb2_w )
269{
270}
271
272WRITE_LINE_MEMBER( by35_state::u11_ca2_w )
273{
274   output_set_value("led0", !state);
275}
276
277WRITE_LINE_MEMBER( by35_state::u11_cb2_w )
278{
279}
280
281READ8_MEMBER( by35_state::u10_a_r )
282{
283   return m_u10_a;
284}
285
286WRITE8_MEMBER( by35_state::u10_a_w )
287{
288   static const UINT8 patterns[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0,0,0,0,0,0 }; // MC14543
289   m_segment = data >> 4;
290   m_u10_a = data;
291   m_u10 = (data & 15) | (BIT(m_u11_a, 0) << 4);
292   switch (m_u10)
293   {
294      case 0x10: // wrong
295         output_set_digit_value(m_digit, patterns[m_segment]);
296         break;
297      case 0x1d:
298         output_set_digit_value(8+m_digit, patterns[m_segment]);
299         break;
300      case 0x1b:
301         output_set_digit_value(16+m_digit, patterns[m_segment]);
302         break;
303      case 0x07:
304         output_set_digit_value(24+m_digit, patterns[m_segment]);
305         break;
306      case 0x0f:
307         output_set_digit_value(32+m_digit, patterns[m_segment]);
308         break;
309      default:
310         break;
311   }
312}
313
314READ8_MEMBER( by35_state::u10_b_r )
315{
316   UINT8 data = 0;
317
318   if (BIT(m_u10_a, 0))
319      data |= m_io_x0->read();
320
321   if (BIT(m_u10_a, 1))
322      data |= m_io_x1->read();
323
324   if (BIT(m_u10_a, 2))
325      data |= m_io_x2->read();
326
327   if (BIT(m_u10_a, 3))
328      data |= m_io_x3->read();
329
330   if (BIT(m_u10_a, 4))
331      data |= m_io_x4->read();
332
333   if (BIT(m_u10_a, 5))
334      data |= m_io_dsw0->read();
335
336   if (BIT(m_u10_a, 6))
337      data |= m_io_dsw1->read();
338
339   if (BIT(m_u10_a, 7))
340      data |= m_io_dsw2->read();
341
342   if (m_u10_cb2)
343      data |= m_io_dsw3->read();
344
345   return data;
346}
347
348WRITE8_MEMBER( by35_state::u10_b_w )
349{
350   m_u10_b = data;
351}
352
353READ8_MEMBER( by35_state::u11_a_r )
354{
355   return m_u11_a;
356}
357
358WRITE8_MEMBER( by35_state::u11_a_w )
359{
360   m_u11_a = data;
361
362   m_digit = 0xff;
363   if BIT(data, 2)
364      m_digit = 4;
365   else
366   if BIT(data, 3)
367      m_digit = 3;
368   else
369   if BIT(data, 4)
370      m_digit = 2;
371   else
372   if BIT(data, 5)
373      m_digit = 1;
374   else
375   if BIT(data, 6)
376      m_digit = 0;
377   else
378   if BIT(data, 7)
379      m_digit = 5;
380}
381
382WRITE8_MEMBER( by35_state::u11_b_w )
383{
384   m_u11_b = data;
385   switch (data & 15)
386   {
387      case 0x0: //
388         //m_samples->start(0, 3);
389         break;
390      case 0x1: // chime 10
391         m_samples->start(1, 1);
392         break;
393      case 0x2: // chime 100
394         m_samples->start(2, 2);
395         break;
396      case 0x3: // chime 1000
397         m_samples->start(3, 3);
398         break;
399      case 0x4: // chime 10000
400         m_samples->start(0, 4);
401         break;
402      case 0x5: // knocker
403         m_samples->start(0, 6);
404         break;
405      case 0x6: // outhole
406         m_samples->start(0, 5);
407         break;
408      // from here, vary per game
409      case 0x7:
410      case 0x8:
411      case 0x9:
412         //m_samples->start(0, 5);
413         break;
414      case 0xa:
415         //m_samples->start(0, 5);
416         break;
417      case 0xb:
418         //m_samples->start(0, 0);
419         break;
420      case 0xc:
421         //m_samples->start(0, 5);
422         break;
423      case 0xd:
424         //m_samples->start(0, 0);
425         break;
426      case 0xe:
427         //m_samples->start(0, 5);
428         break;
429      case 0xf: // not used
430         break;
431   }
432}
433
40434void by35_state::machine_reset()
41435{
436   m_u10_a = 0;
437   m_u10_b = 0;
438   m_u10_cb2 = 0;
439   m_u11_a = 0;
440   m_u11_b = 0;
42441}
43442
44443DRIVER_INIT_MEMBER(by35_state,by35)
45444{
46445}
47446
447// zero-cross detection
448TIMER_DEVICE_CALLBACK_MEMBER( by35_state::u10_timer )
449{
450   m_u10_timer ^= 1;
451   m_pia_u10->cb1_w(m_u10_timer);
452}
453
454// 555 timer for display refresh
455TIMER_DEVICE_CALLBACK_MEMBER( by35_state::u11_timer )
456{
457   m_u11_timer ^= 1;
458   m_pia_u11->ca1_w(m_u11_timer);
459}
460
48461static MACHINE_CONFIG_START( by35, by35_state )
49462   /* basic machine hardware */
50   MCFG_CPU_ADD("maincpu", M6800, 1000000)
463   MCFG_CPU_ADD("maincpu", M6800, 1000000) // no xtal, just 2 chips forming a random oscillator
51464   MCFG_CPU_PROGRAM_MAP(by35_map)
465
466   MCFG_NVRAM_ADD_0FILL("nvram")
467
468   /* Video */
469   MCFG_DEFAULT_LAYOUT(layout_by35)
470
471   /* Sound */
472   MCFG_FRAGMENT_ADD( genpin_audio )
473
474   /* Devices */
475   MCFG_DEVICE_ADD("pia_u10", PIA6821, 0)
476   MCFG_PIA_READPA_HANDLER(READ8(by35_state, u10_a_r))
477   MCFG_PIA_WRITEPA_HANDLER(WRITE8(by35_state, u10_a_w))
478   MCFG_PIA_READPB_HANDLER(READ8(by35_state, u10_b_r))
479   MCFG_PIA_WRITEPB_HANDLER(WRITE8(by35_state, u10_b_w))
480   MCFG_PIA_CA2_HANDLER(WRITELINE(by35_state, u10_ca2_w))
481   MCFG_PIA_CB2_HANDLER(WRITELINE(by35_state, u10_cb2_w))
482   MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
483   MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
484   MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_z", by35_state, u10_timer, attotime::from_hz(120)) // mains freq*2
485
486   MCFG_DEVICE_ADD("pia_u11", PIA6821, 0)
487   MCFG_PIA_READPA_HANDLER(READ8(by35_state, u11_a_r))
488   MCFG_PIA_WRITEPA_HANDLER(WRITE8(by35_state, u11_a_w))
489   MCFG_PIA_WRITEPB_HANDLER(WRITE8(by35_state, u11_b_w))
490   MCFG_PIA_CA2_HANDLER(WRITELINE(by35_state, u11_ca2_w))
491   MCFG_PIA_CB2_HANDLER(WRITELINE(by35_state, u11_cb2_w))
492   MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
493   MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
494   MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_d", by35_state, u11_timer, attotime::from_hz(634)) // 555 timer*2
52495MACHINE_CONFIG_END
53496
497
54498/*--------------------------------
55499/ 301/Bulls Eye
56500/-------------------------------*/

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