trunk/src/mame/drivers/by17.c
| r31436 | r31437 | |
| 1 | | /* |
| 1 | /******************************************************************************************** |
| 2 | |
| 3 | PINBALL |
| 2 | 4 | Bally MPU AS-2518-17 |
| 3 | | */ |
| 4 | 5 | |
| 6 | These are some very early and well known SS machines, such as 'Eight Ball'. |
| 5 | 7 | |
| 6 | | #include "emu.h" |
| 8 | They have an orange digital display, and a chime unit. |
| 9 | |
| 10 | |
| 11 | ToDo: |
| 12 | - Display to fix |
| 13 | - Bow & Arrow fails the PIA test and doesn't boot |
| 14 | - Dips, Inputs, Solenoids vary per game |
| 15 | - Mechanical |
| 16 | |
| 17 | *********************************************************************************************/ |
| 18 | |
| 19 | |
| 20 | #include "machine/genpin.h" |
| 7 | 21 | #include "cpu/m6800/m6800.h" |
| 22 | #include "machine/6821pia.h" |
| 23 | #include "machine/nvram.h" |
| 24 | #include "by17.lh" |
| 8 | 25 | |
| 9 | | class by17_state : public driver_device |
| 26 | |
| 27 | class by17_state : public genpin_class |
| 10 | 28 | { |
| 11 | 29 | public: |
| 12 | 30 | by17_state(const machine_config &mconfig, device_type type, const char *tag) |
| 13 | | : driver_device(mconfig, type, tag), |
| 14 | | m_maincpu(*this, "maincpu") |
| 31 | : genpin_class(mconfig, type, tag) |
| 32 | , m_maincpu(*this, "maincpu") |
| 33 | , m_pia_u10(*this, "pia_u10") |
| 34 | , m_pia_u11(*this, "pia_u11") |
| 35 | , m_io_test(*this, "TEST") |
| 36 | , m_io_dsw0(*this, "DSW0") |
| 37 | , m_io_dsw1(*this, "DSW1") |
| 38 | , m_io_dsw2(*this, "DSW2") |
| 39 | , m_io_dsw3(*this, "DSW3") |
| 40 | , m_io_x0(*this, "X0") |
| 41 | , m_io_x1(*this, "X1") |
| 42 | , m_io_x2(*this, "X2") |
| 43 | , m_io_x3(*this, "X3") |
| 44 | , m_io_x4(*this, "X4") |
| 15 | 45 | { } |
| 16 | 46 | |
| 17 | | protected: |
| 18 | | |
| 19 | | // devices |
| 20 | | required_device<cpu_device> m_maincpu; |
| 21 | | |
| 22 | | // driver_device overrides |
| 47 | DECLARE_DRIVER_INIT(by17); |
| 48 | DECLARE_READ8_MEMBER(u10_a_r); |
| 49 | DECLARE_WRITE8_MEMBER(u10_a_w); |
| 50 | DECLARE_READ8_MEMBER(u10_b_r); |
| 51 | DECLARE_WRITE8_MEMBER(u10_b_w); |
| 52 | DECLARE_READ8_MEMBER(u11_a_r); |
| 53 | DECLARE_WRITE8_MEMBER(u11_a_w); |
| 54 | DECLARE_WRITE8_MEMBER(u11_b_w); |
| 55 | DECLARE_WRITE_LINE_MEMBER(u10_ca2_w); |
| 56 | DECLARE_WRITE_LINE_MEMBER(u10_cb2_w); |
| 57 | DECLARE_WRITE_LINE_MEMBER(u11_ca2_w); |
| 58 | DECLARE_WRITE_LINE_MEMBER(u11_cb2_w); |
| 59 | DECLARE_INPUT_CHANGED_MEMBER(activity_test); |
| 60 | DECLARE_INPUT_CHANGED_MEMBER(self_test); |
| 61 | TIMER_DEVICE_CALLBACK_MEMBER(u10_timer); |
| 62 | TIMER_DEVICE_CALLBACK_MEMBER(u11_timer); |
| 63 | private: |
| 64 | UINT8 m_u10; |
| 65 | UINT8 m_u10_a; |
| 66 | UINT8 m_u10_b; |
| 67 | UINT8 m_u11_a; |
| 68 | UINT8 m_u11_b; |
| 69 | bool m_u10_cb2; |
| 70 | bool m_u10_timer; |
| 71 | bool m_u11_timer; |
| 72 | UINT8 m_digit; |
| 73 | UINT8 m_segment; |
| 74 | UINT8 m_disp_info[3]; |
| 23 | 75 | virtual void machine_reset(); |
| 24 | | public: |
| 25 | | DECLARE_DRIVER_INIT(by17); |
| 76 | required_device<m6800_cpu_device> m_maincpu; |
| 77 | required_device<pia6821_device> m_pia_u10; |
| 78 | required_device<pia6821_device> m_pia_u11; |
| 79 | required_ioport m_io_test; |
| 80 | required_ioport m_io_dsw0; |
| 81 | required_ioport m_io_dsw1; |
| 82 | required_ioport m_io_dsw2; |
| 83 | required_ioport m_io_dsw3; |
| 84 | required_ioport m_io_x0; |
| 85 | required_ioport m_io_x1; |
| 86 | required_ioport m_io_x2; |
| 87 | required_ioport m_io_x3; |
| 88 | required_ioport m_io_x4; |
| 26 | 89 | }; |
| 27 | 90 | |
| 28 | 91 | |
| 29 | 92 | static ADDRESS_MAP_START( by17_map, AS_PROGRAM, 8, by17_state ) |
| 30 | | AM_RANGE(0x0000, 0xffff) AM_NOP |
| 31 | | ADDRESS_MAP_GLOBAL_MASK(0x7fff) |
| 32 | | AM_RANGE(0x0000, 0x007f) AM_RAM |
| 33 | | AM_RANGE(0x0200, 0x02ff) AM_RAM // CMOS NVRAM |
| 34 | | AM_RANGE(0x1000, 0x7fff) AM_ROM |
| 93 | ADDRESS_MAP_GLOBAL_MASK(0x1fff) |
| 94 | AM_RANGE(0x0000, 0x007f) AM_RAM // internal to the cpu |
| 95 | AM_RANGE(0x0088, 0x008b) AM_DEVREADWRITE("pia_u10", pia6821_device, read, write) |
| 96 | AM_RANGE(0x0090, 0x0093) AM_DEVREADWRITE("pia_u11", pia6821_device, read, write) |
| 97 | AM_RANGE(0x0200, 0x02ff) AM_RAM AM_SHARE("nvram") |
| 98 | AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION("roms", 0 ) |
| 35 | 99 | ADDRESS_MAP_END |
| 36 | 100 | |
| 37 | 101 | static INPUT_PORTS_START( by17 ) |
| 102 | PORT_START("TEST") |
| 103 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Self Test") PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, by17_state, self_test, 0) |
| 104 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Activity") PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, by17_state, activity_test, 0) |
| 105 | |
| 106 | PORT_START("DSW0") |
| 107 | PORT_DIPNAME( 0x01, 0x00, "S01") // S1-5: 32 combinations of coins/credits of a coin slot. S9-13 other slot. |
| 108 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 109 | PORT_DIPSETTING( 0x01, DEF_STR( On )) |
| 110 | PORT_DIPNAME( 0x02, 0x00, "S02") |
| 111 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 112 | PORT_DIPSETTING( 0x02, DEF_STR( On )) |
| 113 | PORT_DIPNAME( 0x04, 0x00, "S03") |
| 114 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 115 | PORT_DIPSETTING( 0x04, DEF_STR( On )) |
| 116 | PORT_DIPNAME( 0x08, 0x00, "S04") |
| 117 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 118 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 119 | PORT_DIPNAME( 0x10, 0x00, "S05") |
| 120 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 121 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 122 | PORT_DIPNAME( 0x20, 0x20, "S06") |
| 123 | PORT_DIPSETTING( 0x00, DEF_STR( No )) |
| 124 | PORT_DIPSETTING( 0x20, DEF_STR( Yes )) |
| 125 | PORT_DIPNAME( 0x40, 0x40, "S07") |
| 126 | PORT_DIPSETTING( 0x00, DEF_STR( No )) |
| 127 | PORT_DIPSETTING( 0x40, DEF_STR( Yes )) |
| 128 | PORT_DIPNAME( 0x80, 0x80, "S08") |
| 129 | PORT_DIPSETTING( 0x00, DEF_STR( No )) |
| 130 | PORT_DIPSETTING( 0x80, DEF_STR( Yes )) |
| 131 | |
| 132 | PORT_START("DSW1") |
| 133 | PORT_DIPNAME( 0x01, 0x00, "S09") |
| 134 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 135 | PORT_DIPSETTING( 0x01, DEF_STR( On )) |
| 136 | PORT_DIPNAME( 0x02, 0x00, "S10") |
| 137 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 138 | PORT_DIPSETTING( 0x02, DEF_STR( On )) |
| 139 | PORT_DIPNAME( 0x04, 0x00, "S11") |
| 140 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 141 | PORT_DIPSETTING( 0x04, DEF_STR( On )) |
| 142 | PORT_DIPNAME( 0x08, 0x00, "S12") |
| 143 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 144 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 145 | PORT_DIPNAME( 0x10, 0x00, "S13") |
| 146 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 147 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 148 | PORT_DIPNAME( 0x20, 0x00, "S14") |
| 149 | PORT_DIPSETTING( 0x00, DEF_STR( Yes )) |
| 150 | PORT_DIPSETTING( 0x20, DEF_STR( No )) |
| 151 | PORT_DIPNAME( 0x40, 0x40, "S15") |
| 152 | PORT_DIPSETTING( 0x00, DEF_STR( No )) |
| 153 | PORT_DIPSETTING( 0x40, DEF_STR( Yes )) |
| 154 | PORT_DIPNAME( 0x80, 0x00, "S16") |
| 155 | PORT_DIPSETTING( 0x00, DEF_STR( No )) |
| 156 | PORT_DIPSETTING( 0x80, DEF_STR( Yes )) |
| 157 | |
| 158 | PORT_START("DSW2") |
| 159 | PORT_DIPNAME( 0x01, 0x00, "S17") |
| 160 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 161 | PORT_DIPSETTING( 0x01, DEF_STR( On )) |
| 162 | PORT_DIPNAME( 0x02, 0x00, "S18") |
| 163 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 164 | PORT_DIPSETTING( 0x02, DEF_STR( On )) |
| 165 | PORT_DIPNAME( 0x04, 0x00, "S19") |
| 166 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 167 | PORT_DIPSETTING( 0x04, DEF_STR( On )) |
| 168 | PORT_DIPNAME( 0x08, 0x00, "S20") |
| 169 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 170 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 171 | PORT_DIPNAME( 0x10, 0x00, "S21") |
| 172 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 173 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 174 | PORT_DIPNAME( 0x20, 0x00, "S22") |
| 175 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 176 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 177 | PORT_DIPNAME( 0x40, 0x00, "S23") |
| 178 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 179 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 180 | PORT_DIPNAME( 0x80, 0x00, "S24") |
| 181 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 182 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 183 | |
| 184 | PORT_START("DSW3") |
| 185 | PORT_DIPNAME( 0x03, 0x03, "Maximum Credits") |
| 186 | PORT_DIPSETTING( 0x00, "10") |
| 187 | PORT_DIPSETTING( 0x01, "15") |
| 188 | PORT_DIPSETTING( 0x02, "25") |
| 189 | PORT_DIPSETTING( 0x03, "40") |
| 190 | PORT_DIPNAME( 0x04, 0x04, "Credits displayed") |
| 191 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 192 | PORT_DIPSETTING( 0x04, DEF_STR( On )) |
| 193 | PORT_DIPNAME( 0x08, 0x08, "Match") |
| 194 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 195 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 196 | PORT_DIPNAME( 0x10, 0x00, "Keep all replays") |
| 197 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 198 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 199 | PORT_DIPNAME( 0x20, 0x00, "Voice" ) |
| 200 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 201 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 202 | PORT_DIPNAME( 0xC0, 0x40, "Balls") |
| 203 | PORT_DIPSETTING( 0xC0, "2") |
| 204 | PORT_DIPSETTING( 0x00, "3") |
| 205 | PORT_DIPSETTING( 0x80, "4") |
| 206 | PORT_DIPSETTING( 0x40, "5") |
| 207 | |
| 208 | PORT_START("X0") |
| 209 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) |
| 210 | PORT_BIT( 0x0a, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 211 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START2 ) |
| 212 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) |
| 213 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) |
| 214 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT ) |
| 215 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_X) |
| 216 | |
| 217 | PORT_START("X1") |
| 218 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 ) |
| 219 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) |
| 220 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) |
| 221 | PORT_BIT( 0x38, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 222 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) |
| 223 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_TILT1 ) PORT_NAME("Slam Tilt") |
| 224 | |
| 225 | // from here, vary per game |
| 226 | PORT_START("X2") |
| 227 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_A) |
| 228 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_S) |
| 229 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_D) |
| 230 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_F) |
| 231 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_G) |
| 232 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_H) |
| 233 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_J) |
| 234 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_K) |
| 235 | |
| 236 | PORT_START("X3") |
| 237 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q) |
| 238 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_W) |
| 239 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_E) |
| 240 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_R) |
| 241 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Y) |
| 242 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_U) |
| 243 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_I) |
| 244 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_O) |
| 245 | |
| 246 | PORT_START("X4") |
| 247 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Z) |
| 248 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_C) |
| 249 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_V) |
| 250 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_B) |
| 251 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_N) |
| 252 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_M) |
| 253 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_COMMA) |
| 254 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_STOP) |
| 38 | 255 | INPUT_PORTS_END |
| 39 | 256 | |
| 257 | INPUT_CHANGED_MEMBER( by17_state::activity_test ) |
| 258 | { |
| 259 | if(newval) |
| 260 | m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); |
| 261 | } |
| 262 | |
| 263 | INPUT_CHANGED_MEMBER( by17_state::self_test ) |
| 264 | { |
| 265 | m_pia_u10->ca1_w(newval); |
| 266 | } |
| 267 | |
| 268 | WRITE_LINE_MEMBER( by17_state::u10_ca2_w ) |
| 269 | { |
| 270 | if (m_u10 == 15) |
| 271 | { |
| 272 | m_disp_info[0] = 1; |
| 273 | m_disp_info[1] = m_digit; |
| 274 | m_disp_info[2] = m_segment; |
| 275 | } |
| 276 | else |
| 277 | m_disp_info[0] = 0; |
| 278 | } |
| 279 | |
| 280 | WRITE_LINE_MEMBER( by17_state::u10_cb2_w ) |
| 281 | { |
| 282 | } |
| 283 | |
| 284 | WRITE_LINE_MEMBER( by17_state::u11_ca2_w ) |
| 285 | { |
| 286 | output_set_value("led0", !state); |
| 287 | } |
| 288 | |
| 289 | WRITE_LINE_MEMBER( by17_state::u11_cb2_w ) |
| 290 | { |
| 291 | } |
| 292 | |
| 293 | READ8_MEMBER( by17_state::u10_a_r ) |
| 294 | { |
| 295 | return m_u10_a; |
| 296 | } |
| 297 | |
| 298 | WRITE8_MEMBER( by17_state::u10_a_w ) |
| 299 | { |
| 300 | m_segment = data >> 4; |
| 301 | m_u10_a = data; |
| 302 | m_u10 = (data & 15) | (BIT(m_u11_a, 0) << 4); |
| 303 | //if (m_disp_info[0]) if (m_disp_info[2] < 15) printf("%X:%X:%X:%X ",m_u10,m_disp_info[0],m_disp_info[1],m_disp_info[2]); |
| 304 | |
| 305 | if ((m_disp_info[0]) && (BIT(m_u10, 4))) |
| 306 | { |
| 307 | static const UINT8 patterns[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0,0,0,0,0,0 }; // MC14543 |
| 308 | output_set_digit_value(m_disp_info[1]+(m_u10&15)*8, patterns[m_disp_info[2]]); |
| 309 | } |
| 310 | } |
| 311 | |
| 312 | READ8_MEMBER( by17_state::u10_b_r ) |
| 313 | { |
| 314 | UINT8 data = 0; |
| 315 | |
| 316 | if (BIT(m_u10_a, 0)) |
| 317 | data |= m_io_x0->read(); |
| 318 | |
| 319 | if (BIT(m_u10_a, 1)) |
| 320 | data |= m_io_x1->read(); |
| 321 | |
| 322 | if (BIT(m_u10_a, 2)) |
| 323 | data |= m_io_x2->read(); |
| 324 | |
| 325 | if (BIT(m_u10_a, 3)) |
| 326 | data |= m_io_x3->read(); |
| 327 | |
| 328 | if (BIT(m_u10_a, 4)) |
| 329 | data |= m_io_x4->read(); |
| 330 | |
| 331 | if (BIT(m_u10_a, 5)) |
| 332 | data |= m_io_dsw0->read(); |
| 333 | |
| 334 | if (BIT(m_u10_a, 6)) |
| 335 | data |= m_io_dsw1->read(); |
| 336 | |
| 337 | if (BIT(m_u10_a, 7)) |
| 338 | data |= m_io_dsw2->read(); |
| 339 | |
| 340 | if (m_u10_cb2) |
| 341 | data |= m_io_dsw3->read(); |
| 342 | |
| 343 | return data; |
| 344 | } |
| 345 | |
| 346 | WRITE8_MEMBER( by17_state::u10_b_w ) |
| 347 | { |
| 348 | m_u10_b = data; |
| 349 | } |
| 350 | |
| 351 | READ8_MEMBER( by17_state::u11_a_r ) |
| 352 | { |
| 353 | return m_u11_a; |
| 354 | } |
| 355 | |
| 356 | WRITE8_MEMBER( by17_state::u11_a_w ) |
| 357 | { |
| 358 | m_u11_a = data; |
| 359 | |
| 360 | m_digit = 0xff; |
| 361 | if BIT(data, 2) |
| 362 | m_digit = 5; |
| 363 | else |
| 364 | if BIT(data, 3) |
| 365 | m_digit = 4; |
| 366 | else |
| 367 | if BIT(data, 4) |
| 368 | m_digit = 3; |
| 369 | else |
| 370 | if BIT(data, 5) |
| 371 | m_digit = 2; |
| 372 | else |
| 373 | if BIT(data, 6) |
| 374 | m_digit = 1; |
| 375 | else |
| 376 | if BIT(data, 7) |
| 377 | m_digit = 0; |
| 378 | } |
| 379 | |
| 380 | WRITE8_MEMBER( by17_state::u11_b_w ) |
| 381 | { |
| 382 | m_u11_b = data; |
| 383 | switch (data & 15) |
| 384 | { |
| 385 | case 0x0: // |
| 386 | //m_samples->start(0, 3); |
| 387 | break; |
| 388 | case 0x1: // chime 10 |
| 389 | m_samples->start(1, 1); |
| 390 | break; |
| 391 | case 0x2: // chime 100 |
| 392 | m_samples->start(2, 2); |
| 393 | break; |
| 394 | case 0x3: // chime 1000 |
| 395 | m_samples->start(3, 3); |
| 396 | break; |
| 397 | case 0x4: // chime 10000 |
| 398 | m_samples->start(0, 4); |
| 399 | break; |
| 400 | case 0x5: // knocker |
| 401 | m_samples->start(0, 6); |
| 402 | break; |
| 403 | case 0x6: // outhole |
| 404 | m_samples->start(0, 5); |
| 405 | break; |
| 406 | // from here, vary per game |
| 407 | case 0x7: |
| 408 | case 0x8: |
| 409 | case 0x9: |
| 410 | //m_samples->start(0, 5); |
| 411 | break; |
| 412 | case 0xa: |
| 413 | //m_samples->start(0, 5); |
| 414 | break; |
| 415 | case 0xb: |
| 416 | //m_samples->start(0, 0); |
| 417 | break; |
| 418 | case 0xc: |
| 419 | //m_samples->start(0, 5); |
| 420 | break; |
| 421 | case 0xd: |
| 422 | //m_samples->start(0, 0); |
| 423 | break; |
| 424 | case 0xe: |
| 425 | //m_samples->start(0, 5); |
| 426 | break; |
| 427 | case 0xf: // not used |
| 428 | break; |
| 429 | } |
| 430 | } |
| 431 | |
| 40 | 432 | void by17_state::machine_reset() |
| 41 | 433 | { |
| 434 | m_u10_a = 0; |
| 435 | m_u10_b = 0; |
| 436 | m_u10_cb2 = 0; |
| 437 | m_u11_a = 0; |
| 438 | m_u11_b = 0; |
| 42 | 439 | } |
| 43 | 440 | |
| 44 | 441 | DRIVER_INIT_MEMBER(by17_state,by17) |
| 45 | 442 | { |
| 46 | 443 | } |
| 47 | 444 | |
| 445 | // zero-cross detection |
| 446 | TIMER_DEVICE_CALLBACK_MEMBER( by17_state::u10_timer ) |
| 447 | { |
| 448 | m_u10_timer ^= 1; |
| 449 | m_pia_u10->cb1_w(m_u10_timer); |
| 450 | } |
| 451 | |
| 452 | // 555 timer for display refresh |
| 453 | TIMER_DEVICE_CALLBACK_MEMBER( by17_state::u11_timer ) |
| 454 | { |
| 455 | m_u11_timer ^= 1; |
| 456 | m_pia_u11->ca1_w(m_u11_timer); |
| 457 | } |
| 458 | |
| 48 | 459 | static MACHINE_CONFIG_START( by17, by17_state ) |
| 49 | 460 | /* basic machine hardware */ |
| 50 | | MCFG_CPU_ADD("maincpu", M6800, 1000000) |
| 461 | MCFG_CPU_ADD("maincpu", M6800, 1000000) // no xtal, just 2 chips forming a random oscillator |
| 51 | 462 | MCFG_CPU_PROGRAM_MAP(by17_map) |
| 463 | |
| 464 | MCFG_NVRAM_ADD_0FILL("nvram") |
| 465 | |
| 466 | /* Video */ |
| 467 | MCFG_DEFAULT_LAYOUT(layout_by17) |
| 468 | |
| 469 | /* Sound */ |
| 470 | MCFG_FRAGMENT_ADD( genpin_audio ) |
| 471 | |
| 472 | /* Devices */ |
| 473 | MCFG_DEVICE_ADD("pia_u10", PIA6821, 0) |
| 474 | MCFG_PIA_READPA_HANDLER(READ8(by17_state, u10_a_r)) |
| 475 | MCFG_PIA_WRITEPA_HANDLER(WRITE8(by17_state, u10_a_w)) |
| 476 | MCFG_PIA_READPB_HANDLER(READ8(by17_state, u10_b_r)) |
| 477 | MCFG_PIA_WRITEPB_HANDLER(WRITE8(by17_state, u10_b_w)) |
| 478 | MCFG_PIA_CA2_HANDLER(WRITELINE(by17_state, u10_ca2_w)) |
| 479 | MCFG_PIA_CB2_HANDLER(WRITELINE(by17_state, u10_cb2_w)) |
| 480 | MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) |
| 481 | MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) |
| 482 | MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_z", by17_state, u10_timer, attotime::from_hz(120)) // mains freq*2 |
| 483 | |
| 484 | MCFG_DEVICE_ADD("pia_u11", PIA6821, 0) |
| 485 | MCFG_PIA_READPA_HANDLER(READ8(by17_state, u11_a_r)) |
| 486 | MCFG_PIA_WRITEPA_HANDLER(WRITE8(by17_state, u11_a_w)) |
| 487 | MCFG_PIA_WRITEPB_HANDLER(WRITE8(by17_state, u11_b_w)) |
| 488 | MCFG_PIA_CA2_HANDLER(WRITELINE(by17_state, u11_ca2_w)) |
| 489 | MCFG_PIA_CB2_HANDLER(WRITELINE(by17_state, u11_cb2_w)) |
| 490 | MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) |
| 491 | MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) |
| 492 | MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_d", by17_state, u11_timer, attotime::from_hz(634)) // 555 timer*2 |
| 52 | 493 | MACHINE_CONFIG_END |
| 53 | 494 | |
| 54 | 495 | /*-------------------------------- |
| 55 | 496 | / Black Jack |
| 56 | 497 | /-------------------------------*/ |
| 57 | 498 | ROM_START(blackjck) |
| 58 | | ROM_REGION(0x10000, "maincpu", 0) |
| 59 | | ROM_LOAD( "728-32_2.716", 0x1000, 0x0800, CRC(1333c9d1) SHA1(1fbb60d84db47ffaf7f291575b2705783a110678)) |
| 60 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 61 | | ROM_RELOAD( 0xf800, 0x0800) |
| 499 | ROM_REGION(0x1000, "roms", 0) |
| 500 | ROM_LOAD( "728-32_2.716", 0x0000, 0x0800, CRC(1333c9d1) SHA1(1fbb60d84db47ffaf7f291575b2705783a110678)) |
| 501 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 62 | 502 | ROM_END |
| 63 | 503 | |
| 64 | 504 | /*-------------------------------- |
| 65 | 505 | / Bow and Arrow |
| 66 | 506 | /-------------------------------*/ |
| 67 | 507 | ROM_START(bowarrow) |
| 68 | | ROM_REGION(0x10000, "maincpu", 0) |
| 69 | | ROM_LOAD("b14.bin", 0x1400, 0x0200, CRC(d4d0f92a) SHA1(b996cbe9762fafd64115dc78e24626cf08f8abf7)) |
| 70 | | ROM_LOAD("b16.bin", 0x1600, 0x0200, CRC(ad2102e7) SHA1(86887beea5e03e80f60c947d6d71431e5eab3d1b)) |
| 71 | | ROM_LOAD("b18.bin", 0x1800, 0x0200, CRC(5d84656b) SHA1(d17350f5a0cc0cd00b60df4903034489dce7ade5)) |
| 72 | | ROM_LOAD("b1a.bin", 0x1a00, 0x0200, CRC(6f083ce6) SHA1(624b00e72e223c6b9fbf38b831200c9a7aa0d8f7)) |
| 73 | | ROM_LOAD("b1c.bin", 0x1c00, 0x0200, CRC(6ed4d39e) SHA1(1f6c57c7274c76246dd2f0b70ec459857a5cf1eb)) |
| 74 | | ROM_LOAD("b1e.bin", 0x1e00, 0x0200, CRC(ff2f97de) SHA1(28a8fdeccb1382d3a1153c97466426459c9fa075)) |
| 75 | | ROM_RELOAD( 0xfe00, 0x0200) |
| 508 | ROM_REGION(0x1000, "roms", 0) |
| 509 | ROM_LOAD("b14.bin", 0x0400, 0x0200, CRC(d4d0f92a) SHA1(b996cbe9762fafd64115dc78e24626cf08f8abf7)) |
| 510 | ROM_LOAD("b16.bin", 0x0600, 0x0200, CRC(ad2102e7) SHA1(86887beea5e03e80f60c947d6d71431e5eab3d1b)) |
| 511 | ROM_LOAD("b18.bin", 0x0800, 0x0200, CRC(5d84656b) SHA1(d17350f5a0cc0cd00b60df4903034489dce7ade5)) |
| 512 | ROM_LOAD("b1a.bin", 0x0a00, 0x0200, CRC(6f083ce6) SHA1(624b00e72e223c6b9fbf38b831200c9a7aa0d8f7)) |
| 513 | ROM_LOAD("b1c.bin", 0x0c00, 0x0200, CRC(6ed4d39e) SHA1(1f6c57c7274c76246dd2f0b70ec459857a5cf1eb)) |
| 514 | ROM_LOAD("b1e.bin", 0x0e00, 0x0200, CRC(ff2f97de) SHA1(28a8fdeccb1382d3a1153c97466426459c9fa075)) |
| 76 | 515 | ROM_END |
| 77 | 516 | |
| 78 | 517 | /*-------------------------------- |
| 79 | 518 | / Eight Ball |
| 80 | 519 | /-------------------------------*/ |
| 81 | 520 | ROM_START(eightbll) |
| 82 | | ROM_REGION(0x10000, "maincpu", 0) |
| 83 | | ROM_LOAD( "723-20_2.716", 0x1000, 0x0800, CRC(33559e7b) SHA1(49008db95c8f012e7e3b613e6eee811512207fa9)) |
| 84 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 85 | | ROM_RELOAD( 0xf800, 0x0800) |
| 521 | ROM_REGION(0x1000, "roms", 0) |
| 522 | ROM_LOAD( "723-20_2.716", 0x0000, 0x0800, CRC(33559e7b) SHA1(49008db95c8f012e7e3b613e6eee811512207fa9)) |
| 523 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 86 | 524 | ROM_END |
| 87 | 525 | |
| 88 | 526 | /*-------------------------------- |
| 89 | 527 | / Evel Knievel |
| 90 | 528 | /-------------------------------*/ |
| 91 | 529 | ROM_START(evelknie) |
| 92 | | ROM_REGION(0x10000, "maincpu", 0) |
| 93 | | ROM_LOAD( "722-17_2.716", 0x1000, 0x0800, CRC(b6d9a3fa) SHA1(1939e13f73a324e3d2fd269a54446f48cf530f50)) |
| 94 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 95 | | ROM_RELOAD( 0xf800, 0x0800) |
| 530 | ROM_REGION(0x1000, "roms", 0) |
| 531 | ROM_LOAD( "722-17_2.716", 0x0000, 0x0800, CRC(b6d9a3fa) SHA1(1939e13f73a324e3d2fd269a54446f48cf530f50)) |
| 532 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 96 | 533 | ROM_END |
| 97 | 534 | |
| 98 | 535 | /*-------------------------------- |
| 99 | 536 | / Freedom |
| 100 | 537 | /-------------------------------*/ |
| 101 | 538 | ROM_START(freedom) |
| 102 | | ROM_REGION(0x10000, "maincpu", 0) |
| 103 | | ROM_LOAD( "720-08_1.474", 0x1400, 0x0200, CRC(b78bceeb) SHA1(acf6f1a497ada344211f12dbf4be619bee559950)) |
| 104 | | ROM_LOAD( "720-10_2.474", 0x1600, 0x0200, CRC(ca90c8a7) SHA1(d9b5e95247e846e50a2a43c85ad5eb1fc761ab67)) |
| 105 | | ROM_LOAD( "720-07_6.716", 0x1800, 0x0800, CRC(0f4e8b83) SHA1(faa05dde24eb60be0cdc4456ae2e660a15ed85ac)) |
| 106 | | ROM_RELOAD( 0xf800, 0x0800) |
| 539 | ROM_REGION(0x1000, "roms", 0) |
| 540 | ROM_LOAD( "720-08_1.474", 0x0400, 0x0200, CRC(b78bceeb) SHA1(acf6f1a497ada344211f12dbf4be619bee559950)) |
| 541 | ROM_LOAD( "720-10_2.474", 0x0600, 0x0200, CRC(ca90c8a7) SHA1(d9b5e95247e846e50a2a43c85ad5eb1fc761ab67)) |
| 542 | ROM_LOAD( "720-07_6.716", 0x0800, 0x0800, CRC(0f4e8b83) SHA1(faa05dde24eb60be0cdc4456ae2e660a15ed85ac)) |
| 107 | 543 | ROM_END |
| 108 | 544 | |
| 109 | 545 | /*-------------------------------- |
| 110 | 546 | / Mata Hari |
| 111 | 547 | /-------------------------------*/ |
| 112 | 548 | ROM_START(matahari) |
| 113 | | ROM_REGION(0x10000, "maincpu", 0) |
| 114 | | ROM_LOAD( "725-21_2.716", 0x1000, 0x0800, CRC(63acd9b0) SHA1(2347342f1281c097ea39c79236d85b00a1dfc7b2)) |
| 115 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 116 | | ROM_RELOAD( 0xf800, 0x0800) |
| 549 | ROM_REGION(0x1000, "roms", 0) |
| 550 | ROM_LOAD( "725-21_2.716", 0x0000, 0x0800, CRC(63acd9b0) SHA1(2347342f1281c097ea39c79236d85b00a1dfc7b2)) |
| 551 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 117 | 552 | ROM_END |
| 118 | 553 | |
| 119 | 554 | /*-------------------------------- |
| 120 | 555 | / Night Rider |
| 121 | 556 | /-------------------------------*/ |
| 122 | 557 | ROM_START(nightrdr) |
| 123 | | ROM_REGION(0x10000, "maincpu", 0) |
| 124 | | ROM_LOAD( "721-21_1.716", 0x1000, 0x0800, CRC(237c4060) SHA1(4ce3dba9189fe7666fc76a2c8ee7fff9b12d4c00)) |
| 125 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(f394e357) SHA1(73444f848825a398515153d18de027792b57bcc7)) |
| 126 | | ROM_RELOAD( 0xf800, 0x0800) |
| 558 | ROM_REGION(0x1000, "roms", 0) |
| 559 | ROM_LOAD( "721-21_1.716", 0x0000, 0x0800, CRC(237c4060) SHA1(4ce3dba9189fe7666fc76a2c8ee7fff9b12d4c00)) |
| 560 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(f394e357) SHA1(73444f848825a398515153d18de027792b57bcc7)) |
| 127 | 561 | ROM_END |
| 128 | 562 | |
| 129 | 563 | ROM_START(nightr20) |
| 130 | | ROM_REGION(0x10000, "maincpu", 0) |
| 131 | | ROM_LOAD( "721-21_1.716", 0x1000, 0x0800, CRC(237c4060) SHA1(4ce3dba9189fe7666fc76a2c8ee7fff9b12d4c00)) |
| 132 | | ROM_LOAD( "720-20_6(__rev20).716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 133 | | ROM_RELOAD( 0xf800, 0x0800) |
| 564 | ROM_REGION(0x1000, "roms", 0) |
| 565 | ROM_LOAD( "721-21_1.716", 0x0000, 0x0800, CRC(237c4060) SHA1(4ce3dba9189fe7666fc76a2c8ee7fff9b12d4c00)) |
| 566 | ROM_LOAD( "720-20_6(__rev20).716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 134 | 567 | ROM_END |
| 135 | 568 | |
| 136 | 569 | /*-------------------------------- |
| 137 | 570 | / Power Play |
| 138 | 571 | /-------------------------------*/ |
| 139 | 572 | ROM_START(pwerplay) |
| 140 | | ROM_REGION(0x10000, "maincpu", 0) |
| 141 | | ROM_LOAD( "724-25_2.716", 0x1000, 0x0800, CRC(43012f35) SHA1(f90d582e3394d949a637a09882ffdad7664c44c0)) |
| 142 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 143 | | ROM_RELOAD( 0xf800, 0x0800) |
| 573 | ROM_REGION(0x1000, "roms", 0) |
| 574 | ROM_LOAD( "724-25_2.716", 0x0000, 0x0800, CRC(43012f35) SHA1(f90d582e3394d949a637a09882ffdad7664c44c0)) |
| 575 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 144 | 576 | ROM_END |
| 145 | 577 | |
| 146 | 578 | /*-------------------------------- |
| r31436 | r31437 | |
| 151 | 583 | / Strikes and Spares |
| 152 | 584 | /-------------------------------*/ |
| 153 | 585 | ROM_START(stk_sprs) |
| 154 | | ROM_REGION(0x10000, "maincpu", 0) |
| 155 | | ROM_LOAD( "740-16_2.716", 0x1000, 0x0800, CRC(2be27024) SHA1(266dee3a5c4c115acc20543df2eb172f1e85dacb)) |
| 156 | | ROM_LOAD( "720-20_6.716", 0x1800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 157 | | ROM_RELOAD( 0xf800, 0x0800) |
| 586 | ROM_REGION(0x1000, "roms", 0) |
| 587 | ROM_LOAD( "740-16_2.716", 0x0000, 0x0800, CRC(2be27024) SHA1(266dee3a5c4c115acc20543df2eb172f1e85dacb)) |
| 588 | ROM_LOAD( "720-20_6.716", 0x0800, 0x0800, CRC(0c17aa4d) SHA1(729e61a29691857112579efcdb96a35e8e5b1279)) |
| 158 | 589 | ROM_END |
| 159 | 590 | |
| 160 | 591 | |