trunk/src/mess/drivers/gimix.c
| r31427 | r31428 | |
| 13 | 13 | Information Link: http://www.backglass.org/duncan/gimix/ |
| 14 | 14 | |
| 15 | 15 | TODO: Everything |
| 16 | |
| 17 | Usage: |
| 18 | System boots into GMXBUG-09 |
| 19 | To boot Flex, insert the Flex system disk (3.3 or later, must support the DMA disk controller), type U and press enter. |
| 20 | To boot OS-9, insert the OS-9 system disk, type O, and press Enter. |
| 21 | Note that booting OS-9 doesn't currently work without a timer hack. |
| 16 | 22 | */ |
| 17 | 23 | |
| 18 | 24 | #include "emu.h" |
| r31427 | r31428 | |
| 86 | 92 | , m_bank16(*this, "bank16") |
| 87 | 93 | , m_rombank1(*this, "rombank1") |
| 88 | 94 | , m_rombank2(*this, "rombank2") |
| 89 | | , m_rombank3(*this, "rombank3") |
| 90 | 95 | , m_fixedrombank(*this, "fixedrombank") |
| 91 | 96 | {} |
| 92 | 97 | |
| r31427 | r31428 | |
| 106 | 111 | DECLARE_WRITE8_MEMBER(pia_pa_w); |
| 107 | 112 | DECLARE_READ8_MEMBER(pia_pb_r); |
| 108 | 113 | DECLARE_WRITE8_MEMBER(pia_pb_w); |
| 114 | TIMER_DEVICE_CALLBACK_MEMBER(test_timer_w); |
| 109 | 115 | |
| 110 | 116 | DECLARE_FLOPPY_FORMATS(floppy_formats); |
| 111 | 117 | |
| r31427 | r31428 | |
| 160 | 166 | required_device<address_map_bank_device> m_bank16; |
| 161 | 167 | required_memory_bank m_rombank1; |
| 162 | 168 | required_memory_bank m_rombank2; |
| 163 | | required_memory_bank m_rombank3; |
| 164 | 169 | required_memory_bank m_fixedrombank; |
| 165 | 170 | |
| 166 | 171 | }; |
| r31427 | r31428 | |
| 179 | 184 | AM_RANGE(0x0e240, 0x0e3af) AM_RAM |
| 180 | 185 | AM_RANGE(0x0e3b0, 0x0e3b3) AM_READWRITE(dma_r, dma_w) // DMA controller (custom?) |
| 181 | 186 | AM_RANGE(0x0e3b4, 0x0e3b7) AM_READWRITE(fdc_r, fdc_w) // FD1797 FDC |
| 182 | | AM_RANGE(0x0e400, 0x0e7ff) AM_RAM |
| 183 | | AM_RANGE(0x0e800, 0x0efff) AM_ROMBANK("rombank3") |
| 187 | AM_RANGE(0x0e400, 0x0e7ff) AM_RAM // scratchpad RAM |
| 188 | AM_RANGE(0x0e800, 0x0efff) AM_RAM |
| 184 | 189 | AM_RANGE(0x0f000, 0x0f7ff) AM_ROMBANK("rombank2") |
| 185 | 190 | AM_RANGE(0x0f800, 0x0ffff) AM_ROMBANK("rombank1") |
| 186 | 191 | //AM_RANGE(0x10000, 0x1ffff) AM_RAM |
| r31427 | r31428 | |
| 249 | 254 | { |
| 250 | 255 | m_rombank1->set_entry(2); |
| 251 | 256 | m_rombank2->set_entry(3); |
| 252 | | m_rombank3->set_entry(1); |
| 253 | 257 | m_fixedrombank->set_entry(2); |
| 254 | 258 | logerror("SYS: FPLA software latch set\n"); |
| 255 | 259 | } |
| r31427 | r31428 | |
| 257 | 261 | { |
| 258 | 262 | m_rombank1->set_entry(0); |
| 259 | 263 | m_rombank2->set_entry(1); |
| 260 | | m_rombank3->set_entry(2); |
| 261 | 264 | m_fixedrombank->set_entry(0); |
| 262 | 265 | logerror("SYS: FPLA software latch reset\n"); |
| 263 | 266 | } |
| r31427 | r31428 | |
| 453 | 456 | m_term_data = 0; |
| 454 | 457 | m_rombank1->set_entry(0); // RAM banks are undefined on startup |
| 455 | 458 | m_rombank2->set_entry(1); |
| 456 | | m_rombank3->set_entry(2); |
| 457 | 459 | m_fixedrombank->set_entry(0); |
| 458 | 460 | m_dma_status = 0x00; |
| 459 | 461 | m_dma_ctrl = 0x00; |
| r31427 | r31428 | |
| 470 | 472 | UINT8* ROM = m_rom->base(); |
| 471 | 473 | m_rombank1->configure_entries(0,4,ROM,0x800); |
| 472 | 474 | m_rombank2->configure_entries(0,4,ROM,0x800); |
| 473 | | m_rombank3->configure_entries(0,4,ROM,0x800); |
| 474 | 475 | m_fixedrombank->configure_entries(0,4,ROM+0x700,0x800); |
| 475 | 476 | m_rombank1->set_entry(0); // RAM banks are undefined on startup |
| 476 | 477 | m_rombank2->set_entry(1); |
| 477 | | m_rombank3->set_entry(2); |
| 478 | 478 | m_fixedrombank->set_entry(0); |
| 479 | 479 | // install any extra RAM |
| 480 | 480 | if(m_ram->size() > 65536) |
| r31427 | r31428 | |
| 512 | 512 | m_acia2->write_rxc(state); |
| 513 | 513 | } |
| 514 | 514 | |
| 515 | TIMER_DEVICE_CALLBACK_MEMBER(gimix_state::test_timer_w) |
| 516 | { |
| 517 | static bool prev; |
| 518 | if(!prev) |
| 519 | { |
| 520 | m_maincpu->set_input_line(M6809_IRQ_LINE,ASSERT_LINE); |
| 521 | prev = true; |
| 522 | } |
| 523 | else |
| 524 | { |
| 525 | m_maincpu->set_input_line(M6809_IRQ_LINE,CLEAR_LINE); |
| 526 | prev = false; |
| 527 | } |
| 528 | } |
| 529 | |
| 515 | 530 | FLOPPY_FORMATS_MEMBER( gimix_state::floppy_formats ) |
| 516 | 531 | FLOPPY_FLEX_FORMAT |
| 517 | 532 | FLOPPY_FORMATS_END |
| 518 | 533 | |
| 519 | 534 | static SLOT_INTERFACE_START( gimix_floppies ) |
| 520 | | SLOT_INTERFACE( "525dd", FLOPPY_525_DD ) |
| 535 | SLOT_INTERFACE( "525hd", FLOPPY_525_HD ) |
| 521 | 536 | SLOT_INTERFACE_END |
| 522 | 537 | |
| 523 | 538 | #define MCFG_ADDRESS_BANK(tag) \ |
| r31427 | r31428 | |
| 546 | 561 | MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(gimix_state,fdc_irq_w)) |
| 547 | 562 | MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(gimix_state,fdc_drq_w)) |
| 548 | 563 | MCFG_WD_FDC_FORCE_READY |
| 549 | | MCFG_FLOPPY_DRIVE_ADD("fdc:0", gimix_floppies, "525dd", gimix_state::floppy_formats) |
| 550 | | MCFG_FLOPPY_DRIVE_ADD("fdc:1", gimix_floppies, "525dd", gimix_state::floppy_formats) |
| 564 | MCFG_FLOPPY_DRIVE_ADD("fdc:0", gimix_floppies, "525hd", gimix_state::floppy_formats) |
| 565 | MCFG_FLOPPY_DRIVE_ADD("fdc:1", gimix_floppies, "525hd", gimix_state::floppy_formats) |
| 551 | 566 | |
| 552 | 567 | /* parallel ports */ |
| 553 | 568 | MCFG_DEVICE_ADD("pia1",PIA6821,XTAL_2MHz) |
| r31427 | r31428 | |
| 561 | 576 | MCFG_DEVICE_ADD("acia1",ACIA6850,XTAL_2MHz) |
| 562 | 577 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("serial1",rs232_port_device,write_txd)) |
| 563 | 578 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("serial1",rs232_port_device,write_rts)) |
| 579 | |
| 564 | 580 | MCFG_DEVICE_ADD("acia2",ACIA6850,XTAL_2MHz) |
| 565 | 581 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("serial2",rs232_port_device,write_txd)) |
| 566 | 582 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("serial2",rs232_port_device,write_rts)) |
| 583 | |
| 567 | 584 | MCFG_DEVICE_ADD("acia3",ACIA6850,XTAL_2MHz) |
| 568 | 585 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("serial3",rs232_port_device,write_txd)) |
| 569 | 586 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("serial3",rs232_port_device,write_rts)) |
| 587 | |
| 570 | 588 | MCFG_DEVICE_ADD("acia4",ACIA6850,XTAL_2MHz) |
| 571 | 589 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("serial4",rs232_port_device,write_txd)) |
| 572 | 590 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("serial4",rs232_port_device,write_rts)) |
| r31427 | r31428 | |
| 613 | 631 | MCFG_RAM_DEFAULT_SIZE("128K") |
| 614 | 632 | MCFG_RAM_EXTRA_OPTIONS("56K,256K,512K") |
| 615 | 633 | |
| 634 | // uncomment this timer to use a hack that generates a regular IRQ, this will get OS-9 to boot |
| 635 | // for some unknown reason, OS-9 does not touch the 6840, and only clears/disables IRQs on the RTC |
| 636 | //MCFG_TIMER_DRIVER_ADD_PERIODIC("test_timer",gimix_state,test_timer_w,attotime::from_msec(100)) |
| 616 | 637 | MACHINE_CONFIG_END |
| 617 | 638 | |
| 618 | 639 | ROM_START( gimix ) |
| 619 | 640 | ROM_REGION( 0x10000, "roms", 0) |
| 620 | | |
| 621 | | /* CPU board U4: gimixf8.bin - checksum 68DB - 2716 - GMXBUG09 V2.1 | (c)1981 GIMIX | $F800 I2716 */ |
| 641 | /* CPU board U4: gimixf8.bin - checksum 68DB - 2716 - GMXBUG09 V2.1 | (c)1981 GIMIX | $F800 I2716 */ |
| 622 | 642 | ROM_LOAD( "gimixf8.u4", 0x000000, 0x000800, CRC(7d60f838) SHA1(eb7546e8bbf50d33e181f3e86c3e4c5c9032cab2) ) |
| 623 | 643 | /* CPU board U5: gimixv14.bin - checksum 97E2 - 2716 - GIMIX 6809 | AUTOBOOT | V1.4 I2716 */ |
| 624 | 644 | ROM_LOAD( "gimixv14.u5", 0x000800, 0x000800, CRC(f795b8b9) SHA1(eda2de51cc298d94b36605437d900ce971b3b276) ) |