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r31403 Thursday 24th July, 2014 at 00:08:59 UTC by hap
aaaand tms70c46 made a comeback

[src/emu/cpu/tms7000]	tms7000.c tms7000.h
[src/mess/drivers]	ti74.c

trunk/src/emu/cpu/tms7000/tms7000.c

r31402	r31403
23	23	*  - memory modes with IOCNT0, currently always running in full expansion mode
24	24	*  - timer event counter mode (timer control register, bit 6)
25	25	*  - TMS70x1/2 serial port and timer 3
	26	*  - TMS70C46 clock divider (don't know which part of the memorymap is slow)
	27	*  - TMS70C46 INT3 on keypress
26	28	*  - when they're needed, add TMS70Cx2, TMS7742, TMS77C82, SE70xxx
27	29	*
28	30	*****************************************************************************/
29	31
30	32	#include "tms7000.h"
31	33
32		// 7000 is the most basic one, 128 bytes internal RAM and no internal ROM.
33		// 7020 and 7040 are same, but with 2KB and 4KB internal ROM respectively.
	34	// TMS7000 is the most basic one, 128 bytes internal RAM and no internal ROM.
	35	// TMS7020 and TMS7040 are same, but with 2KB and 4KB internal ROM respectively.
34	36	const device_type TMS7000 = &device_creator<tms7000_device>;
35	37	const device_type TMS7020 = &device_creator<tms7020_device>;
36	38	const device_type TMS7040 = &device_creator<tms7040_device>;
37	39
38		// Exelvision (spinoff of TI) 7020 added one custom opcode.
	40	// Exelvision (spinoff of TI) TMS7020 added one custom opcode.
39	41	const device_type TMS7020_EXL = &device_creator<tms7020_exl_device>;
40	42
41	43	// CMOS devices biggest difference in a 'real world' setting is that the power
r31402	r31403
44	46	const device_type TMS70C20 = &device_creator<tms70c20_device>;
45	47	const device_type TMS70C40 = &device_creator<tms70c40_device>;
46	48
47		// 70x1 features more peripheral I/O, the main addition being a serial port.
48		// 70x2 is the same, just with twice more RAM (256 bytes)
	49	// TMS70x1 features more peripheral I/O, the main addition being a serial port.
	50	// TMS70x2 is the same, just with twice more RAM (256 bytes)
49	51	const device_type TMS7001 = &device_creator<tms7001_device>;
50	52	const device_type TMS7041 = &device_creator<tms7041_device>;
51	53	const device_type TMS7002 = &device_creator<tms7002_device>;
52	54	const device_type TMS7042 = &device_creator<tms7042_device>;
53	55
54		// 70Cx2 is an update to 70x2 with some extra features. Due to some changes
55		// in peripheral file I/O, it is not backward compatible to 70x2.
	56	// TMS70C46 is a TMS70C40, plus support for external memory bus, clock divider
	57	// on slow memory, and wake-up on keypress.
	58	const device_type TMS70C46 = &device_creator<tms70c46_device>;
56	59
	60	// TMS70Cx2 is an update to TMS70x2 with some extra features. Due to some changes
	61	// in peripheral file I/O, it is not backward compatible to TMS70x2.
57	62
	63
58	64	// flag helpers
59	65	#define SR_C        0x80 /* Carry */
60	66	#define SR_N        0x40 /* Negative */
r31402	r31403
112	118	AM_IMPORT_FROM( tms7002_mem )
113	119	ADDRESS_MAP_END
114	120
	121	static ADDRESS_MAP_START(tms70c46_io, AS_IO, 8, tms70c46_device)
	122	AM_RANGE(TMS7000_PORTC, TMS7000_PORTC) AM_WRITE(e_bus_address_lo_w)
	123	AM_RANGE(TMS7000_PORTD, TMS7000_PORTD) AM_WRITE(e_bus_address_hi_w)
	124	AM_IMPORT_FROM( tms7000_io )
	125	ADDRESS_MAP_END
115	126
	127	static ADDRESS_MAP_START(tms70c46_mem, AS_PROGRAM, 8, tms70c46_device )
	128	AM_RANGE(0x010c, 0x010c) AM_READWRITE(e_bus_data_r, e_bus_data_w)
	129	//   AM_RANGE(0x010d, 0x010d) --> to outside --> DOCK-BUS available
	130	//   AM_RANGE(0x010e, 0x010e) --> to outside --> DOCK-BUS data (d0-d3)
	131	//   AM_RANGE(0x010f, 0x010f) --> to outside --> DOCK-BUS handshake
	132	AM_RANGE(0x0118, 0x0118) AM_READWRITE(control_r, control_w)
	133	AM_IMPORT_FROM( tms7040_mem )
	134	ADDRESS_MAP_END
	135
	136
116	137	// device definitions
117	138	tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
118	139	: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__),
119	140	m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)),
120	141	m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io)),
	142	m_data_config("data", ENDIANNESS_BIG, 8, 16, 0),
121	143	m_info_flags(0)
122	144	{
123	145	}
r31402	r31403
126	148	: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
127	149	m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal),
128	150	m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io)),
	151	m_data_config("data", ENDIANNESS_BIG, 8, 16, 0),
129	152	m_info_flags(info_flags)
130	153	{
131	154	}
r31402	r31403
180	203	{
181	204	}
182	205
	206	tms70c46_device::tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	207	: tms7000_device(mconfig, TMS70C46, "TMS70C46", tag, owner, clock, ADDRESS_MAP_NAME(tms70c46_mem), TMS7000_CHIP_IS_CMOS, "tms70c46", __FILE__)
	208	{
	209	m_io_config = address_space_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms70c46_io));
	210	}
183	211
	212
184	213	//-------------------------------------------------
185	214	//  device_start - device-specific startup
186	215	//-------------------------------------------------
r31402	r31403
191	220	m_program = &space(AS_PROGRAM);
192	221	m_direct = &m_program->direct();
193	222	m_io = &space(AS_IO);
	223	m_data = &space(AS_DATA);
194	224
195	225	m_icountptr = &m_icount;
196	226
r31402	r31403
240	270	save_item(NAME(m_timer_capture_latch));
241	271
242	272	// register for debugger
243		state_add( TMS7000_PC, "PC", m_pc).formatstr("%02X");
244		state_add( TMS7000_SP, "S", m_sp).formatstr("%02X");
245		state_add( TMS7000_ST, "ST", m_sr).formatstr("%02X");
	273	state_add(TMS7000_PC, "PC", m_pc).formatstr("%02X");
	274	state_add(TMS7000_SP, "S", m_sp).formatstr("%02X");
	275	state_add(TMS7000_ST, "ST", m_sr).formatstr("%02X");
246	276
247	277	state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%02X").noshow();
248	278	state_add(STATE_GENSP, "GENSP", m_sp).formatstr("%02X").noshow();
r31402	r31403
329	359
330	360	bool irqstate = (state == CLEAR_LINE) ? false : true;
331	361
332		// reverse polarity (70cx2-only)
	362	// reverse polarity (TMS70cx2-only)
333	363	if (m_io_control[2] & (0x01 << (4 * extline)))
334	364	irqstate = !irqstate;
335	365
r31402	r31403
346	376	if (extline == TMS7000_INT3_LINE)
347	377	m_timer_capture_latch[0] = m_timer_decrementer[0];
348	378
349		// on 70cx2, latch timer 2 on INT1
	379	// on TMS70cx2, latch timer 2 on INT1
350	380	if (extline == TMS7000_INT1_LINE && chip_is_family_70cx2())
351	381	m_timer_capture_latch[1] = m_timer_decrementer[1];
352	382
353		// clear external if it's edge-triggered (70cx2-only)
	383	// clear external if it's edge-triggered (TMS70cx2-only)
354	384	if (m_io_control[2] & (0x02 << (4 * extline)))
355	385	m_irq_state[extline] = false;
356	386
r31402	r31403
482	512
483	513	//-------------------------------------------------
484	514	//  peripheral file - read/write internal ports
485		//  note: 7000 family is from $00 to $0b, 7002 family adds $10 to $17
	515	//  note: TMS7000 family is from $00 to $0b, TMS7002 family adds $10 to $17
486	516	//-------------------------------------------------
487	517
488	518	READ8_MEMBER(tms7000_device::tms7000_pf_r)
r31402	r31403
513	543	break;
514	544	}
515	545
516		// port direction (note: 7000 doesn't support it for port A)
	546	// port direction (note: TMS7000 doesn't support it for port A)
517	547	case 0x05: case 0x09: case 0x0b:
518	548	return m_port_ddr[offset / 2 - 2];
519	549
r31402	r31403
585	615
586	616	break;
587	617
588		// port data (note: 7000 doesn't support it for port A)
	618	// port data (note: TMS7000 doesn't support it for port A)
589	619	case 0x04: case 0x06: case 0x08: case 0x0a:
590	620	{
591	621	// note: in memory expansion modes, some port output pins are used for memory strobes.
r31402	r31403
596	626	break;
597	627	}
598	628
599		// port direction (note: 7000 doesn't support it for port A)
	629	// port direction (note: TMS7000 doesn't support it for port A)
600	630	case 0x05: case 0x09: case 0x0b:
601	631	// note: changing port direction does not change(refresh) the output pins
602	632	m_port_ddr[offset / 2 - 2] = data;
r31402	r31403
867	897	else
868	898	tms7000_device::execute_one(op);
869	899	}
	900
	901
	902	//-------------------------------------------------
	903	//  TMS70C46 specifics
	904	//-------------------------------------------------
	905
	906	void tms70c46_device::device_start()
	907	{
	908	// init/zerofill
	909	m_e_bus_address = 0;
	910	m_control = 0;
	911
	912	// register for savestates
	913	save_item(NAME(m_e_bus_address));
	914	save_item(NAME(m_control));
	915
	916	tms7000_device::device_start();
	917	}
	918
	919	READ8_MEMBER(tms70c46_device::control_r)
	920	{
	921	return m_control;
	922	}
	923
	924	WRITE8_MEMBER(tms70c46_device::control_w)
	925	{
	926	// d5: enable external databus
	927	// d4: enable clock divider when accessing slow memory
	928	// d0-d3: clock divider
	929	m_control = data;
	930	}

trunk/src/emu/cpu/tms7000/tms7000.h

r31402	r31403
40	40	TMS7000_PORTA = 0,      /* read-only on 70x0 */
41	41	TMS7000_PORTB,          /* write-only */
42	42	TMS7000_PORTC,
43		TMS7000_PORTD
	43	TMS7000_PORTD,
	44	TMS7000_PORTE           /* TMS70C46 only */
44	45	};
45	46
46	47	// chip info flags
r31402	r31403
87	88	virtual void execute_set_input(int extline, int state);
88	89
89	90	// device_memory_interface overrides
90		virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
	91	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) ); }
91	92
92	93	// device_state_interface overrides
93	94	void state_string_export(const device_state_entry &entry, astring &string);
r31402	r31403
101	102
102	103	address_space_config m_program_config;
103	104	address_space_config m_io_config;
	105	address_space_config m_data_config;
104	106
105	107	UINT32 m_info_flags;
106	108
107	109	address_space *m_program;
108	110	direct_read_data *m_direct;
109	111	address_space *m_io;
	112	address_space *m_data;
110	113	int m_icount;
111	114
112	115	bool m_irq_state[2];
r31402	r31403
268	271	{
269	272	public:
270	273	tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	274
271	275	protected:
272	276	virtual void execute_one(UINT8 op);
273	277
r31402	r31403
304	308	};
305	309
306	310
	311	class tms70c46_device : public tms7000_device
	312	{
	313	public:
	314	tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	315
	316	DECLARE_READ8_MEMBER(control_r);
	317	DECLARE_WRITE8_MEMBER(control_w);
	318
	319	// extra 64KB external memory bus, or extra i/o port
	320	DECLARE_WRITE8_MEMBER(e_bus_address_lo_w) { m_e_bus_address = (m_e_bus_address & 0xff00) | data; }
	321	DECLARE_WRITE8_MEMBER(e_bus_address_hi_w) { m_e_bus_address = (m_e_bus_address & 0x00ff) | data << 8; }
	322	DECLARE_READ8_MEMBER(e_bus_data_r) { return (m_control & 0x20) ? m_data->read_byte(m_e_bus_address) : m_io->read_byte(TMS7000_PORTE); }
	323	DECLARE_WRITE8_MEMBER(e_bus_data_w) { if (m_control & 0x20) m_data->write_byte(m_e_bus_address, data); else m_io->write_byte(TMS7000_PORTE, data); }
	324
	325	protected:
	326	// device-level overrides
	327	virtual void device_start();
	328
	329	private:
	330	UINT16 m_e_bus_address;
	331	UINT8 m_control;
	332	};
	333
	334
307	335	class tms7001_device : public tms7000_device
308	336	{
309	337	public:
r31402	r31403
339	367	extern const device_type TMS70C00;
340	368	extern const device_type TMS70C20;
341	369	extern const device_type TMS70C40;
	370	extern const device_type TMS70C46;
342	371	extern const device_type TMS7001;
343	372	extern const device_type TMS7041;
344	373	extern const device_type TMS7002;

trunk/src/mess/drivers/ti74.c

r31402	r31403
3	3	/***************************************************************************
4	4
5	5	Texas Instruments TI-74 BASICALC
	6	Texas Instruments TI-95 PROCALC
6	7	hardware family: CC-40 -> TI-74 BASICALC -> TI-95 PROCALC
7	8
8	9	DOCK-BUS
r31402	r31403
27	28	|                                            |
28	29	|                                            |
29	30	----------                                   |
30		|-----------------------------------|
31		||                                 ||
32		|| LCD 1 line, 31 chars + 14 indic.||
33		||                                 ||
34		|-----------------------------------|
	31	| ----------------------------------|
	32	| |                                ||
	33	| |          LCD screen            ||
	34	| |                                ||
	35	| ----------------------------------|
35	36	-------------------------------------
36	37
37	38	IC1 HN61256PC93 - Hitachi DIP-28 32KB CMOS Mask PROM
38		IC2 C70009      - Texas Instruments TMS70C40 with some TI custom I/O mods, 54 pins (also seen labeled TMS70C46)
	39	IC2 C70009      - Texas Instruments TMS70C40 with some TI custom I/O mods, 54 pins (C70011 in case of TI-95)
39	40	running at max 4MHz. 128 bytes internal RAM, 4KB internal ROM
40	41	IC3 HM6264LP-15 - Hitachi 8KB SRAM (battery backed)
41	42	RC4193N         - Micropower Switching Regulator
r31402	r31403
48	49	Overall, the hardware is very similar to TI CC-40. A lot has been shuffled around
49	50	to cut down on complexity (and probably for protection too).
50	51
51		TI-74 is powered by 4 AAA batteries. These will also save internal RAM,
	52	The machine is powered by 4 AAA batteries. These will also save internal RAM,
52	53	provided that the machine is turned off properly.
53	54
54	55
55	56	TODO:
56		- control_r/w clock divider (currently always running full speed)
	57	- it runs too fast due to missing clock divider emulation in TMS70C46
57	58	- external ram cartridge
58	59	- DOCK-BUS interface and peripherals
59	60	* CI-7 cassette interface
r31402	r31403
79	80	m_maincpu(*this, "maincpu")
80	81	{ }
81	82
82		required_device<tms70c40_device> m_maincpu;
	83	required_device<tms70c46_device> m_maincpu;
83	84
84	85	ioport_port *m_key_matrix[8];
85	86	emu_timer *m_poweron_timer;
86	87
87		UINT8 m_control;
88	88	UINT8 m_key_select;
89		UINT16 m_ext_address;
90	89	UINT8 m_power;
91	90
92	91	void update_lcd_indicator(UINT8 y, UINT8 x, int state);
93	92
94		DECLARE_READ8_MEMBER(control_r);
95		DECLARE_WRITE8_MEMBER(control_w);
96	93	DECLARE_READ8_MEMBER(keyboard_r);
97	94	DECLARE_WRITE8_MEMBER(keyboard_w);
98	95	DECLARE_WRITE8_MEMBER(bankswitch_w);
99		DECLARE_WRITE8_MEMBER(ext_address_w);
100	96
101	97	virtual void machine_reset();
102	98	virtual void machine_start();
r31402	r31403
193	189
194	190	***************************************************************************/
195	191
196		READ8_MEMBER(ti74_state::control_r)
197		{
198		return m_control;
199		}
200
201		WRITE8_MEMBER(ti74_state::control_w)
202		{
203		// ? clock divider related
204		m_control = data;
205		}
206
207	192	READ8_MEMBER(ti74_state::keyboard_r)
208	193	{
209	194	UINT8 ret = 0;
r31402	r31403
236	221	m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // stop running
237	222	}
238	223
239		// other bits: N/C
	224	// d3: N/C
240	225	}
241	226
242		WRITE8_MEMBER(ti74_state::ext_address_w)
243		{
244		// set external memory addressbus (DOCK-BUS related)
245		if (offset)
246		m_ext_address = (m_ext_address & 0xff00) | data;
247		else
248		m_ext_address = (m_ext_address & 0x00ff) | data << 8;
249		}
250
251	227	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, ti74_state )
252	228	ADDRESS_MAP_UNMAP_HIGH
253
254		AM_RANGE(0x010c, 0x010c) AM_WRITE(keyboard_w) AM_READNOP
255		AM_RANGE(0x010d, 0x010d) AM_NOP // ? DOCK-BUS related
256		AM_RANGE(0x010e, 0x010e) AM_NOP // ? DOCK-BUS related
257		AM_RANGE(0x010f, 0x010f) AM_NOP // ? DOCK-BUS related
258		AM_RANGE(0x0118, 0x0118) AM_READWRITE(control_r, control_w)
259
	229	AM_RANGE(0x010d, 0x010f) AM_NOP // DOCK-BUS
260	230	AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE("hd44780", hd44780_device, read, write)
261
262	231	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("6264.ic3")
263	232	AM_RANGE(0x4000, 0xbfff) AM_ROM AM_REGION("user1", 0)
264	233	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("sysbank")
r31402	r31403
267	236	static ADDRESS_MAP_START( main_io_map, AS_IO, 8, ti74_state )
268	237	AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(keyboard_r)
269	238	AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(bankswitch_w)
270		AM_RANGE(TMS7000_PORTC, TMS7000_PORTD) AM_WRITE(ext_address_w)
	239	AM_RANGE(TMS7000_PORTE, TMS7000_PORTE) AM_WRITE(keyboard_w) AM_READNOP
271	240	ADDRESS_MAP_END
272	241
273	242
r31402	r31403
401	370	m_poweron_timer->adjust(attotime::never);
402	371
403	372	// zerofill
404		m_control = 0;
405	373	m_key_select = 0;
406		m_ext_address = 0;
407	374	m_power = 0;
408	375
409	376	// register for savestates
410		save_item(NAME(m_control));
411	377	save_item(NAME(m_key_select));
412		save_item(NAME(m_ext_address));
413	378	save_item(NAME(m_power));
414	379	}
415	380
416	381	static MACHINE_CONFIG_START( ti74, ti74_state )
417	382
418	383	/* basic machine hardware */
419		MCFG_CPU_ADD("maincpu", TMS70C40, XTAL_4MHz) // C70009 is a TMS70C40 underneath
	384	MCFG_CPU_ADD("maincpu", TMS70C46, XTAL_4MHz)
420	385	MCFG_CPU_PROGRAM_MAP(main_map)
421	386	MCFG_CPU_IO_MAP(main_io_map)
422	387
r31402	r31403
458	423
459	424	ROM_START( ti74 )
460	425	ROM_REGION( 0x10000, "maincpu", 0 )
461		ROM_LOAD( "tms70c46.ic2", 0xf000, 0x1000, CRC(55a2f7c0) SHA1(530e3de42f2e304c8f4805ad389f38a459ec4e33) ) // internal cpu rom
	426	ROM_LOAD( "c70009.ic2", 0xf000, 0x1000, CRC(55a2f7c0) SHA1(530e3de42f2e304c8f4805ad389f38a459ec4e33) ) // internal cpu rom
462	427
463	428	ROM_REGION( 0x8000, "system", 0 )
464		ROM_LOAD( "001060281-1.ic1", 0x0000, 0x8000, CRC(019aaa2f) SHA1(04a1e694a49d50602e45a7834846de4d9f7d587d) ) // system rom, banked
	429	ROM_LOAD( "hn61256pc93.ic1", 0x0000, 0x8000, CRC(019aaa2f) SHA1(04a1e694a49d50602e45a7834846de4d9f7d587d) ) // system rom, banked
465	430
466	431	ROM_REGION( 0x8000, "user1", ROMREGION_ERASEFF ) // cartridge area
467	432	ROM_END

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